Computer memory organization and method therefor

Day (24) Running day (41) Alm. avail.

19994536

1999.09.17

1997.04.25

1999.11.22 (86) Int. Entry date and application number (85) Transfer day (30) Priority

1997.04.25, PCTÆP97 / 02112 1999.09.17

1997.03.21, EP, 97400650 (71) Seeking (72) Inventor (74) Proxy

Canal + SA, 85/89, Quai André Citroen, F-75711 Paris Cedex 15, FR Jean-Claude Sarfati, Épinay-sur-Seine, FR Christophe Declerck, Senantes, FR JK Thorsens Patentbureau AS, 0134 Oslo (54) Designation Organization of computer memory (57) Summary

In a memory in a computer system, the buffer is defined by a buffer management system. A command to set the buffer defines a number of (NP) buffer pools and for each pool a pool size (PS) based on the number of buffers in the pool and the size (BS) of the buffers in that pool. The buffer manager system is initialized to store the buffer sizes as well as to cumulate and store the pool sizes. To address a buffer, the buffer manager system determines the address of the start of the buffer from the desired pool and buffer numbers, utilizing the stored information. To update a page split FLASH memory, a page Pn is also copied in the FLASH memory (4024) in the form of a duplicate page to a direct memory (RAM, 4022) and the duplicate page is updated and written back on another page in the FLASH memory. A master register table (22) is stored in a separate non-volatile memory (EEPROM, 4026) to identify valid pages in the FLASH memory and is updated when a page in the FLASH memory has been updated. The master register table includes a CRC error detection section (25) and is copied to a backup register table (23) immediately after being updated.

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