Modem for telephone systems

The present invention generally pertains to communications systems and is particularly directed to a modem and modulator and demodulator constituent parts of a modem, for converting a bit stream into a phase modulated intermediate frequency (IF) signal and vice-versa, for use in an RF subscriber telephone system.

*

According to the invention, a multiple phase modulator, a communications system comprising the modulator, a multiple phase demodulator and a modem io comprising the modulator and demodulator are provided, as defined in·claims 1, 11, Id and 23 respectively.

The modem of the present invention includes a modulator section and a demodulator section. The transmitter section is a system for converting a bit stream, wherein each given number of successive bits defines a symbol, into a phase modulated intermediate frequency (IF) signal at a predetermined IF frequency.

The modulator section phase modulates each symbol; digitally filters each phase modulated symbol to provide a

2o filtered signal that, when converted to an analog signal, provides a modulation signal of a modulation frequency that is centered about a predetermined frequency and deviates therefrom in accordance with the value of the phase modulated symbol; converts the filtered signal into an analog signal to provide the modulation signal; and mixes the modulation signal with a steady-state signal at a ;

frequency t© provide & phase saodulated XF signal th®t i® a frequency modulated 3FH) signal having ©ft XF frequency that is a modulation product of the modulation frequency and the predetermined frequency» w

The demodulator section of the modem includes a

A demodulating system for converting a received phase modulated XF signal to the bit stream from which the received phase modulated XF signal was derived.

The Modern of the present invention can operate in a 10 transmit mode, a receive mode, in a time-multiplexed transmit/receive mode or in a training mode.

When operating in the transmit mode, the modem modulator section receives a digital binary bit stream of up to four bits per symbol and then converts the symbols into a phase modulated IF signal at a predetermined IF frequency of 20.2 MHs. The modulated IF signal is transferred to an HF unit for up-conversion and transmission on the proper VHF frequency.

When operating in the receive mode, the modem receiver section receives a phase modulated XF signal from an RF receiver unit. The modem filters and down-converts the

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«igaa! to bassbaad fesgueney ^ad digitis^is the s&ms into *> cosnplsa O_PQ) sample at a predetermined icyabol rate of 13 Ksps (Kilosymbols per second). A digital FXR filter performs further filtering and the complex samples are converted to £ digits! binary bit stream» The binary bit ♦* stream is then output to & baseband unit a

P

The modem further performs functions to provide for symbol synchronization measurement of link quality, and various control and status reporting functions.

At certain intervals, the modem may be placed in a training mode. In this mode, the modem modulator and demodulator sections are looped back through the RF unit in order to train the demodulator section FIR filter for changes in the system (mainly the RF unit filters) that may have changed with temperature or age, adjoining channel attenuations, or other environment fluctuations. The FIR filter of the demodulator section trains its coefficients to counteract any filter imperfections in order to achieve the best input signal possible. During this loopback, the modem transmitter section puts out a fixed training pattern known to the modem demodulator section. The demodulator section

FIR filter adjusts (trains) its coefficients according to the n>

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signtal delsy&d end advanced isignalt&p end wi^nd® from the edjacent bands.

The modem of the present invention is particularly useful in a radio^telephone system described in a copending

U. S. Patent Application entitled 'Subscriber -RF Telephone * System for Providing Multiple Speech and/or Date Signals Simultaneously Over Either a Single or a Plurality of .RF ~ Channel, by Eric Paneth and Hark u„ Handsel filed on even date herewith. The preferred embodiment of the modem , * )0 described herein is interfaced with a channel control unit <CCU) and RF units described in said copending application, and the disclosure of said copending application that is pertinent to this specification is incorporated herein by reference.

Additional features of the present invention are discussed in relation to the description of the preferred embod intent.

BRIEF DESCRIPTION OF THE DRAWING

Figures IA and IB in combination show a block diagram of the preferred embodiment of the modem of the present ¢4 ♦

invention.

Figure 3 show© the signal constellation used in Gray coding the symbols of the bit stream.

Figure 3 is © block diagram of the FIR digital filter v

in the modulator section of the modem, ♦

Figure 4 illustrates the multiple sample impulse response pattern of the FIR digital filter in the modulator section of the modem.

Figure 5 is a block diagram of the SlN/COS IF generator in the demodulator section of the modem.

Figure 6 shows the timing waveforms of certain control, timing and data signals involved in the operation of the modem.

» glossary o? acronyms

Glossary of acronyms used in the Specification ACRONYM DEFINITION

A/D

AGC

AM

BPSK

BS ecu

D/A dB

DPSK

ECL

FCC

FIFO

FIR

HZ

I

IF

KHz Ksps

LSB

MHz

An&log-to-Digital Converter

Automatic Gain Control

Amplitude Modulation

Binary Phase Shift Keying Modulation

Base Station

Channel Control Unit

Digital-to-Analog Converter

Decibels

Differential Phase Shift Keying Modulation Emitter-coupled Logic

United States Federal Communications Commission First“in First-out Memory Finite-Duration Impulse-Response filter Hertz (cycles per second)

In-phase

Intermediate Frequency

KiloHert£

Kilosymbols per second

Least Significant Bit

MegaHertz

MI0DSM

OCXO

QPSX

RAM

RCC

HELP

RF

RFU

ROM

RX

STIMU

SUB*

TDMA

TX

UHF

VCXO g

Combined Modulator and Demodulator Oven Controlled Crystal Oscillator Quadrature

Quadrature Phase Shift Keying Modulation

Random Access Memory

Radio Control Channel

Residual Excited Linear Prediction

Radio Frequency

Radio Frequency Unit

Read-only Memory

Receive

System Timing Unit

Subscriber Station

Time Division Multiple Access

Transmit

Ultra-High Frequency

Voltage Controller Crystal Oscillator

DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment of the modem is shown in Figures 20 IA and IB. The modulator section of the modem essentially includes a digital phase shift keying (DPSK) conversion read only memory (ROM) 10, a training mode switching unit 11, a finite-duration impulse-response (FIR) digital filter 12, a.

&

digitffiX®t©*Ga&Xog converter (D/M) 13_ρ « bendpa&s Siltesr having a center frequency of -O0 KE3s, © mixer 13, ©nd rf amplifier IS centered at 20.2 MHs.

The demodulator section of the Enodeni essentially includes a model TMS32O20 digital microprocessor 17, a FIFO (first in-first out) stack 18, an analog-to-digitaX converter (A/D)

19, an amplifier 20, and a mixer 21,

The modem further includes several timing and control units that are essential to the modulation and demodulation functions performed by the modulator section and the demodulator section respectively. These units include interface registers and bus control unit 23, which includes a status register 24, a link Q register 25, an AGC (automatic gain control) register 26, an RX frequency register 27, a subscriber fractional delay register (SUB) 28, an in phase (I) register 29, a quadrature phase (Q) register 30, control unit 31 and a second fractional delay register 32. The modem timing and control units further include a buffer control unit 34, a read/write decoder 35, a training pattern FIFO (first in-first out) stack 36, a data latch 37, an internal timing and control signal generator 38, a transmit clock delay unit 39, a fractional time delay generator 40, a VCXO interface unit 41, a sample *

time geftisS’&tor 42, « COS/8SN XF signal generator 43, a 2K random access memory (&&Ηΐ) 44, a Μ 10H 45, a 4K ROM 4$, ® buffer/attenuator unit 47 and a buffer unit 48.

The modem is connected to a system timing unit (STXMU) *

45.

)ΐ

The modem interfaces ar& shown in Figures XA and XB. °

The modem receives most of its inputs from the CCU, other inputs are from the RF unit and the timing units. The , * modem inputs are as follows:

To the modem from the channel control unit (CCU):

TX DATA (lines 50) A 4 bit symbol to be transmitted by the modem (4 bits for 16-ary PSK, 2 bits for QPSK, 1 bit for BPSK)

MOD BUS (51)

MOD WR (line 52)

A bidirectional microprocessor bus that provides control/status information to/from the modem.

The control signal to latch MOD BUS into the modem.

a ft

MOD RD Jlin® 53)

Th® control icignal to put saodsm iJt&tu© &nd other information onto HOD BUS for transmission to the CCU.

MOD ft£SS7 (line S^i) This CCU control will reset the modem

HOD ADD (line 55) Control signal to define different address locations and latched values inside the modem.

TX SOS (line 56)

Signal from CCU to modem to begin transmitting a TX slot.

RX SOS (line 57)

Signal from CCU to modem to begin receiving an RX slot.

To the modem f rom the RF unit (RFU) :

IF RX (line 58) IF receive frequency input from the RFU.

To the modem from the system timing units (STIMU,

80KHZ (line 59) 80 MHz ECL clock from the base station or subscriber STIMUs. Output of the XO in the ft a hftts& station and VCXO in the subscriber stationo

13KHZ (line 30) Hester TX CLK used in base station from

5TIHU.

SOMF (line 31) Hester start of frame in base station from

5TXHU. Not used in the modem, but forwarded to the CCU.

From the modem to the channel control unit (CCV):

TX CUC (line 32) A 13 KHz clock signal that provides the CCU 10 with the symbol transmit timing. Symbols are clocked into the modem with the rising edge of this clock. In the base station, all slots have the same master TX CLK.

Thus all signals from the base station are 15 sent at the same time. In the subscriber, the TX CLK is offset by the fractional range delay by the modem on information supplied by the CCO.

RX CLK (line 33) The 13 KHz clock is derived from the received signal. (Always in subscriber

3 only during control ®lot acquisition in base eet&tion®) Thi^ clock ’^ill clock out the received symbol to the CCU and provide symbol timing to the CCU.

RX DATA (lines $4> The four bit received symbol, clocked by as cue

MOD BUS (50)

Status and data information from the modem·

MOD SOMF (line 61) Forwarded SOMF/ from the STIMU to the CCU in the base station.

AM STROBE (line 65) High to low transition on this line gives the CCU a rough frame marker during radio control channel (RCC) acquisition in the subscriber unit. This is a one shot line that will be pulsed when the RX MS320 determines the approximate location of the AM hole.

From the modem to each Rf unit (RFU):

4

<td> RF RX OTS (66)</td><td> 8 bit t&gt;uw betw®on the modem and RF RX unit. This bu® conveys AGC and frequency select information to the RFU receiver section. The modem controls AGC values to be sent, and</td>

<td> 5</td><td> forwards CCU frequency selection information. The frequency select information is fed to the modem over the MOD BUS 50. Durinq the 9 training mode, the modem will control th$ RF RX frequency selection.</td>

<td> 10 RF TX BUS (671</td><td> 8 bit bus between the modem end RFU transmitter section. This bus conveys TX power level and frequency select information to the modulator section. The modem has nothing to do with these, thus the information is</td>

<td> 15</td><td> only forwarded to the RFU transmitter section.</td>

<td> RX 80MHZ REF</td><td> ECL 80 MHz reference clock to the RFU</td>

<td> (line 59a)</td><td> receiver section.</td>

<td> TX 80MHZ REF</td><td> ECL 80 MHz reference clock to the RFU</td>

<td> (line 59b)</td><td> transmitter section.</td>

<td> 20 TX EN (line 68)</td><td> Line to RFU transmitter section to enable RF transmission.</td>

* *

3

RX BN Oine

AGC WR (line 70)

Line to RFU receives’ section to enable RF reception.

Write strobe

HFU receiver to latch AGC data into section.

<td> 5</td><td> RXFRSQ MR</td><td> Write strobe</td><td> for frequency writes to</td>

<td></td><td> (line 71)</td><td> RFU receiver</td><td> section.</td>

RXFREQ RD (line 71a)

Read strobe to read back receive frequency from RFU receiver section.

PWR WR (line 72)

Write strobe to latch power information into RFU transmitter section.

PWR RD (line 73)

Read strobe to read back power information from RFU transmitter section.

TXFREO RD (line 74,

Read strobe to read back transmit frequency from RFU transmitter section.

TXFREQ WR

Write strobe frequency writes to RFC (line 75, transmitter section.

gs? gline 73) Tr&amp;niEsdtted «signal at IF frequency to th® RFD_e

AGC RD (line 77) 'Read strobe to read back AGC data from RFU receiver section.

From the modem to the system timing unit (STIMU) :

#

VCXO FDBK (line 78)

A 10-bit data bus to VCXO with control information for frequency tracking.

VCXO WR Write pulse to VCXO circuit latching (line 79) VCXO BUS into the VCXO.

The modem modulator section transmits the information fed to it on TX DATA lines 50 by the CCU at 16-level PSX modulation. The modem transmits without the knowledge of the modulation level of the received information.

The input control lines are decoded inside the modem to select which register is to drive the 8 bit MOD BUS 50 between the modem and the CCU. Control information regarding the reception of a slot becomes active when the modem receives the RX SOS signal on line 57 from the CCU. This line interrupts the microprocessor 17 to begin demodulation on ©a incoming if·lot. At thi® tiga®, th$ RFU r^ceivtsr ®©ct£oa is tsafflbl^d by the caod-ssn with th&lt;s RX signal on line 69.

At the end of each slot, the status information is updated to the registers 23 for the CCU to read*

In the* subscriber station the CCU can command the modem to acquire the RCC signal from the bas^ station. The main* acquisition feature of the RCC is the AM HOLE of 8 symbols, ΐη software, the modem scans the frequency selected by the CCU for the AM HOLE. The microprocessor 17 scans the frequency selected by the CCU for the AM HOLE. Xf an AM HOLE is present on this frequency, the microprocessor 17 will key in on it. After the microprocessor 17 is sure of the am HOLE presence, it will pulse the AM STROBE line 65 low to the CCU signifying two things: (1) that the RCC signal is acquired and (2) that the AH STROBE is a rough start of frame marker. From there, the CCU should begin to look for the unique word in the RX data stream within a window of 0 to 3 symbols.

Once the unique word is detected, the subscriber station CCU can adjust its frame and slot counters to align them to the base station's system frame.

The interface between the modem and RFU receiver station allows control of the frequency selection and AGC levels in

8 th® RFtFo Th® CCU controls frequency ©election &amp;nd forward® its cos-asaands to the saodesu The modem forward© thi© information to th® RFU ov^r th® RX RF 0US 66« This bus 66 is also used to control &amp;GC levels in th® RFU receiver station. These &amp;GC values are updated each symbol time and conveyed to the RFU receiver section,

The CCU modem interface is shown in Figure 1» The timing for the transmit interfaces are shown in Figure 6. These interfaces are at a low rate and thus require only standard TTL hardware interfaces. The modem provides the CCU with the 16 KHz symbol clock. Four TX DATA bits are on a parallel bus to the modulator section. An eight bit bus is provided for control/status information exchange- Control information is fed to the modem by the CCU through asynchronous interface registers 23. The contents of the registers become valid when the strobe TX SOS signal on line 56 is received by the modem, signifying to begin transmission of a slot. The CCU provides the following control information to the modem: (1) idle mode; (2) transmit voice channel; (3) transmit control channel; (4) training mode loopback; (5) TX CLK fractional symbol delay; (6) RF TX power level; and (7) RF/TX frequency selection. The RX frequency selection is stored in the RX frequency register 27.

ί 9

The CCU he® &amp; direct interface to the RF TX unit frcsn the MOD DUS 50 to the RF TM BUS 67 via the buffer control unit 3$. The decoded addresses are fed to the RFlJ as write strobes to latch in TX power and TX frequency information.

The modem must have control oi the RF RX bus 55 for AGCupdates to the RFU. Therefore, the modem forwards RX frequency information from the register 21 to the RF units at the beginning of each RX slot. This value is latched in the register 21 by the CCU. Also, the modem can change the RX frequency itself during the training mode with no need for the CCU to do so.

The modem modulator section is fully implemented in hardware and requires no adjustments. Symbols received from the CCU on TX DATA lines 50 at a rate of 1SK symbols per second. The received symbols are phase modulated by the DPSK conversion HOM 10 and their resultant waveforms are shaped by the FIR filter 12 to provide good interference properties and not suffer amplitude or group delay distortion. The justification of this concept is made on the assumption that in the near neighborhood frequency band (within 50-100 KHz) to the band utilized there are no strong interfering signals (power densities of 30-40 dB above the signal). The 200 KHz bandpass filter 14 provides wide IF filtering (100 KHz) so that the transmitted signal will not suffer amplitude or

Ο group dslisy distortion and ©I©o iilt^rie out any harmonic® generated by the digital filtering and D/A conversion done at baseband.

Th® main filtering is done at baseband by a fixed-coefficient digital FIR filter 12. This filter 12 is a six polti filter with a sampling rate of 50 samples per symbol per* symbol duration in the FIR filter 12 in the modulator section.

Since no analog filtering is done at baseband, there is no need to implement two separate I and 0 channels. Xn fact, the I and Q channels are implemented in the FIR filter 12.

One time-shared channel, including the mixer 15, which multiplies by the IF frequency, upconverts this channel to IF. This channel has inherently equal gains for the 1 and 0 samples. The! and 0 sampling is now staggered by one-half a sample period, but this is corrected by the FIR filter 12.

Gray code is used for digital coding by the DPSK conversion ROM 10. This insures that if a symbol was received in error, the most likely probability is that the error in a decoded symbol will be by only cne bit. The signal constellation is shown in Figure 2. The phases marked Q and B^B are the QPSK and BPSK symbols respectively.

The symbols t&amp;tea to he GRAY coded phase symbol®&lt;,

Any phase symbol is then converted to binary form from GRAY code and added to the binary form of the last phase symbol to form the DPSK symbol_o Due to the Fin filter algorithm, every other symbol is inverted before input to the FIR filter 12. Therefore, the DPSK conversion iu done by the use of the ROH

20. Four symbol bit8, four bits from the previous symbol and one bit for inversion control are input to the DPSK conversion ROM 10, which outputs th© DPSK symbol to the input jO of the FIR filter 12.

After DPSK conversion, the symbol is then provided on lines SO to the FIR filter 12, which is a 6 tap, over sampled FIR filter. The FIR filter 32 includes a ROM 81 and two three-stage, four-bit shift registers 82, 83 as shown in

5 Figure 3. The FIS filter 32 serves to shape the transmitted symbols in accordance with the specifications of the frequency channel. The sampling rate of the ROM 81 is determined by a timing signal provided on line 84 from the timing and control signal generator 38 to a counter 85

2Q connected to the ROM 81. An input clock signal is provided on line 86 to two input switches 87, 88 which enable data input into the shift registers 82, 83.

Referring to Figure 4, each of the six symbols in the two shift registers 82_P 03 are sampled at a rate of 3/25 T (T®1/13 KHz). This oversampling scheme skews the samples go that only two symbols are sampled during any one 1/25 T sampling period.. Therefore, there are two symbols input to the ROM 01 during each 1/25 T sampling period. Each 1/25 T sampling period is in turn divided into two parts: in phase (I) and quadrature (Q). During the first half of the l/25~? period, the registers 82, 03 input the 3 bit in-phase component (1) of the symbol and during the second half of the period, the quadrature component (0) of the symbol is input to the ROM 31. Thus the FIR filter output on line 89 is the time shared, digital I and Q waveforms of the waveform to be transmitted. These samples are then provided on lines 89 to the D/A converter 13 for conversion to an analog waveform. This waveform is then filtered by the bandpass filter 14 and provided on line 91 to the mixer 15 for upconversion to a 20 MHz IF signal on line 92.

The two shift registers 82, 83 shift two of the stored symbols into the ROM 81 at a rate of 1/25 T for the required computations. The symbols are converted to 3 bit 1 and 0 gray code components by choosing either the 4th or 3rd symbol bit to the most significant bit (MSB) of the 3 bit component.

φ μ ¢¢)

The two esignificant bit® (LSD©) remain unchanged. Thi® component choice is done at a rate of 1/50 T„

The ROM also needs five inputs from the counter 85 to signify which of the 25 sample periods is presently being » computed. One additional input from the counter 85 is required to tell the ROM ©1 whether the 3 bit inputs are the 2 or 0 components of the input symbols.

The output signals stored in the transmitter FIR filter ROM 81 are computed to correct for any errors that may occur due to the 1/50 T difference in the I and-Q time values.

Also the IF filter in the RFU adds the two values together to form the correct transmitted waveform since its bandwidth is relatively small compared to the IF frequency. The FIR filter ROM 81 provides an output of 10 bit digital samples on line 89 at the rate of 800 KHz.

MULL symbols can be injected into the FIR filter 12 to represent symbols with no transmitted power. These are used in the training mode to input an ^impulse¹³ into the fir filter 12. These MULLS can also be used to output the AM

HOLES and guard bands that are required on the radio control channel (RCC).

2d

Thus D/A converts^* 13 takes dXgXtrel inputs from the digital FXR filter 12 and produess th© required spectrum &amp;t multiples of 133.33 KHz starting at 66.87 KHz.

The bandpass filter passes the 200 KHz spectrum with extremely small variations in passband attenuation and group delay. Attenuation ripple is less than O.I dB and delay variation is less than 1.5 microsec. The aliasing spectrums are attenuated more than 20 dB.

The desired signal out of the D/A converter 13 is centered at 200 KHz with a bandwidth of about 32 KHz. This signal is bandpass filtered by the band pass filter 14 before mixing to remove the signal components at nxl33 KHz. By multiplying the 200 KHz waveform by 20 MHz, the mixer 15 mixes the X and 0 samples with the SIN and COS components of the XF .frequency. Thus, the 20 MHz signal can directly multiply the output waveform and the exact component multiplications will be handled automatically. Therefore, there is no need for a discrete SIN(IF)/COS(IF) generation circuit to multiply the X/Q samples from the D/A as is in the demodulator section. This also removes isolation feedthrough in the mixer 15 from the baseband to the output of the mixer 15.

Ths? buffer («ttsauator unit 47 «accept» ©n BCL level signal differentially ®t the IF frequency of 20.00 MHz on line 94 from the timing and control signal generator 38 and translates it to a 350 mV peak to peak signal which is used as the local oscillator signal provided on line 95 to the mixer 15. Another voltage divider (not shown) provides «-7,5 VDC bias for the mixer 15_o

The mixer 15 is an MC149S active mixer. It frequency translates the 1 and Q component waveform from line 91 into a

20.20 KHz IF signal which is provided on line 92 along with all the other mixer products. Third order intermodulation products are down more than 40 dB. The mixer 15 is operated at a high level on the carrier input port and a low level on the modulating signal input port. This results in saturated switching operation of the carrier dual differential amplifier, and linear operation of the modulating differential amplifier. No carrier null is provided since the carrier at 20.00 MHz will be filtered out by a 20.20 MHz crystal filter in the RFU, The current sources are set to provide a current of 2 mA. An emitter degeneration resistor of 470 ohms (not shown) is provided to maintain the modulation signal input for linear operation at 1 volt peak.

Tb® RF amplifier 13 include® ®»itt®r follower buffer to £©oleit® th® calxor tuned circuit from the RF unit $nd provide ¢1 50 ohm output impedance. To eliminate the effects of str^y capacitance, device output capacitance and the capacitance of an emitter follower which buffers the mixer input, a parallel-tuned circuit is used on the mixer output which can be tuned for maximum gain. The overall gain of the mixer taust be 10 dB since -10 dBm at 50 ohms is required at the output of the modem. A fixed inductor rather than a variable one may be used later in the mixer output tank circuit. The RF amplifier 16 amplifies the signal on line 92 from the output of the mixer 15 and provides the amplified signal to the RFU via IF-TX line 76.

During the idle mode, the modulator section of a base station modem transmits an idle pattern given to it by the CCU. In the subscriber station, since the modem operates half-duplex, the CCU places the modem in receive mode in all slots except during the slot in which the subscriber station itself is transmitting. This allows the demodulator section of “ the subscriber station modem to monitor AGC so as not fo be too surprised when a burst comes in from the base station.

The idle mode is used when there is a frequency for which at least one but not all slots are used. The empty slots are filled idle ^equency h&amp;ss ao conversation at all_p &amp;h&lt;s modulator section may be disabled.

Referring to the demodulator section of the modem, the mixer 21 presents a 50 ohm input impedance to the 20.00 MHz,

-30 dBm signal received from the RFU on XF-RS line 5©. The basic function of the mixer 22 ifi to down-convert the XF signal from the RFU to baseband and also to amplify it. by 30 to 35 dB. A steady-state signal* is provided on line 22 at 20.00 MHs_o The steady-state signal on line 22 is the time multiplexed S'1W/COS/-SXK/-COS signal from the COS/SIW IF generator &lt;3. A model MC 1456 active mixer 21 is used with the local oscillator input signal on line 22 run at high level and the modulated signal on line 58 run at a low level. The mixer output on line 07 at baseband is differentially AC coupled to the amplifier 20, which is a differential amplifier. A highpass filter is formed by capacitor coupling from the mixer 21 and the input resistor of the differential amplifier 20 and has a cutoff at approximately 1 Hz.

The buffer unit 48 provides interface between the ECL level 20.00 MHz generator 43 and the mixer 21. The buffer unit 46 provides a 350 mV peak to peak signal to drive the carrier input into saturated switching and also provides a +7.5 VDC bias for this input.

The XF S1K/COS generator 43 I® shown in Figure 5. The generator 43 includes SCI» parts operating at four times the tracked XF frequency in response to a 4 XF timing signal on line 90 from the timing ©nd control signal generator 38. Referring to Figure 5, two flip flops 99, 100 act as a divide by four counter vith each of their outputs being 90 degrees out oi phase. A «*3x1 multiplexer (MUX) 101 switches between the SIN, COS, -SIN, -COS outputs. The output of the MUX 101 is reclocked by another D flop 102 and output on line 103 to the mixer 21. This circuit provides a perfect -90 degree phase shift between the four components. The single, time multiplexed channel also assures that the I and Q components arrive with exact equal gains.

The timing diagram for the demodulator section also is shown in Figure 3. The modem provides the CCU with the four data bits and their 16 KHz symbol clock. The address lines and an 8 bit bus provide status/control interchange between the two units.

The amplifier 20 accepts the differential output from the mixer and amplifies it be approximately 25 dB. The amplifier 20 provides an AC-coupled ^.10 volt peak-to-peak signal to the A/D converter 19 with very low distortion.

9

Th® &amp;/D conv&lt;srt@E 19, which i© o TRH 12 bit A/D converter, is u©ed to convert th® baseband spectrum from the differential amplifier 20 into digital date for the microprocessor 17 to process« The sample rate is four times per symbol (64 KHs,°

During normal operation, digital processing is done by the TMS320 microprocessor 17« The microprocessor 17 operates et 20 KHz with 4K byte© of memory from the 4K ROH 46. The port address pins are used to address 1/0 registers between the demodulator section and the CCU or the special diversity combiner circuit.

The microprocessor 17 receives the X/Q data from the miner 21 at a sampling rate of 64 KHz. The data is again time multiplexed over one frequency channel as is done in the modulator section. The microprocessor 17 performs the filtering and demodulation of the waveform. The microprocessor 17 then outputs the received symbol over bus 104 to the data latch 37 which provides the symbol to the CCU over the RX DATA lines 64 with a pulse of the RX CLK signal on line 63 at a 16 KH2 rate.

Rtaeeiws· «statu© 1® plftc&amp;d in th^ iftiatuc 24 wad the X/O ©ampins @a&lt;s placed in X register 29 and the Q register 30, The CCU will read status while the X/O samples are required for an external diversity combiner circuit. The control/otetus interfaces and functions are described below.

The base station modem operation is assigned to a fixed RF frequency. Communication at the base station is full duplex. Therefore the modem modulator and demodulator sections are operating simultaneously. Mhen the modem also is assigned to be the control frequency channel modem, it only transmits and receives information with the radio control channel (RCC) format during the allocated control slot period. In the base station, an OCXO located in the system timing unit (STXMU) 49 is fixed and acts as the master clock of the system. Therefore, no frequency deviations will occur on reception.

All transmissions from the base station modems are clocked by the master TX CLK (16 KHz) signal on line 60. The fractional time delay generator 40 in the base station modems a

provides to the base station CCU the fractional part of the symbol time between the master TX CLK signal on line 60 and the derived RX CLK signal on line 63 in the modem. This information is then sent to the subscriber unit via the radio coatsroX eh&amp;nn®X w© that iimbserib^r will delay it® transs&amp;iwion in ©zrdsF that its signal i® r«e©ived at th© bass? station synchronous with ell oth©r slotfia

MX operations in the subscriber station modem are derived from the received clock (RX CLK) signal which is recovered from the received transmission by the timing and control signal generator 38. This serves as the master clock of the subscriber station. The TX CLK signal on line 62 from the transmit clock delay circuit 35 to the CCU is not a master clock as in the base station. It is derived from the RX CLK signal on line 53 and delayed by the transmit clock delay circuit 35. The duration of such delay is provided by the subscriber station CCU, fractional delay (SUB) register 28 and retrieved therefrom by the transmit clock delay circuit 35 o The subscriber station CCU receives the delay via the radio control channel from the base station CCU. The delay is determined by the distance between base and subscriber stations. The subscriber station CCU feeds this fractional time information to the fractional delay (SUB) register 28 in the modem through MOD BUS 50. The modem itself incorporates the fractional delay through the transmit clock delay circuit 35. The CCU accounts for the integer symbol delay by insertion of the TX SOS signal on line 56 to the modem delayed by the correct number of symbols. This

2 proc®®® align® the uigsi&amp;lg arriving at the base station from variation© in th© rang® of all subscribe? (Stations,,

There ar© many sources of delay in the modem system that have a pronounced affect upon the system timing. Such things include analog filter delays, propagation delays, FIR filter 12 processing delays, etc» These delays skew the TX and RX frames from one another, and these skews must be taken.into careful account.

The delay -paths from the modulator section to the demodulator section are listed below along with their estimated values.

Ttfi TX analog delay. Approximately .55T.

Ttr Transition delay between TX and RX in RF unit.

Approxima tely 1.9T.

Td Propagation delay. 1.2T max (one way).

Tra RX analog delay. Approximately 5.77T.

Th Time during the sampling of RX analog filter output before A/D conversion. Approximately 0.03T.

Tc A/D conversion time. Approximately 0.22T.

Tfl,Tf2 RX FIR window”. To receive a peak at time t=0, the filter must start sampling at t=-Tfl and continue until Tfl approximately 3.5T, Tf2 approximately 3.25T.

To THS proc®®®ieig delay between ^Lp-5&amp;k’ and TMS output.

Approximately 4.ST.

Tw TX waveform length (3T).

Tert Compensation delay between RX and TX (Subscriber)s minimal &lt;or th® farthest Subscriber and maximal for the nearest.

SBa Nearest Subscriber.

SBf Farthest Subscriber.

The delay between the TX SOS in the base station and the first received analog symbol “peak af the base station is 4-7J symbols. Therefore, there is a skew between TX and RX slots. To correctly decode the incoming phase, the modem must begin sampling about 3.5 symbols before the peak arrives. Therefore, the skew between TX SOS/ and the beginning of RX sampling is about 4 symbols in length.

At the base station, the start of the RX slot occurs about 4 T after the start of the TX slot. The RX slot start is defined as the time the first analog sample is taken in order to detect the first * peak⁶¹ that is received.

The farthest subscriber station modem will start its TX slot 4 T before the start of the RX slot of the base station

41

Hiodtegu Other subscribers swsy delay th® start of their TX slot©·

In the overall RF telephone subscriber system, round trip transmission delays due to rang® can occur anywhere from 0 to 3 symbol times in length. Therefore, in order that the received communications at a base station be synchronous, the subscriber station must be able to shift its transmit clock signal 0 to 3 symbol times relative to the derived received clock (RX CLK). The time delays are computed in the base

I ^w station and sent over the control channel, and interpreted by the CCU· The CCU then provides fractional delay constants to the subscriber station modem in order to delay the TX CLK.

The fractional delay is an 8 bit value which is written in the fractional delay (SUB) register 28. Integer symbol delay is controlled by the CCU. The strobe TX SOS signal on line 56 is generated 0, 1 or 2 symbols delayed according to range values received from the base station.

During the reception of any slot, the modem perforins frequency synchronization by acquisition and then continues tracking. In the subscriber station, the VCXO is under direct control of the microprocessor 17 through a D/A converter in the VCXO interface 41. The microprocessor 17 ®egui®it£©n and tracking algorithm® compute th© changes in the VCMO necessary to netintain synchronisation.

During the receipt of any slot, the microprocessor 17 also performs bit synchronization on the bit sync pattern of the received data stream. An algorithm performs a bit tracking loop.. The microprocessor 17 has control over a variable frequency divider of the @0 KHz VCXO or CCXO (only during control slot demodulation). Inside of the bit tracking loop, the microprocessor 17 modifies the frequency division in order to obtain bit synchronization. During the reception of a voice channel, the division values have step sizes of 0.1% of 13 KHz, but during a control slot the values may change more drastically, as much as ^/- 50%.

Frame synchronization is handled in completely different ways in the base station and the subscriber stations, ΐη the base station, a master SOHF (start of modem frame) signal is forwarded on line 31 to the CCD via the modem. This is the master SQMF signal used for all transmission from the base station. From this and the master system symbol clock signal (16 KHz) on line 60, the CCU can derive all slot and frame timing.

the feub&amp;cx’l&amp;er station during initial acquisition^ the raicroprocesisoE· 17 search®# for the AM HOLE in the ^CC_eSF the AM HOLE io detected, the microprocessor 17 will count it for a few frames and then cause the timing and control generator 38 to provide the AM STROBE/ marker on line 65 to the CCU at the frame location of the AM HOLE. The CCU uses this strobe marker to set up initial frame marker counters (windowing) that can be modified by CCU software for exact · frame sync. This also signifies that the AM HOLE was detected and the RCC is acquired.

Slot synchronization is under the control of the CCU.

The signals TX SOS on line 56 and RX SOS on line 57 are commands to the timing and control generator 36 to begin the transmission or reception of a slot. These signals are synchronized to the TX CLK signal on line 62 and RX CLK on line S3 respectively.

The modem demodulator section operates in either an off-line or an on-line mode according to bit 7 of the RX control word in the control word register 31. To switch the demodulator section from one mode to the other, the CCU sends MOD RESET, writes the required command in the RX control word register 31 via the MOD BUS 50, and then disables MOD RESET signal ·

In the off-lin© aod®, the external memory en th© microprocessor 1@ provided hy 2K word© from the ROM and 2K words from the RAM. The CCU commands the modem to enter this mode after power up and once ^very predetermined number of hours, while the modem is not transmitting or receiving, in order to execute self^test and training routines.

The self«test routine tests the ROMs 45, 46, the internal RAH and the external RAM 44 and the interface to the CCU. It sends the test results to the CCU through the status register 24.

The training routine includes sending a training signal to the demodulator section and calculating the coefficients of the FIR filter embodied in the microprocessor 17. Xt is done off-line every predetermined number of hours, while the modem is not transmitting or receiving data.

In the on-line mode, the modem receives signals from either the control channel or a voice slot, according to the RX section control word in the control word register 31. The on-line software executes the following routines.

21©

Aa routine &amp;® pcriormed by th® microprocessor 17 ttt power up or Gft®r a reset signal iis received. This routine reads the control word in th® register 31 and calls other routines according to the control word.

This routine is activated when the CCU sends the modem a HOD RESET signal on line 54 and a command over the HOD BUS '50 to the control register 31 to enter the on-line mode. This routine executes a checksum test on an on-line PROM, initializes parameters, reads the control word register 31 and branches to the appropriate routine.

A frequency acquisition routine is run in the subscriber station modem only, when receiving the control channel, in order -to synchronize the subscriber station VCXO frequency to the base station crystal frequency. Since the transmit, receive and IF frequencies are derived from the VCXO in the subscriber station or the OCXO in the base station, this will cause all the frequencies to be synchronized.

This routine is used in the subscriber station modem only. It is activated by a command from the CCU while the demodulator section is set at the control channel frequency. Its function is to synchronize the VCXO frequency to that of th® OCX© in th® station, Xt dosia thiisi by Or®t looking fos* th® AM Hole whiob 1© &amp; small period of time during which there is no transmission from th&amp; base station· After that the base station transmits an unmodulated carrier signal.

When receiving this wove fonn the XF miner output will be another sine waveform who@e frequency ia proportional to the difference between the VCXO and the base station crystal oscillator frequency* The modem software samples the I and* 0 channels at certain intervals and perform a phased locked loop function, i.e·, determines the phase change for each interval, put it through a low-pass filter, and send it as a correction word to the VCXO. The modem determines that frequency acquisition is achieved when the phase change becomes lower than a certain level. If the AM hole is not detected during a certain period of time, the module will send an error message to the CCU indicating that the receiver is not tuned to the control channel.

The routine is called by the initialization routine and sends a status word from the status register 24 to the CCU indicating whether frequency acquisition was achieved or not.

When called by the initialization routine the frequency acquisition routine samples the I and Q channels looking for the AM hole and at the same time perforins an AGC loop. If th® hol« iis mot during &lt;si pr^deteraiaed numbas· of sampleis, thi is routine conveys th&amp;is information to th® CCU a the status register 24» The CCU then will switch to another possible RCC frequency and reactivate the frequency acquisition routine.

After detecting the AM hole this routine provides a phase locked loop for the time during which an unmodulated * carrier is transmitted. Xn this loop, 1 and Q samples are taken and the phase angle of the sampled signal is calculated.

The calculated angle is subtracted from the previous phase and the result is low-pass filtered and sent as a control word to the VCXO. AGC is also calculated during the loop using the signal amplitude. At the end of the specified duration if the phase deviations are less than a predetermined amount, the module places *1 in the status register 34 and if the deviations are still larger than this amount a ^b2^a is placed in the status register 24. In the latter case, the frequency acquisition routine may be reactivated for more than one slot.

A bit synchronization routine is run in both the subscriber station and base station modems, when receiving d ί th© M ©omplsting th© frequency acquisition routine® ϊη the subscriber station modern_P ite output will be used to synchronise th© 16 Stas symbol clock to the base station transmission® In the base station modem it is used to determine th© fractional delay to be incorporated in the subscriber station transmission so as to coincide with the base station naodem clock.

A slot receive routine is called when the modem is ready to receive data, i®&lt;s®, after frequency and bit synchronization are achieved. Its main functions are (a) to initialize parameters for the symbol receive routine (described below)? (b) to activate the symbol receive routine when the first symbol is sampled; and (c) to determine link quality and other information after receiving all symbols in the slot.

This routine is called by the initialization routine at the beginning-of each receive slot. Its main function is fo initialize the parameters for the symbol receive routine. After completing this task if waifs until all samples of the first symbol in the slot are stored in the FIFO stack 18 and then branches to the symbol-receive routine.

The processing tasks of this routine are:

o fading the modulation level (HL from the control vosrdl register 33 where's ML can be 2, 4 or 16;

2o Calculating th® half symbol value given by the equation:

HS « 380

HL (Eq. 1)

3. Calculation of a MASK used for truncating the LSBs from the decoded phase. The MASK depends on ML and on the number of bits used to represent the decoded phase, whereby if 2ⁿ represents a 22.5 degree phase angle, then

<td> 10</td><td> MASK - Θ</td><td> X</td><td> 2ⁿ</td><td> for</td><td> ML »</td><td> 2</td>

<td></td><td> « 12</td><td> x</td><td> 2ⁿ</td><td> for</td><td> ML «</td><td> 4</td>

<td></td><td> = 15</td><td> X</td><td> 2ⁿ</td><td> for</td><td> ML »</td><td> 16</td>

4. Reading previous the AGC for this slot from the AGC register 26 and sending it (for the base station only).

5. Waiting until the end of the sampling for the first symbol_ά ©nd then bleaching to tte receives routine?

and;

3. After receiving all symbols in the slot, sending the link quality signal from the link quality register 35 to the CCU»

The symbol receive routine is activated once per symbol time while receiving data and its functions include: reading X end 0 samples for the symbol; (b) filtering the 5 and 0 samples; (c) determining the transmitted symbol and sending

It to the CCU; (d) executing a phase*lock-loop to, synchronize the VCXO to the incoming signal; (e) executing a bit tracking algorithm; (f) AGC calculation; and (g) accumulating information for link quality calculationThe routine is activated once per symbol when all the

5 four samples pertaining to a symbol are stored in the external FIFO stack 18. This routine reads the samples into the -memory and then processes them to determine the transmitted symbol. Also AGC is calculated from the signal amplitude. The deviations in the received symbol from the transmitted one are used in the AGC, link quality and bit tracking algorithms. The run-time of this module is less than one symbol time, i.e., 62.5 microsec.

After receiving and storing the four X and 0 samples for a particular symbol, this routine performs the following tasks:

1. FIR filtering of the received samples. (The FIR coefficients are determined by the training routine discussed below);

2. Determining the signal level and using it for AGC;

3. Determining the received phase angle, subtracting the previous one, rounding up the result. Gray coding the rounded-υρ result and sending the coded result to the CCU;

4. Executing the bit tracking algorithm. (Its output is accumulated for all symbols and sent at the end of the slot. It is used to synchronize the subscriber RX clock to the base transmission.);

5. Executing a phase lock loop to synchronize the VCXO to the base station oscillator. (The output is sent to the VCXO at the end of the slot, in the subscriber station only.); and accumulating data for link quality and sending the &lt;3 5 information to th® CCU vi® th® link quality 3?egi®ter 35 sit tho of the «slot»

Internal clock signals required by the modem ar® generated by the timing and control signal generator 30 froa the master 00 MHz clock signal on line 59. The modem uses the master 1G KHz clock signal on line GO as the TX CLK for transmission. Therefore, all transmissions out of the base station are synchronous with each other.

The subscriber station clock signals are derived completely from a master 30 KHz VCXO in the subscriber station timing unit. The.VCXO is controlled by the VCXO FDBK signal on line 73 from the modem. From the VXCO FDBK signal on line 73, all receive and transmit clocks are calculated.

The timing and control signal generator 38 then provides the CCU with the 16 KHz MX CLK signal on line 63 derived from the incoming data stream. The CCU itself defects the unique word in the control channel and can determine frame and slot markers from the unique word and the RX CLK signal on line 63. The AM STROBE signal on line 65 is derived by the timing and control signal generator 38 from the signal demodulated by the microprocessor 17 and informs the CCU where to look for the unique word.

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Χϊδ 'sh® ffiub®crib®r station th® jaicroproesssoir 17 compute© th® bit and frequency tracking parameter© and adjust© th® timing by outputting th® VCXO FDBK and VCXO MR signal© to the STIMU 49«, To adjust the frequency, the microprocessor 17 outputs to a D/A converter in the VCXO interface 41 that feeds the voltage into the VCXO_Q This VCXO frequency is then divided by 5 to 16 The 16 MBs clock is divided by 5 again to produce a 3»3 HHs clock. The timing and control signal generator 38 divides this by 4 to produce the 800 KHz clock signal required for the TX FIR filter 12. The sample time generator 42 divides a 3.3 MHz clock signal by 50 to produce the 64 KHz sampling clock signal. The sample time generator 42 is under control of the microprocessor 17 to cause a delay during control channel acquisition. This allows large jumps of M6 KHz clock periods for fast acquisition.

The self adapting training mode is a looped-back state that the modem enters to train the demodulator section digital FIR filter coefficients stored in microprocessor 17 to correct for any analog filter degradations that may occur in time cr with temperature. The analysis is done by looping back the transmitter data through the RF unit and receiving a known pattern in the demodulator section of the modem. The coefficients are optimized over a 5 constraint LaGrangian systesu Th©»® eoarctM&amp;at® «re (1) th© r®c©iv©d dates »tr©Gra; (2) th© data istrcGsa d©X@y®d by ©«05 Tg (3) ‘th® date stream advanced by 0.05 T; €4) th® data stream from th® adjacent upper channel; and (5) th© data steam from the adjacent lower channels

During th® training mode, the microprocessor 17 provides to the FIR filter 12 of the imoduXator section a series of ' 32-symbol-long training patterns on line 106 from the FIFO stack 36 that is enabled during the training mode. Advances and delays skew the two streams by 0.05 T.

The CCU places the modem into the training mode to allow the modem modulator section to read the special training pattern from the FIFO stack 36 by operating the training mode switching unit 11 by © control signal on line 107 from the control word register 31. The demodulator section is also advanced and then delayed for some of the tests. When the process is complete, the modem sends a status message to the CCU that the coefficients are computed. Af this time, the CCU tests the modem by placing it in normal operation and writing out a set pattern, commanding the RFU to loopback, and read the returned data and test for validity.

€18

Ttae training node i® initiated by the CCU setting appropriate control register bits and sending a MOD RESET signal on line 54 to the modem. This reconfigures the microprocessor 17 from using 4K of ROM and no RAM to using 2K of ROM 45 and 2K of the RAM 44 _o The 2K ROM 45 holds the training mode algorithms and the 2K RAM 44 provides scratchpad memory while the filter coefficients are being computed „

One algorithm computes the adjacent channel characteristics. To determine adjacent channel interference, the modem modulator section must be able to transmit at a frequency that is removed 25 KHz from the received frequency. This is done by the CCU reading the status register in the modem. The information in the status register 24 directs the CCU to change frequencies in the RFU receiver section at the modem's will.

The microprocessor 17 executes the training routine.

The function of the training routine is to compute the FIR filter coefficients in the microprocessor 17. The modulator section is activated in a loopback mode to send a certain sequence of symbols. This sequence is transmitted to the demodulator section via the RFU in five different modes as follows: (1&gt; normal mode; (2) advanced timing mode; (3) delayed timing isode®? &amp;nd H and 5) on th© adjacent upp&lt;sr and lower ehann©!®® Xn th© latter two mod©®, the &amp;GC setting i© increased by 23 dB®

The demodulator section uses the samples of the input 5 waveform to create a positive definite symmetric matrix A of order 2©, Also, a 38-word vector V is created from the input samples. The coefficients vector C is given by:

C * A’¹ V (Eq. 2)

An algorithm will be used to calculate B · A ¹ given A. 10 Due to round-off errors, B will not be accurate, so an iterative method is used to calculate a more accurate C.

The calculations yield a vector of 26 complex FIR filter coefficients.

The modulator section is activated in the training mode 15 to transmit five similar pairs of sequences. Each pair consists of the following two sequences: (a) an 1 sequence of 9 null symbols, a ^al° symbol and 22 null symbols; and (b) a 0 sequence of 9 null symbols, a j symbol and 22 null symbols. The l”can be any symbol. The ^Bj is the symbol that differs from V by 90 degrees.

so

The demodulator section processing tasks aret (1) to adjust th® AGC so that the signal peak in the normal mod® is 50 to 70¾ of the maximum (the AGC is increased by 23 dB for the fourth and fifth modes)? (3) to read and stor® the input samples (th® first 32 samples are discarded and the next $4 samples are stored for each sequence); and (3) to build the matrix A (38, 28). The following process is done in the normal mode (first mode):

A(I,J) = AU,J) ♦ EX(4N-1) X(4N-J)

The addition is for all ft that satisfy (Eq. 3)

0&lt; « 4Ν-Ϊ &lt; 64 and 0&lt; « 4N-J &lt; 64 (Eq. 4)

For the advanced and delayed modes (second and third modes), the same process is performed except that the term resulting from H“8 is not added. In the fourth and fifth modes (transmitting on the upper and lower adjacent channels) the following process is performed:

AU,J) - A(I,J) + EX(2N-I) X(2N-J) (Eq. 5)

The addition is for all N that satisfy:

0&lt;“ 2N-I &lt; 64 and 0&lt; = 2N-J &lt; 64 (Eq. 6)

Further demodulator section processing task© An th® training mode ar®i

4. Creating the vector V(l:28) from the samples of the first pair of sequences:

a. X(V(I)1 « X&lt;33*&gt;1); where X are samples of the (Eg. 7) first (1) sequence; and

b. Q(V(I)) ® X(32-S); where X are samples of the (Eq. 8) second (0) sequence; and

5. Finding the coefficients vector C by solving A x C-V=0.

This is done by first finding B the inverse of A. Due to round-off errors □ will not be accurate. The following iterative method is used to solve for an accurate C.

C_Q = Β χ V (Eq. 9) ^Cn + 1 ’ ^Cn “ ^b * ^{B(A 3t C}n“^V&gt; &lt;Eq. ¹⁰¹ b is a predetermined value &lt;1.