System and method for frequency up-conversion

System and method for frequency up conversion

The present invention relates to a frequency up-conversion of electromagnetic signals.

Related technology

Today's communication systems use components such as transmitting and receiving to transmit information from a source location to a destination. In order to achieve this transmission, the information is converted into the form of a carrier signal and transmitted. Generally speaking, the frequency of the carrier signal is greater than the bandwidth of the information signal. The method of converting information into a carrier signal is called modulation.

Three general modulation methods include: Frequency Modulation (FM), which reflects the modulation information in the signal to transform the frequency of the carrier; Phase Modulation (PM), which reflects the input information to transform the phase of the carrier; Amplitude Modulation (AM) , Which changes the amplitude of the carrier wave with the information. And, these modulation methods are used in combination with each other (for example, AM and FM are combined, and AM and PM are combined).

Invention summary

The present invention relates to a method and system for up-converting a signal from low frequency to high frequency, and its device.

In one embodiment, the present invention uses a stable, low-frequency signal to generate a high-frequency signal, the frequency and phase of which can be used as a stable reference.

In another embodiment, the invention acts as a transmitter. In this embodiment, the present invention receives a baseband signal and transmits a higher frequency modulation signal.

The method and system of the present invention depend on the modulation program used. For some embodiments using frequency modulation (FM) or phase modulation (PM), the oscillating signal is modulated with an information signal to generate a modulated intermediate signal. If necessary, this modulated intermediate signal is "shaped" to provide the best pulse-to-cycle ratio. Then, the shaped signal is used to control a switch to open and close according to the frequency and pulse width of the shaped signal. By this switching operation, a signal with multiple harmonic frequencies is generated, and each harmonic is modulated to be consistent with the modulated intermediate signal. With this filtering effect, the ideal harmonics are selected and transmitted.

For some embodiments that use amplitude modulation (AM), the switch is controlled by a non-modulated (or shaped if necessary) oscillating signal. In an alternative embodiment, the information signal is combined with the bias signal to generate A reference signal, and do gate processing. The multi-harmonic signal processed by this gate has a fundamental frequency proportional to the oscillation frequency, and its amplitude is proportional to the amplitude of the reference signal. Each harmonic of the multi-frequency signal also has an amplitude proportional to the reference signal to achieve the required amplitude modulation. Like the above-mentioned FM/PM embodiment, with proper filtering, ideal harmonics can be selected and transmitted.

Hereinafter, the further features, advantages, structure and operation of different embodiments of the present invention will be described in detail with reference to the accompanying drawings. The leftmost digit of the reference number corresponds to the drawing number.

Description of the preferred embodiment

content

1 technology

2 Summary of the invention

2.1 Discussion on modulation technology

2.2 Examples of circuit diagrams and waveforms

2.2.1 FM

2.2.2 Phase modulation

2.2.3 AM

2.2.4 Internal phase/quarter phase modulation

2.3 Features of the invention

3 frequency up conversion

3.1 High-level description

3.1.1 Operation description

3.1.2 Structure description

3.2 Example

3.2.1 First Embodiment: Frequency Modulation (FM) Mode

3.2.1.1 Operational description

3.2.1.2 Structural description

3.2.2 Second embodiment: phase modulation (PM) mode

3.2.2.1 Operational description

3.2.2.2 Structural description

3.2.3 Third Embodiment: Amplitude Modulation (AM) Mode

3.2.3.1 Operational description

3.2.3.2 Structural description

3.2.4 The fourth embodiment: internal phase/quarter phase modulation ("I/Q") mode

3.2.4.1 Operational description

3.2.4.2 Structural description

3.2.5 Other embodiments

3.2.5.1 Combined modulation technology

3.2 Implemented system and method

3.3.1 Voltage controlled oscillator (FM mode)

3.3.1.1 Operational description

3.3.1.2 Structural description

3.3.2 Local oscillator (PM, AM, and "I/Q" mode)

3.3.2.1 Operational description

3.3.2.2 Structural description

3.3.3 Phase shifter (PM mode)

3.3.3.1 Operational description

3.3.3.2 Structural description

3.3.4 Phase modulation (PM and "I/Q" mode)

3.3.4.1 Operational description

3.3.4.2 Structural description

3.3.5 Addition mode (AM mode)

3.3.5.1 Operational description

3.3.5.2 Structural description

3.3.6 Switch mode (FM,PMR "I/Q" mode)

3.3.6.1 Operational description

3.3.6.2 Structural description

3.3.7 Switch mode (AM mode)

3.3.7.1 Operational description

3.3.7.2 Structural description

3.3.8 Adder ("I/Q" mode)

3.3.8.1 Operational description

3.3.8.2 Structural description

3.3.9 Filter (FM, PM, AM and "I/Q" mode)

3.3.9.1 Operational description

3.3.9.2 Structural description

3.3.10 Transmission module (FM, PM, AM and "I/Q" mode)

3.3.10.1 Operational description

3.3.10.2 Structural description

3.3.11 Other modes

4. Harmonic enhancement

4.1 High-level description

4.1.1 Operational description

4.1.2 Structural description

4.2 Example

4.2.1 The first embodiment: When a square wave is supplied to the harmonic enhancement mode to generate a pulse per cycle

4.2.1.1 Operational description

4.2.1.2 Structural description

4.2.2 Second embodiment: When the square wave is supplied to the harmonic enhancement mode to generate two pulses per cycle

4.2.2.1 Operational description

4.2.2.2 Structural description

4.2.3 The third embodiment: When any waveform is supplied to the harmonic enhancement mode

4.2.3.1 Operational description

4.2.3.2 Structural description

4.2.4 Other embodiments

4.3 Examples

4.3.1 The first digital logic circuit

4.3.2 The second digital logic circuit

4.3.3 Analog circuit

4.3.4 Other examples

4.3.4.1 Multiple gaps

5. Amplifier module

5.1 High-level description

5.1.1 Operational description

5.1.2 Structural description

5.2 Example

5.2.1 Linear amplifier

5.2.1.1 Operational description

5.2.1.2 Optional description

5.2.2 Other embodiments

5.3 Examples

5.3.1 Linear amplifier

5.3.1.1 Operational description

5.3.1.2 Structural description

5.3.2 Other embodiments

6. Receiver/transmitter system

6.1 High-level description

6.2 Examples and implementation examples

6.2.1 First embodiment: A transmitter used in a circuit with a superheterodyne receiver according to the present invention.

6.2.2 Second embodiment: According to the present invention, in half-duplex mode, a transmitter used with a universal frequency down converter

6.2.3 Third Embodiment: According to the present invention, in full-duplex mode, a transmitter used with a universal frequency down converter

6.2.4 Another embodiment and implementation

6.3 Comprehensive description of down converter using universal frequency transmission module

6.3.1 Selected energy conversion signal module

6.3.2 Smooth the down-conversion signal

6.3.3 Impedance matching

6.3.4 Slot and resonance structure

6.3.5 Charge and power conversion concept

6.3.6 Optimization and adjustment of non-negligible gap width/period

6.3.6.1 Changing the input and output impedance

6.3.6.2 i.e. slot control

6.3.7 Join the bypass network

6.3.8 Use feedback to improve energy conversion signal

6.3.9 Other implementations

6.3.10 Example of energy conversion down converter

7. Design the transmitter according to the embodiment of the present invention

7.1 Frequency of transmission signal

7.2 Characteristics of transmission signal

7.3 Modulation planning

7.4 Characteristics of information signals

7.5 Characteristics of Oscillating Signal

7.5.1 Frequency of the oscillating signal

7.5.2 Pai Kuan of Pai Bo Liu

7.6 Design of Pibo Forming Circuit

7.7 Switch selection

7.7.1 Optimization of switch structure

7.7.2 Phase D2D-divider in CMOS

7.8 Filter design

7.9 Selection of Amplifier

7.10 Design of transmission module

1 Technology

Various vocabulary used in this application are described in this section. Each description in this section is only to provide narrative convenience, and does not become any limitation. Based on the overall technology here, those familiar with related technologies will be able to clearly understand the meaning of these words.

Amplitude Modulation (AM); a modulation technique in which the amplitude of the carrier signal can be changed as a function of the information signal. The frequency of the carrier signal is generally kept constant. The sub-combination of AM refers to the "frequency conversion adjustment" that is the basis of digital communication, in which the amplitude of the carrier signal changes between discrete states, rather than continuous conversion such as analog information.

Analog signal: A signal whose information is continuous and represents a time-varying physical event or physical quantity. Transmit information content by changing at least one signal characteristic, such as amplitude, frequency, or phase or any combination.

Baseband signal: Any general information signal that can be used for transmission and/or reception. It refers to the information signal generated from the information source before any transmission. (Refer to modulated baseband signal), and refers to the signal used by the receiver after transmission.

Carrier signal: A signal that can carry information. Generally speaking, electromagnetic signals can be transformed through so-called modulation procedures. The frequency of the carrier signal is called the carrier frequency. A communication system can have multiple carriers under different carrier frequencies.

Control switch: Turn the switch on and off. The switch can be mechanical, electrical, electronic, optical, etc., or a combination of these switches. Generally speaking, it is controlled by electrical and electronic inputs. If the switch is controlled by an electronic signal, it is different from the signal connected to the two terminals.

Demodulation baseband signal: the baseband signal used by the receiver after transmission. Generally speaking, it has been down-converted from the carrier signal and demodulated. The demodulated baseband signal should be very close to the information signal in terms of frequency, amplitude and information. (That is, modulate the baseband signal).

Demodulation: The process of removing information from a carrier or intermediate frequency signal.

Digital signal: A signal that contains information in a discrete state and is opposite to a signal that can be continuously changed.

Direct down conversion: A down conversion technique in which the received signal is directly converted from the original transmission frequency to the baseband frequency without an intermediate frequency. If possible, it is modulated.

Drive a switch: the same as the control switch.

Frequency Modulation (FM): A modulation technique in which the frequency of the carrier signal is transformed as a function of the information signal. The sub-combination of FM refers to the "frequency conversion adjustment" as the basis of digital communication, in which the frequency of the carrier signal changes between discrete states, rather than continuous conversion like analog information.

Harmonic: Harmonic is a frequency or tone, and is an integer multiple of the fundamental frequency and tone. In other words, if the periodic waveform has a fundamental frequency "f" (also called the first harmonic), its harmonic frequency will be "n×f", and n is 1, 2, 3, 4, etc. The harmonic corresponding to n=2 is the second harmonic, and the harmonic corresponding to n=3 is the third harmonic.

Internal phase ("I") signal; a signal generated by an oscillator. Its phase is not shifted, and is usually represented by a sine wave, which is distinguished from the "Q" signal. The "I" signal can be modulated in any way. When the "I" signal is combined with the "Q" signal, a so-called "I/Q" signal is generated.

Internal phase/quarter phase ("I/Q") signal: the signal formed by the addition of "I" signal and "Q" signal. Generally speaking, both "I" and "Q" signals have been phase modulated However, other modulation methods such as AM can also be used. The "I/Q" signal is used to transmit separate information streams on the same transmission carrier. The modulated "I" signal and the modulated "Q" signal are Carrier signals with the same frequency. When two signals are combined, the combined "I/Q" signal is also a carrier signal with the same frequency.

Information signal: Contains the signal that transmits information. Here, the information signal refers to the baseband signal of the signal source. When it is desired to modulate a carrier with an information signal, it is also called "modulated baseband signal". It can be sound or data, analog or digital, or any other signal and combined signal.

Intermediate frequency (IF) signal: A signal whose frequency is between the frequency of the baseband signal and the frequency of the transmitted signal.

Modulation: To change one or more physical characteristics of a signal to represent the transmitted information. The three most common modulation techniques are frequency modulation, phase modulation, and amplitude modulation. In addition, there are also changes in these three technologies, sub-combinations and combinations.

Operation one switch: the same as the control switch.

Phase Modulation (PM): A modulation technique in which the frequency translation (ie, transformation) of the carrier signal is a function of the information signal. The sub-combination of PM refers to the "phase conversion adjustment" that is the basis of digital communication, in which the phase of the carrier signal changes between discrete states, rather than continuous conversion such as analog information.

Quarter-phase ("Q") signal: A signal that is out of phase with the internal phase ("I") signal. The amount of phase shift is preset with the specific application. However, in general implementation, the phase difference between the "Q" signal and the "I" signal is 90°. Therefore, if the "I" signal is a sine wave, then the "Q" signal is a cosine wave. When discussing together, the "I" signal and the "Q" signal have the same frequency.

Spectrum: The spectrum represents a continuous frequency range within which electromagnetic waves have the same characteristics. This wave can propagate in any communication medium, whether natural or artificial, including air, space, wires, cables, liquids, wave guides, fine wires, optical fibers, etc. The electromagnetic spectrum includes all frequencies greater than zero Hz.

Divide frequency: Divide frequency is a frequency or tone, which is a fraction of the reference fundamental frequency or fundamental tone. That is, the subharmonic frequency is obtained by dividing the fundamental frequency by an integer. For example, if the cycle has a frequency "f", (also called the fundamental frequency or the first subharmonic frequency), the subharmonic frequency has "f/n" The frequency of ", n is 1, 2, 3, 4, etc. The subharmonic frequency corresponding to n=2 refers to the second subharmonic frequency. The subharmonic frequency corresponding to n=3 refers to the third subharmonic frequency and so on. The subharmonic frequency itself also has a harmonic frequency, and the nth harmonic frequency of the nth subharmonic frequency will have the same frequency as the original cycle. For example, the third harmonic frequency (having a frequency of "f/3") can have an integer multiple of harmonic frequency (such as the second harmonic frequency "2×f/3", the third harmonic frequency "3×f/3" Wait). The third harmonic of the third harmonic of the original signal (ie, "3×f/3") has the same frequency as the original signal.

Triggering a switch: the same as controlling a switch

Up-conversion: A program that implements frequency conversion where the final frequency is higher than the initial frequency.

2 Summary of the invention

The present invention relates to a system and method for frequency upward conversion, and its application.

In one embodiment, the frequency up converter of the present invention is used as a stable frequency source in the phase comparator and the frequency comparator. This embodiment of the invention achieves this goal through a stable, low-frequency local oscillator, a switch and a filter. Because it converts the frequency up, the present invention can generate stable, high-frequency signals at a lower cost of the low-frequency oscillator.

In the second embodiment, a frequency up converter is used as a system or method for transmitting electromagnetic signals.

Based on the discussion here, it can be understood that there are other different embodiments in the related art, and the present invention can be applied to different aspects, and these modified embodiments still fall within the scope of the present invention.

For a clear description, different modulation examples are discussed below. However, it should be understood that the present invention is not limited to these examples. Those familiar with related technologies can understand that other modulation techniques can be used in the present invention based on the content here.

And, for clear description, the frequency up conversion according to the present invention will be described in the following description of the transmitter. However, the present invention is not limited to these examples. The following equivalents, expansions, and transformations will be based on the description here, so that those familiar with the relevant technology will clearly understand. Such equivalence, expansion, transformation, etc. all fall within the scope of the present invention.

2.1 Discussion on modulation technology

The technology that can add information to the transmitted electromagnetic signal is called modulation technology. These technologies are well known to those who are familiar with related technologies, including frequency modulation (FM), phase modulation (PM), amplitude modulation (AM), quarter phase shift transform (QPSK), frequency shift transform (FSK), phase shift Transformation (PSK), Amplitude Shift Transformation (ASK), etc., and combinations of these, but not limited to these techniques. At least three of these modulation technologies, FSK, PSK, and ASK are sub-combinations of FM, PM, and AM respectively, and refer to circuits with discrete input signals (such as digital input signals).

For illustrative purposes only, all circuits and technologies below refer to electromagnetic broadcast media. However, the present invention is not limited to these examples. Those familiar with related technologies will understand that these circuits and technologies can be used in all transmission media (eg, air broadcasting, point-to-point cables, etc.).

2.2 Examples of circuit diagrams and waveforms

2.2.1 FM

FIG. 1 illustrates an example of a frequency modulation (FM) circuit 100, and FIGS. 2A, 2B, and 2C, and FIGS. 20A, 20B, and 20C illustrate waveform examples of multiple points in the FM circuit 100. In the FM system, the frequency of the carrier signal, such as the oscillating signal 202 (FIG. 2B and FIG. 20B) is transformed to display the communication data, such as the information signal 102 in FIG. 2A and the information signal 2002 in FIG. 20A. In FIG. 20A, the information signal 2002 is a continuous signal (such as an analog signal), and in FIG. 2A, the information signal 102 is a discrete signal (such as a digital signal). In the discrete information signal 102, the FM circuit 100 corresponds to the frequency translation conversion system (FSK), which is a sub-system of the FM system.

The frequency modulation circuit 100 receives the information signal 1022002 from the information source. The information signals 102, 2002 can be amplified by the selected amplifier 104 and filtered by the selected filter 114. In addition, the input voltage drives a voltage controlled oscillator (VOC) 106. In the VOC 106, an oscillating signal 202 is generated (refer to FIG. 2B and FIG. 20B). The purpose of the VOC 106 is to change the frequency of the oscillating signal 102 with the input voltage, such as the information signal 102, 2002. When the information signal is the digital information signal 102, the output of the VOC 106 is the modulation signal 108 (as shown in FIG. 2C), and when the information signal is the analog signal 2002, the output of the VOC 100 is the modulation signal 2004 (as shown in FIG. 2C). The modulated signals 108 and 2004 are located at lower frequencies (for example, generally between 50MHz and 100MHz), and are multiplied by a selectable frequency multiplier 110 (such as 900MHz, 1.8GHz), and the selected amplifier 116 will It amplifies its amplitude. Then, the output of the optional frequency multiplier 110 and/or amplifier 116 is transmitted by the antenna 112.

2.2.2 Phase modulation

FIG. 3 is an example of a phase modulation (PM) circuit 300, and FIGS. 4A, 4B, and 4C, and FIGS. 21A, 21B, and 21C show waveforms of multiple points in the PM circuit 300. In the PM system, the phase of the carrier wave, such as the output 308 of the local oscillator (LO) (FIG. 4B and FIG. 21B), changes to represent the communication data, such as the information signal 302 in FIG. 4A and the information signal 2102 in FIG. 21A. In FIG. 21A, the information signal 302 is a continuous signal (such as an analog signal), and in FIG. 4A, the information signal 2102 is a discrete signal (such as a digital signal). In the case of the discrete information signal 302, the PM circuit refers to the phase shift adjustment system (PSK). This is a typical implementation and is a sub-combination of the PM system.

The phase modulation circuit 300 receives information signals 302, 2102 from an information source (not shown), and the information signals 302, 2102 can be amplified by the selected amplifier 304, filtered by the selected filter 318, and modulated by the modulator 306. The output 308 of the local oscillator 310 (LO) is supplied to the phase modulator 306. The LO output 308 is shown in Figure 4B and Figure 21B. A local oscillator, such as the local oscillator 310, outputs electromagnetic waves of a predetermined frequency and a predetermined amplitude.

When the information signal is a discrete information signal 302, the output of the phase modulator 306 is a phase modulation signal 312 (Figure 4C). When the information signal is an analog information signal 2102, the output of the phase modulator 306 is a phase modulation signal Signal 2104 (Figure 21C). The purpose of the phase modulator 306 is to change the phase of the LO output 308 according to the values of the information signals 302 and 2102. That is, if the LO output 308 is a sine wave in the PSK mode, and the information signal 302 is converted from the high level of the binary to the low level, the phase of the LO output 308 can be converted from a sine wave of phase 0 to a sine wave of 180 degrees. . The result of this phase transformation can be the phase modulation signal in FIG. 4C, which can have the same phase as the LO output 308, but in this example, it can also be 180 degrees out of phase. For a PSK system, comparing FIGS. 4A, 4B, and 4C, the phase change of the phase modulation signal 312 representing the information signal 302 can be seen. In the case of the analog information signal 2102 in FIG. 21A, the phase of the LO output 308 in FIG. 21B continuously changes with the phase of the information signal 2102. That is, 1 when the information signal 2102 increases from "X" to "X+δx", the PM signal 2104 in Figure 21C changes from sin(ωt) to sin(ωt+<img file="TW435000B_D0001.tif" />), where 088118183-01 is the change in the information signal 2102 corresponding to δx. For the analog PM system, comparing the waveforms 2102, 308, and 104 of FIGS. 21A, 21B, and 21C, it can be seen that the phase change of the phase modulation signal 2104 representing the information signal 2101 is changed.

After the phase modulator 306 modulates the information signals 302, 2102 and the LO output 308, the phase modulated signals 312, 2104 can pass through an optional frequency multiplier 314 and amplifier 320. The purpose of the selected frequency multiplier 314 is to increase the frequency of the phase modulation signal 312 from a lower frequency (such as 50 MHz to 100 MHz) to a desired broadcast frequency (such as 900 MHz, 1.8 GHz). The selection amplifier 320 enhances the signal strength of the phase modulation signals 312 and 2104 to a desired level for transmission by the antenna 316.

2.2.3 AM

FIG. 5 shows an example of an amplitude modulation circuit 500, and FIGS. 6A, 6B, and 6C and FIGS. 22A, 22B, and 22C show waveforms of multiple points in the AM circuit 500. In the AM system, the amplitude of the carrier signal, such as the local oscillator (LO) signal 508 (FIG. 6B and FIG. 22B), changes to represent the communication data. The information signal 502 in FIG. 6A, and the information signal 2202 in FIG. 22A. In FIG. 22A, the information signal 2202 is a continuous signal (such as an analog signal), and in FIG. 6A, the information signal 502 is a discrete signal (such as a digital signal). In the case of the discrete information signal 502, the AM circuit refers to the amplitude shift adjustment system (ASK). It is a sub-combination of the AM system.

The amplitude modulation circuit 500 receives information signals 502, 2202 from an information source (not shown). The information signals 502, 2202 can be amplified by the selected amplifier 504 and filtered by the selected filter 518. The AM circuit 500 also includes a local oscillator (LO) 506 with an LO output 508. The information signals 502, 2202 and LO output 508 are then multiplied by a frequency multiplier 510. The purpose of the frequency multiplier 510 is to change the amplitude of the LO output 508 with the amplitude of the information signals 502 and 2202. When the information signal is a digital information signal 502, the output of the frequency multiplier 510 is an amplitude modulation signal 512 (FIG. 6C), and when the information signal is an analog information signal 2202, the output of the frequency multiplier 510 is an amplitude modulation signal 2204 (FIG. 22C). The AM signals 512 and 2204 can pass through a selectable frequency multiplier 514, in which the frequency of the AM signals 512 and 2204 is increased from a lower frequency (such as 50 MHz to 100 MHz) to a desired broadcast frequency (such as 900 MHz, 1.8 GHz). The selection amplifier 520 enhances the signal strength of the AM signals 512 and 2204 to a desired level for transmission by the antenna 516.

2.2.4 Internal phase/quarter phase modulation

Figure 7 shows an example of the internal phase/quarter phase modulation ("I/Q"&gt; circuit 700), and Figures 8A, 8B, 8C, 8D and 8E show more than one of the "I/Q" modulation circuits 700 Point waveform. In this technology, the bandwidth efficiency is increased, and separate, different phase information signals can be simultaneously transmitted on the carrier. That is, the first information signal 702 of FIG. 8A can be adjusted to the inner phase of FIG. 8B ("I") oscillating signal 710, and the second information signal 704 of FIG. 8C can be adjusted to the quarter-phase ("Q") oscillating signal 712 of FIG. 8D. The "I" modulation signal and the "Q" modulation The variable signal is combined, and then the combined modulated signal "I/Q" is transmitted. In a typical use case, both information signals are digital signals, and the two are phase-modulated into "I" and "Q" Oscillating signal. One of the related techniques is that the "I/Q" mode can be combined with analog signals, analog and digital signals, and other modulation techniques and combinations.

This "I/Q" modulation system uses two PM circuits to increase bandwidth efficiency. As mentioned above, in the PM circuit, the phase of the oscillating signal, such as 710 (or 712) (FIG. 8B or 8D), changes to represent the communication data, such as the information signal 702 (or 704). For the convenience of understanding and display, the discussion here will describe a more general use case of the "I/Q" mode, that is, with a digital information signal and phase modulation on two oscillating signals. Therefore, the two signal streams are combined in PM phase shift transform (PSK).

The "I/Q" modulation circuit 700 receives an information signal 702 (not shown) from a first information source, and receives an information signal 704 (not shown) from a second information source. Examples of information signals 702 and 704 are shown in FIGS. 8A and 8C. The information signals 702 and 704 can be amplified by the selected amplifiers 714 and 716, and filtered by the selected filters 734 and 736. It then passes through phase modulators 718 and 720. And the oscillating signals 710 and 712 are supplied to the phase modulators 718 and 720. The oscillation signal 710 is generated by the local oscillator 706 and is shown in FIG. 8B, and the oscillation signal 712 is the phase shift output of the local oscillator 706. The local oscillator 706 outputs an electromagnetic wave at a predetermined frequency and amplitude.

The output of the phase modulator 718 is the phase modulation signal 722, the waveform of which is represented by a dotted line in FIG. 8E. Similarly, the output of the phase modulator 720 is a phase modulation signal 724, and the waveform of this signal is represented by a solid line in FIG. 8E. The effect of the phase modulators 718 and 720 on the oscillating signals 710 and 712 is to change their phases. As described above, the system here is a PSK system, and therefore, the phase modulators 718 and 720 shift the phase of the oscillating signals 710 and 712 by a discrete amount, which is a function of the information signals 702 and 704.

To simplify the description and illustration, the oscillator 710 in FIG. 8B is a sine wave, and refers to the "I" signal in the "I/Q" circuit 700. After the output of the oscillator 706 passes through the phase shifter 708, as it is shifted by -π/2, the oscillation signal 712 becomes the sinusoidal wave in FIG. 8D and is referred to the "Q" signal in the "I/Q" circuit. Next, in order to simplify the display, the phase modulators 718 and 720 in the figure translate the oscillating signals 710 and 712 by 180 degrees, respectively. This is shown in Figure 8E. The adder 726 adds the modulated signals 722 and 724. The output of the adder 726 is the arithmetic sum of the modulation signals 722 and 724, and is the "I/Q" signal 728. (In order to make the display of FIG. 8E easier to understand, the combined signal is not shown. However, those familiar with related technologies should understand that the sum of two sine waves of the same frequency also has the same frequency).

The "I/Q" signal 728 can then pass through the selected frequency multiplier 730 and the selected amplifier 738, where the frequency multiplier 730 increases the frequency of the "I/Q" signal 718 from a lower frequency (such as 50MHz to 100MHz) to The desired broadcast level (such as 900MHz to 1.8GMHz), and the amplifier 738 increases the signal strength of the "I/Q" signal 728 to the desired antenna broadcast level.

2.3 Features of the invention

It is obvious from the above description that the communication system contains multiple frequencies. Among them, the frequency of the information signal is relatively low. The frequency of the local oscillator (voltage controlled oscillator or other types of oscillators) is higher than the frequency of the information signal, but for effective transmission, its frequency should not be too high. The third frequency is the frequency of the transmitted signal, which is greater than or equal to the frequency of the oscillator. This frequency is the frequency after the selected frequency multiplier and amplifier in the above-mentioned circuit.

Generally speaking, in the transmission system of a communication system, at least a filter, an amplifier, and a frequency multiplier are required to convert the frequency of an information signal to a broadcast frequency. These components not only cost in procurement and operation.

The present invention provides a more effective method to generate a modulated carrier for transmission, which can use low power and require few components. The following description will make these additional advantages more clear.

3 Frequency up conversion

The present invention relates to a system and method for frequency upward conversion, and its application. In one embodiment, the frequency up conversion method of the present invention can use a stable, low-frequency oscillator to generate a stable high-frequency signal, for example, it can be used as a reference signal for a phase comparator or a frequency comparator. In another embodiment, the frequency up conversion technique of the present invention is applied to the transmitter. Therefore, the present invention also relates to a conveyor. Based on the discussion here, those familiar with related technologies should understand that other conversion embodiments and applications can also use the frequency up conversion of the present invention, and these conversion embodiments and applications also fall within the scope of the present invention.

For the sake of illustration, the frequency up-conversion technology according to the present invention is described below with a transmitter. However, it can be understood from the foregoing chapters that the present invention is not limited to this embodiment.

The following chapters explain the technologies related to transmitter and frequency up-conversion, as well as examples of constructions to achieve these methods. It should be understood that the present invention is not limited to the specific embodiments described above. Those who are familiar with related technologies can understand the following equivalents, transformations, expansions and derivations based on the technical content here. These equivalents, transformations, expansions and derivations fall within the scope of the present invention.

3.1 High-level description

This section describes the high-level description of the up-conversion technology and transmission signal according to the present invention. In particular, the operation procedure of the frequency up-conversion of the transmission signal is explained in a high-level form. The operating procedure is usually represented by a flowchart. The flowchart here is for illustrative purposes only, without any limitation. In particular, the use of the flow chart should not be interpreted as a cost that the invention is only a digital or discrete operation. According to the technology here, those familiar with the relevant technology will understand that the invention can be achieved by discrete operation, continuous operation or a combination of these. . Furthermore, the control flow of the flowchart will enable those familiar with the related art to clearly understand that other operation control flows also fall under the spirit and scope of the present invention.

In addition, the structural implementation to achieve this procedure is also described in a high-level way. This structural description is only used for clarification and does not become any limitation. In particular, any number of structural implementations can be used to achieve the procedures described in this section, one of which is described in this section. Based on the content here, people familiar with related technologies will be able to clearly understand the details of this structural implementation.

3.1.1 Operation description

The flowchart 900 of FIG. 9 shows an operation method of frequency up conversion according to an embodiment of the present invention. The present invention relates to the frequency up-conversion technique in FIG. 9 and the transmission signal. The representative waveform of the signal generated in the flowchart 900 is depicted in FIG. 19. In order to describe the high-level operation of the present invention, the frequency modulation of the digital information signal needs to be explained. The present invention is not limited to these embodiments. Those who are familiar with the relevant technology should understand that other modulation modes can be used.

In step 902, the information signal 1902 (FIG. 19A) is generated by a signal source. This information signal can be an analog signal, a digital signal and any combination thereof, or any baseband signal to be transmitted. As described below, the information signal 1902 is used to modulate an intermediate signal 1904. Accordingly, the information signal 1902 here is also called a modulated baseband signal. In the example of FIG. 19A, the information signal 190 is a digital signal. However, the present invention is not limited to this embodiment. As mentioned above, the information signal can be analog, digital or any combination thereof.

In step 904, an oscillating signal 1904 is generated (FIG. 19B). In step 906, the oscillating signal 1904 is modulated, and this modulation becomes a function of the information signal 1902. Step 906 generates a modulated oscillating signal 1906 (FIG. 19C), which is called the modulated intermediate signal. As mentioned above, in the flowchart of FIG. 9, the information signal 1902 is a digital signal. However, the information signal 1902 can also be an analog or any combination of analog and digital signals. In addition, the example in FIG. 19 uses the frequency shift adjustment (FSK) technique in the modulation technique. Alternatively, any modulation technology (such as FM, AM, PM, ASK, PSK, etc. or any combination of these) can also be used. The other steps 908-912 in the flowchart of FIG. 9 operate in the same manner, and no matter what modulation technique is used, the information signal 1902 is digital, analog, etc., or any combination of these.

In step 908, the modulated signal 1906 generates a multi-frequency signal 1908 (Figure 19D). The signal 1908 has a continuous, periodic repetitive waveform. In one embodiment, the waveform of the signal 1908 is rectangular, and it is an expanded waveform in FIG. 19E. Those who are familiar with the related technology should understand that the mathematical limitation makes the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. However, for the convenience of discussion, the "rectangular wave" will be used here, and refers to the substantial rectangular wave, which includes the generally referred to as square wave and pulse wave. If an ideal rectangular wave can be realized mathematically or technically, it also falls within the scope of the present invention.

A continuous cycle (such as waveform 1908) includes a series of sine waves of specific amplitude and phase, whose frequency is an integer multiple of the repetition frequency of the waveform (the repetition frequency of the waveform refers to the number of times the cycle repeats per second). Part of the waveform of the signal 1908 is shown in the expanded waveform 1910 of FIG. 19E. The first three sinusoidal components of waveform 1910 (Figure 19E) are depicted in waveforms 1912a, b, and c in Figure 19F and waveforms 1914a, b, and c in Figure 19G. (In the examples of Figs. 19F and 19G, the three sine components are displayed individually. In fact, these waveforms and other sine components not shown are generated at the same time, as shown in Fig. 19H). In Figure 19H, the waveforms are displayed at the same time, but not in the form of addition. If the waveforms 1912 and 1914 are represented in the form of addition, they will have an infinite number of king chord components, which is the same as the periodic waveform 1910 in FIG. 19E. To simplify the description, only the first three of the infinite sine components are shown). These sine waves are called harmonics and can be represented graphically or mathematically. Each harmonic (waveform 1912a, b and c and 1914a, b and c) has the same information content as in waveform 1910 (which has information corresponding to the same part of waveform 1908). Accordingly, the information content of the waveform 1908 can be obtained from any of its harmonics. Because the frequency of the harmonics is an integer multiple of the repetition frequency of the signal 1908 and has the same information as the signal 1908, each harmonic represents a frequency up-conversion of the signal 1908. Some harmonics are located at the desired frequency (such as the desired transmission frequency). These harmonics are called "desired harmonics". According to the present invention, the desired harmonics have sufficient amplitude to achieve the required procedures (such as transmission). The other harmonics are not at the desired frequency. These harmonics are called "undesired harmonics".

In step 910, any undesired signal 1908 continuous cycle harmonics are filtered out (for example, harmonics that are not at the desired transmission frequency). In the example of FIG. 19, the first and second harmonics (waveforms 1912a, b in FIG. 19F and waveforms 1914a, b in FIG. 19G) are undesirable harmonics. In step 912, the remaining harmonics, the third harmonic in FIG. 19 (waveform 1912c in FIG. 19F and waveform 1914c in FIG. 19G) are transmitted. This is described by the waveform 1918 of FIG. 191. In the example of Figure 19, only three harmonics are displayed, and the lower two are filtered out, leaving the third harmonic. In a practical situation, there are infinite harmonics, and the filtering operation can filter out undesired harmonics. These undesired harmonics include harmonics whose frequencies are lower or higher than expected harmonics.

3.1.2 Structure description

Fig. 10 shows a block diagram of an up-conversion system according to an example of the present invention. An example of this up-conversion system is a conveyor 1000 in the figure. The transmitter 1000 includes a receiving module 1004, a harmonic generation and expansion module 1006, and a transmitting module that receives information signals 1002 and outputs transmission signals 1014.

Preferably, the receiving module 1004, the harmonic generation and expansion module 1006, and the transmission module 1008 process the information signal in the manner in the operation flowchart 900. In other words, the transmitter 1000 is a structural embodiment for implementing the steps of the flowchart 900. However, it should be understood that the scope and spirit of the present invention include other structural embodiments for implementing the flowchart 900. Based on the discussion here, those familiar with related technologies should be able to understand these other specific structural embodiments.

The operation situation of the transmitter 1000 will be described below with reference to the diagram 900. In step 902, the information signal 1002 (as shown in FIG. 19A) from the information source passes through the receiving module 1004. In step 904, an oscillating signal (as shown in FIG. 19B) is generated, and in step 906, it is modulated to generate a modulated signal 1010. (Figure 19C shows an example of frequency modulation). The oscillating signal can be modulated by any modulation technique, some examples of which are described below. In step 908, the harmonic generation and expansion module (HGEM) generates a continuous, cycle-wave multi-harmonic signal (Figure 19D shows an example of frequency modulation). This waveform is a rectangular wave, such as a square wave or a pulse wave (although the present invention is not limited to these embodiments), and includes multiple sine waves whose frequencies are integer multiples of the fundamental frequency. Fourier series analysis can be used to determine the amplitude of each harmonic. (As shown in Figure 19F and Figure 19G). In step 910, the filter 910 in the HGEM 1000 filters out undesired frequencies (harmonics), and outputs an electromagnetic signal 1012 of the desired frequency (as shown in FIG. 1). In step 912, the EM signal 1012 passes through the transmission module 1008 and is ready for transmission. The transmission module 1008 then outputs a transmission signal 1014.

3.2 Example

This section shows several examples of the above methods and structures. These examples are for illustrative purposes, not for limitation. The present invention is not limited to these embodiments. According to the technology here, people familiar with the related technology should be able to understand different conversion embodiments (including equivalence, expansion, variation, and derivative, etc.).

3.2.1 First Embodiment: Frequency Modulation (FM) Mode

In this embodiment, an information signal is received, and the frequency of the modulation signal is a function of the information signal.

3.2.1.1 Operational description

The flowchart of FIG. 11 shows the operation method of the transmitter in the frequency modulation mode according to the present invention. As mentioned earlier, the representative waveform in Figure 19 illustrates the operation of the transmitter in FM mode.

In step 1102, the information source uses any procedure or method to generate an information signal 1902 (FIG. 19A). (Because the information signal 1902 is used to modulate the signal, it is a baseband signal, also known as the modulated baseband signal 1902). The information signal 1902 can be analog, digital or any combination of these. The signal in Figure 19 illustrates a digital signal, where information is represented by discrete states in the signal. Those familiar with the related technology can understand that the present invention can also be used for analog information signals, where the information is represented by continuously changing signals. In step 1104, the information signal 1902 modulates an oscillating signal 1904 (Figure 19B). The result of this modulation is the modulation signal 1906 shown in block 1106 (Figure 19G). The modulated signal 1906 has a frequency that varies with the information signal 1902, and is an FM signal.

In step 1108, a multi-harmonic signal with continuous cycles is generated, and the rectangular waveform 1908 is shown in FIG. 19D. The rectangular waveform 1908 is generated by the modulated signal 1906. Those familiar with related technologies should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the convenience of discussion, the "rectangular wave" will be used here, and it refers to the substantial rectangular wave. Similarly, "square wave" refers to a substantially square waveform, and the present invention does not need to achieve an ideal square wave. A portion of the rectangular wave 1908 is shown in the unfolding of the cycle 1910 in FIG. 19E. The first part of the waveform 1910 is represented by "signal A" and represents the information signal 1902 of the "high level", and the second part of the waveform 1910 is represented by "signal B" and represents the information signal 1902 of the "low level". It should be understood that this conversion is for illustrative purposes only, and other conversions may be used.

As mentioned above, a continuous cycle, such as the rectangular wave 1908 indicated in the block 1110 of the flowchart 1100, has a sinusoidal component (harmonic), and its frequency is an integer multiple of the fundamental frequency of the fundamental waveform (that is, the Fourier component frequency ). The harmonics of these cycles 1910 are individually shown in Fig. 19F and Fig. 19G in an expanded manner. In this example, the waveform 1910&lt;waveform 1908) is a square wave, so only odd harmonics, such as the first, third, fifth, and seventh, are displayed. As shown in Figure 19, if the shaped wave 1908 has a fundamental frequency f₁(First harmonic), the third harmonic will have frequency 3. f₁, The fifth harmonic will have frequency 5. f₁Wait. The first, third, and fifth harmonics of signal A are shown in 1912a, 1912b, and 1912c in Fig. 19F, and the first, third, and fifth harmonics of signal B are shown in Fig. 19G, 1914a, 1914b, and 1914c. In fact, these harmonics (and higher order harmonics) are generated at the same time, as shown in waveform 1916 in Figure 19H. If all the harmonic components in FIG. 19H are added to higher harmonics (the seventh and ninth harmonics, etc.), the added waveform will be the same as the waveform 1910.

In step 1112, the undesired frequencies in the waveform 1916 are filtered out. In the example of FIG. 19, the first and third harmonics are removed, and as shown in block 1114, the remaining waveforms 1918 (ie, waveforms 1912c and 1914c) are located at the desired electromagnetic frequency. Although not shown, the higher harmonics are also removed (such as seventh, ninth, etc.).

The EM signal (left waveform 1918) is prepared in step 1116 and transmitted in step 1118.

3.2.1.2 Structure description

FIG. 12 shows a block diagram of a transmitter according to an embodiment of the invention. The embodiment of this transmitter is an FM transmitter 1200 in the figure. The FM transmitter 1200 includes a voltage controlled oscillator (VCO) 1204, a switch module 1214, a filter 1218, and a transmission module 1222 that receives an information signal 1202 and outputs a transmission signal 1224. The operating structure of the components is described as follows, the VCO is described in the following chapters 3.3.1-3.3.1.2; the example switch module is described in the chapters 33.6-3.3.6.2; the filter is described in the chapters 3.3.9-3.3.9.2; and the transmission The modules are described in chapters 3.3.10-3.3.10.2.

Preferably, the voltage controlled oscillator 1204, the switch module 1214, the filter 1218, and the transmission module 1222 process information in the manner in the operation flowchart 1100. In other words, the FM transmitter 1200 is a structural embodiment to implement the operation steps of the flowchart 1100. However, it should be understood that the scope and spirit of the present invention include other structural embodiments for implementing the flowchart 1100. Based on the discussion here, those familiar with related technologies should be able to understand these other specific structural embodiments.

The operation situation of the conveyor 1200 will be described below with reference to FIG. 1100. In step 1102, the information signal 1202 (as shown in FIG. 19A) from the information source passes through the voltage controlled oscillator 1204. In step 1104, an oscillating signal (as shown in FIG. 19B) is generated and modulated to generate a frequency modulation signal 1210 (as shown in FIG. 19C). In step 1108, the switch module 1214 generates a harmonic signal 1216 having a continuous periodic waveform (as shown in FIG. 19D). This waveform is preferably a rectangular wave, such as a square wave or a pulse wave (although the present invention is not limited to this embodiment), and includes a plurality of sine waves, the frequency of which is an integer multiple of the fundamental frequency of the waveform. These sine waves are the basic waveforms. Harmonics, and Fourier analysis will determine the amplitude of each harmonic (as shown in Figures 19F and 19G). In step 1112, the filter 1218 filters out the undesired frequencies, and outputs an electromagnetic (EM) signal 1220 with the desired frequency (as shown in FIG. 19I). In step 1116, the EM signal 1220 passes through the transmission module 1222 (optional) and is ready for transmission. In step 1118, the transmission module 1222 outputs a transmission signal 1224.

3.2.2 Second embodiment: phase modulation (PM) mode

In this embodiment, an information signal is received and a modulation signal is transmitted, the phase of which is a function of the information signal.

3.2.2.1 Operational description

The flowchart in Figure 13 shows how the transmitter operates in phase modulation (PM) mode. The representative waveform in Figure 44 illustrates the operation of the transmitter in PM mode.

In step 1302, the information source generates an information signal 4402 (FIG. 44A). The information signal 4402 can be analog, digital or any combination of these. The signal in Figure 44 describes a digital information signal, where the information is represented by discrete states in the signal. Those familiar with the related technology can understand that the present invention can also be used for analog information signals, where the information is represented by continuously changing signals. In step 1304, an oscillating signal 4404 is generated, and in step 1306, the information signal 4402 modulates the oscillating signal 4404 (FIG. 44C) to generate the modulated signal 4406 in block 1308 (FIG. 44C). The phase of the modulation signal 4406 changes with the information signal 4402.

In step 1310, the modulated signal 4406 is used to generate a multi-harmonic signal 4408 with continuous cycles. The multi-harmonic signal 4408 is a substantial rectangular wave. Those familiar with related technologies should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the convenience of discussion, the "rectangular wave" will be used here, and it refers to the substantial rectangular wave. Similarly, "square wave" refers to a substantially square waveform, and the present invention does not need to achieve an ideal square wave. As mentioned above, the continuous cycle, such as the multi-harmonic signal 4408 in the block 1312, has a sinusoidal component (harmonic) whose frequency is an integer multiple of the fundamental frequency of the fundamental waveform (ie, the Fourier component frequency). The first three harmonics are shown in Figures 44E, 44F and 44G. In fact, there are infinite harmonics. In step 1314, undesired frequencies are filtered out, as shown in block 1316, and the remaining frequencies are at the desired EM output. In one example, the first harmonic 4410, the second harmonic 4412, the fourth, fifth, etc. can be removed, leaving the third harmonic and the desired EM signal, as shown in block 1316.

The EM signal is prepared in step 1318 and transmitted in step 1320.

3.2.2.2 Structure description

FIG. 14 shows a block diagram of a transmitter according to an embodiment of the invention. An example of this conveyor is PM conveyor 1400 in the figure. The PM transmitter 1400 includes a local oscillator 1406, a phase modulator 1404, a switch module 1410, a filter 1414, and a transmission module 1418 that receives an information signal 1402 and outputs a transmission signal 1420. The operating structure of the components is described as follows: the phase modulator is described in the following sections 3.3.4-3.3.4.2; the example local oscillator is described in section 3.3.2-3.3.2.2; the switch module is described in section 3.3.6- 3.3.6, 2; the filter is described in chapter 3.3.9-3.3.9.2; and the transmission module is described in chapter 3.3.10-3.3.10.2.

Preferably, the local oscillator 1406, the phase modulator 1404, the switch module 1410, the filter 1414, and the transmission module 1418 process information in the manner in the operation flowchart 1300. In other words, the PM transmitter 1400 is a structural embodiment to implement the operation steps of the flowchart 1300. However, it should be understood that the scope and spirit of the present invention include other structural embodiments for implementing the flowchart 1300. Based on the discussion here, those familiar with related technologies should be able to understand these other specific structural embodiments.

The operation situation of the transmitter 1400 will be described below with reference to the diagram 1300. In step 1302, the information signal 1402 (as shown in FIG. 44A) from the information source passes through the phase modulator 1404. In step 1304, an oscillation signal (as shown in FIG. 44B) is generated from the local oscillator 1406 and modulated to generate a modulation signal 1408 (as shown in FIG. 44C). In step 1310, the switch module 1410 generates a multi-harmonic signal 1412 having a continuous periodic waveform (as shown in FIG. 44D). The waveform is preferably a rectangular wave, such as a square wave or a pulse wave (although the present invention is not limited to this embodiment), and includes a plurality of sine waves, the frequency of which is an integer multiple of the fundamental frequency of the waveform. These sine waves are the harmonics of the basic waveform, and Fourier analysis will determine the amplitude of each harmonic (as shown in Figures 44E, 44F, and 44G, the first three harmonics). In step 1314, the filter 1414 filters out the undesired frequencies (first harmonic 4410, second harmonic 4412, fourth, closed fifth harmonic, etc.), and outputs an electromagnetic (EM) signal 1416 with the desired frequency . In step 1318, the EM signal 1418 passes through the transmission module 1418 (optional) and is ready for transmission. In step 132, the transmission module 1418 outputs a transmission signal 1420.

3.2.3 Third Embodiment: Amplitude Modulation (AM) Mode

In this embodiment, an information signal is received and a modulation signal is transmitted, the amplitude of which is a function of the information signal.

3.2.3.1 Operational description

The flowchart in Figure 15 shows how the transmitter operates in amplitude modulation (AM) mode. The representative waveform in Figure 45 illustrates the operation of the transmitter in AM mode.

In step 1502, the information source generates an information signal 4502 (FIG. 45A). The information signal 4502 can be analog, digital or any combination of these. The signal in Figure 45 describes a digital information signal, where the information is represented by discrete states in the signal. Those familiar with the related technology can understand that the present invention can also be used for analog information signals, where the information is represented by continuously changing signals. In step 1504, a "reference" signal is generated, as shown in block 1506, having the amplitude of the information signal function. In an embodiment of the present invention, the reference signal is generated by combining the information signal 4502 and the bias signal. In another embodiment of the present invention, the reference signal only includes the information signal 4502. Those familiar with related technologies should understand that the reference signal changes with the information signal.

In step 1508, an oscillating signal 4504 is generated (FIG. 45B), and in step 1510, the reference signal 4502 is gated at a frequency that is a function of the oscillating signal 4505. The reference signal after gate processing is a multi-harmonic signal 4506 with continuous cycles (FIG. 45C), and is generated in step 1512. The multi-harmonic signal 4506 is a substantial rectangular wave, and its fundamental frequency is the same as the frequency of the reference signal (information signal 4502) processed by the gate. Those familiar with related technologies should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the convenience of discussion, the "rectangular wave" will be used here, and it refers to the substantial rectangular wave. Similarly, "square wave" refers to a substantially square waveform, and the present invention does not need to achieve an ideal square wave.

As mentioned above, the multi-harmonic signal 4506, such as the rectangular wave in the block 1514, has a sinusoidal component (harmonic), and its frequency is an integer multiple of the fundamental frequency of the fundamental waveform (that is, the Fourier component frequency). The first three harmonics are shown in 45D, 45E and 45F on the edge of the figure. In fact, there are infinite harmonics. In step 1516, the undesired frequencies are filtered out, as shown in block 1518, and the remaining frequencies are located at the desired EM output. In one example, the first harmonic 4510, the second harmonic 4512, and the fourth and fifth The harmonics etc. can be removed, leaving the third harmonic and the desired EM signal, as shown in block 1518.

The EM signal is prepared in step 1520 and transmitted in step 1522.

3.2.3.2 Structural description

FIG. 16 shows a block diagram of a transmitter according to an embodiment of the present invention. The embodiment of the transmitter is the AM transmitter 16000 in the figure. The AM transmitter 1600 includes a local oscillator 1610, an addition module 1606, a switch module 1614, a filter 1618, and a transmission module 1622 that receives an information signal 1602 and outputs a transmission signal 1624. The operating structure of the components is described as follows; the example local oscillator is described in section 3.3.2-3.3.2.2; the switch module is described in section 3.3.7-3.3.7.2; the filter is described in section 3.3.9-3.8.9.2; And the transmission module is described in chapter 3.3.10-3.3.10.2.

Preferably, the local oscillator 1610, the switch module 1614, the filter 1618, and the transmission module 1622 process information in the manner in the operation flowchart 1500. In other words, the AM transmitter 1600 is a structural embodiment to implement the operation steps of the flowchart 1500. However, it should be understood that the scope and spirit of the present invention include other structural embodiments for implementing the flowchart 1500. Based on the discussion here, those familiar with related technologies should be able to understand these other specific structural embodiments.

The operation situation of the transmitter 1600 will be described below with reference to FIG. 1500. In step 1502, the information signal 1602 (as shown in FIG. 45A) from the information source passes through the addition module 1606, and thus a reference signal 1608 is generated. In step 1508, an oscillation signal 1612 is generated from the local oscillator 1610 (as shown in FIG. 45B), and in step 1510, the switch module 1614 switches off the reference voltage according to the transmission rate as a function of the oscillation signal 1616. The signal after the gate is closed is a continuous cycle multi-harmonic signal 1616 (as shown in Figure 45C). The waveform is preferably a rectangular wave, such as a square wave or a pulse wave (although the present invention is not limited to this embodiment), and includes a plurality of sine waves, the frequency of which is an integer multiple of the fundamental frequency of the waveform. These sine waves are the harmonics of the basic waveform, and Fourier analysis will determine the amplitude of each harmonic (as shown in Figures 45D, 45E, and 45F, the first three harmonics).

When amplitude modulation is applied, the amplitude of the pulse wave of the rectangular wave 1616 changes with the reference signal 1608. As a result, the change in the amplitude of this pulse wave has a proportional effect on the absolute amplitude of all harmonics. In other words, AM is embedded at the upper end of each harmonic. In step 1516, the filter 1618 filters out the undesired frequencies (the first harmonic 4510, the second harmonic 4512, the fourth and closed fifth harmonics, etc.), and outputs an electromagnetic (EM) signal with the desired frequency 1620 (As shown in the third harmonic of 45F).

In step 1520, the EM signal 1620 passes through the transmission module 1622 (optional) and is ready for transmission. In step 1522, the transmission module 1622 outputs a transmission signal 1624.

The description of the AM embodiment here shows the information signal that has been gated, and thus the amplitude modulation is performed on the multi-harmonic signal. However, those familiar with related technologies should understand that the information signal can be modulated on the multi-harmonic signal, or on any point of the circuit, on the harmonics of the filter.

3.2.4 The fourth embodiment: internal phase/quarter phase modulation ("I/Q") mode

Internal phase/quarter phase modulation ("I/Q") is a specific sub-combination of phase modulation (PM) module embodiments. Since "I/Q" is extremely common, a separate embodiment is used to describe it here. However, since it is a specific sub-combination of PM, the characteristics of PM can also be applied to "I/Q".

In this embodiment, two information signals are received. The internal phase signal ("I") is modulated so that its phase changes with the information signal, and the quarter-phase signal ("Q") is modulated so that its phase changes with the information signal. The two phase signals are combined to generate an "I/Q" modulation signal and transmit it.

3.2.4.1 Operational description

The flow chart in Figure 17 shows how the transmitter operates in the internal phase/quarter phase "I/Q" mode. In step 1702, the first information source generates a first information signal. This information signal can be analog, digital or any combination of these. In step 1710, an internal phase oscillation signal (refer to the "I" signal) is generated, and in step 1704, the signal is modulated by the first information signal. This generates the "I" modulation signal in block 1706, where the phase of the "I" modulation signal changes with the first information signal.

In step 1714, a second information signal is generated. This information signal can be analog, digital or any combination of these, and is different from the first information signal. In step 1712, the phase of the "I" oscillating signal generated in step 1710 is shifted to generate a quarter-phase oscillating signal (refer to the "Q" signal). In step 1716, the "Q" signal is modulated by the second information signal. This generates the "Q" modulation signal in block 1718, where the phase of the "Q" modulation signal changes with the second information signal.

In step 1708, the "I" modulation signal is used to generate an "I" signal with a continuous cycle, and in step 1720, the "Q" modulation signal is used to generate a "Q" signal with a continuous cycle. In step 1722, the "I" cycle is combined with the "Q" cycle to generate a so-called "I/Q" cycle, as shown in block 1724. As mentioned above, a continuous cycle, such as the "I/Q" rectangular wave referred to in block 1724, has a sinusoidal component (harmonic), and its frequency is an integer multiple of the fundamental frequency of the basic waveform (that is, the Fourier component frequency) . In step 1726, the undesired frequencies are filtered out, as shown in block 1728, and the remaining frequencies are at the desired EM output.

The EM signal is prepared in step 1730 and transmitted in step 1732.

3.2.4.2 Structure description

FIG. 18 shows a block diagram of a transmitter according to an embodiment of the invention. The embodiment of this transmitter is the "I/Q" transmitter 1800 in the figure. The "I/Q" transmitter 1800 includes a local oscillator 1806, a phase shifter 1810, two phase modulators 1804 and 1814, two switch modules 1822 and 1828, an adder 1832, a filter 1836, and a transmission module Group 1840. The "I/Q" transmitter receives two information signals 1802 and 1814, and outputs the transmitted signal 1420. The operating structure of the components is described as follows: the phase modulator is described in the following sections 3.3.4 to 3.3.4.2; the example local oscillator is described in the section 3.3.2-3.2.2; the example phase shifter is described in the section 3.3. 3-3.3.3.2; The switch module is described in chapters 3.3.6-3.3.6.2; the example phase shifter is described in chapters 3.3.3-3.3.3.2; the adder is described in chapters 3.3.8-3.3.8.2; And the transmission module is described in chapter 3.3.10-3.3.10.2.

Preferably, the local oscillator 1806, the phase shifter 1810, the phase modulators 1804 and 1816, the switch modules 1822 and 1828, the adder 1832, the filter 1836 and the transmission module 1840 are in the manner in the operation flowchart 1700 To process information. In other words, the "I/Q" transmitter 1800 is a structural embodiment to implement the operation steps of the flowchart 1700. However, it should be understood that the scope and spirit of the present invention include other structural embodiments for implementing the flowchart 1700. Based on the discussion here, those familiar with related technologies should be able to understand these other specific structural embodiments.

The operation situation of the transmitter 1800 will be described below with reference to FIG. 1700. In step 1702, the first information signal 1802 (not shown) from the information source passes through the first phase modulator 1804. In step 1710, the "I" oscillation signal 1808 is generated from the local oscillator 1806, and in step 1704, the "I" oscillation signal 1808 is modulated in the first phase modulator 1804 by the first information signal 1802 , And produce "I" modulation signal 1820. In step 1708, the first switch module 1822 generates a multi-harmonic "I" signal 1824 with continuous cycles.

In step 1714, the second information signal 1814 (not shown) from the information source passes through the second phase modulator 1816. In step 1712, the phase shifter 1810 shifts the phase of the oscillation signal 1808 to generate the "Q" oscillation signal 1826. In step 1716, the second information signal 1814 is used to modulate the "Q" oscillating signal 1812 in the second phase modulator 1816 to generate a "Q" modulation signal 1826. In step 1720, the second switch module 1828 generates a multi-harmonic "Q" signal 1830 with continuous cycles. The multi-harmonic signal "I'1824 and the multi-harmonic signal "Q" 1830 are preferably rectangular waves, such as square waves or pulse waves (although the present invention is not limited to this embodiment), and include multiple sine waves, which The frequency is an integer multiple of the fundamental frequency of the waveform. These sine waves are the harmonics of the fundamental waveform, and Fourier analysis will determine the amplitude of each harmonic

In step 1722, the adder 1832 combines the multi-harmonic signal "I" and the multi-harmonic signal "Q" to produce a multi-harmonic signal "I/Q" 1834. In step 1726, the filter 1836 filters out the undesired frequencies and outputs the "I/Q" electromagnetic (EM) signal 1838 with the desired frequency. In step 1730, the "I/Q" EM signal 1838 passes through the transmission module 1840 (optional) and is ready for transmission. In step 1732, the transmission module 1840 outputs a transmission signal 1842.

Those familiar with the related technology should understand that in the embodiment of the conversion, the multi-harmonic signal "I" 1824 and the multi-harmonic signal "Q" 1830 can be filtered before the addition. Further, in another conversion In an embodiment, the "I" modulation signal 1820 and the "Q" modulation signal can be added to generate the "I/Q" modulation signal before passing through the switch module.

3.2.5 Other embodiments

Other embodiments of the up-conversion technology (for transmitter) of the present invention may be sub-combinations or combinations of multiple modulation techniques, and may include modulating one or more information signals in the up-conversion process.

3.2.5.1 Combined modulation technology

According to the disclosure here, those familiar with related technologies should understand that the combination of modulation technology includes quarter amplitude modulation (QAM) and embedding two forms of modulation on the up-converted signal.

Figure 62 shows a circuit combining two modulation techniques. This example uses AM modulation technology combined with PM modulation. The waveforms in Figures 63-70 illustrate the phase modulation digital information signal "A" 6202 combined with the analog amplitude modulation information signal "B" 6204. The phase modulator 1404 receives the oscillation signal 6216 (FIG. 64) and the information signal "A" 6202 (FIG. 63), thereby generating a phase modulation signal 6208 (FIG. 65). For the sake of illustration, the information signal here is a digital signal, and the phase of the oscillating signal is shifted by 180 degrees using phase modulation. Those familiar with the related technology should understand that the information signal can be an analog signal (although it is generally a digital signal), and a phase modulation other than 180 degrees can be used. Fig. 62 shows the pulse shaper 6216 that receives the phase modulation signal 6208 and outputs the pulsed PM signal 6210 (Fig. 66). The pulse shaper is optional, and is selected according to the selection and design of the phase modulator 1404. The information signal "B" 6304 and the bias signal 1604 (if necessary) are combined by the addition module 1606 to generate the reference signal 6206 (Figure 67). The pulsed PM signal 6210 passes through the switch modules 1410 and 1614 and turns off the reference signal 6206 to generate a multi-harmonic signal 6212 (Figure 68). The amplitude of the multi-harmonic signal 6212 varies with the reference signal 6202, and the period and pulse width of the multi-harmonic signal 6212 are substantially the same as the pulse PM signal 6210. Figures 69 and 70 only show the basic and second harmonics of the 6212 multi-harmonic signal. In fact, there may be an infinite number of harmonics. However, for the sake of illustration, the first and second harmonics are sufficient to show that the phase modulation and amplitude modulation in the multi-harmonic signal 6212 also appear in each harmonic. The filters 1414, 1618 will remove the undesired frequencies, and the desired harmonics 6214 will pass through the transmission modules 1418, 1622, ready for transmission.

The above-mentioned embodiments are used for description purposes. These examples do not limit the invention. Based on the content here, those familiar with the related technology will be able to understand the alternative embodiments slightly different from those described here. This conversion embodiment includes, but is not limited to, a modulation technique combined with "I/Q" mode. This modified embodiment falls within the scope of the present invention.

3.3 Implemented systems and methods

This section describes the operational and structural examples of the above-mentioned methods, structures, and/or embodiments. These components and methods are used for illustration, not for limitation. The present invention is not limited to the specific elements or method examples described herein. According to the technology here, people familiar with the relevant technology should be able to understand the relevant transformations (including equivalence, expansion, change and derivative, etc.). These changes fall within the scope and spirit of the present invention.

3.3.1 Voltage controlled oscillator (FM mode)

As described above, the frequency modulation mode embodiment of the present invention uses a voltage controlled oscillator (VCO). VCO 1204 in Figure 12. The present invention supports multiple VCO embodiments. An example VCO 2304 (Figure 23) is described below. However, it should be understood that these examples are for illustrative purposes only. The present invention is not limited to these embodiments.

3.3.1.1 Operational description

The information signal 2302 is received and an oscillation signal 2306 whose frequency changes with the information signal 2302 is generated. The oscillating signal 2306 also refers to the FM intermediate signal 2306. The information signal 2302 can be analog or digital or a combination of both, and can be conditionally ensured to be within an ideal range.

When the information signal is a digital signal 2302, the oscillation signal 2306 can be transformed in discrete frequencies. For example, in a binary system, the first frequency corresponds to the digital "high level", and the second frequency corresponds to the digital "low level". According to convention, the frequency can correspond to "high level" or "low level". This operation refers to Frequency Shift Adjustment (FSK), which is a sub-combination of FM. If the information signal 230 is an analog signal, the frequency of the oscillating signal will vary with the analog signal, and is not limited to the sub-combination of the above FSK.

The oscillating signal 2306 is a frequency modulation signal, which can be a sine wave, a rectangular wave, a triangle wave, a pulse wave or any other continuous cycle wave. As mentioned above, those familiar with the relevant technology should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the convenience of discussion, "rectangular wave" "" will refer to a substantial torch wave, "square wave" will refer to a substantial square wave, "triangular wave" will refer to a substantial triangle wave, and pulse wave will refer to a substantial pulse wave. In the present invention, it does not need to be ideal Square wave, triangle wave or pulse wave.

3.3.1.2 Structural description

Those familiar with related technologies should be quite familiar with the design and use of the voltage controlled oscillator 2304. VOC 2304 can be manufactured from separate components or can be purchased from "off the shelf". The VCO 2304 receives the information signal 2302 from the signal source. The information signal 2302 is located on the baseband and is generally an electronic signal within a specified voltage range. If the information is digital, the voltage will be at discrete levels. If the information is analog, the voltage will vary between the highest and lowest levels. The VCO 2304 uses the voltage of the information signal 2302 to output the modulated oscillation signal 2306. Since the information signal 2302 is a baseband signal and is used to modulate the oscillating signal, the information signal can be referred to as the baseband signal 2302 in modulation.

The frequency of the oscillating signal 2306 changes with the voltage of the baseband signal 2302 in the modulation. If the baseband signal 2302 in the modulation represents a digital signal, the frequency of the oscillating signal will be at discrete levels. If, on the other hand, the baseband signal 2302 in the modulation represents an analog signal, the frequency of the oscillating signal will vary between its higher and lower frequencies. The oscillating signal 2306 can be a sine wave, a rectangular wave, a triangle wave, a pulse wave or any other continuous cycle wave.

The frequency-modulated oscillation signal 2306 can then be used to drive the switch module 2802.

3.3.2 Local oscillator (PM, AM, and "I/Q" mode)

As described above, the embodiment of the phase modulation and amplitude modulation mode of the present invention uses a local oscillator. The same applies to the embodiment of the internal phase/quarter phase modulation mode ("I/Q"). For example, the local oscillator 1406 in FIG. 14, the local oscillator 1610 in FIG. 16, and the local oscillator 1806 in FIG. 18. The present invention supports multiple local oscillator embodiments. An example embodiment of the local oscillator 2402 is described below. However, it should be understood that these examples are for illustrative purposes only. The present invention is not limited to these embodiments.

3.3.2.1 Operational description

An oscillation signal 2404 is generated. The frequency of the signal 2404 can be selected, but it is generally not regarded as "variable". That is, the frequency can be selected by a specific value of a specific instance, but it generally does not change with the information signal 2302. (That is, modulate the baseband signal).

The oscillating signal 2404 is generally a sine wave, but it can also be a rectangular wave, pulse wave, or any other continuous cycle wave. As mentioned above, those familiar with the related art should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the sake of discussion, "rectangular wave" will refer to a substantial rectangular wave, "square wave" will refer to a substantial square wave, "triangular wave" will refer to a substantial triangular wave, and pulse wave will refer to a substantial pulse wave However, in the present invention, it is not necessary to achieve the ideal square wave, triangle wave or pulse wave.

3.3.2.2 Structural description

Those familiar with related technologies should be quite familiar with the design and use of the local oscillator 2402. The local oscillator 2402 can be made of separate components, or can be purchased from "off the shelf." The local oscillator 2402 is generally set to output a specific frequency. Depending on the design of the circuit, the output can be fixed" or "selectable". If it is fixed, the output is regarded as a substantially fixed frequency and cannot be changed. If the output frequency is selectable, the circuit design will allow the control signal to be applied to The local oscillator 2402 can change the frequency for different applications. However, the output frequency of the local oscillator is not regarded as "variable" and is a function of the information signal 2302, such as the baseband signal 2302 in the modulation. (If It is expected that the output frequency of the oscillator will change with the information signal, and VCO is a better choice.) The oscillation signal 2404 is generally a sine wave, but can also be a rectangular wave, a triangle wave, a pulse wave or any other continuous wave.

The output of the local oscillator 2402 can be the input of other circuit elements, such as the phase modulator 2606, the phase shift circuit 2504, the switch module 3102, and so on.

3.3.3 Phase shifter ("I/Q" mode)

As mentioned above, the internal phase/quarter phase modulation ("I/Q") of the present invention uses a phase modulator. The phase shifter 810 in FIG. 18. The present invention supports multiple phase shifter embodiments. An example of the phase shifter 2504 (FIG. 25) is described below. The present invention is not limited to these embodiments. The content described here is for a 90-degree phase shifter. However, the 90-degree phase shifter is for illustrative purposes, and those familiar with the related art should understand that other phase shifters can be used without departing from the scope of the present invention.

3.3.3.1 Operational description

Receive the "internal phase" oscillation signal 2502, and output the "quarter phase" oscillation signal 2506. If the internal phase ("I") signal refers to a sine wave, then the quarter phase ("Q") signal 2506 refers to a cosine wave (that is, the phase difference between the "Q" signal 2506 and the "I" signal 2502 90 degrees). However, it can also be a rectangular wave, a triangular wave, a pulse wave, or any other continuous cycle wave. As mentioned above, those familiar with the related art should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the sake of discussion, "rectangular wave" will refer to a substantial rectangular wave, "square wave" will refer to a substantial square wave, "triangular wave" will refer to a substantial triangular wave, and pulse wave will refer to a substantial pulse wave However, in the present invention, it is not necessary to achieve the ideal square wave, triangle wave or pulse wave. Therefore, without considering the shape of the waveform, the "Q" signal 2506 and the "I" signal differ by a quarter of a period. The frequencies of the "I" and "Q" signals 2502 and 2506 are substantially equal.

In the discussion here, the more general embodiment will refer to two intermediate signals separated by 90 degrees. This is not limited to the present invention. Those familiar with the related technology should understand that the technology applied here and to the "I/Q" embodiment of the present invention can also be applied to more exotic embodiments, where the translation amount of the intermediate signal is not 90 degrees, and there may be More than two intermediate frequencies.

3.3.3.2 Structural description

Those familiar with related technologies should be quite familiar with the design and use of the phase shifter 2504. The phase shifter 2504 can be made of separate components, or can be purchased from "off the shelf". The phase shifter receives the "internal phase" oscillation signal 2502 from any number of signal sources, such as the VCO oscillator 2304, or the local oscillator 2402, and outputs a quarter phase ("Q") oscillation signal 2506, whose frequency and The waveform is the same as the input "I" signal 2502, however, the phase difference is 90 degrees. The "I" signal and the "Q" signal 2502 and 2506 are generally sine waves. However, they can also be rectangular waves, triangle waves, pulse waves, or any other continuous cycles. Without considering the shape of the waveform, the difference between the "Q" signal 2506 and the "I" signal 2502 is a quarter of a period. Both the "I" signal and the "Q" signal 2502 and 2506 are adjustable.

The output of the phase shifter 2504 can be used as the input of the phase modulator 2606.

3.3.4 Phase modulation (PM and "I/Q" mode)

As described above, the phase modulation (PM) mode embodiment including the phase/quarter phase modulation ("I/Q") mode of the present invention uses a phase modulator. The phase modulator 1404 in FIG. 14 and the phase modulators 1804 and 1816 in FIG. 18. The present invention supports multiple embodiments of phase modulators. An example of the phase modulator 2606 (FIG. 26) is described below. However, these examples are for illustrative purposes only, and the present invention is not limited to these examples.

3.3.4.1 Operational description

The information signal 2602 and the oscillation signal 2604 are received, and the phase modulation oscillation signal 2608 whose phase changes with the information signal is output. The information signal 2602 can be analog or digital, or conditional, to ensure that it is within a desired range. The oscillating signal 2604 can be a sine wave, a rectangular wave, a triangle wave, a pulse wave, or any other continuous cycle wave. As mentioned above, those familiar with the related art should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the sake of discussion, "rectangular wave" will refer to a substantial rectangular wave, "square wave" will refer to a substantial square wave, "triangular wave" will refer to a substantial triangular wave, and pulse wave will refer to a substantial pulse wave However, in the present invention, it is not necessary to achieve the ideal square wave, triangle wave or pulse wave. The modulated oscillating signal 2608 also refers to the modulated intermediate signal 2608.

When the information signal 2602 is a digital signal, the modulated intermediate signal 2608 will shift between discrete values. The first phase (such as sin(ωt+θ₀The signal represented by) corresponds to the "high" level of the digit, and the second phase (such as sin(ωt+θ₀+δ) represents the signal, where δ represents the amount of phase shift) corresponding to the digital "low" level. The phase can correspond to the "high" level and the "low" level according to habits. This operation is the phase shift adjustment (PSK), which is a sub-combination of PM.

If the information signal 2602 is an analog signal, the phase of the modulated intermediate signal 2608 will change with the information signal 2602, and is not limited to the aforementioned PSK sub-combination.

The modulated intermediate signal 2608 is a phase-changing signal, which can be a sine wave, rectangular wave, pulse wave, or any other continuous cycle, and has substantially the same period as the oscillation signal 2604.

3.3.4.2 Structural description

Those familiar with related technologies should be quite familiar with the design and use of the phase modulator 2606. The phase modulator 2606 can be made of separate components, or can be purchased from "off the shelf". The phase modulator receives the information signal 2602 from a signal source, and receives the oscillation signal 2604 from the local oscillator 2402 or the phase shifter 2604. The information signal 2602 is located on the baseband and generates an electronic signal with a specified voltage range. If the information signal is digital, the voltage will be at discrete levels. If the information is analog, the voltage will vary continuously with the information signal 2602 between the lowest and highest level. The phase modulator 2606 uses the voltage of the information signal 2602 to modulate the oscillating signal 2604 and outputs the modulated intermediate signal 2608. Since the information signal 2602 is a baseband signal and is used to modulate the oscillating signal, it can be the baseband signal 2604 in modulation.

The modulated intermediate signal 2608 is an oscillating signal, and its phase changes with the baseband signal 2602 in the modulation. If the baseband signal 2602 in the modulation represents a digital signal, the baseband signal 2608 in the modulation will be shifted by a discrete amount (for example, the baseband signal in the modulation will be at sin(ωt+θ₀) And sin(ωt+θ₀+δ) to shift by the amount of δ). If, on the other hand, the modulated baseband signal 2602 represents an analog signal, the phase of the modulated baseband signal 2608 will continuously shift with the information signal 2602 between its highest and lowest limits. In one embodiment, the upper and lower limits of the modulated intermediate signal 2608 can be expressed as sin(ωt+θ₀) And sin(ωt+θ₀+δ). In still another embodiment, the range of the phase shift may be less than π. The intermediate signal 2608 of the modulation can be a sine wave, a rectangular wave, a triangle wave, a pulse wave, or any other continuous cycle wave.

The intermediate signal 2608 of phase modulation can be connected to drive the switch module 2802.

3.3.5 Adding module (AM mode)

As mentioned above, the embodiment of the amplitude modulation mode (AM) of the present invention uses an addition module. Adding module 1606 as shown in Figure 16. The present invention supports multiple embodiments of adding modules. An example of the addition module 2706 (FIG. 27) is described as follows. However, these examples are for illustrative purposes only, and the present invention is not limited to these examples. When it is amplitude modulation, "I/Q" mode can also be used. The addition module 2706 does not need to use all amplitude modulation embodiments.

3.3.5.1 Operational description

Receive the information signal 2702 and the bias signal 2704, and output the reference signal. The information signal 2702 can be analog or digital, or conditional, to ensure that it is within a desired range without damaging any circuit components. The bias signal is generally a direct current (DC) signal.

When the information signal 2702 is a digital signal, the reference signal 2608 will shift between discrete values, the first value corresponds to the digital "high" level, and the second value corresponds to the digital "low" level. The two values can correspond to the "high" level and the "low" level according to habits. This operation is called amplitude shift adjustment (ASK), which is a sub-combination of AM.

If the information signal 2702 is an analog signal, the reference signal 2708 will linearly change between the highest and the lowest value. The highest and lowest values correspond to the upper and lower limits of the information signal 2702. In addition, the extreme value range of the reference signal 2708 can correspond to the upper and lower limits of the information signal by convention.

The reference signal 2708 is a digital or analog signal, and is proportional to the information signal 2702.

3.3.5.2 Structural description

Those familiar with related technologies should be quite familiar with the design and use of the addition module 2706. The addition module 2706 can be made of separate components, or can be purchased from "off the shelf". The addition module receives the information signal 2702 from a signal source. The addition signal 2702 is located on the baseband, and is generally an electronic signal within a specified voltage range. If the information signal is digital, the information signal 2702 is located at two discrete levels. If the information signal is an analog signal, the information signal will continuously change between the lowest and highest levels.

The addition module 2706 uses the voltage of the information signal 2702 and combines it with the bias signal 2704. The output of the addition module 2706 is referred to as the reference signal 2708. The purpose of the addition module 2706 is to make the reference signal at a desired level. Those familiar with related technologies should understand that if the information signal is already in the desired range, the information signal 2702 can be used directly without adding the bias signal 2704. The information signal 2720 is a bias signal, but generally in the AM embodiment, it is not directly used to modulate the oscillating signal. If the information signal 2702 represents digital information, the amplitude of the reference signal 2708 is at discrete levels. On the other hand, if the information signal 2702 represents an analog signal, the amplitude of the reference signal continuously changes between the upper and lower limits. The amplitude of the reference signal 2708 is proportional to the information signal 2702, however, the positive reference signal does not need to represent the positive information signal 2702.

The reference signal 2708 passes through the first input 3108 of the switch module 3102. In one embodiment, the resistor is connected between the output of the addition module 2706 (or the information signal source in the embodiment, where the addition amplifier is not used) and the switch 3116 of the switch module 3102.

3.3.6 Switch mode (FM, PM and "I/Q" mode)

As mentioned above, the frequency modulation (FM), phase modulation (PM) mode and internal phase/quarter phase modulation mode ("I/Q") embodiments of the present invention are composed of a switch, such as the switch module 2802 (Figure 28A-28C&gt;. In one example, the switch module 2802 is a component of the switch module 1214 in Figure 12, the switch module 1410 in Figure 14, and the switch modules 1822 and 1828 in Figure 18. The present invention supports multiple Examples of the switch module. However, these examples are for illustrative purposes only, and the present invention is not limited to these examples. The switch module 2802 and its operation in FM, PM and "I/Q" modes and its operation in AM The operation in the mode is the same, as described in section 3.3.7-3.3.7.2 below.

3.3.6.1 Operational description

A modulated oscillating signal 2804 is applied to block a bias signal 2806, and a signal with multiple harmonics 2814 is generated. The bias signal is generally a fixed voltage. The modulated oscillating signal can be frequency modulation, phase modulation, or any other modulation form. In one embodiment, such as the amplitude shift adjustment mode, the modulated oscillation signal 2804 may also be an amplitude modulated signal. The modulated oscillation signal 2804 can be a sine wave, a rectangular wave, a triangle wave, a pulse wave, or any other continuous cycle wave. In a preferred embodiment, the modulated oscillation signal 2804 is a rectangular wave. As mentioned above, those familiar with the related art should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the sake of discussion, "rectangular wave" will refer to a substantial rectangular wave, "square wave" will refer to a substantial square wave, "triangular wave" will refer to a substantial triangular wave, and pulse wave will refer to a substantial pulse wave However, in the present invention, it is not necessary to achieve the ideal square wave, triangle wave or pulse wave.

The multi-harmonic signal 2814, hereinafter referred to as the multi-harmonic signal 2814, is a continuous cycle, and is the same as the modulated oscillation signal 2804. That is, if the modulated oscillation signal 2804 is an FM signal, the multi-harmonic signal 2814 is also a FM signal, and when the modulated oscillation signal 2804 is a phase-modulated signal, the multi-harmonic signal 2814 will be a phase-modulated signal. (In one embodiment, the multi-harmonic signal 2814 is a rectangular wave). As described above, a continuous cycle, such as a rectangular wave, has a sine component whose frequency is an integer multiple of the fundamental frequency of the basic waveform (Fourier component frequency). That is, the multi-harmonic signal 2814 is composed of a sine wave whose frequency is an integer multiple of its fundamental frequency.

3.3.6.2 Structural description

The switch module of an embodiment of the present invention includes a first input 2808, a second input 2810, a control input 2820, an output 2822, and a switch 2816. The bias signal 2806 is applied to the first input of the switch module 2802. Generally speaking, the bias signal 2806 is a fixed voltage, and in one embodiment, a resistor 2824 is placed between the bias signal 2806 and the switch 2816. Generally speaking, the second output 2810 of the switch module 2802 is located at the electrical ground 2812. However, those familiar with the related art should understand that in the alternative embodiment, assuming that the second signal is different from the bias signal 2806, the second output 2810 may not be located at the electrical ground 2812, but the second signal 2818 is electrically grounded.

The modulated oscillation signal 2804 is connected to the control input 2804 of the switch module 2802. The modulated oscillating signal 2804 can be frequency modulation or phase modulation (in some embodiments, it can be frequency modulation, such as on/off adjustment, but this is not a general situation and is described here). The modulated oscillation signal 2804 can be a sine wave, a rectangular wave, a triangle wave, a pulse wave, or any other continuous cycle wave. In a preferred embodiment, the modulated oscillation signal 2804 is a rectangular wave.

The multi-harmonic signal 2814 described in section 3.3.6.1 appears at the output 2822 of the switch module 2802. The multi-harmonic signal 2814 is a continuous cycle and is the same as the modulated oscillation signal 2804. That is, if the modulated oscillation signal 2804 is an FM signal, the multi-harmonic signal 2814 is also a FM signal, and when the modulated oscillation signal 2804 is a phase-modulated signal, the multi-harmonic signal 2814 will be a phase-modulated signal. In one embodiment, the multi-harmonic signal 2814 is a rectangular wave. As described above, a continuous cycle, such as a rectangular wave, has a sine component whose frequency is an integer multiple of the fundamental frequency of the basic waveform (Fourier component frequency). That is, the multi-harmonic signal 2814 is composed of a sine wave whose frequency is an integer multiple of its fundamental frequency. Each sine wave is also the same as the continuous cycle derived from it (that is, the modulated oscillation signal 2804).

The operation of the switch module 2802 is as follows. When the switch 2816 is "on", the voltage level of the output 2822 of the switch module 2802 is the same as the bias signal 2896. Therefore, since the multi-harmonic signal 2814 is directly connected to the output 2822 of the switch module 2802, the amplitude of the multi-harmonic signal 2814 is the same as the amplitude of the bias signal 2806. When the modulated oscillation signal 2804 turns the switch "off", the output 2822 of the switch module 2802 is connected to the second output 2810 of the switch module 2802 (such as the ground wire in the embodiment of the present invention), and the multi-harmonic signal 2814 The amplitude of is the same as the potential of the second input 2810. (For example, when the second output 2810 is connected to the ground 2812, the potential is 0 volts). When the modulated oscillation signal 2804 makes the switch "on" again, the amplitude of the multi-harmonic signal 2814 is the same as that of the bias signal 2806 again. Therefore, the amplitude of the multi-harmonic signal 2814 is two signal levels, that is, the bias signal 2806 or the ground 2812, and its frequency is the same as the frequency of the modulated oscillation signal 2804. The modulated oscillation signal 2804 makes the switch "open" "" and "OFF". The multi-harmonic signal 2814 is modulated and is substantially the same as the modulated oscillation signal 2804. Those familiar with related technologies should understand that various switch designs can satisfy the scope and spirit of the present invention described above.

In one embodiment, the switch 2816 is a semiconductor device, such as a diode ring. In another embodiment, the switch is a transistor, such as a field effect transistor (FET). In the embodiment where the FET is gallium arsenide, the switch module can be designed as shown in Figure 29A-29C, in which the modulated signal 2804 is connected to the gate of the gallium arsenic FET, and the bias signal 2806 is connected to the gallium arsenic FET 2901 via the bias resistor 2824. The dip pole 2906. (In the alternative embodiment of FIG. 29C, the second signal 2818 can be connected to the drain 2906 of the gallium arsenic FET 2901). Since the drain and source of the gallium arsenic FET can be interchanged, the bias signal can be applied to the source 2904 or the drain 2906. If the asymmetry of the drain-drain can be active in the gallium arsenic FET, the switch module can be designed as shown in Figures 30A-30C, in which the gallium arsenic FET 3002 and 3004 are connected to each other, and the source of the first gallium arsenic FET 3002 is connected To the drain 3012 of the second gallium arsenic EET 3004, and the drain 3006 of the first gallium arsenic FET 3002 is connected to the source 3008 of the second gallium arsenic FET 3004. This design will balance all the asymmetries.

A modified embodiment of this design will include a "dwell capacitor", where one side of the capacitor is connected to the second input of the switch. The purpose of this design is to increase the gap of the pulse wave without substantially increasing its width. Those familiar with related technologies will know other switch designs and embodiments.

The output 2822 of the switch module 2802, that is, the multi-harmonic signal 2814 can pass through a filter in the -FM and PM mode, or pass through a filter in the "I/Q" mode.

3.3.7 Switch mode (AM mode)

As described above, the embodiment of the amplitude modulation mode of the present invention utilizes the switch components of the switch module 3102 (FIGS. 31A-31C). In one example, the switch module 3102 is an element of the switch module 1614 in FIG. 16. An example of the switch module 3102 is described as follows. However, it should be understood that these examples are for illustration only, and the present invention is not limited to these examples. The operation of the switch module 3102 and its AM mode is the same as the FM, PM, and "I/Q" mode embodiments described in Section 3.3.0-3.3.6.2.

3.3.7.1 Operational description

An oscillating signal 3104 is applied to block a reference signal 3106, and a signal 3114 with multiple harmonics is generated. The reference signal 3106 is a function of the information signal 2702, and may be the sum of the information signal 2702 and the bias signal 2704, or may be the information signal 2704 itself. In the AM mode, the oscillating signal 3104 is generally not modulated, but it can also be modulated.

The oscillating signal 3104 can be a sine wave, a rectangular wave, a triangular wave pulse wave, or any other continuous cycle wave. In a preferred embodiment, the oscillating signal is a rectangular wave. As mentioned above, those familiar with the related art should know that mathematical limitations make the ideal rectangular wave impossible, and the present invention does not need to achieve the ideal rectangular wave. Again, as mentioned above, for the sake of discussion, "rectangular wave" will refer to a substantial rectangular wave, "square wave" will refer to a substantial square wave, "triangular wave" will refer to a substantial triangular wave, and pulse wave will refer to a substantial pulse wave However, in the present invention, it is not necessary to achieve the ideal square wave, triangle wave or pulse wave.

The multi-harmonic signal 3114, hereinafter referred to as the multi-harmonic signal 3114, is a continuous cycle whose amplitude is a function of the reference signal. That is, it is an AM signal. In one embodiment, in one embodiment, the multi-harmonic signal 814 is a rectangular wave. As described above, a continuous cycle, such as a rectangular wave, has a sine component whose frequency is an integer multiple of the fundamental frequency of the basic waveform (Fourier component frequency). Therefore, the multi-harmonic signal 3114 is composed of a sine wave whose frequency is an integer multiple of its fundamental frequency.

Those familiar with the related art will understand that there are alternative embodiments in which combined modules (eg, PM and ASK, FM and AM, etc.) can be used at the same time. In these alternative embodiments, the oscillating signal 3104 can be modulated. Those who are familiar with the relevant technology should understand these alternative embodiments, and therefore will not be described here.

3.3.7.2 Structural description

The switch module of the present invention includes a first input 3108, a second input 3110, a control input 2820, an output 3122 and a switch 3116. The reference signal 3106 is applied to the first input 3108 of the switch module 3102. Generally speaking, the reference signal 3106 is a function of the information signal 2702, and may be the sum of the information signal 2702 and the bias signal 2704, or may be the information signal 2704 itself.

In one embodiment, a resistor 3124 is placed between the reference signal 3106 and the switch 3116. Generally speaking, the second output 3110 of the switch module 3102 is located at the electrical ground 3112. However, those familiar with the related art should understand that in the alternative embodiment, the second output 2810 may not be located at the electrical ground 2812, but the second signal 2818 may be electrically grounded. In an alternative embodiment, the inverted value of the reference signal 3106 is connected to the second input 3110 of the switch module 3102.

The oscillation signal 3104 is connected to the control input 3104 of the switch module 3102. Generally speaking, in the AM mode, the oscillating signal 3104 is not modulated. However, those familiar with related technologies should understand that there are also frequency modulation and phase modulation signals. The oscillating signal 3104 can be a sine wave, a rectangular wave, a triangle wave, a pulse wave, or any other continuous cycle wave. In a preferred embodiment, the oscillating signal 3104 is a rectangular wave.

The multi-harmonic signal 3114 described in section 3.3.7.1 appears at the output terminal 3122 of the switch module 2312. The multi-harmonic signal 3114 is a continuous cycle whose amplitude is a function of the amplitude of the reference signal. In one embodiment, the multi-harmonic signal 3114 is a rectangular wave. As described above, a continuous cycle, such as a rectangular wave, has a sine component whose frequency is an integer multiple of the fundamental frequency of the basic waveform (Fourier component frequency). That is, the multi-harmonic signal 3114 is composed of a sine wave whose frequency is an integer multiple of its fundamental frequency. And as mentioned above, the relative amplitude of the harmonics of the continuous cycle is generally a function of the ratio of the pulse width of the rectangular wave to the period of the fundamental frequency, and it can be determined by the Fourier analysis of the cycle. When the amplitude of the cycle changes, as in the AM mode of the present invention, the change in the amplitude of the cycle directly affects the absolute value of the harmonic amplitude. In other words, AM is embedded on top of each harmonic.

The description of the switch module 3102 is as follows. When the switch 3116 is "on", the amplitude of the multi-harmonic signal 3114 is the same as the amplitude of the reference signal 3106. When the oscillation signal 3104 turns the switch "off", the output 3122 of the switch module 3102 is connected to the second output 3110 of the switch module 3102 (such as the ground wire 3112 in the embodiment of the present invention), and the amplitude of the multi-harmonic signal 3114 Same amplitude as the second input 3110. (For example, when the second output 3110 is connected to ground 3112, the voltage is 0 volts). When the oscillating signal 3104 makes the switch 3116 "on" again, the amplitude of the multi-harmonic signal 3114 is the same as that of the reference signal 3106 again. Therefore, the amplitude of the multi-harmonic signal 3114 is two signal levels, that is, the reference signal 3106 or the ground 3112, and its frequency is the same as the frequency of the oscillation signal 3104. The oscillation signal 3104 makes the switch "on" and "off". In an alternative embodiment, the second input 3110 is connected to the second signal 3118, and the multi-harmonic signal 3114 changes between the reference signal 3106 and the second signal 3118. Those familiar with related technologies should understand that various switch designs can satisfy the scope and spirit of the present invention described above.

In one embodiment, the switch 3116 is a semiconductor device, such as a diode ring. In another embodiment, the switch is a transistor, such as a field effect transistor (FET). In the embodiment where the FET is gallium arsenide, the switch module can be designed as shown in FIGS. 32A-32C, in which the oscillation signal 310 is connected to the gate 3202 of the gallium arsenic FET, the reference signal 3106 is connected to the source 3204, and the ground is connected to the drain 3206. (In one embodiment, the value of the ground 3112 is selected to be equal to the second input 3110 of the switch module 3102). Since the drain and source of the GaAs FET can be interchanged, the reference signal 3106 can be applied to the source 3104 or the drain 3106. If the gallium arsenic FET can actively draw a drain asymmetry, the switch module can be designed as shown in Figs. The pole 3310 is connected to the drain 3312 of the second gallium arsenic FET 3304, and the drain 3306 of the first gallium arsenic FET 3302 is connected to the source 3308 of the second gallium arsenic FET 3304. This design will balance all asymmetries.

A modified embodiment of this design will include a "dwell capacitor", where one side of the capacitor is connected to the first input of the switch, and the other side is connected to the second input of the switch. The purpose of this design is to increase the gap of the pulse wave without substantially increasing its width. Those familiar with the relevant technology will understand other switch designs and embodiments.

The output 3122 of the switch module 3102, that is, the multi-harmonic signal 3114 can pass through an AM mode filter 3504.

3.3.8 Adder ("I/Q" mode)

As mentioned above, the internal phase/quarter phase modulation ("I/Q") mode embodiment uses an adder. Adder 1832 as shown in Figure 18. The present invention supports multiple adder embodiments. An example of the adder 3402 is described below (FIG. 34). However, it should be understood that these examples are for illustration only. And the present invention is not limited to these examples.

3.3.8.1 Operational description

Combine the "I" modulation signal 3404 and the "Q" modulation signal 340 to generate the "I/Q" modulation signal 3408. Generally speaking, the "I" and "Q" modulation signals 3404 and 3406 are multi-harmonic signals, which are the multi-harmonic signal "I" 3404 and the multi-harmonic signal "Q" 3406, respectively. Similarly, the "I/Q" modulation signal 3408 is a multi-harmonic signal, and is called a multi-harmonic "I/Q" signal. In an embodiment, those familiar with related technologies should understand that mathematical limitations make it impossible to achieve correct and perfect waveforms, and the present invention does not need to achieve ideal waveforms.

In a typical embodiment, the multi-harmonic signal "I" 3404 and the multi-harmonic signal "Q" 3406 are phase modulation signals, just like the multi-harmonic signal "I/Q" 3408. Those familiar with related technologies should understand that modulation techniques, such as the amplitude modulation of the "I/Q" signal, can also be used in the "I/Q" mode without departing from the scope and spirit of the present invention.

As mentioned earlier, continuous cycles, such as the multi-harmonic "I/Q" signal 8, have a sine component whose frequency is an integer multiple of the fundamental frequency of the fundamental waveform (Fourier component frequency). Therefore, the multi-harmonic signal 3408 is composed of a sine wave whose frequency is an integer multiple of its fundamental frequency. These sinusoidal signals are also modulated, which is the same as the continuous cycle derived from them. That is, in this embodiment, the phase modulation is performed on the sinusoidal signal, and includes the information signal from the "I" modulation signal and the "Q" modulation signal.

3.3.8.2 Structural description

Those who are familiar with related technologies should be quite familiar with the design and use of the adder 3402. The adder 3402 can be made of separate components, or can be purchased from an "off shelf". The adder receives the "I" signal 3404 and the "Q" signal 3406, and combines the two signals to generate the "I/Q" signal 3408. In another preferred embodiment, the multi-harmonic signal "I" 3404 and the multi-harmonic signal "Q" 3406 are both phase modulation signals. When the multi-harmonic signal "I" 4 and the multi-harmonic signal "Q" 3406 are both phase-modulated signals, the multi-harmonic signal "I/Q" is also a phase-modulated signal.

As mentioned above, a continuous cycle, such as the multi-harmonic "I/Q" signal 3408, has a sine component whose frequency is an integer multiple of the fundamental frequency of the fundamental waveform (Fourier component frequency). Therefore, the multi-harmonic signal 34U8 is composed of a sine wave whose frequency is an integer multiple of its fundamental frequency. These "I/Q" sinusoidal signals are also modulated, which is the same as the continuous cycle derived from them. (For example, multi-harmonic "I/Q" signal 3408).

The output of the adder 34 then passes through a filter 3504.

3.3.9 Filter (FM, PM, AM and "I/Q" mode)

As described above, all embodiments of the modulation mode of the present invention use a filter. The filter 1218 in FIG. 12, the filter 1414 in FIG. 14, the filter 1618 in FIG. 16, and the filter 1836 in FIG. The present invention supports multiple filter embodiments. An example of the filter 3504 is described below (Figure 35). However, it should be understood that these examples are for illustration only. And the present invention is not limited to these examples.

3.3.9.1 Operational description

Receive a modulated signal with a multi-harmonic signal 3502. Call it a multi-harmonic signal 3502. As mentioned above, a continuous cycle, such as the multi-harmonic signal 3502, has a sinusoidal component whose frequency is an integer multiple of the fundamental frequency of the fundamental waveform (Fourier component frequency). In an embodiment of the present invention, the undesired frequency is filtered out, and the desired frequency 3502 is output. In the alternative embodiment, multiple multi-harmonic signals are output.

3.3.9.2 Structural description

Those who are familiar with related technologies should be quite familiar with the design and use of the filter 3504. The filter 3504 can be made of separate components or can be purchased from "off the shelf". The filter receives the multi-harmonic signal 3502 from the switch module 2802 or 3102 in the FM, PM and AM modes, and the adder 3402 in the "I/Q" mode. The multi-harmonic signal 3502 is a continuous cycle. It includes a sine component whose frequency is an integer multiple of the fundamental frequency of the fundamental multi-harmonic signal 3502. The filter 3504 removes sine waves with undesired frequencies. The signal 3506 with the desired frequency is left, and is referred to as the desired output signal 3506.

In order to achieve this result, according to an embodiment of the present invention, a filter 3504 is required to filter out undesired harmonics in the multi-harmonic signal 3502.

"Q" is used to represent the ratio of the center frequency of the desired output signal 3506 to the half-power bandwidth. Referring to Fig. 36, the desired frequency 3602 is 900 MHz. The filter 3504 is used to ensure that only energy at that frequency is transmitted. Therefore, the half-power bandwidth 3604 (the so-called "3dB drop" point) should only be as narrow as possible. The frequency 3602 ratio of the bandwidth 3604 is defined as "Q". 36, if the "3dB down" point subtraction 15MHz, Q value of 900 / (15 + 15) or 30. By appropriately selecting any specific frequency element, a Qs of 20 or 30 order can be achieved.

In order to reduce the broadcast frequency, according to the application environment, the higher the Q value, the better. The purpose of the filter 3504 is to filter out unwanted frequencies in the multi-harmonic signal. This circuit can eliminate all other frequencies except the desired frequency 3506 (such as 900MHz harmonics). Referring to Figures 37A and 37B, an example of the filter is shown. Those familiar with related technologies should understand that there are many kinds of filters that can pass desired frequencies and filter out undesired frequencies.

Figure 37A illustrates a circuit with capacitors and inductors connected in parallel, shunted to ground. In FIG. 37B, the capacitor and the inductor are connected in series, and the parallel circuit similar to that of FIG. 37A is connected between the capacitor and the inductor and shunted to ground.

The modulation signal at the desired frequency 3506 can then pass through the transmission module 3804.

3.3.10 Transmission module (FM, PM, AM and "I/Q" mode)

As mentioned above, the embodiment of the modulation mode of the present invention preferably uses a transmission module. For example, refer to the transmission module 1222 of FIG. 12, the transmission module 1418 of FIG. 14, the transmission module 16222 of FIG. 16, and the transmission module 1840 of FIG. 18. The transmission module is optional, and other embodiments may not include the transmission module. The present invention supports multiple embodiments of transmission modules. An embodiment of the transmission module 3804 is described as follows (Figure 38). However, it should be understood that these examples are for illustrative purposes only. The present invention is not limited to these embodiments.

3.3.10.1 Operational description

Receive the modulated signal at the desired frequency 3802 and transmit it to the desired medium, such as broadcast or point-to-point cable.

3.3.10.2 Structural description

The transmission module 3804 receives the signal at the desired EM frequency 3802. If you want to transmit by broadcast, the signal can be broadcast via an optional antenna interface. If you want to send a signal to another point with a point-to-point cable, the signal can be sent via an optional line driver and via the cable. Those familiar with related technologies should understand that other transmission media can be used.

3.3.11 Other modes

The above implementation is for illustrative purposes. These examples do not limit the invention. Other implementations can also be used and are covered within the scope of the present invention, such as system and unit software, software/hardware, and firmware. Based on the content here, those who are familiar with related technologies will understand other embodiments slightly different from the above description. This modified example falls within the scope and spirit of the present invention.

4 Harmonic enhancement

4.1 High-level description

This section (including subsections) provides a high-level description of harmonic enhancement. In particular, pulse shaping is described in a high-level form. Moreover, the implementation structure to achieve this procedure is also described in a high-level form. The implementation of the structure here is for illustrative purposes only, and not for limitation. In particular, implementations using any of the configurations in this section can achieve the procedures described in this section. Based on the content here, those familiar with related technologies will be able to understand the details of the implementation of this structure.

Some embodiments of the present invention include harmonic enhancement, but other embodiments do not.

4.1.1 Operational description

In order to have a clearer understanding of the generation and acquisition of harmonics, and the purpose of shaping the waveform to enhance the harmonics, the following provides Fourier analysis applied to the present invention.

Fourier Baron Jean BJ Fourier (1768-1830) discovered that the continuous cycle includes multiple sinusoidal components, called harmonics. More importantly, the frequencies of these components are integer multiples of the original waveform frequency (called the fundamental frequency). The amplitude of these constituent waveforms depends on the shape of the original waveform. Those who are familiar with related technologies should already be familiar with the overturning and proof of Futura analysis.

The most basic waveform of a continuous cycle is a sine wave. It has a fundamental harmonic. This is also called the first harmonic. Since there is only one component, the amplitude of the harmonics is the same as the amplitude of the original waveform, that is, the sine waveform itself. Therefore, the sine wave is not "multi-harmonic".

The pulse train is an example of the other extreme of the cycle. Mathematically, it has zero bandwidth. The mathematical analysis of the pulse train shows that there are harmonics of all multiples of the pulse fundamental frequency. That is, if the frequency of the pulse is F₁, The frequency of the harmonic is 1. F₁,2. F₁, 3. F₁, 4. F₁,Wait. The analysis also shows that in this special case, all the harmonics have the same amplitude. This is a true "multi-harmonic" waveform, but it cannot be truly realized in the current technology.

A more typical waveform is a rectangular wave, which is a series of pulse waves. Each pulse has a width (pulse width τ), and the pulse sequence in the waveform has a period (the reciprocal of the frequency "T", that is, T=1/F_r, Where F_r"Is the fundamental frequency of the rectangular wave). A form of rectangular wave is a square wave, in which the first state (high) and the second state (low) of the signal have the same time. That is, the ratio of pulse width to period (τ/ T) is 0.5. Other forms of rectangular waves are generally called "pulse waves", and τ/T&lt;0.5 (that is, the time of the signal "high" is less than the time of the signal "low"). Mathematical analysis shows that there is a basis The harmonics of all multiples of the frequency. Therefore, the frequency of the rectangular wave is Fr, the frequency of the first harmonic is 1. F_r, The frequency of the second harmonic is 2. F_r, The frequency of the third harmonic is 3. F_r,Wait. In addition, the amplitude of some harmonics is zero. In the case of a square wave, the "null point" is an even harmonic. For other τ/T values, the "null point" can be determined by mathematical equations. The general equation of the harmonic amplitude of a rectangular wave is as follows:

Amplitude (nth harmonic)=A_n={[A_puise][(2/π)/n]sin[n. π. (τ/T))) Equation 1

Table 6000 in FIG. 60 shows the amplitude of the fiftieth harmonic of the rectangular wave, which has six different τ/T ratios. The τ/T ratio is 0.5 (square wave), 0.10, 0.05, 0.01 and 0.005. (Those who are familiar with related technologies should understand that in order to make a mathematical comparison A_apuiseIs set to 1). It can be seen from this limited embodiment that the pulse width to period ratio is an extremely important factor in determining the relative amplitude of the harmonics. And note that for the case of τ/T=0.5, the above relationship is also satisfied (that is, only odd harmonics are displayed). When τ/T becomes smaller (that is, the pulse wave approaches the pulse), the amplitude of the harmonic becomes "flat". That is, the change in the relative amplitude of the harmonics is extremely small. Based on the content here, those familiar with related technologies should know how to select the desired pulse width for the desired application. Mathematically and empirically, it has also been shown that if a signal with a continuous cycle is modulated, this modulation will also appear on all the harmonics of the original waveform.

It can be seen from the above description that the harmonic pulse width is a very important factor in ensuring that the desired output frequency has sufficient amplitude to eliminate filtering and unnecessary amplification.

Another factor to ensure that the desired harmonics have sufficient amplitude is how the switches 2816 and 3116 (FIGS. 28A and 31A) in the switch modules 2802 and 3102 react to the control signals that make the switches "off" and "on". (That is, the modulated oscillation signal 2804 in FIG. 28 and the modulated oscillation signal 3104 in FIG. 31). Generally speaking, the switch has two critical values. When the switch is normally open, the first critical value is the voltage at which the switch is turned off. The second threshold is the voltage at which the switch is turned on again. In the discussion here, when the control signal is "high level", the switch is closed, and when the control signal is "low level", the switch is open. Those familiar with related technologies should know that the opposite situation can also be used. Generally speaking, these voltages are not the same, but they may be the same. Another factor is how fast the switch responds to the control input once a critical voltage is applied. The goal is to turn the switch off and on, so that the bias/reference signal is "cleanly" closed. That is, preferably, the impedance passing through the switch must be converted from high impedance (switch in the open state) to low impedance (switch in the off state), and switched back in a short time, so that the output signal is a substantial rectangular signal .

The purpose of the embodiment of the transmitter of the present invention is to transmit the information on the information signal. That is, the information is modulated on the transmission signal. In FM and PM mode, in order to achieve this goal, the information signal is used to modulate the oscillation signal 2804. The oscillating signal 2804 then turns the switch 2816 on and off. The information modulated on the oscillating signal 2804 needs to be faithfully reproduced on the signal output from the switch (ie, the multi-harmonic signal 2814). In order to make it happen frequently, in the embodiment of the present invention, the switch 2816 preferably can be turned off and on neatly, so that the multi-harmonic signal is quickly changed from the bias/reference signal 2806 (or 3106) to the ground 2812 ( Or change the second signal level in the embodiment). This fast ramp-up time is needed to make the multi-harmonic signal 2814 "multi-harmonic". (In the AM mode, the oscillation signal 3104 is not modulated, but it needs to be "swiftly switched").

In order for the switch 2816 to switch neatly, the oscillation signal 2804 also needs to be neat. If the oscillation signal 2804 is a sine wave, when the critical voltage is reached, the switch will turn on and off. However, the pulse width of the multi-harmonic signal 2814 may not be small enough. The amplitude of the expected harmonic of the multi-harmonic signal 2814 is high enough to Transmit without filtering and unnecessary amplification. Moreover, in the embodiment where the switch 2816 is a gallium arsenic FET 29OI, if the oscillation signal connected to the gate 2902 of the gallium arsenic FET 2901 is a sine wave, the gallium arsenic FET 2901 will not be able to switch neatly, and is more similar to an amplifier than a switch. (It will be implemented when the oscillating signal rises and falls below the critical voltage, but it will not "short circuit"). In order to utilize the effect of the GaAs FET to switch at high frequency, the oscillation signal 2804 connected to the gate 2902 preferably has a fast rise and fall time. That is, it is preferably a rectangular wave, and its pulse width to period ratio is preferably the same as the pulse width to period ratio of the multi-harmonic signal 2814.

As mentioned above, if a signal with continuous cycles is modulated, the modulation occurs on each harmonic of the original waveform. Therefore, in the FM and PM modes, when the information is modulated on the oscillating signal 2804, and the oscillating signal is used to turn the switch 2816 on and off, the multi-harmonic signal 2814 output from the switch module 2802 will also be modulated. If the oscillating signal 2804 changes smoothly, the switch 2816 will be smoothly opened and closed. The multi-harmonic signal 2814 will be a multi-harmonic signal, and each harmonic of the multi-harmonic signal 2814 will have modulation information.

Since the oscillating signal 2804 needs to be cleanly transformed, some embodiments will require harmonic enhancement. Harmonic enhancement can also be called "pulse shaping" because its purpose is to trim the oscillating signal 2804 into a pulse wave with a desired pulse width. If the oscillating signal is a sine wave, the harmonic enhancement will make the sine signal a rectangular wave (or a substantial rectangular wave) with a desired pulse width/period ratio. If the oscillating signal is already a square wave or pulse wave, harmonic enhancement will make it have the desired pulse width/period ratio. This will ensure that the modulated information signal can be effectively transmitted on the switch.

The third purpose of harmonic enhancement is described below. However, based on the content here, a person familiar with related technologies should be able to understand other embodiments.

4.1.2 Structural description

The shape of the oscillating signal 2804 makes the switch 2816 open and close. The shape of the oscillating signal 2804 and the selection of the switch 2816 will determine the switching speed of the switch 2816 and the ratio of the time it stays in the open state to the time it stays in the off state. This will then determine the "sloppyness" of the 2814 multi-harmonic signal. (That is, the multi-harmonic signal 2814 is a substantial rectangular wave, trapezoidal wave or triangular wave). As mentioned above, in order to ensure that the desired harmonics have the desired amplitude, the shape of the oscillation signal 2804 needs to be optimized.

The Harmonic Enhancement Module (HEM) 4602 (Figure 46) is also called "Pulse Shaper". It shapes the oscillation signals 2804 and 3104 used to drive the switch modules 2802 and 3102 in sections 3.3.6 to 3.3.6.2 and 3.3.7 to 3.3.7.2. The harmonic enhancement module 4602 converts the continuous cycle 4604 into a pulse train 4606. The pulse train 4606 will have a period "T". The period "T" is determined by the frequency of the continuous cycle 4604 and the design of the pulse shaping circuit in the harmonic enhancement module 4602. Moreover, each pulse wave will have a pulse width "τ", which is determined by the design of the pulse shaping circuit. The period of the pulse wave "T" determines the frequency at which the switch is closed, and the pulse width "τ" of the pulse determines the time the switch is kept in the closed state.

In the embodiments described in 3.3.6-3.3.6.2 (3.3.7-3.3.7.2), when the switch 2816 (or 3116) is turned on, the amplitude of the multi-harmonic signal 2814 (or 3114) will be the same as the bias signal The amplitude of 2806 (or reference signal 3106) is the same. When the switch 2816 (or 3116) is closed, the amplitude of the multi-harmonic signal 2814 (or 3114) will be the same as the signal 2812 or 2818 (or 3112 or 3118) of the second input 2810 (or 3110) of the switch module 2802 (or 3102). ) The potential is the same. Therefore, when the oscillation signal 2804 (or 3104) of the driving switch module 2802 (or 3102) is rectangular, the frequency and pulse width of the multi-harmonic signal 2814 (or 3114) will be the same as those of the driving switch module 2802 (or 3102). The shaping oscillation signal 2804 (or 3104) is the same. When the oscillation signal 2804 (or 3104) is a rectangular wave, the above situation is true. Those familiar with related technologies should know that "rectangular waves" can be all substantially rectangular waveforms, including square waves and pulse waves.

The purpose of shaping the signal is to control the closing time of the switch 2816 (or 3116). As mentioned above, the multi-harmonic signal 2814 (or 3114) has a substantially rectangular waveform. Controlling the pulse width/period ratio of the multi-harmonic signal 2814 (or 3114) can optimize the shape of the multi-harmonic signal 2814 (or 3114), so that the relative amplitude of the harmonics can be used without amplification and filtering. To obtain the desired harmonics.

4.2 Example

This section describes various embodiments related to the above methods and configurations. These embodiments are described here for illustrative purposes and are not limiting. The present invention is not limited to these embodiments. Based on the content here, those familiar with related technologies will understand the modified embodiments (including equivalence, expansion, transformation, and derivation, etc.). The present invention includes embodiments intended to cover such changes.

4.2.1 The first embodiment: When a square wave is supplied to the harmonic enhancement mode to generate a pulse per cycle

4.2.1.1 Operational description

According to this embodiment, continuous cycles 4604 are received, and a series of pulse waves 4606 are output. The continuous cycle 4604 can be a square wave or any other continuous cycle, which transforms from "digital low" to "digital high". Each cycle of the continuous cycle 4604 generates a pulse wave. In the description here, the continuous cycle 4604 is a square wave, but those familiar with the related art should know that with this embodiment, other waveforms can also be "shaped" into the waveform 4606.

4.2.1.2 Structural description

In the first embodiment of the harmonic enhancement module 4602, hereinafter referred to as the pulse wave shaping circuit 4602, the pulse wave shaping circuit 4602 receives a continuous cycle of a square wave. The pulse shaping circuit 4602 preferably includes a digital logic device, which enables the output pulse train 4606 to have a pulse at each pulse time of the continuous cycle, and the τ/T ratio is less than 0.5.

4.2.2 Second embodiment: When a square wave is supplied to the harmonic enhancement mode to generate two pulses per cycle

4.2.2.1 Operational description

In this embodiment, continuous cycles 4604 are received, and a series of pulse waves 4606 are output. And in this embodiment, each cycle of the continuous cycle 4604 has two pulse waves. The continuous cycle 4604 can be a square wave or any other continuous cycle, which transforms from "digital low" to "digital high". In the description here, the continuous cycle 4604 is a square wave, but those familiar with the related art should know that with this embodiment, other waveforms can also be "shaped" into the waveform 4606.

4.2.2.2 Structural description

In the second embodiment of the harmonic enhancement module 4602, the pulse shaping circuit 4602 receives the continuous cycle 4604 of a square wave. The pulse shaping circuit 4602 preferably includes a digital logic device, which causes the output pulse train 4606 to have two pulses at each pulse time of the continuous cycle, and the τ/T ratio is less than 0.5.

4.2.3 The third embodiment: When any waveform is supplied to the harmonic enhancement mode

4.2.3.1 Operational description

In this embodiment, a continuous cycle 4604 of any waveform is received and a pulse train 4606 is output.

4.2.3.2 Structural description

In the third embodiment of the pulse shaping circuit 4602, the pulse shaping circuit 4602 receives continuous cycles 4604 of any shape. The pulse wave shaping circuit 4602 preferably includes a sequence of stages, and each stage shapes the waveform until it becomes 4606 trains of substantial pulse waves having a τ/T ratio less than 0.5.

4.2.4 Other embodiments

The above-mentioned embodiments are for illustrative purposes. These examples are not intended to limit the invention. Based on the content here, those familiar with related technologies will be able to understand slightly different embodiments. These embodiments fall within the scope and spirit of the present invention.

4.3 Examples

This section describes the operational and structural examples of the above-mentioned methods, structures, and/or embodiments. These components and methods are used for illustration, not for limitation. The present invention is not limited to the specific elements or method examples described herein. According to the technology here, people familiar with the relevant technology should be able to understand the relevant transformations (including equivalence, expansion, change and derivative, etc.). These changes fall within the scope and spirit of the present invention.

4.3.1 The first digital logic circuit

The first embodiment described in section 4.2.1-4.2.1.2 is described in FIG. 39. In particular, the circuit in FIG. 39A is a typical circuit using the pulse shaping circuit 4602 of a digital logic device. And in Figs. 39B-39D, the waveforms on the three nodes in the display circuit are displayed. In this embodiment, the pulse shaper 3900 uses an inverter 3910 and an AND gate 3912 to generate a pulse train. An inverter, such as inverter 3910, converts the sign of the input, and when all input signals are "digital high level", the AND gate, such as AND gate 3912, outputs "digital high level". The input of the pulse shaper 3900 is a waveform 3902, and for the sake of illustration, a square wave is shown here. The output of inverter 3904 is a waveform, which is also a square wave. However, due to the circuit of the inverter 3910, there is a time delay between applying the input and the corresponding positive and negative conversion on the output side. If the waveform 3902 is "low" at the beginning, since the waveform 3904 has been inverted by the inverter 3910, the waveform 3904 will be "high". When the waveform 3902 switches to "high", the AND gate 3912 will immediately see two "high" signals, so the output waveform 3906 becomes "high". When the inverter 3910 inverts its output (waveform 3902) and makes the waveform 3904 "low", the AND gate 3912 will only see a "high" signal, and the output waveform will become "low". Therefore, only when both waveforms 3902 and 3904 are high, the output waveform 3906 will be "high", and this time is the delay time of the inverter 3910. Accordingly, as shown in FIGS. 39B-39D, the pulse wave shaper 3900 receives a square wave and generates a pulse wave train having one pulse wave per square wave period.

4.3.2 The second digital logic circuit

The second embodiment described in Section 4.2.2-4.2.2.2 is described in Figure 40. In particular, the circuit in FIG. 40A is a typical circuit using the pulse shaping circuit 4002 of a digital logic device. And in Figures 40B-40D, the waveforms on the three nodes in the display circuit are shown. In this embodiment, the pulse shaper 4000 uses an inverter 4010 and a NOR (XNOR) gate 4012. When both inputs are "high" or both inputs are "low", XNOR, such as XNOR gate 4012, outputs digital "high". Therefore, the output of inverter 4010 will be in a "high" state at the beginning. And therefore, XNOR gate 4012 will see a "high" input and a "low" input, and its output waveform will become "low". When the waveform 4002 changes to "High", the XNOR gate 4012 will have two "High" inputs until the waveform 4004 is switched to "Low". Since it sees two "high" inputs, its output waveform 4006 will change to "high". When the waveform 4002 becomes "low", the XNOR gate 4012 will again see a "high" input (waveform=4002) and a "low" input (4004). When the waveform 4002 switches back to "low", the XNOR gate 4012 will see two "low" inputs, so its output will become "high". Due to the time delay of the inverter 4010, the waveform 4004 will change to "high", and the XNOR gate 4012 will again see a "high" input (waveform 4004) and a "low" input (4002). Therefore, the waveform 4006 will switch back to "Low" again. Accordingly, as shown in FIGS. 40B-40D, the pulse wave shaper 4000 receives a square wave and generates a pulse wave train having two pulse waves per square wave period.

4.3.3 Analog circuit

The third embodiment described in section 4.2.3-4.2.3.2 will be described in FIG. 41. In particular, the circuit in FIG. 41 is a typical pulse shaping circuit 4602, in which the input signal 4102 is a sine wave. The input signal 4102 is supplied to the first circuit element 4104, which is then supplied to the second input, the third input, and so on. Generally speaking, the three circuit elements 4104 gradually generate shaping signals 4120, 4122 and 4124 before supplying the capacitor 4106. The output of the capacitor 4106 is shunted to the ground 4110 via the resistor 4108 and supplied to the four circuit elements 4104. The output signal 4126 is the output of the pulse wave, and its frequency is a function of the frequency of the output signal 4102.

An example of the circuit element 4104 is shown in FIG. 43. The circuit 4104 includes an input 4310, an output 4312, four FETs 4302, two diodes 4304, and a resistor 4310. Those familiar with the related art should know that other Piwave shaping circuit designs can also be used without departing from the scope of the present invention.

4.3.4 Other examples

The above-mentioned embodiments are for illustrative purposes. These examples are not intended to limit the invention. Based on the content here, those familiar with related technologies will be able to understand slightly different embodiments. These embodiments fall within the scope and spirit of the present invention.

4.3.4.1 Multiple gaps

In an alternative embodiment of the present invention, multiple pulse waves are used to generate multiple gaps from the switch module. Many different techniques can be used to generate multiple pulse waves. The purpose of using multi-slits is because they have an optimized effect on the harmonic amplitude of the output waveform.

Referring to FIG. 78, it can be seen that the local oscillator 7802 generates an oscillation signal 7810. For ease of description, the oscillating signal 7810 passes through a pulse shaper 7812 to generate a pulse train 7804. The pulse train 7804 passes through the multi-slit generating module 7806. The output of the multi-slit generation module 7806 is a plurality of 7808 pulse waves.

In FIG. 79, the multi-slit generating module 7806 receives the pulse train 7804. The pulse train 7804 then passes through one or more delays 7904(i). Fig. 79 illustrates the first delay 7904 device (a) that outputs the first delayed pulse train 7906(a). Except for delaying for a desired time, the first delayed pulse train 7906(a) is similar to the pulse train 7804. The pulse train 7804 and the first delayed pulse train 7906(a) then pass through a "NOR" gate, which outputs a complex pulse train 7808. The complex pulse train 7808 is in the pulse train 7804 and the first delayed pulse train 7906. There is a pulse wave at each pulse wave time point in (a). Similarly, other delayers, such as the delayer 7904(n), also delay the wave train 7804 by a desired time to generate the n-th delayed pulse wave train 7809(n). When the "NOR" gate 7904 combines pulse train 7804 and the first to nth delayed pulse train 7809(a)-7809(n), a complex pulse train 7808 is generated, which is in every cycle of pulse train 7804 There are n+1 pulse waves on it.

Figure 80 illustrates a pulse train 8002 with one pulse wave in each cycle of the pulse train 7804. Similarly, pulse wave 8004 has two pulse waves on each cycle of pulse wave train 7804; pulse wave chain 8006 has three pulse waves on each cycle of pulse wave train 7804; pulse wave chain 8008 has two pulse waves on each cycle of pulse wave train 7804. There are four pulse waves in each cycle of 7804; pulse chain 8010 has five pulse waves in each cycle of pulse train 7804. In this example, the desired output frequency is 900MHz, and the frequency of the pulse train is 180MHz. Therefore, the fifth harmonic is the expected harmonic, and the optimal pulse width of pulse train 7804 is one-fifth of the period of pulse train 7804. In this example, each additional pulse is shifted from the leading pulse by one pulse width period and has the same pulse width as the pulse of pulse train 7804.

Figures 81 to 85 illustrate the advantages of using multiple slits per cycle. In Fig. 81, the 900MHz harmonic of a single pulse wave (ie pulse chain 8002) used every week is displayed by spectrum 8102. In FIG. 82, the 900MHz harmonics using two pulse waves (ie pulse chain 8004) every week are displayed by the frequency spectrum 8202. In FIG. 83, the 900MHz harmonics using two pulse waves (ie pulse chain 8006) every week are displayed by the frequency spectrum 8302. In Fig. 84, the 900MHz harmonics using two pulse waves (ie pulse chain 8008) every week are displayed by the frequency spectrum 8402. In FIG. 85, the 900MHz harmonics using two pulse waves (ie pulse chain 8010) every week are displayed by the frequency spectrum 8502. Figure 86 shows the relative amplitudes of these five spectra 8102, 8202, 8302, 8402, and 8502. It can be seen that with the number of pulses per cycle, the amplitude of the desired harmonic increases, while the amplitude of the undesired harmonic decreases. When designing the transmitter, the increase in amplitude will be another consideration.

The circuit 8702 in FIG. 87 is an alternative embodiment for increasing the harmonic content of the output signal. The pulse train in FIG. 90 undergoes phase shifting and inversion, and combines two pulse trains to generate a bi-polar pulse train. (Figure 89). The effect of the bipolar pulse train is shown to suppress even-numbered harmonics and increase the amplitude of odd-numbered harmonics. This output is shown in Figure 88.

5 Amplifier module

5.1 High-level description

This section provides a high-level description of the amplifier in accordance with the present invention. In particular, amplifiers are described in a high-level way. Moreover, the implementation structure to achieve signal amplification is also described in a high-level manner. The implementation of the structure here is for illustrative purposes only and not as a limitation. In particular, implementations using any of the configurations in this section can achieve the procedures described in this section. Based on the content here, those familiar with related technologies will be able to understand the details of the implementation of this structure.

5.1.1 Operational description

Even if the present invention does not wish to use an amplifier, in some cases, when the present invention is used in a transmitter, it is more desirable to amplify the modulated signal before transmission. In another embodiment of the present invention, when using a stable signal source as a frequency or phase comparator, it is also ideal to amplify a signal with a desired frequency.

The reason for this requirement is as follows. First, the bias/reference signal is too low to support the desired application. Second, because the expected output frequency is much higher than the frequency of the oscillation signal used to control the switch. Third, the waveform of the multi-harmonic signal makes the amplitude of the expected harmonics too low.

In the first case, it is known that the amplitude of the bias/reference signal determines the amplitude of the multi-harmonic signal output from the switching circuit. (Refer to 3.3.6-3.3.6.2 and 3.3.7-3.3.7.2). Furthermore, the amplitude of the multi-harmonic signal directly affects the amplitude of each harmonic signal. (Refer to section 4.1)

In the second example, if the frequency of the oscillating signal is lower than the expected output frequency of the up-converter, higher harmonics will be required. For example, if the oscillation signal is 60MHz and the desired output frequency is 900MHz, the fifteenth harmonic will be required. When τ/T is 0.1, it can be seen from Table 6000 in Fig. 60 that the amplitude of the fifteenth harmonic (A₁₅) Is 0.024, which is 21.5% of the amplitude of the first harmonic (A₁₅=0.197). In some cases, the amplitude may be insufficient, so it must be amplified.

In the third example, when the waveform of the multi-harmonic signal is not "slim" enough to provide harmonics with sufficient amplitude for the desired application, the output needs to be amplified. For example, when the multi-harmonic signal is a triangular wave, and the oscillation signal is 60MHz, the expected output frequency is 900MHz, and the fifteenth harmonic of the triangular wave is 0.0018. Compared with the rectangular wave with the fifteenth harmonic of 0.1, the above-mentioned waveform is obviously insufficient, and by calculation, it is 0.4% of the first amplitude (0.405) of the triangular wave. Therefore, in this example, the amplitude of the first harmonic of the triangular wave is greater than the amplitude of the first harmonic of the rectangular wave. However, at the fifteenth harmonic, the amplitude of the triangular wave is much smaller than the value of 0.1 of the rectangular wave.

Another reason for the need for amplification is that the circuit components of the filter attenuate the output signal, and the designer wants to compensate for it.

The desired output signal can be amplified in many ways. One way is to amplify the bias/reference signal to ensure that the amplitude of the multi-harmonic signal maintains a high level. The second is to amplify the multi-harmonic signal itself. The examples here are for illustrative purposes only. Without limiting the invention. Those who are familiar with related technologies should know other technologies for amplifying the desired output signal.

5.1.2 Structural description

In one embodiment, a linear amplifier is used to amplify the bias/reference signal. In another embodiment, a linear amplifier is used to amplify multi-harmonic signals. In one embodiment, a linear amplifier is used to amplify the desired output signal. In other embodiments, including the use of non-linear amplifiers, it should be known by those familiar with related technologies.

5.2 Examples

This section describes the operational and structural examples of the above-mentioned methods, structures, and/or embodiments. These components and methods are used for illustration, not for limitation. The present invention is not limited to the specific elements or method examples described herein. According to the technology here, people familiar with the relevant technology should be able to understand the relevant transformations (including equivalence, expansion, change and derivative, etc.). These changes fall within the scope and spirit of the present invention.

5.2.1 Linear amplifier

The linear amplifier described here refers to a linear amplifier that includes solid-state electronic devices and is inserted into a circuit at one or more points. Those familiar with the related art should know other linear amplifiers suitable for the present invention. As shown in FIG. 47, the amplifier module 4702 receives the signal 4704 to be amplified, and outputs the amplified signal 4706. Those familiar with the related art should know that many different embodiments can be utilized without departing from the scope and spirit of the present invention.

5.2.1.1 Operational description

The output signal can be amplified in a variety of ways. In addition to the above-mentioned techniques, the technique described in this section uses pulse shaping of the oscillating signal to strengthen the shape of the multi-harmonic signal.

5.2.1.2 Optional description

In one embodiment, the linear amplifier is placed between the bias/reference signal and the switch module. This will increase the amplification of the bias/reference signal and will increase the amplitude of the multi-harmonic signal output from the switch module. The effect is not only to increase the amplitude of multi-harmonic signals, but also to increase the amplitude of all harmonic signals. Some potential limitations of this embodiment are: the amplified bias/reference signal will exceed the voltage design limit of the switch in the switch circuit; the multi-harmonic signal output from the switch circuit will have an amplitude exceeding the voltage limit of the filter; and/ Or when a wideband signal needs to be amplified, undesired distortion may occur.

The second embodiment uses a linear amplifier between the switch module and the filter. This will increase the amplitude of the multi-harmonic signal. In an alternative embodiment, the amplifier is adjusted so that it only amplifies the desired frequency. Therefore, it acts as an amplifier and filter at the same time. The potential limitation of this embodiment is that when the harmonic signal is amplified to increase the specific harmonic to a desired level, the entire waveform is also amplified. For example, when the amplitude of the pulse wave&lt;A_puise) Is 0.1, and when the fifteenth harmonic is to be increased from 0.0424 volts to 0.5 volts, the multi-harmonic signal will increase the amplitude of each pulse from 1.0 to 11.8 volts. This will exceed the voltage design limit of the filter.

In the third embodiment of the amplifying module, the linear amplifier is placed between the filter and the transmission module. This will only increase the amplitude of the desired harmonic, not the amplitude of the entire multi-harmonic signal.

Other embodiments, such as the use of a non-linear amplifier, are already known to those familiar with related technologies, and therefore will not be described here.

5.2.2 Other embodiments

The above-mentioned embodiments are for illustrative purposes. These examples are not intended to limit the invention. Based on the content here, those familiar with related technologies will be able to understand slightly different embodiments. These embodiments fall within the scope and spirit of the present invention.

5.3 Examples

This section describes the operational and structural examples of the above-mentioned methods, structures, and/or embodiments. These components and methods are used for illustration, not for limitation. The present invention is not limited to the specific elements or method examples described herein. According to the technology here, people familiar with the relevant technology should be able to understand the relevant transformations (including equivalence, expansion, change and derivative, etc.). These changes fall within the scope and spirit of the present invention.

5.3.1 Linear amplifier

Although the following description is to place the amplifier after the filter, the amplifier can also be placed before the filter without departing from the present invention.

5.3.1.1 Operational description

According to an embodiment of the present invention, the linear amplifier receives a first signal at a first amplitude, and outputs a second signal at a second amplitude, where the second signal is proportional to the first signal. The goal of the amplifier is to make the information embedded in the first signal also embedded in the second signal. Generally speaking, there is also some distortion in the information signal.

In a preferred embodiment, the amplitude of the second signal is higher than the amplitude of the first signal. However, in some embodiments, it is desirable that the amplitude of the second signal is smaller than the amplitude of the first signal. (That is, the first signal will be attenuated).

5.3.1.2 Structural description

Those who are familiar with the related technology are already familiar with the design and use of linear amplifiers. Linear amplifiers can be designed and manufactured by separate components, or can be obtained on an "off-rack".

Figure 48 shows an example of an amplifier. In the circuit diagram of FIG. 48A, six transistors are used in a wideband amplifier. In the more basic circuit of Figure 48B, the amplifier includes a transistor, four resistors, and a capacitor. Those familiar with the related art should know that a variety of alternative embodiments can be used.

5.3.2 Other embodiments

The above-mentioned embodiments are for illustrative purposes. These examples are not intended to limit the invention. Based on the content here, those familiar with related technologies will be able to understand slightly different embodiments. These embodiments fall within the scope and spirit of the present invention.

6 Receiver/transmitter system

This section explains the system and method for up-conversion of electromagnetic signals. In one embodiment, the present invention serves as a signal source for a high-frequency reference signal. In the second embodiment, the present invention is a conveyor.

This section describes the third embodiment. In the third embodiment, the transmitter of the present invention is used in a receiver/transmitter communication system. This third embodiment also refers to the communication system embodiment, and the circuit combining the receiver/transmitter is called a transceiver. The communication system has various embodiments.

The following sections describe the receiver/transmitter systems and methods. It should be understood that the present invention is not limited to a specific embodiment. Based on the technology here, people familiar with the relevant technology should be able to understand the relevant transformations (including equivalence, expansion, change, and derivative, etc.). These changes fall within the scope and spirit of the present invention.

6.1 High-level description

This section provides a high-level description of the receiver/transmitter system according to the present invention. The implementation described here is for illustrative purposes, not for limitation. In particular, a variety of functional and structural implementations can be used, and some of these implementations are described in this section. Based on the content here, people familiar with related technologies will understand the content of this functional and structural implementation.

According to the transceiver of the first embodiment of the present invention, the transmitter has a superheterodyne receiver. In this embodiment, the transmitter and receiver can operate in full-duplex mode or half-duplex mode. In full duplex mode, the transceiver can transmit and receive at the same time. In the half-duplex mode, the transceiver can transmit and receive, but cannot transmit and receive at the same time. The following will discuss the full-duplex and half-duplex embodiments at the same time.

The second embodiment of the transceiver is used as the transmitter of the present invention, and used with the universal frequency down converter as the receiver. In this embodiment, the transceiver is used in half-duplex mode.

The third embodiment of the transceiver is used as the transmitter of the present invention, and used with the universal frequency down converter as the receiver. In this embodiment, the transceiver is used in full duplex mode.

Embodiments of the transceiver are described below.

6.2 Examples and implementation examples

This section describes the operational and structural examples of the above-mentioned methods, structures, and/or embodiments. These components and methods are used for illustration, not for limitation. The present invention is not limited to the specific elements or method examples described herein. According to the technology here, people familiar with the relevant technology should be able to understand the relevant transformations (including equivalence, expansion, change and derivative, etc.). These changes fall within the scope and spirit of the present invention.

6.2.1 First embodiment: A transmitter used in a circuit with a superheterodyne receiver according to the present invention.

Figure 49 shows a typical superheterodyne receiver. The antenna 4904 receives the signal 4902. Generally speaking, the signal 4902 is a frequency-setting signal which passes through the filter 4910 and the amplifier 4908. The filter 4910 filters out other parts outside the desired frequency range, and the amplifier 4908 ensures sufficient signal strength for further processing. The output of amplifier 4908 is signal 4911.

The local oscillator 4919 generates an oscillating signal 4916, and the mixer 4912 combines the oscillating signal 4916 and the signal 4911 with the output of the mixer 4912 as a signal 4934, which is amplified by an amplifier 4918 and filtered by a filter 4920. The goal of amplifier 4918 is to ensure sufficient signal strength for further processing, and the goal of filter 4920 is to remove undesired frequencies.

The second local oscillator 4929 generates the second oscillating signal 4926, and the mixer 4922 combines the oscillating signal 4926 with the amplified/filtered signal 4934. The output of mixer 4922 is signal 4936. Similarly, the amplifier 4918 and the filter 4920 ensure that the signal 4936 is at the desired frequency and amplitude.

The signal 4934 refers to the first intermediate frequency signal (IF), and the signal 4936 refers to the second (IF) signal. Therefore, the combination of the local oscillator 4914 and the mixer 4912 can be referred to as the first IF stage and the combination of the local oscillator 4924 and the mixer 4922 can be referred to as the second IF stage.

The circuit example of Fig. 49 is as follows. The signal can be 900MHz. The oscillating signal 4916 can be located at 830MHz, which enables the IF signal 4934 of the first stage to have a frequency of 70MHz. If the frequency of the second oscillation signal 4926 is at 59 MHz, the second IF signal 4936 will be 11 MHz. This frequency is a typical second IF frequency.

Other superheterodyne receivers can also be used in the embodiments of the transceiver of the present invention. In addition, the above frequency examples are for illustrative purposes without any limitation.

Figure 50 shows a transmitter according to the present invention in a transceiver circuit with a superheterodyne receiver. Accordingly, FIG. 50 illustrates an example of the transceiver circuit of the present invention. The transceiver includes a receiving module 5001, which can use any superheterodyne receiver and has been described. The transceiver also includes a transmitter module 5003, which will be described as follows.

In the FM and PM modes, the information signal 5004 modulates an intermediate signal to generate an oscillation signal 5002. The oscillating signal 5002 is shaped by the signal shaper 5010, and a pulse train 5008 is generated. (Refer to the advantages of the aforementioned multi-harmonic enhancement). The pulse train 5008 drives the switch module 5012. In the FM/PM mode, the bias/reference signal 5008 is received by the switch module 5012. The output of the switch module 5012 is a multi-harmonic signal 5022. The multi-harmonic signal 5022 includes multiple sinusoidal components and passes through a high "Q" filter to filter out frequencies other than the desired output frequency. The amplifier 5016 amplifies the desired output frequency, and outputs a transmission signal 5026 through a transmission module 5018, and the transmission signal 5026 passes through a duplexer 5020. The purpose of the duplexer 5020 is to allow a single antenna to be used for both transmission and reception at the same time. The combination of the received signal 4902 and the transmitted signal 5026 is the duplex signal 5028.

In the AM mode, the same circuit as in Figure 50 is applied: except (1) the information signal 5030 is used instead of the information signal 5004; (2) the bias/reference signal 5006 is a function of the information signal 5030; and (3) the oscillation signal 5002 No modulation is made.

This description is for the duplex mode of the transceiver, where the transmitting part and the receiving part of the communication system are separate circuits. An embodiment of the half-duplex mode is described below.

Transceivers can have alternative embodiments. For example, FIGS. 51A to 51D describe embodiments of transceivers, in which the oscillator in the circuit may be shared by the transmitter and the receiver due to cost or other considerations. In order to achieve this embodiment, a trade-off must be made when selecting the frequency of the oscillator. In FIG. 51A, the local oscillator 5104 generates the oscillation signal 5106, which is mixed with the signal 4911 to generate the first IF signal 5108. The local oscillator 5110 generates a second oscillating signal 5112, which is mixed with the first IF signal 5108 to generate a second IF signal 5114. For the example here, the frequencies of the oscillation signals 5106 and 5112 will be lower than the frequencies of the oscillation signal 4911 and the first IF signal 5108, respectively. (People familiar with related technologies should know that because mixers 4912 and 92 generate the sum and difference of the signals received by them, the oscillation frequency can be higher than the frequency of the signal).

As mentioned in the previous example, the typical second IF frequency is 11MHz. Since the second IF frequency passes through the decoder for demodulating and decoding the signal, the selection flexibility of this IF frequency is smaller than the selection flexibility of the first IF frequency. Generally speaking, demodulators and decoders are designed to receive signals at a predetermined frequency, such as 11MHz. In this case, the combination of the first IF signal 5108 and the second oscillating signal 5112 must generate a second IF signal with a second IF frequency of 11 MHz. As mentioned earlier, in this example, the received signal 4902 is 900MHz. In order to achieve the second IF signal frequency of 11MHz, the frequencies of the oscillation signals 4916 and 4926 are set to 830MHz and 59MHz. Before setting the frequency of the oscillation signals 5106 and 5112, the desired frequency of the transmitted signal must be determined first. If the desired frequency of the transmitted signal is also 900 MHz, the oscillating signal for opening and closing the switch of the present invention must have a frequency of the "subharmonic frequency" of 900 MHz. That is, it must be the quotient obtained by dividing 900 MHz by an integer. (In other words, 900MHz must be a harmonic frequency of the oscillation signal used to drive the switch). The following table shows some subharmonic frequencies of 900MHz.

<u>Subharmonic</u><u>frequency</u>

First 900MHz

Second 450MHz

Third 300MHz

Fourth 225MHz

Fifth 180MHz

Tenth 90MHz

15th 60MHz

As mentioned above, in FIGS. 49 and 50, the frequency of the second oscillation signal 4926 is 59 MHz. Note that the frequency of the fifteenth harmonic is 60MHz. If the frequency of the oscillation signal 5112 in FIG. 51 is set to 60 MHz, it can also be used to operate the switch in the switch module 126 of FIG. 51B and the switch in the switch module 5136 of FIG. 51C. If this is the case, the frequency of the first IF signal will be 71MHz (instead of the 70MHz of the previous single receiver):

The first IF signal frequency = the second IF signal frequency + the second oscillation signal frequency = 11MHz+60MHz=71MHz

The frequency of the first oscillation signal 5106 can be determined by the frequency of the first IF signal and the frequency of the received signal 4902. In this example, the frequency of the received signal is 900MHz, and the frequency of the first IF signal is 71MHz. Therefore, the frequency of the first oscillation signal must be 820MHz:

The first oscillation frequency = the frequency of the received signal-the first IF signal frequency = 900MHz-71MHz=829MHz

Therefore, the frequencies of the oscillation signals 5106 and 5112 are 829 MHz and 60 MHz, respectively.

In Fig. 51B, a PM embodiment is shown. The second oscillating signal 112 passes through a phase modulator 5122 and is modulated by the information signal 5120 to generate a PM signal 5132. The PM signal 5132 passes through a harmonic enhancement module 5124 to generate a pulse train 5133. The pulse train 33 is also a signal for phase modulation, and enables the switch of the switch module 5126 to be turned on and off. In addition, the bias signal 5128 enters the switch module 5126. The output of the switch module 5126 is a multi-harmonic signal 5134.

In Figure 51C, an AM embodiment is shown. The second oscillating signal 5112 directly enters the harmonic enhancement module 5124 to generate a pulse train 5138. The pulse train 5138 (non-modulated in this embodiment) then enters the switch module 5136 and turns the switch on and off. And the incoming switch module 5136 is the reference signal 5140. The reference signal is generated by the addition module 5130 combining the information signal 5120 and the bias signal 5128. Those familiar with related technologies should know that the information signal 5120 may not be combined with the bias signal 5128 as a reference signal. The output of the switch module 236 is a multi-harmonic signal 5134.

The scope of the present invention includes FM embodiments in which the oscillator of the receiver circuit is used as the oscillator signal source of the transmitter circuit. In the embodiments discussed above, the FM embodiment requires a voltage controlled oscillator (VCO) rather than a simple local oscillator. Based on the discussion here, those familiar with related technologies should know that in a circuit design, the VCO is used to replace the local oscillator in the receiver circuit.

In FIG. 51D, the multi-harmonic signal 5134 is filtered by the filter 5142, which removes all frequencies except the desired output frequency 5148. The desired output frequency 5148 is amplified by the amplifier module 5146 and passed through the transmission module 5150. The output of the transmitter module 5150 is a transmission signal 5144. The transmitted signal 5144 then passes through the transmitting antenna 4904.

Those familiar with related technologies should understand that there are multiple combinations of oscillator frequencies, stages, and circuit combinations that can meet the scope of the present invention. Therefore, the description here is for illustrative purposes, not for limitation.

6.2.2 Second embodiment: According to the present invention, in half-duplex mode, a transmitter used with a universal frequency down converter

An example of a receiver using universal frequency down conversion technology is shown in Figure 52 and described in section 6.3 below. EM, the signal 5220 passes through the capacitor 5204 to the first end of the switch 5210. The other end of the switch 5210 is connected to the ground 5212. The local oscillator 5206 generates an oscillating signal 5228, which passes through the pulse shaper 5208, and generates a pulse train 5230. The selection of the oscillator 5206 and the design of the pulse shaper 5208 control the frequency and pulse width of the pulse train 5230. The pulse train 5230 controls the opening and closing of the switch 5210. By turning on and off the switch 5210, a down-conversion signal 5222 is generated. The down-converted signal 5222 passes through the amplifier 5214 and the filter 5216 to generate a filtered signal 5224. In a preferred embodiment, the filtered signal 5224 is located on the baseband, and the decoder 5218 only needs to convert the digital to analog or remove the encrypted part before outputting the baseband signal. Then there is a universal frequency down-conversion receiver, which operates in direct down-conversion mode and receives the EM signal 5220 in this mode, and down-converts it to the baseband signal 5226 without IF or demodulation Changer. In an alternative embodiment, the filtered signal 5224 may be at a frequency of "offset". That is, similar to the second IF signal in the above-mentioned superheterodyne receiver, it can be located at the intermediate frequency. In this example, the decoder 5218 can be used to demodulate the filtered signal to output a baseband signal.

An example of using the transmitter of the present invention is shown in FIG. 53. In the FM and PM mode embodiments, the information signal 5302 modulates an oscillating signal 5306, which passes through a pulse shaping circuit 5310 to output a pulse train 5311. The pulse train 5311 controls the opening and closing of the switch 5312. One end of the switch 5312 is connected to the ground 5314, and the second end of the switch 5312 is connected to the bias/reference signal 5308 via the resistor 5330. In the FM and PM modes, the bias/reference signal 5308 is preferably a non-converted signal, usually referred to as a bias signal for short. In the AM mode, the oscillation signal 5306 is not modulated, and the bias/reference signal is a function of the information signal 5304. In one embodiment, the information signal 5304 is combined with the bias signal to generate the reference signal 5308. In an alternative embodiment, the information signal 5304 is used instead of the bias signal. Generally speaking, in the AM mode, the bias/reference signal refers to the reference signal, which is different from the bias signal used in the FM and PM modes. The output of the switch 5312 is a multi-harmonic signal 5316, which passes through a "high Q" filter to remove undesired frequencies existing in the harmonic components of the multi-harmonic signal 5316. The amplifier module 5322 amplifies the desired frequency 5320, and outputs a transmission signal 5326 through the transmitter module 5324. In this embodiment, the antenna 5328 outputs a transmission signal.

For FM and PM modulation modes, FIGS. 54A, 54B, and 54C show examples of combining the transmitter and universal frequency down-conversion receiver of the present invention according to an embodiment of the present invention, and operating in the half-duplex mode. That is, the transceiver can transmit and receive, but not at the same time. It uses a single antenna 5402, a single oscillator 5444/5454 (depending on whether the transmitter is in FM or PM modulation mode), a single pulse shaper 5438 and a single switch 5420 for transmission and reception. In terms of receiving function, the "receiver/transmitter" (R/T) switches 5406, 5408 and 5446/5452 (FM or PM) can all be designed by (R) and placed in the receiving part. The antenna 5402 receives the EM signal 5404 and passes it through the capacitor 5407. In the FM modulation mode, a voltage controlled oscillator (VCO) 5444 generates an oscillation signal 5436. Since the transceiver implements the transceiver function, the switch 5446 connects the output to the VCO 5444 and ground 5448. Therefore, VCO 5444 will operate as a simple oscillator. In the PM modulation mode, the oscillation signal 5436 is generated by the local oscillator 5454 and passes through a phase modulator 5456. It is better to move to the transceiver to implement the receiving function, the switch 5452 is connected to the ground 5448, and there is no output to the phase modulator. Therefore, the local oscillator 5454 and its phase modulator 5456 operate as a simple oscillator. Based on the content here, those familiar with related technologies should know that there are multiple implementations, in which an oscillating signal 5436 can be generated to control the switch 5420.

The oscillating signal 5436 is shaped by the pulse shaper 5438 to generate a pulse train 5440. The pulse train 440 turns the switch 5420 on and off. As a result of the switching of the switch 5420, a down conversion signal 5409 is generated. The down-conversion signal 5409 is amplified and filtered to generate a filtered signal 5413. In one embodiment, the filtered signal 5413 is located on the base band and is demodulated through down conversion. Therefore, in addition to converting digital bits into analogs or decrypting the filtered signal 5413, the decoder 5414 is not required. In the modified embodiment, the filtered signal 5413 is at the frequency of the "offset", so the decoder 5414 is required to modulate the filtered signal and generate a demodulated baseband signal.

When the transceiver implements the transmission function, the R/T switches 5406, 5408, and 5446/5452 (FM or PM) are in the (T) position. In the FM mode, the switch 5446 connects the information signal 545 to the VCO 5444 to generate the frequency modulation oscillation signal 5436. In the PM mode, the switch 5452 connects the information signal 5450 to the phase modulator 5456 to generate the phase modulated oscillation signal 5436. The oscillating signal 5436 passes through the pulse shaper 5438 to generate a pulse train 5440, which then turns the switch 5420 on and off. One end of the switch 5420 is connected to the ground 5442, and the other end is connected to the bias signal 5422 through the switch R/T5408 and the resistor 5423, and generates a multi-harmonic signal 5424, which passes through the "high-Q" filter 5426 to remove the multi-harmonics The undesired frequency in the harmonic components of the signal 5452. The amplifier module 5430 amplifies the desired frequency 5428, and outputs a transmission signal 5434 through the transmitter module 5432. In this embodiment, since the transceiver implements the transmission function, the R/T switch 5406 connects the transmission signal to the antenna 5402.

In AM modulation mode, Figure 55 shows an example of the transmitter operating in half-duplex mode. The difference from the aforementioned FM and PM modulation modes is that the oscillation signal 5436 is generated by the local oscillator 5502, and the switch 5420 is connected to the reference signal 5506 via the R/T switch and the resistor 5423. When the addition module 5504 combines the information signal 5450 and the bias signal 5422, a reference signal 5506 is generated. Those familiar with related technologies should know that the information signal 5450 can be used as a reference signal 5506 without being combined with the bias signal 5422 and directly connected to the switch 5420 (via the R/T switch and the resistor 5423).

6.2.3 Third Embodiment: According to the present invention, in full-duplex mode, a transmitter used with a universal frequency down converter

The difference between full-duplex mode and half-duplex mode is that the transceiver can send and receive at the same time. Refer to Figure 561 for this purpose, it is better to use a separate circuit for the transceiver. The duplexer 5604 is used in the transceiver to allow the transmitting and receiving functions to share the antenna 5602.

The receiving function is implemented as follows. The antenna 5602 receives the EM signal 5606 and passes it through the capacitor 5607 to one end of the switch 5626. The other end of the switch 5626 is connected to the ground 5628, and the pulse train 5624 generated by the local oscillator 5620 and the pulse shaper 5622 drives the switch. The opening and closing of the switch 5626 generates a down-conversion signal 5614. The down-converted signal 5614 passes through the amplifier 5608 and the filter 5610 to generate the filtered signal 5616. The filtered signal 5416 can be located on the base band and be demodulated, or located on the "offset" frequency. If the filtered signal 5416 is located at the frequency of the "offset", the decoder 5612 demodulates it to generate a modulated baseband signal 5618. In the preferred embodiment, however, the filtered signal 5416 will be a demodulated baseband signal, and the decoder 5612 is not required except for converting digital to analog or decrypting the filtered signal 5616. The receiver part of this transceiver can be operated independently of the transmitter part of the transceiver.

The implementation of the transmission function is as follows: In the FM and PM modulation modes, the information signal 5648 modulates the oscillation signal 5630. In the AM modulation mode, the main oscillation signal 5630 is not modulated. The pulse shaper 5632 shapes the oscillating signal and generates a pulse train 5634, which then turns the switch 5636 on and off. One end of the switch 5636 is connected to the ground 5638, and the other end is connected to the bias/reference signal 5646 via a resistor 5647. In the FM and PM modulation modes, the bias/reference signal 5646 refers to the bias signal 5646 and is non-variable. In the AM modulation mode, the information signal 5650 can be combined with the bias signal 5650 to generate the reference signal 5646. The reference signal 5646 is a function of the information signal 5650. Those familiar with related technologies should know that the information signal 5650 can be used as the reference signal 5646 without being combined with the bias signal. A multi-harmonic signal 5652 is generated and filtered by a "high Q" filter 5642, thereby generating the desired signal 5654. The desired signal 5654 is amplified by the amplifier 5642 and passes through the transmission module 5644. The output of the transmission module 5644 is a transmission signal 5656. The transmission signal 5656 passes through the duplexer 5604, and then is transmitted by the antenna 5602. The transmitting part of the transceiver can be operated independently from the receiving part of the transceiver.

Therefore, as described above, the transceiver embodiment of the present invention in FIG. 56 can implement full-duplex communication in all modulation modes.

6.2.4 Other embodiments and implementation

Based on the discussion here, those familiar with the related art will understand other embodiments of the receiver/transmitter.

The above-mentioned embodiments are for illustrative purposes. These examples are not intended to limit the invention. Based on the content here, those familiar with related technologies will be able to understand slightly different embodiments. These embodiments fall within the scope and spirit of the present invention.

6.3 Comprehensive description of down converter using universal frequency transmission module

The following discussion describes the down conversion using the universal frequency transmission module. FIG. 71 depicts a phantom module 6400 for down conversion, which utilizes a universal frequency conversion (UFT) module 6402, and this universal frequency conversion (LFT) module 6402 down-converts the EM input signal 6404. In a specific embodiment, the phantom module 6400 includes a switch 6408 and a capacitor 6410. The electronic proofreading of the circuit is flexible. That is, in another example, the switch 6408 in series with the input signal 6404 and the capacitor 6410 is bypassed to ground. (Although in different modes, grounding can also take other forms). In the second example (FIG. 71B), the capacitor 6410 in series with the input signal 6404 and the switch 6408 is bypassed to ground. (Although in different modes, grounding can also take other forms). The phantom module 6400 with UFT module 6402 can be easily modified to use the phantom frequency to down-convert various electromagnetic signals. The frequency of the phantom is lower than the frequency of the EM input signal 6404.

In one example, the illusion module 6400 down-converts the input signal 6404 to an intermediate signal (IF). In another embodiment, the artifact module 6400 down-converts the input signal 6404 to a modulated baseband signal. And in another embodiment, the input signal 6404 is a frequency modulation signal (FM), and the artifact module 6400 down-converts it to a non-FM signal, such as a phase modulation signal (PM) or an amplitude modulation signal (AM). Each of the above examples is described below.

In one embodiment, the control signal 6406 includes a pulse chain, which repeats at a false image rate and is equal to or less than twice the frequency of the input signal 6404. In this embodiment, the control signal 6406 refers to a false signal because it is lower than the Nyquist rate of the frequency of the input signal 6404. Preferably, the frequency of the control signal 6406 is much lower than the frequency of the input signal.

The pulse chain 6418 in FIG. 71 controls the switch 6408 to falsely transform the input signal with the control signal 6404 to generate a down-converted output signal 6412. More specifically, in one embodiment, the switch is turned off at the first edge of each pulse 6420 in FIG. 71E and turned on at the second edge of each pulse. When the switch 6408 is closed, the input signal 6404 is coupled to the capacitor 6410, and the charge is transferred from the input signal to the capacitor 6410. When the continuous pulse wave forms the down-conversion output signal 6412, the charge is stored.

Figures 71C-71G show examples of waveforms.

FIG. 71C is an analog amplitude modulation (AM) carrier signal 6414, which is an example of the input signal 6404. For the sake of clarity, in FIG. 71D, the analog AM carrier signal portion 6416 describes a portion of the analog AM carrier signal 6414 on a large time scale. Analog AM carrier part 6416 is described from t0 to t₁It is analogous to the AM carrier signal 6414.

FIG. 71E depicts an example of the false signal 6418, which is an example of the control signal 6406. The time ratio of the artifact signal 6418 is almost the same as that of the analog AM carrier signal portion 6416. In the example of FIG. 71E, the artifact signal 6418 includes a pulse train 6420, which has a gap that approaches zero and is negligible (as described below, the present invention is not limited to this embodiment). Those who are familiar with related technologies should know that the pulse wave gap also refers to the pulse wave width. The pulse wave 6420 repeats at the pulse wave repetition rate or the illusion rate of the illusion signal 6418. The false image rate is determined as follows.

As described above, the pulse chain 6420 (such as the control signal 6406) controls the switch, and uses the false image rate of the false signal to make the analog AM carrier signal 6416 false. (That is, input signal). Specifically, in this embodiment, the switch 6408 is closed at the first edge of each pulse, and turned on at the second edge of each pulse. When the switch 6408 is closed, the signal 6404 is coupled to the capacitor 6410. The charge converted with the pulse wave is referred to herein as an under-sample. The next sample 6422 forms a down-sampled signal portion 6424 (FIG. 71F), which corresponds to the analog AM carrier signal portion 6416 (FIG. 71D) and the pulse train 6420 (FIG. 71E). The charge stored during the continuous down-sampling of the AM carrier signal forms the down-conversion signal 6424 (FIG. 71F), which is an example of the down-conversion output signal 6412 (FIG. 71A and 71B). In FIG. 71G, the demodulated baseband signal 6426 represents the demodulated baseband signal 6426 obtained after filtering by the compression time ratio. As described above, the down-conversion signal 6424 has the same "amplitude envelope" as the AM carrier signal 6414. Therefore, Figures 71C-71G describe the down conversion of the AM carrier signal 6414.

The waveforms described in Figures 71C-71G are for illustrative purposes only and not for limitation.

The artifact rate of the control signal determines whether to down-convert the input signal into an IF signal, a modulated baseband signal, or down-convert from an FM signal to an AM signal. Generally speaking, the relationship between the input signal 6404, the false image rate of the control signal 6406, and the down-converted output signal 6412 is shown as follows:

(The frequency of the input signal 6404) = n. (Control signal frequency) ± (down-converted output signal 6412 frequency)

For the content here, only the case of "+" is described. The value of n represents the harmonics and sub-harmonics of the input signal 6404 (such as n=0.5, 1, 2, 3...).

When the false image rate of the control signal 6406 is shifted from the frequency of the input signal 6404, or from the frequency of its harmonic or sub-harmonic, the input signal is down-converted to the IF signal. This is because the down-sampled pulses appear in different phases of the continuous cycle of the input signal 6404. As a result, the down-sampling forms a low-frequency oscillation pattern. If the input signal 6404 includes low-frequency changes, such as amplitude, frequency, phase, etc., or any combination, the stored charge related to the down-sampling reacts to the low-frequency changes, and the down-conversion IF signal has similar changes. For example, in order to down-convert an input signal of 901MHz to an IF signal of 1MHz, the frequency of the control signal 6404 will be calculated as follows:

(Freq_input-Freq_IF)/n=Freq_control

(901MHz-1MHz)/n=900/n

n=0.5, 1, 2, 3, 4, etc., the frequency of the control signal 6406 will be substantially the same as 1.8GHz, 900MHz, 450MHz, 300MHz, 225MHz, etc.

Alternatively, when the artifact rate of the control signal 6406 is substantially the same as the frequency of the input signal 6404, or the same as its harmonic or sub-harmonic frequency, the input signal 6404 is directly down-converted to the modulated machine-band signal. This is because, if there is no modulation, the down-sampled pulse appears at the same point in the continuous period of the input signal 6404. If the input signal 6404 includes low-frequency changes, such as amplitude, frequency, phase, etc., or any combination, the stored charge related to the down-sampling reacts to the low-frequency changes, so that the modulated baseband signal has similar changes. For example, in order to down-convert a 901MHz input signal to a modulated baseband signal (such as zero IF), the frequency of the control signal 6404 will be calculated as follows:

(Freq_input-Freq_IF)/n=Freq_control

(900MHz-0MHz)/n=900/n

n=0.5, 1, 2, 3, 4, etc., the frequency of the control signal 6406 will be substantially the same as 1.8GHz, 900MHz, 450MHz, 300MHz, 225MHz, etc.

Alternatively, in order to down-convert an input FM signal to a non-FM signal, a frequency in the FM bandwidth must be down-converted to the baseband (ie, zero IF). For example, in order to down-convert a frequency shift adjustment signal (FSK) to a phase shift adjustment (PSK) signal (sub-combination of PM), the lower frequency F of the FSK signal₁And higher frequency F₂The intermediate frequency between (that is, ((F₁+F₂)/2]) down-convert to zero IF. For example, to convert the shell to 899MHz F₁Frequency and F of 901MHz₂The FSK signal of frequency is down-converted to PSK signal, and the false image rate of the control signal 6404 will be calculated as follows:

Input frequency=(F₁+F₂)/2=(899MHz+901MHz)/2=900/n

The frequency of the down-conversion signal = 0 (that is, the base band)

(Freq_input-Freq_IF)/n=Freq_control

(900MHz-0MHz)/n=900/n

n=0.5, 1, 2, 3, 4, etc., the frequency of the control signal 6406 will be substantially the same as 1.8GHz, 900MHz, 450MHz, 300MHz, 225MHz, etc. The frequency of the down-converted PSK signal is essentially the same as the lower frequency F₁And higher frequency F₂Half the difference.

In another example, in order to down-convert an FSK signal to an amplitude shift adjustment (ASK) signal, (a sub-combination of AM), the lower frequency FSK of FSK₁And higher frequency F₂Convert down to zero IF. For example, in order to change the F of 900MHz₁Frequency and F of 901MHz₂The FSK signal of the frequency is down-converted to the ASK signal, and the false image rate of the control signal 6404 will be calculated as follows:

(900MHz-OMHz)/n=900MHz/n, or

(901MHz-0MHz)/n=901MHz/n

For the aforementioned 900MHz/n example, and n=0.5, 1, 2, 3, 4, etc., the frequency of the control signal 6406 should be substantially the same as 1.8GHz, 900MHz, 450MHz, 300MHz, 225MHz, etc. The frequency of the down-converted AM signal is essentially the same as the lower frequency F₁And higher frequency F₂The difference (that is, 1MHz).

In one embodiment, the pulse wave of the control signal 6406 has a gap that approaches zero and is negligible. This makes the UFT module 6402 a high input impedance device. This configuration is useful when the input signal is expected to have small interference.

In another embodiment, the pulse wave of the control signal 6406 has gaps that cannot be ignored. This makes the low input impedance device of the UFT module 6402 substantially match the impedance of the signal source of the input signal. This also improves the energy conversion from the input signal 6404 to the down-conversion output signal 6412, and the efficiency of the signal-to-noise (s/n) ratio of the UFT module 6402.

When the pulse wave of the control signal 6404 has a gap that cannot be ignored, the phantom module 6400 refers to an energy conversion module or a brake conversion module. The following describes an example system and method for generating and optimizing the control signal 6406, and for improving the energy conversion and/or the signal-to-noise ratio in the energy conversion module.

6.3.1 Selected energy conversion signal module

FIG. 93 depicts an energy conversion system 9301, which includes an optional energy conversion signal module 9302, which can perform any function or combination of multiple functions, including but not limited to generating an energy conversion signal 9309.

In one embodiment, the optional energy conversion module 9302 includes a slit generator, an example of which is described as the slit generator 9220 in FIG. 92C. The slot generator 9220 generates a non-negligible slot pulse 9226 from an input signal 9224. The input signal 9'24 can be any form of periodic signal, including but not limited to sine, square wave, sawtooth wave, etc. The following describes the system for generating the input signal 9224.

The pulse width or slit of the pulse wave 9226 is determined by the delay of the branch passing through the slit generator 9220. Generally speaking, as the desired pulse width increases, the difficulty in meeting the requirements of the slit generator 9220 decreases. In other words, in order to generate a non-negligible slit pulse wave at a given EM input frequency, the response time of the components required for the example slit generator 9220 does not need to be as fast as a sampling system with the same EM input frequency. .

The example logic circuit and its implementation in the slot generator 9220 are for illustrative purposes only and not for limitation, and the logic circuit in actual application may have different forms. The example slot generator 9220 includes an optional inverter that provides polarity consistency with the other examples here.

The implementation of the slit generator 9220 is shown in Figure 92D. Other examples of gap generation logic are shown in Figures 92A and 92B. FIG. 92A shows a rising edge pulse generator 9240, which generates a pipe 9226 at the rising edge of the input signal 9224. FIG. 92B shows a falling edge pulse wave generator 9250, which generates a Pie wave 9226 at the falling edge of the input signal 9224.

In one embodiment, the input signal 9224 is generated externally by an optional energy conversion signal module 9302, as shown in FIG. 93. Alternatively, the input signal 9224 is internally generated by the optional energy conversion signal module 9302. The input signal 9224 can be generated by an oscillator, such as the oscillator 9230 in Figure 92E. The oscillator 9230 can be located inside or outside the optional energy conversion signal module 9302. In addition, the oscillator 9230 can be located outside the energy conversion system 9301, and the output of the oscillator 9230 can be any cycle.

The down-conversion form implemented by the energy conversion system 9301 is based on the false image rate of the energy conversion signal 9309, which is determined by the frequency base of the pulse wave 9226. The frequency of the pulse 9226 is determined by the frequency of the input signal 9224.

For example, when the frequency of the input signal 9224 is substantially the same as the harmonics and subharmonics of the EM signal 9303, the EM signal 9303 is directly down-converted to the base band (for example, when the EM signal is an AM signal or a PM signal), or from FM signal is down-converted to non-FM signal. When the frequency of the input signal 9224 is substantially the same as the harmonic frequency and sub-harmonic frequency of the difference frequency, the EM signal 9303 is down-converted to the intermediate frequency.

The optional energy conversion module 9302 can be implemented by hardware, software, firmware, or any combination thereof.

6.32 Smooth the down-conversion signal

Referring to FIG. 71A, if necessary, the down-conversion signal 9302 can be smoothed by filtering.

6.3.3 Impedance matching

Referring to Figures 71A and 71B, the energy conversion module 6400 has input and output impedances defined by: (1) the power cycle of the switch module (ie, the UFT module 6402), (2) the storage module (eg, Capacitor 6410) Impedance at the desired frequency (e.g., mid/baseband frequency at EM input).

In a preferred embodiment, first, the slot width is made close to the half cycle of the down-converted EM signal, and the slot width ("such as closing time") can be reduced. When the gap width decreases, the characteristic impedance at the input and output of the energy conversion module increases. Alternatively, when the half-cycle of the EM signal from the down-conversion of the slot width increases, the impedance of the energy conversion module decreases.

One step to determine the characteristic input impedance of the energy conversion module is to directly measure its value. In one embodiment, the characteristic input impedance of the energy conversion module is 300 ohms. An impedance matching circuit can be used to effectively couple with the input EM signal, the input EM signal has a signal source impedance of 50 ohms, and the impedance of the energy conversion module is 300 ohms. There are many ways to match these impedances, including directly providing the required impedance, or using the following impedance matching circuit.

Referring to FIG. 94, an impedance matching dummy module 9402 includes an input impedance matching module 9406, a dummy mode resistance 9404, and an output impedance matching module 9408. For example, FIG. 94 shows a specific embodiment using an RF input signal 9414. Assuming that the impedance 9412 is a low impedance of 50 ohms, and the input impedance is close to 300 ohms, the initial planning of the input impedance matching module 9406 can be as shown in FIG. 96, and includes an inductor 9606 and a capacitor 9608. When going from low impedance to high impedance, the planning of inductor 9606 and capacitor 9608 is feasible. The inductor 9606 and the capacitor 9608 form an "L network" matched filter. Those who are familiar with related technologies should be quite familiar with the calculation of the inductor 9606 and the capacitor 9608.

The output characteristic impedance can be batched under consideration of the desired output frequency. One step to determine the characteristic output impedance of the energy conversion module is to directly measure its value. At the input EM frequency, to balance the extremely low impedance of the storage module, the storage module should have an impedance at the desired output frequency, which is greater than or equal to the impedance of the load used to drive it. (For example, in one embodiment, the impedance of the storage module with a 1MHz output frequency is 2K ohms, and the expected load impedance to be driven is 50 ohms). In addition, another advantage of impedance matching is to filter out undesirable signals, which can also be achieved by using the same components.

In one embodiment, the characteristic output impedance of the energy conversion module is 2k ohms. An impedance matching circuit can be used to effectively match the down-conversion signal with an output impedance of, for example, 2k ohms to a load of, for example, 50 ohms. These impedances can be matched in a variety of ways, including directly providing the required load impedance, or using the impedance batching circuit described below.

When going from high impedance to low impedance, an inductor 9614 and a capacitor 9616 can be planned, as shown in Figure 96. The inductor 9614 and the capacitor 9616 form an "L network" matched filter. Those who are familiar with related technologies should be quite familiar with the calculation of the inductor 9614 and the capacitor 9616.

According to the present invention, the planning of the input impedance batching module 9406 and the output impedance batching module 9408 is the first step in impedance matching. In some cases, the initial design can be optimized based on different design specifications and considerations.

When using other optional optimized structures and/or components, if you want to meet its own original specifications, you should consider the effect of the characteristic impedance of the energy conversion module.

6.3.4 Slot and resonance structure

Resonant grooves and other resonant structures can be used to further optimize the energy converter of the present invention. For example, when the switch is turned on, a resonant structure that resonates around the input frequency can be used to store energy from the input signal. The resonant tank and other resonant structures may include, but are not limited to, surface acoustic wave filters (SAW), dielectric resonators, duplexers, capacitors, inductors, and so on.

Figure 106A shows an example. Figure 101 and Figure 109 show two other embodiments. Based on the content here, those familiar with the relevant technology will understand the implementation of the transformation. In addition, the implementation of these transformations falls within the scope of the present invention. And these implementations have the advantages of series and parallel resonance circuits.

Figure 106A depicts a different implementation of a parallel tank circuit. The first parallel or tank circuit (slot 1) includes a capacitor 10638 and an inductor 10620. The second parallel or slot circuit (slot 2) includes a capacitor 10634 and an inductor 10636.

Those who are familiar with related technologies should understand that the parallel tank circuit has:

When it is lower than the resonance frequency, it has low impedance;

When it is higher than the resonance frequency, it has low impedance;

At or close to the resonance frequency, it has high impedance;

In the example of FIG. 106A, the first and second resonance circuits resonate at approximately 920 MHz. At and near the resonance frequency, the impedance of these circuits is higher. Therefore, in the circuit of FIG. 106A, the two-slot circuit has a higher impedance for the input frequency of 950 MHz, and at the same time, has a lower impedance for the desired output range.

The energy conversion signal 10642 controls a switch 10614. When the energy conversion signal 10642 controls the opening and closing of the switch 10614, the high frequency signal part will pass through the slot 1 and the slot 2. However, the low frequency signal generated by the system (50 MHz in this embodiment) will pass through slots 1 and 2 with small attenuation. The role of slot 1 and slot 2 further separates the input and output signals on the same node, thereby generating a more stable output and input impedance. Capacitors 10618 and 10640 are used to store the energy of the 50MHz output signal between the pulses of the energy converter.

As shown in the figure, when the inductor 10610 and the storage capacitor 10612 are connected in series, the effect of energy conversion can be further optimized. In the example, the series resonance frequency of this circuit is close to 1 GHz. This circuit increases the energy conversion characteristics of the system. It is preferable to maintain a small impedance ratio of the inductor 10610 and the capacitor 10612 so that the main energy will be converted to the storage capacitor 10612 during operation. The output signals A and B are shown in Figs. 106B and 106C, respectively.

In FIG. 106A, circuit elements 10604 and 10606 form input impedance matching. The circuit elements 10632 and 10630 form an output impedance matching with the 50 ohm resistor 10628. The circuit elements 10622 and 10624 form a second output impedance matching with the 50 ohm resistor 10626. In this embodiment, capacitors 10608 and 10612 are used as storage capacitors. The voltage source 10646 and the resistor 10602 generate a 950MHz signal with an output impedance of 50 ohms, which serves as the input of the circuit. The circuit element 10616 includes a 150MHz oscillator and a pulse generator to generate an energy conversion signal.

Figure 101 illustrates a shunt tank circuit 10110 in a single-ended one-to-one single-ended system 10112. Similarly, FIG. 109 illustrates the shunt tank circuit 10910 in the system 10912. The shunt tank circuits 10110 and 10910 reduce the driving source impedance, so that the transient response can be improved. The shunt tank circuits 10110 and 10910 can store the energy from the input signal and provide low driving source impedance to convert the energy through the gap of the closed switch. In the transient response of the switching slot, in addition to the input frequency, a large part of the frequency is higher than the input frequency. (That is, the part higher than the input frequency can also effectively pass through the gap). Since energy can be converted through the transient frequency response of the switch, resonance circuits or structures, such as shunt tank circuits 10110 and 10910, have this advantage. (That is, the capacitance in the resonance tank acts as a low driving source impedance during the transient period of the slot).

The grooves and resonance structures described above are for illustrative purposes, not for limitation. Alternative configurations can also be used. The above-mentioned different resonance grooves and structures can be used in combination or independently.

6.3.5 Charge and power conversion concept

The concept of charge conversion is explained with reference to Figs. 117A-F. In FIG. 117A, the circuit 11702 includes a switch S and a capacitor 11706 having a capacitance "C". The switch S is controlled by a control signal 11708, which includes a pulse wave 11710 with a "T" slot.

In Figure 117B, Equation 13a shows that the charge "q" on the capacitor 11706 is proportional to the voltage "V" across the capacitor, where:

q=charge (coulomb)

C=Capacitance (Farad)

V=Voltage (Volt)

The voltage "V" is expressed in formula 13b, and

A=input signal amplitude

Equation 13a can be rewritten as Equation 13c. The time variable of the charge in Equation 14a is "Δq(t)", which can be rewritten as Equation 14b. Using the trigonometric function in Equation 15, Equation 14b becomes Equation 16, and can be rewritten as Equation 17.

The sine term in Equation 17 is only a function of the gap "T". Therefore, when "T" is equal to an odd multiple of π (that is, π, 3π, 5π...), "Δq&lt;t)" has a maximum value. Therefore, when the gap "T" is the π value of the input sine wave or 180 degrees, the charge in the capacitor 11706 will have the largest amount of change. On the contrary, when "T" is equal to 2π, 4π, 6π..., the least charge will be converted.

In Fig. 117C, equations 18, 19 and 20 are solved by integrating equation 13a to obtain "q(t)", and the charge versus time graph of capacitor 11706 is drawn, where the charge and the input sine wave "sin(t)" are drawn at the same On the axis. When the value of the gap "T" decreases and approaches a pulse, the phase between the charge "q(t)" and sin(t) of the capacitor "C" approaches zero. This phenomenon is shown in Figure 117D, where the largest pulse charge conversion occurs when the input voltage is the maximum. As shown in the figure, when the value of "T" decreases, very little charge is converted.

Equations 21-26 in FIG. 117E illustrate the power/charge relationship, where power is proportional to charge, and the converted charge is inversely proportional to insertion loss.

The concept of insertion loss is shown in Figure 117F. Generally speaking, the noise properties of passive components are numerically the same as the insertion loss of components. In other words, the noise property of any component cannot be less than its insertion loss. The insertion loss can be expressed by Equation 27 or 28.

From the above discussion, when the gap "T" increases, more charges are converted from the input signal to the capacitor 11706, which increases the power conversion from input to output. Since the relative amplitude modulation and phase information are kept in the transmitted power, there is no need to accurately regenerate the input voltage on the output side.

6.3.6 Optimization and adjustment of non-negligible gap width/period

6.3.6.1 Changing the input and output impedance

In the embodiment of the present invention, the energy conversion signal (ie, the control signal 6404 in FIG. 71A) is used to change the input impedance viewed from the EM signal 6404 side to change the output impedance of driving a load. An example of this embodiment uses a gate switching module 9701, and is shown in FIG. 97. The following method is not limited to the switching module 9701 that is switched off.

In FIG. 97, when the switch 9706 is closed, the impedance of the circuit is substantially the same as the impedance of the storage module, such as the impedance of the storage capacitor 9708, which is connected in parallel with the impedance of the load 9712. When switch 9706 is turned on, the impedance of point 9714 becomes infinite. Therefore, when the switch 9706 is closed, the average impedance of the point 9714 can be changed from the impedance of the storage module to the highest impedance by changing the ratio of the opening and closing time of the switch 9706. The switch 9706 is controlled by the energy conversion signal 9710. Therefore, by controlling the gap width and the false image rate of the energy conversion signal, the impedance of the point 9714 can be changed.

The method of transforming the energy conversion signal of FIG. 97A is described with reference to FIG. 95A, in which the circuit 9502 receives the input oscillating signal 9506 and outputs the pulse train of the dual output signal 9504. The circuit 9502 can be used to generate an energy conversion signal 9710. Figure 95C shows an example waveform 9504.

By the delay of the inverter 9508 conversion signal, the pulse width in the dual output signal 9504 can be changed. When the inverter 9508 increases the signal delay, the pulse width increases. When the R/C low-pass network is added to the output terminal of the inverter 9508, the signal transmitted by the inverter will be delayed. Those familiar with the related art should know other devices for inverting the signal delay of the inverter 9508.

6.3.6.2 i.e. slot control

In one embodiment, the slit width/period is adjusted instantly. For example, referring to the timing diagrams of FIGS. 110B-F, a clock signal 11014 (FIG. 110B) is used to generate an energy conversion signal 11016 (FIG. 110F), which includes a quantity conversion pulse 11018 with a conversion slot 11022. In one example, the clock signal 11014 is inverted, such as the inverted clock signal 11022 (FIG. 110D). The clock signal 11014 is also delayed, such as the delayed clock signal 11024 (FIG. 110E). The inverted signal 11022 and the delayed signal 11024 are then combined by the AND gate 11008 to generate the energy conversion signal 11016. When the delayed clock signal 11024 and the inverted clock signal 11022 are both "high", it is "high" An energy conversion signal 11018. The amount of delay applied to the delayed clock signal 11024 determines the width and duration of the variable slot. By changing the delay amount and the gap in real time, it can be adjusted in real time.

In the conversion example, the inverted clock signal 11022 is delayed with respect to the clock signal 11014, and then combined by the AND gate 11008. Alternatively, the clock signal 11014 is delayed and inverted. Finally, the AND gate 11008 combines the result with the clock signal 11014.

FIG. 110A depicts an example of a slot control system 11002, which can be used to adjust slots in real time. That is, the slot control system 11002 includes an RC circuit 11004, which includes a voltage variable capacitor 11012 and a resistor 11026. That is, the slot control system 11002 also includes an inverter 11006 and an AND gate 11008. Optionally, the AND gate 11008 includes an optional energy input 11010 to enable/disable the AND gate 11008. That is, the slot control system 11002 may include an amplifier 11028.

With reference to FIGS. 110B-F, the operation situation of the slot control system 11002 will be described. That is, the slot control system 11002 receives the clock signal 11014 and supplies the clock signal 11014 to the inverter 11006 and the RC circuit 11004. The inverter 11006 outputs the inverted clock signal 11022 and outputs it to the AND gate 11008. The RC circuit 11004 delays the clock signal 11014 and outputs the delayed clock signal 11024. The delay is mainly determined by the voltage variable capacitor 11012. Generally speaking, when the capacitance decreases, the delay also decreases.

The delayed clock signal 11024 is amplified by an optional amplifier 11028 before reaching the AND gate 11008. For example, the RC constant of the RC circuit 11004 will attenuate the signal below the zero boundary value of the AND gate 11008, so it is best to amplify it.

The AND gate 11008 combines the delayed clock signal 11024, the inverted clock signal 11022, and the optional enable signal 11010 to generate the energy conversion signal 11016. By changing the voltage variable capacitor 11012, the gap 11020 can be adjusted in real time.

In one embodiment, 1 slot 11020 is controlled to achieve optimal power conversion. For example, in one embodiment, the slit 11020 is controlled for maximum energy conversion. Alternatively, the slot 11020 is controlled to change the gain (such as automatic gain control AGC). In this embodiment, reducing the gap 11020 can reduce the power conversion.

It can be seen from the disclosed content that there are a variety of slot circuits that can be improved, such as the circuits shown in FIGS. 29A-D. The improvement and selection of the slot can be carried out at the design level to maintain a fixed value in the circuit, or in alternative embodiments, it can be dynamically adjusted to compensate for the address and different design goals, such as receiving in different operations RF signal at frequencies to enhance performance, such as 900NZHz and 1.8GHz.

6.3.7 Join the bypass network

In an embodiment of the present invention, a bypass network is added to improve the performance of the energy conversion module. This bypass network can be regarded as a comprehensive gap widening mechanism. The requirement of the components of the bypass network is to make the switch module have a lower impedance when opening and closing. (That is, it is greater than the frequency of the received EM signal), and serves as a transition between the high impedance and the input EM signal.

Due to the shaping effect of this network (which can be simply formed by a capacitor or a resonant inductor-capacitor connected in series), the time for the input signal to be connected to the opposite side of the switch module is prolonged. A typical embodiment is that the series resonance frequency of the network is greater than the input frequency. This shaping effect improves the conversion effect of the input signal, and if only the gap of the energy conversion signal is used, the optimized frequency of the energy conversion signal is lower.

For example, referring to FIG. 107, the bypass network 10702 (10712 in this example) passes by the switch module 10704. In this embodiment, when a width lower than the optimal slot width is selected as the input frequency of the energy conversion signal, the bypass network module 10702 increases the performance of the energy conversion module. The bypass network 10702 may have a configuration different from that of FIG. 107. This transformation is shown in Figure 103. Similarly, FIG. 108 depicts another example of the bypass network module 10802, which includes a capacitor 10804.

The following will discuss the effect of the smallest gap and the advantages of the bypass network. First, in Figure 111, the initial circuit has a 550ps gap, and the peak-to-one peak output (Vpp) for a 50-ohm load is 2.8mVpp, as shown in Figure 115A. In Figure 112, changing the gap to 270ps will reduce the peak-to-one peak output (Vpp) of the 50-ohm load to 2.5Vpp. To compensate for this loss, a bypass network can be added. Figure 113 provides a specific implementation. As a result of adding the bypass network, 3.2Vpp can be applied to a 50 ohm load, as shown in Figure 116A. In Figure 113, the circuit with a bypass network adjusts the three values of the surrounding circuit to compensate for the impedance change caused by the bypass network and narrowing the gap. Figure 114 adds these changes to the circuit, but when there is no bypass network, it still does not bring about the effect of Figure 113 with a bypass network. Figure 116B shows the result of using the circuit of Figure 114, where only 1.88Vpp can be applied to a 50 ohm load.

6.3.8 Use feedback to improve energy conversion signal

FIG. 93 shows an embodiment of the system 9301, which uses the down-conversion signal 9307 as feedback to control different features of the energy conversion module to improve the down-conversion signal 9307.

Generally speaking, the amplitude of the down conversion signal 9307 is a function of the frequency, the phase difference between the EM signal 9303 and the energy conversion signal 9309. This can be achieved using the logic in Figure 98A. The circuit of FIG. 98A may include an optional energy conversion module 9302. Based on the content here, those familiar with related technologies will understand the implementation of other transformations. In this embodiment, a state machine is taken as an example.

In the example of FIG. 98A, the state machine 9804 reads the analog-to-digital converter, A/D 9802, and controls the digital-to-analog converter DAC 9806. In one embodiment, the state machine 9804 includes two memory positions, the previous position and the current position, to store and recall the result of reading the A/D 9802. In one embodiment, the state machine 9804 uses at least one memory flag.

DAC 9806 controls one input of the voltage controlled oscillator, VCO 9808. The VCO 9808 controls the frequency input of the pulse wave generator 9810, which in one embodiment is the same as the pulse wave generator in FIG. 92C. The pulse generator 9810 generates an energy conversion signal 9309.

In one embodiment, the state machine 9804 operates according to the flowchart of the state machine 9819 of FIG. 98B. The result of this operation is to improve the frequency and phase relationship between the energy conversion signal and the EM signal 9303, so as to maintain the amplitude of the down conversion signal 9307 at an optimal value.

The amplitude of the down conversion signal 9307 can vary with the amplitude of the energy conversion signal 9309. In one embodiment, the switch module 9111 is a FET, as shown in FIG. 91A, in which the gate 9104 receives the energy conversion signal 9113. The amplitude of the energy conversion signal 9113 can determine the "on" resistance of the FET, which affects the down conversion signal 9115 amplitude. As shown in FIG. 98C, the optional energy conversion module 9302 may be an analog circuit, which enables the function of automatic gain control. Based on the content here, those who are familiar with related technologies should understand the implementation of the transformation. The implementation of these changes falls within the spirit and scope of the present invention.

6.3.9 Other implementations

The above implementation is for illustrative purposes. These implementations do not limit the invention. Based on the content here, those who are familiar with related technologies should understand the slightly different implementation of the transformation. The implementation of these changes falls within the spirit and scope of the present invention.

6.3.10 Example of energy conversion down converter

The following implementation is for illustrative purposes. The present invention is not limited to these implementations.

The simplified diagram in Figure 99 shows the circuit diagram of down conversion from 915MHz to 5MHz using a 101.1MHz clock.

Figure 100 shows the analog waveforms of the circuit of Figure 99. The waveform 9902 is input into the circuit and shows the distortion caused by closing the switch. The waveform 9904 is output in the storage unit in an unfiltered form. The waveform 9906 is the impedance matching output of the down converter on different time units.

Figure 101 shows the circuit diagram of the down conversion from 915MHz to 5MHz using the 101MHz clock. This circuit has an additional tank circuit to improve the conversion efficiency.

Figure 102 shows the simulated waveforms of the circuit of Figure 101. Waveform 10102 is input into the circuit and shows the distortion caused by closing the switch. The waveform 10104 is output in the storage unit in an unfiltered form. The waveform 10106 is the output of the down converter after the impedance matching circuit.

The simplified diagram in Fig. 103 shows the circuit diagram of the down conversion from 9.15MHz to 5MHz using the 101.5MHz clock. This circuit has a switch bypass circuit to improve conversion efficiency.

Figure 104 shows the simulated waveforms of the circuit of Figure 103. Waveform 10302 is input into the circuit and shows the distortion caused by closing the switch. The waveform 10304 is output in the storage unit in an unfiltered form. The waveform 10306 is the output of the down converter after the impedance matching circuit.

Fig. 105 is a simplified diagram of the circuit of Fig. 99, which is connected to the FSK source of 913 and 917 MHz under 500K packet rate.

7 Design the transmitter according to the embodiment of the present invention

This section provides a high-level description of the procedure for designing a conveyor design according to the present invention. The techniques described here can also be applied to the design of frequency up converters for any application. The description here is for illustrative purposes, not for limitation. Based on the content here, those familiar with related technologies will understand these transformations (including equivalence, expansion, transformation and derivation, etc.). These changes fall within the spirit and scope of the present invention, and the present invention can include these changes.

The discussion here describes a procedure for designing a transmitter according to an embodiment of the present invention. It operates in the FM embodiment and is shown in FIG. 57A as an example of the transmitter of the present invention. Similarly, FIG. 57B depicts the transmitter of the present invention operating in the PM embodiment, and FIG. 57C depicts the transmitter of the present invention operating in the AM embodiment. These circuits have been shown in the previous figure and are presented here for discussion. The "I/Q" embodiment of the present invention is a sub-combination of the PM embodiment. Since its design is quite similar to the PM embodiment, it will not be illustrated by separate figures.

Depending on the application and implementation, some design considerations cannot be implemented. For example, and without limitation, in some cases, it is not necessary to optimize the pulse width or include an amplifier.

7.1 Frequency of transmission signal

The first step in the design process is to determine the frequency of the desired signal 5714. It is generally determined by the application using the transmitter. The transmitter proposed by the present invention can be used in all electromagnetic spectrum (EM). The example here will be for transmitters in the 900MHz to 950MHz range. Those familiar with related technologies should recognize that the analysis here will be used in any frequency and any range.

7.2 Characteristics of transmission signal

Once the frequency of the transmitted signal 5714 is known, the characteristics of the signal can be determined. These characteristics include, but are not limited to, whether the transmitter operates at a fixed frequency or in a frequency range, and if it operates in a frequency range, it does not limit whether these frequencies are continuous frequencies or for some discrete "channels." If the frequency is a discrete channel, the channel spacing must be determined. For example, a wireless phone operating in this frequency range can operate on discrete channels separated by 50 KHz. That is, if the wireless phone operates in the range of 905MHz to 915MHz, the channels will be 905.000, 905.050, 905.100,..., 914.900, 914.950, and 9145.000.

7.3 Modulation planning

Another characteristic that must be confirmed is the desired modulation plan used. As described in section 2.1-2.2.4, these tone changes include FM, PM, AM, etc., and any combination and subgroups, such as the subgroup "I/Q" of PM. When determining the desired frequency of the transmitted signal 5714, the modulation plan can be determined.

7.4 Characteristics of information signals

The characteristics of the information signal 5702 are also a factor in the design of the transmitter circuit. In particular, the frequency of the information signal 5702 determines the minimum frequency of the oscillation signals 5704, 5738, and 5744 (FM, PM and AM modes respectively).

7.5 Characteristics of Oscillating Signal

The expected frequencies of the oscillation signals 5704, 5738, and 5744 are also a function of the frequency and characteristics of the expected transmission signal 5714. In addition, the frequency and characteristics of the desired transmission signal 5714 are a factor that determines the pulse width of the pulse train 5706. The frequencies of the oscillation signals 5704, 5738, and 5744 are substantially the same as the frequency of the pulse train 5706. (An exception is when the pulse shaping circuit 5722 increases the frequency of the oscillation signals 5704, 5738, and 5744, similar to those described in section 4.3.2). It should also be noted that the frequency and pulse width of the pulse train 5706 are substantially the same as the frequency and pulse width of the multi-harmonic signal 5708.

7.5.1 Frequency of the oscillating signal

The frequency of the oscillation signals 5704, 5738, and 5744 must be the subharmonic frequency of the desired transmission signal 5714. The subharmonic frequency is the quotient part obtained by dividing the fundamental frequency by a number. In this example, the frequency of the desired transmission signal 5714 is divided by an integer. When describing the frequency of a specific signal, it is usually referred to a specific value. Those familiar with the related technology should know that this reference refers to the general intermediate frequency of the signal, and the actual frequency can be changed above and below the general intermediate frequency according to the desired modulation technology used by the circuit. As an example described here, if the desired transmission signal frequency is 910MHz and used in FM mode, for example, the frequency range of modulation is 40KHz, the actual signal frequency will vary by ±20KHz depending on the transmitted signal. That is, it is expected that the frequency of the transmitted signal will fall between 909.980MHz and 910.020MHz.

The first ten harmonics of the 910.000MHz signal are:

<u>harmonic</u><u>frequency</u>

First 910.000MHZ

Second 455.000

Third 303.333...

Fourth 227.500

Fifth 182.000

Sixth 151.666...

7th 130.000

Eighth 113.750

The ninth 101.111...

Tenth 91.000

The oscillating signals 5704, 5738, and 5744 can be located at any of these frequencies, and can be located at lower subharmonic frequencies if desired. For the discussion here, the ninth harmonic will be selected. Those who are familiar with related technologies should know that the application here is independent of the selected harmonic frequency. Therefore, the general intermediate frequency of the oscillation signals 5704, 5738, and 5744 will be 101, 111 MHz. In the FM mode, it is expected that the frequency of the transmission signal 5714 is 910.000±0.020MHz, and the frequency of the oscillation signal 5704 will vary within ±0.00222MHz. (That is, from 101.10889MHz to 101.11333MHz). The frequency and frequency sensitivity of the oscillation signal 5704 will drive the choice or design of the oscillation control generator (VCO) 5720.

Another frequency consideration is the overall frequency range of the desired transmission signal. That is, if the transmitter is used in the above wireless phone example and transmits on all channels between 905MHz and 915MHz, VCO 5720 (FM mode) or wood ground oscillator (LO) 5734 (PM and AM mode) will be required to generate The oscillation frequency of 100,5556MHz to 101.6667MHz (that is, the ninth harmonic frequency of 910±5MHz). In some applications, such as cellular phones, the frequency will vary according to the communication protocol of the entire cell system (eg, from one cell to another adjacent cell). In another application, such as police radio, the frequency will change according to the user's channel switching.

In some applications, different modes of the same transmitter will be transmitted at different frequencies, but each frequency will only transmit a single frequency. Examples of this application may include remote controlled toy vehicles, where each remote controlled vehicle operates at its frequency. In order to separate the remote controlled vehicles used in the same area, these remote controlled toy vehicles may operate at multiple frequencies. Therefore, the design of VCO 5720 or LO 5734 can be adjusted under a set of frequencies, but users usually cannot adjust the frequency.

Those familiar with related technologies should know that when selecting and designing an oscillator (CO 5720 or LO 5734), a variety of criteria can be considered, including the general intermediate frequency of the desired transmission signal 5714, the desired frequency sensitivity caused by the modulation plan, and the desired transmission All frequency ranges of signal 5714, and adjustment requirements for each specific application. Another important criterion is to determine the subharmonic frequency to be used, but different from the standards listed above, this standard is based on the desired application, and there is a lot of flexibility in the selection of subharmonic frequencies.

7.5.2 Pai Kuan of Pai Bo Liu

Once the frequencies of the oscillation signals 5704, 5738, and 5744 are selected, the pulse width of the pulse stream 5706 must be determined. In the above example, the ninth harmonic is selected as the frequency of the oscillation signals 5704, 5738, and 5744. In other words, the frequency of the desired transmission signal will be the ninth harmonic frequency of the oscillation signals 5704, 5738, and 5744. One way to select the pulse width is to focus on the frequencies of the oscillation signals 5704, 5738, and 5744, and select the pulse width, while observing its operation in the circuit. When the multi-harmonic signal 5708 has a uniform amplitude and the pulse width to period ratio is 0.1, the amplitude of the ninth harmonic will be 0.027.9. Referring again to Table 6000 and Figure 58, the amplitude of the ninth harmonic is higher than the amplitude of the tenth harmonic, but less than half of the amplitude of the eighth harmonic. Since the ninth harmonic has a certain amplitude, this pulse width to period ratio can be used for proper filtering operations. Generally speaking, different ratios can be selected to find the ratio that provides higher amplitude.

Refer to Section 4.1, Section 1, and it can be seen that the relative amplitude of any harmonic is a function of the number of harmonics and the relative period ratio of the fundamental frequency pulse. Using the transformation calculation of the formula, for any harmonic, the pulse width to period ratio that can produce higher amplitude is calculated as follows:

Self-form 1, where A_nIs the amplitude of the nth harmonic,

A_n=[A_puise][(2/π)/n]sin[n. π. (τ/T)) Equation 2

If the amplitude of the pulse wave A_puiseSet as the unit amplitude (such as 1), the formula becomes

A_n=[(2/π)/n]sin[n. π. (τ/T)) Equation 3

It can be seen from this formula that for any value of n, the amplitude of the harmonic A_nIt is a function of the pulse-to-period ratio τ/T. In order to determine the maximum A for a given value of n_nValue, as A_nThe first derivative of τ/T. As follows

δ(A_n)/δ(τ/T)=δ{[2/(n.π)]sin[n. π. (τ/T)))/δ(τ/T) Equation 4

=[2/(n.π)]δ[sin[n. π. (τ/T)))/δ(τ/T) Equation 5

=[2/(n.π)]cos[n. π. (τ/T)) Equation 6

By different calculations, when all of them are differentiated to 0, the variable value that reaches the maximum value can be determined.

δ(A_n)/δ(τ/T)=0 Equation 7

[2/(n.π)]cos[n. π. (τ/T))=0 Equation 8

cos[n. π. (τ/T))=0 Equation 9

From the calculation of trigonometric functions,

n. π. (τ/T)=π/2 (or 3π/2, 5π/2, etc.) Equation 10

τ/T=(π/2)/(n.π) Equation 11

τ/T=1/(2.n) (or 3/(2.n), 5/(2.n) etc.) Equation 12

Those familiar with related technologies will understand the above differential. From Equation 12, if the pulse wave to period ratio is equal to 1/(2.n), the amplitude of the harmonic will be optimized. In the case of the ninth harmonic, Equation 12 produces a pulse width to period ratio of 1/(2.n) or 0.0556. For the amplitude of this ninth harmonic, the table 6100 of Fig. 61 shows that it is 0.0796. This is an improvement of the aforementioned 0.1 pulse width to cycle ratio. Table 6100 also shows that the ninth harmonic of the pulse width to period ratio has the maximum amplitude of any ninth harmonic, which supports the result of the above-mentioned differentiation. The frequency spectrum of the pulse width to period ratio of 0.0556 is shown in Fig. 59. (Other pulse width to period ratios, such as 3/(2.n), 5/(2.n), etc., will have an amplitude less than or equal to this amplitude).

This is the method to determine the desired pulse width to period ratio. Those who are familiar with related technologies should know that other technologies can also be used to select the pulse width to period ratio.

7.6 Design of Pibo Forming Circuit

Once the desired frequency and pulse width of the oscillation signals 5704, 5738, and 5744 are determined, the pulse shaping circuit 5722 can be designed. Referring to Section 4-4.3.4, the pulse shaping circuit 5722 can not only generate a pulse with a desired pulse width, but also make the frequency of the pulse train 5706 higher than the frequency of the oscillation signals 5704, 5738, and 5744. The pulse width to period ratio applies to the pulse width to period ratio of the multi-harmonic signal 5708, not the pulse width to period ratio of the oscillation signal 5704, 5738, 5744, and the pulse width to period ratio of the multi-harmonic signal 5708 Mirror the frequency and pulse width of the pulse train 5706. Therefore, if VCO 5720 or LO 5734 is selected, an oscillator with a frequency lower than the selected harmonic can be selected, then the pulse shaping circuit 5722 can be used to increase the frequency. Returning to the previous example, if the pulse shaping circuit 5722 is designed for pulse shaping instead of frequency doubling, as discussed in section 4.2.2-4.2.2.2 (shown in Figure 40A-40D), the oscillation signal 5704, The frequency of 5738, 5744 can be 50.556MHz instead of 101.111MHz. When dealing with specific examples of square wave input, those familiar with related technologies should understand that similar techniques can be applied to non-rectangular wave examples (such as sine waves). Using a pulse shaping circuit to double the frequency can have advantages in designing and selecting a lower frequency oscillator (LO 5734 or VCO 5720).

It should be understood that the pulse shaping circuit 5722 is optional. If the LO 5734 or the VCO 5720 is selected so that the oscillation signals 5704, 5738, and 5744 are substantially rectangular waves, and the rectangular waves have an appropriate pulse width to period ratio, the need for the pulse wave shaping circuit 5722 can be eliminated.

7.7 Switch selection

The selection of switch 5724 is discussed below. The switches in Figures 57A, 57B and 57C are GaAs EFT. However, it can be a switching device of any technology, which can be opened and closed sufficiently to adapt to the frequency and pulse width of the pulse train 5706.

7.7.1 Optimization of switch structure

<u>Different size switches</u>

In one embodiment, the switch module discussed here may be a group of switches operated in parallel, and become a signal switch. The switch group can be a transistor, such as a field effect transistor (EFT), a bipolar transistor, or any suitable circuit switching device. The switch group may include one type of switch or a combination of different switches.

For example, Figure 73 shows a switch module 7300. In Figure 73, the switch module is shown as a set of FETs 7302a-n. FETs 7302a-n can be any type of switch, but not limited to MOSFET, JFET, GaAs FET, etc. Each switching FET 7302a-n includes a gate 7304a-n, a source 7306a-n, and a drain 7308a-n. A set of FETs 7302a-n operate in parallel. The gates 7304a-n are coupled to each other. Each gate 7304a-n receives control signals 2804, 3104 to control the switching between the source 7306a-n and the drain 7308a-n. Generally speaking, the corresponding source 7306a-n and drain 7308a-n of each FETs 7302a-n are interchangeable. There is no limit to the number of EFTs. Any restriction can be based on special applications, and the meaning of "an" does not have any restrictive meaning.

In one embodiment, FETs 7302a-n have similar characteristics. In another embodiment, one or more FETs 7302a-n have different characteristics from other FETs. For example, FETs 7302a-n can have different sizes. In CMOS, generally speaking, when the size of the switch is larger (referring to the larger area under the gate), the longer the switch is turned on. The longer turn-on time is partly due to the higher gate-to-channel capacitance, which is found in large switches. The smaller CMOS switch has a short turn-on time, but has a higher channel resistance. Compared to smaller CMOS switches, larger CMOS switches have lower channel resistance. The different channel characteristics of different switch sizes provide flexibility in the design of all switch modules. With the combination of small switches and large switches, the channel conductivity of all switch structures can be customized to meet the given requirements.

In one embodiment, the FETs 7302a-n are CMOS switches with different sizes. For example, the size of FETs 7302a may be smaller than the size of FETs 7302b-n. The size of the FETs 7302a can be larger than the size of the FETs 7302a and smaller than the size of the FETs 7302c. The size of FETs 7302c-n can also be different from each other. For example, gradually increasing switch sizes can be used. By changing the relative size of FETs 7302a-n, the turn-on characteristic curve of the switch module can be changed relatively. For example, the turn-on characteristic curve of the switch module can be adjusted to be closer to an ideal switch. Alternatively, the switch module can be adjusted to generate a conductive curve of a specific shape.

By planning FETs 7302a-n to make one or more of them smaller, its fast turn-on characteristic will improve the turn-on characteristic curve of the switch module comprehensively. Since a smaller switch has a lower gate channel capacitance, it can turn on more quickly with a larger switch.

By planning FETs 7302a-n to make one or more of them larger, its lower channel resistance can also improve the turn-on characteristics of the switch module overall. Since a larger switch has a lower channel capacitance, even in combination with a smaller switch, it can make the overall switch structure have a lower channel electrical group. This improved switch has the ability to drive a wide range of loads. Accordingly, adjusting the ability of the switch relative to other switches can make the overall switch operation close to the ideal mode, or meet the characteristic requirements of the application, or balance the trade-offs between different specific goals, and the content here will make you familiar with the relevant The technologist understands this part of the technology.

It should be noted that the switch module, a set of switch FETs 7302a-n in Fig. 73, is for illustrative purposes only. Any device with switching capability can be used to implement this switch module. And those who are familiar with related technologies can understand it based on the content here.

<u>Reduce the entire switch area</u>

The performance of the circuit can also be improved by reducing the entire switching area. As mentioned above, a smaller switch (that is, between the source and drain regions and the area under the gate is smaller) has a lower gate-to-channel capacitance. The lower gate-to-channel capacitance allows the circuit to be less sensitive to noise surges. FIG. 74A illustrates an embodiment of a switch module, which has a large switch area. The switch module of Figure 74A includes twenty FETs 7402-7440. As shown in the figure, FETs 7402-7440 have the same size (the "Wd" and "lng" parameters are the same). The input source 7446 generates the input EM input signal. The pulse wave generating circuit 7448 generates the energy conversion signal of FETs 7402-7440. Capacitor C1 is a storage element for the input signal sampled by FETs 7402-7440. Figure 74C shows an energy conversion signal with an artifact rate of 20MHz. The energy conversion signal includes an energy conversion pulse train, which has indispensable gaps. The energy conversion pulse wave repeats at a false image rate. Figure 74D depicts the affected EM received signal, which shows the effect of energy conversion at the false image rate at point 7442 in Figure 74A. FIG. 74E depicts the down-conversion signal at point 7444 of FIG. 74A, which is generated by the down-conversion procedure.

Figure 74F illustrates the spectrum of the received 1.01MHz EM signal. Figure 74G illustrates the frequency spectrum of the received energy conversion signal. Figure 74H illustrates the frequency spectrum of the received EM signal at point 7442 of Figure 74A. Figure 741 illustrates the frequency spectrum of the down-converted signal at point 7444 of Figure 74A.

Figures 74J-74M further illustrate the received 1.01GHz EM signal, the received energy conversion signal, and the frequency spectrum of the affected received EM signal at point 7444 in Figure 74A, and are for the narrow bandwidth range centered at 1.00GHz . As shown in Figure 74L, at point 7442 in Figure 74A, the affected received EM signal has a noise spike at a frequency of 1.0 GHz. This noise surge can be emitted by the circuit and cause interference to nearby receivers at 1.0GHz.

Figures 74N-74Q respectively illustrate the received 1.01GHz EM signal, the received energy conversion signal, the frequency spectrum of the affected received EM signal at point 7442 of Figure 74A, and the frequency spectrum of the down-converted signal at point 7444 of Figure 74A , And is aimed at the narrow bandwidth range with the center close to 10.0MHz. In particular, the signal near 5mV in Figure 74Q is down-converted at 10MHz.

FIG. 75A depicts an alternative embodiment of the switch module, which has fourteen FETs 7502-7528 instead of the twenty FETs 7402-7440 shown in FIG. 74A. In addition, FETs have different sizes. (Some "Wd" and "lng" parameters are different among FETs).

Figs. 75B-75Q are waveform examples related to the switch module of Fig. 75A, corresponding to similar design waveforms in Figs. 74B-74Q. As shown in Fig. 75L, the lower-level noise spikes exist at 1.0 GHz instead of the frequency of Fig. 74L. This is related to lower circuit radiation. In addition, as shown in Figure 75Q, a lower noise spike level is achieved at 1.0 GHz without loss of conversion efficiency. This is represented by the nearly 5mV signal that is down-converted at MHz in Figure 75Q. By reducing the number of switches (reducing the area of the overall switch), and reducing the area of the one-to-one switching bias of the switch, the parasitic capacitance of the circuit can be reduced. In particular, this can reduce the overall gate-to-channel capacitance, form noise surges with lower amplitude, and reduce undesired circuit radiation.

It should be understood that the switches shown in Figures 74A-74Q and 75A-75Q are for illustrative purposes only. Any device with switching capability can be used in the switch module, and those familiar with related technologies should understand it from the content here.

<u>Eliminate the charge injection</u>

The switch module discussed in the embodiment includes a set of switches connected in parallel. In some cases, it can reduce the effect of charge injection. It is generally desirable to reduce the charge injection to reduce undesired circuit radiation. In one embodiment, the undesirable charge injection effect can be reduced by using n-channel MOSFETs and p-channel MOSFETs. Both n-channel MOSFETs and p-channel MOSFETs have charge injection problems. However, since a signal of polarity is applied to its respective gate to open and close the switch, the generated charge also has the opposite polarity. Therefore, n-channel MOSFETs and p-channel MOSFETs can become a pair to eliminate charge injection. Therefore, in one embodiment, the switch module may include n-channel MOSFETs and p-channel MOSFETs, each of which is designed to minimize the undesired charge injection effect.

Fig. 77A shows an alternative embodiment of the switch module. In this example, there are fourteen n-channel FETs 7702-7728 and twelve p-channel FETs 7730-7752 instead of the twelve FETs 7402- as shown in Fig. 74A. 7440. The n-channel MOSFETs and p-channel MOSFETs are configured in complementary forms. In addition, FETs have different sizes. (Some "Wd" and "lng" parameters are different among FETs).

Figs. 77B-77Q are waveform examples related to the switch module of Fig. 77A, corresponding to similar design waveforms in Figs. 74B-74Q. As shown in Fig. 77L, the lower-level noise spikes exist at 1.0 GHz instead of the frequency of Fig. 74L. This is related to lower circuit radiation. In addition, as shown in Figure 77Q, a lower noise surge level is achieved at 1.0G.Hz without loss of conversion efficiency. This is represented by the nearly 5mV signal that is down-converted at 10MHz in Figure 75Q. This voltage is substantially the same as the down-conversion level of the circuit of FIG. 74A. By arranging the switches in the form of compensation planning, it can help to reduce the charge injection, and by adjusting the switching area of the one-to-one switch bias of the switch, the impact of the charge injection can be reduced. In particular, it can form noise surges with lower amplitude and reduce undesired circuit radiation.

It should be understood that the FETs shown in Figures 77A-77Q above are for illustrative purposes only. Any device with switching capability can be used in the switch module, and those familiar with related technologies should understand it from the content here.

<u>Overlap capacitance</u>

The manufacturing process of semiconductor circuits, such as MOSFETs, has some limitations. In some cases, these process limitations make the circuit unable to achieve the desired function. For example, the production of unsatisfactory MOSFETs will have the problem of parasitic capacitance, and in some cases, the surrounding circuits will emit radiation. The closer to the ideal circuit is made, the less the problem of undesirable circuit operation.

FIG. 76A depicts an n-channel enhancement mode MOSFET 7600, which has an ideal n+ region. The MOSFET 7600 includes a gate 7602, a channel region 7604, a source contact 7606, a source region 7608, a drain contact 7610, a drain region 7612, and an insulating region 7614. The source region 7608 and the drain region 7612 are separated by the p-type material of the channel region 7604. The source region 7608 and the drain region 7612 are made of n+ material. The n+ material is generally implanted into the p-type material in the channel region 7604 by ion implantation or diffusion process. The insulator 7614 insulates the gate 7602 that bridges the p-type material. The insulator 7614 generally includes a metal-oxide insulator. The channel currents of the source region 7608 and the drain region 7612 of the MOSFET 7600 are controlled by the voltage of the gate 7602.

The operation of the MOSFET 7600 is discussed below. When a positive charge is applied to the gate 7602, the electrons in the p-type material in the channel region 7604 are attracted to the lower part of the insulator 7614 to form a connection between the source and the drain near the surface, a so-called channel. The greater the voltage between the gate contact 7606 and the source region 7608 (positive direction), the smaller the resistance across the region.

In FIG. 76A, the source region 7608 and the drain region 7612 have an n+ region, which is formed by an ion implantation process to form an ideal rectangular region. FIG. 76B depicts the crossover region of an n-channel enhancement mode MOSFET 7616 with non-ideal n+ regions. The source region 7608 and the drain region 7612 are irregular regions formed by the ion implantation process. Due to the uncertainty of the ion implantation/diffusion process, in special applications, the source region 7608 and the drain region 7612 are irregularly rectangular, as shown in FIG. 76A. FIG. 76B shows an example of the source region 608 and the drain region 7612 forming irregular regions. Due to the uncertainties of these manufacturing processes, the uncertainties of the source region 7608 and the drain region 7612 can further spread to the P-type region of the channel region 7618 and extend below the gate 7602. The extension of the source region 7608 and the drain region 7612 forms a source overlap 7624 and a drain overlap 7626. The source overlap 7624 and drain overlap 7626 are further described in FIG. 76C. FIG. 76C depicts the top-level configuration of MOSFET 7616. The source overlap 7624 and the drain overlap 7626 form an undesirable parasitic capacitance between the source region 7620 and the gate region 7602. These undesirable parasitic capacitances can interfere with the function of the circuit. For example, parasitic capacitances can generate noise spikes caused by circuit radiation, which can cause undesired electromagnetic interference.

As shown in FIG. 76C, the MOSFET 7616 may include a gate pad 7628. The gate 7602 may include a gate extension 7630 and a gate pad extension 7632. The gate extension part 7630 is an unused part of the gate electrode, and is required due to the limitation of the tolerance of the metal implantation process. The gate pad extension 7632 is a part of the gate 7602 for coupling the gate 7602 and the gate pad 7628. The contact requirement of the gate pad 7628 requires that the extended portion of the gate pad has a non-zero length to separate the contact from the area between the source region 7620 and the drain region 622. This prevents short circuits between the gate 7602, the source region 7620 and the drain region 7622 (the insulator 7614 in this region is very thin). Undesirable parasitic capacitance is formed between the gate extension 7630 and the substrate (FET 7616 is manufactured on the substrate), and between the gate pad extension 7632 and the substrate. Accordingly, this embodiment can deal with the uncertainty of the ion implantation/diffusion process. Those familiar with related technologies should understand how to reduce the gate extension 7630 and the gate pad extension 7632 in order to reduce the parasitic capacitance.

It should be understood that the description of the n-channel enhancement mode MOSFET is for example only. The present invention can be applied to depletion mode MOSFETs and other types of transistors.

7.7.2 Phase D2D-divider in CMOS

FIG. 72A depicts an embodiment of a dividing circuit 7200 implemented in CMOS. This implementation is for example, not limitation. In one embodiment, the divider 7200 is used to divide the local oscillator (LO) signal into two oscillation signals with a phase difference of 90 degrees. The first oscillation signal is called the I channel oscillation signal. The second oscillation signal is called the Q channel oscillation signal. The Q channel oscillation signal delays the I channel oscillation signal by nearly 90 degrees. The divider circuit 200 includes a first I-channel inverter 7202, a second I-channel inverter 7204, a third I-channel inverter 7206, a first Q-channel inverter 7208, and a second Q-channel inverter 7210. I channel flip-flop 7212 and Q channel flip-flop 7214.

The example waveforms in FIGS. 72F-J are used to describe the signals related to the divider 7200. The waveforms in Figures 72F-J reflect the ideal delay through the elements of the divider 7200. The LO signal 7216 is shown in Figure 72F. The first, second, and third I-channel inverters 7202, 7204, and 7206 invert the LO signal 7216 three times and output the inverted LO signal 7218, as shown in FIG. 72G. The first and second Q-channel inverters 7208 and 7210 invert the LO signal 7216 twice, and output a non-inverted LO signal 7220, as shown in FIG. 72H. The delays generated by the first, second, and third I-channel inverters 7202, 7204, and 7206 are substantially the same as the delays generated by the first and second Q-channel inverters 7208, 7210, so that the inverted The LO signal 7218 and the non-inverting LO signal 7220 have a phase difference of nearly 180 degrees. The operating characteristics of the inverter can be adjusted to achieve an appropriate amount of delay, which is known to those familiar with the technology.

I channel flip-flop 7212 outputs the inverted LO signal 7218. The Q channel flip-flop 7214 outputs a non-inverted LO signal 220. In the current embodiment, the I-channel flip-flop 7212 and the Q-channel flip-flop 7214 are edge-triggered. Therefore, the output frequency of the I-channel flip-flop 7212 and the Q-channel flip-flop 7214 is half the frequency of the input signal. In addition, those familiar with the related art should know that since the input to the I-channel flip-flop 7212 and the Q-channel flip-flop 7214 has a phase difference of nearly 180 degrees, the output result will have a phase difference of 90 degrees. I channel flip-flop 7212 and Q channel flip-flop 7214 are shown in Figure 72I. The Q channel oscillation signal 7224 delays the I channel oscillation signal 7222 by nearly 90 degrees. Figures 72I and 72J show the comparison of the two old ones.

Figure 28B depicts a more detailed embodiment of the divider circuit of Figure 72. The circuit block in FIG. 72B and the circuit block in FIG. 72A are similar, and are represented by the same reference numerals. Figures 72C-D show examples of waveforms related to the divider circuit 7200 of Figure 72B. Figure 72C shows the I channel oscillation signal 7222. Figure 72D shows the Q channel oscillator signal 7224. It can be seen from the comparison between FIG. 72C and FIG. 72D that the Q channel oscillation signal 7224 delays the I channel oscillation signal 7222 by nearly 90 degrees.

It should be understood that the divider circuit 7200 of FIGS. 72A and 72B is for illustrative purposes only. The divider circuit 7200 may include different types of logic and semiconductor devices. Those familiar with related technologies should understand this fact from the content here.

7.8 Filter design

The design of the filter 5726 is determined by the desired frequency and frequency range of the transmitted signal 5714. As discussed in section 3.3.9-3.3.9.2, "Q" is used to describe the bandwidth ratio of the filter's output center frequency to the point of "3dB drop". When designing a filter, the subharmonic frequency used is one of the factors. That is, if the frequency of the desired transmission signal is 910 MHz, but the desired sub-harmonic frequency is the fifth harmonic frequency, the frequency of the fifth harmonic frequency will be 18.2000 MHz. This means that the frequency seen by the filter will be 1.8.200MHz. Therefore, the "Q" value must be high enough so that the information of adjacent frequencies can pass. Another consideration for the "Q" of the filter is that it must be tight enough to not allow the entire range of the desired frequency to be used.

7.9 Selection of Amplifier

If the signal is not large enough to be transmitted or needs some downstream applications, the amplifier module 5728 will be needed. This happens when the amplitude of the resonance signal is too small. This situation also occurs when the filter 5726 has attenuated the signal.

7.10 Design of transmission module

The transmitter module 5730 can ensure that the output of the filter 5726 and the amplifier module 5728 can be transmitted. When the transmitter is used to broadcast EM signals, the transmission module matches the impedance of the input signal of the amplifier module 5728 and the antenna 5732. This technology is known to those who are familiar with related technologies. If the signal is transmitted on a point-to-point line, such as a telephone line (or fiber optic cable), the transmission module 5730 can be a line driver (or an electronic one-to-one optical converter in fiber optic applications).

<p>100 FM circuit</p><p>102 Information signal</p><p>104 Amplifier</p><p>106 Voltage controlled oscillator</p><p>108 FM signal</p><p>110 Frequency multiplier</p><p>112 antenna</p><p>114 filter</p><p>116 Amplifier</p><p>202 Oscillation signal</p><p>300 Phase modulation circuit</p><p>302 Information signal</p><p>304 Amplifier</p><p>306 Phase modulator</p><p>308 Oscillation signal</p><p>310 Local oscillator</p><p>312 Phase modulation signal</p><p>314 Frequency multiplier</p><p>316 antenna</p><p>318 filter</p><p>320 Amplifier</p><p>500 AM circuit</p><p>502 Information signal</p><p>504 Amplifier</p><p>506 Local oscillator</p><p>510 Frequency multiplier</p><p>512 AM signal</p><p>514 Frequency multiplier</p><p>516 antenna</p><p>518 filter</p><p>520 Amplifier</p><p>702 Information signal</p><p>704 Information signal</p><p>706 Local oscillator</p><p>710 Oscillation signal</p><p>712 90° phase shift oscillation signal</p><p>714 and 716 amplifier</p><p>718 and 720 phase modulator</p><p>722 Phase modulation "I" signal</p><p>724 Phase modulation "Q" signal</p><p>726 Adder</p><p>728 Phase modulation I/Q signal</p><p>730 Frequency multiplier</p><p>732 antenna</p><p>734 filter</p><p>736 filter</p><p>738 Amplifier</p><p>1000 Teleporter</p><p>1002 Information signal</p><p>1004 Receive module</p><p>1006 Harmonic generation and expansion module</p><p>1008 Transmission module</p><p>1010 Modulated signal</p><p>1012 Electromagnetic signal</p><p>1014 Transmitted signal</p><p>1200 FM transmitter</p><p>1202 Information signal</p><p>1204 Voltage Controlled Oscillator (VCO)</p><p>1210 FM signal</p><p>1214 Switch module</p><p>1216 Multi-harmonic signal</p><p>1218 filter</p><p>1220 Expected harmonics</p><p>1222 Transmission module</p><p>1400 PM transmitter</p><p>1402 Information signal</p><p>1404 Phase modulator</p><p>1404 Phase modulator</p><p>1406 Local oscillator</p><p>1408 Phase modulation signal</p><p>1410 Switch module</p><p>1412 Multi-harmonic signal</p><p>1414 filter</p><p>1416 Expected harmonics</p><p>1418 Transmission module</p><p>1600 AM transmitter</p><p>1602 Information signal</p><p>1604 Bias signal</p><p>1606 Adding module</p><p>1610 Local oscillator</p><p>1614 Switch module</p><p>1618 filter</p><p>1622 Transmission module</p><p>1800 Internal phase/quarter phase modulation transmitter</p><p>1802 Information signal</p><p>1806 Local oscillator</p><p>1810 Phase shifter</p><p>1804, 1816 phase modulator</p><p>1814 Information signal</p><p>1822 and 1828 switch modules</p><p>1832 Adder</p><p>1836 filter</p><p>1840 Transmission module</p><p>1902 Information signal</p><p>1904 Oscillation signal</p><p>1906 Modulation signal</p><p>1908 Square wave signal</p><p>1910 Fang Zhoubo</p><p>1912 Harmonic of A signal</p><p>1914 Harmonic of B signal</p><p>1916 Harmonics of signals A and B</p><p>1918 Filtered signals A and B</p><p>1912a, 1914a fundamental frequency</p><p>1912b, 1914b third harmonic</p><p>1912c, 1914c fifth harmonic</p><p>2002 Information signal</p><p>2004 FM signal</p><p>2102 Information signal</p><p>2104 Phase modulation signal</p><p>2202 Information signal</p><p>2204 AM signal</p><p>2302 Information signal</p><p>2304 Voltage controlled oscillator</p><p>2306 FM oscillation signal</p><p>2402 Local oscillator</p><p>2404 Oscillation signal</p><p>2502 Internal phase oscillation signal</p><p>2504 Phase shifter</p><p>2506 Quarter phase oscillation signal</p><p>2602 Information signal</p><p>2606 Phase modulator</p><p>2608 Phase modulation oscillation signal</p><p>2702 Information signal</p><p>2704 Bias signal</p><p>2706 Adding module</p><p>2708 Reference signal</p><p>2802 Switch module</p><p>2804 Modulated Oscillation Signal</p><p>2806 Bias signal</p><p>2818 Second signal</p><p>3102 Switch module</p><p>3104 Oscillation signal</p><p>3106 Reference signal</p><p>3114 Multi-harmonic signal</p><p>3118 Second signal</p><p>3402 Adder</p><p>3404 Multi-harmonic "I" signal</p><p>3406 Multi-harmonic "Q" signal</p><p>3408 Multi-harmonic "I/Q" signal</p><p>3502 Multi-harmonic signal</p><p>3504 filter</p><p>3506 Multi-harmonic signal of desired frequency</p><p>3602 Expected frequency</p><p>3604 frequency band</p><p>3802 Harmonic signal of desired frequency</p><p>3804 Transmission module</p><p>3806 Send signal</p><p>3902~3906 waveform</p><p>4002~4006 waveform</p><p>4310 Input signal</p><p>4312 Output signal</p><p>4402 Information signal</p><p>4404 Carrier signal</p><p>4406 Phase modulation signal</p><p>4408 Multi-harmonic signal</p><p>4410 Fundamental harmonic</p><p>4419 Second harmonic</p><p>4414 Third harmonic</p><p>4502 Information signal</p><p>4504 Carrier signal</p><p>4506 Phase modulation signal</p><p>4512 Second harmonic</p><p>4514 Third harmonic</p><p>4602 Pulse shaping circuit</p><p>4604 Continuous cycle</p><p>4606 Pulse train</p><p>4702 Amplification module</p><p>4704 Signal to be amplified</p><p>4706 Amplify the signal</p><p>4932 decoder</p><p>5001 Receive module</p><p>5002 Oscillation signal</p><p>5003 Transmitter module</p><p>5004 FM/PM information signal</p><p>5010 Signal sampler</p><p>5012 Switch module</p><p>5014 High Q filter</p><p>5018 Transmission module</p><p>5020 Diplexer</p><p>5030 AM information signal</p><p>5112 Harmonic enhancement module</p><p>5120 Information signal</p><p>5122 Phase modulator</p><p>5124 Harmonic enhancement module</p><p>5126 Switch module</p><p>5128 Bias signal</p><p>5130 Adding module</p><p>5136 Switch module</p><p>5142 Amplifier</p><p>5150 Transmission module</p><p>5146 Amplifier module</p><p>5208 Pulse shaper</p><p>5218 decoder</p><p>5302 Information signal</p><p>5304 Information signal</p><p>5306 Oscillation signal</p><p>5308 Bias/reference signal</p><p>5310 Pulse shaper</p><p>5320 High Q filter</p><p>5324 Transmission module</p><p>5422 Bias signal</p><p>5426 High Q filter</p><p>5432 Send signal</p><p>5436 Oscillation signal</p><p>5438 Pulse shaper</p><p>5450 Information signal</p><p>5456 Phase modulator</p><p>5504 Adding module</p><p>5506 Reference signal</p><p>5604 Diplexer</p><p>5608 Amplifier</p><p>5610 filter</p><p>5612 decoder</p><p>5622 Pulse shaper</p><p>5630 Oscillation signal</p><p>5632 Pulse shaper</p><p>5640 High Q filter</p><p>5644 Transmission module</p><p>5646 Bias/reference signal</p><p>5648 FM/PM information signal</p><p>5650 AM information signal</p><p>5702 Information signal</p><p>5716 Bias signal</p><p>5720 Oscillation Control Generator (VCO)</p><p>5722 Pulse shaping circuit</p><p>5724 switch</p><p>5726 High Q filter</p><p>5728 Amplifier module</p><p>5730 Transmitter module</p><p>5734 Local Oscillator (LO)</p><p>5736 Phase modulator</p><p>5740 Adding module</p><p>6202 Information signal</p><p>6204 Information signal</p><p>6206 Reference signal</p><p>6208 Phase modulation signal</p><p>6210 Phase forming PM signal</p><p>6212 Multi-harmonic signal</p><p>6216 Oscillation signal</p><p>6400 Illusion module</p><p>6404 Input signal</p><p>6406 Control signal</p><p>6412 Down-conversion output signal</p><p>7200 Divider circuit</p><p>7216 Local oscillator signal</p><p>7218 Inverted local oscillator signal</p><p>7220 Non-inverting local oscillator signal</p><p>7222 I channel oscillation signal</p><p>7224 Q channel oscillation signal</p><p>7600 Metal Oxide Half Field Effect Transistor</p><p>7602 Gate</p><p>7608 Source region</p><p>7612 Drain region</p><p>7616 Metal Oxide Half Field Effect Transistor</p><p>7620 Source region</p><p>7622 Drain region</p><p>7628 Gate pad</p><p>7630 Gate extension</p><p>7632 Gate pad extension</p><p>7806 Multi-slit generation module</p><p>7812 Pulse generator</p><p>9105 Switch module</p><p>9107 Switch module</p><p>9109 Switch module</p><p>9111 Switch module</p><p>9224 Input signal</p><p>9226 Pulse wave</p><p>9228 inverter</p><p>9230 Oscillator</p><p>9302 Energy conversion module</p><p>9303 EM signal</p><p>9305 Energy conversion module</p><p>9306 Anti-performance signal</p><p>9307 Down-conversion signal</p><p>9309 Energy conversion signal</p><p>9504 Dual output signal</p><p>9506 Input oscillation signal</p><p>9508 inverter</p><p>9701 Conversion module</p><p>9704 Input EM signal</p><p>9708 Storage capacitor</p><p>9710 Energy conversion signal</p><p>9712 load</p><p>9804 state machine</p><p>9804 state machine</p><p>9808 Voltage Controlled Oscillator VCO</p><p>9810 Pulse generator</p><p>9812 Reference voltage</p><p>9814 Integrator</p><p>9816 Rectifier</p><p>9820 Pulse generator</p><p>9822 Communicator</p><p>9870 Pulse generator</p><p>10702 Bypass network</p><p>10704 Switch module</p><p>10804 capacitance</p><p>11002 Slot control system</p><p>11004 RC network</p><p>11006 inverter</p><p>1010 Optional enable</p><p>11012 Voltage Variable Capacitor</p><p>11014 Input clock</p><p>11016 Pulse output</p><p>11018 Pulse wave</p><p>11020 aperture</p><p>11024 Delayed clock</p><p>11028 Amplifier</p><p>11706 Capacitor</p><p>11708 Control signal</p><p>11710 Pulse wave</p>

The first figure shows the circuit of a frequency modulation (FM) transmitter;

The second diagram A, the second diagram B, and the second diagram C show the waveforms of the digital information signal of the FM circuit in the first diagram.

The third figure shows a phase modulator (PM) device.

The fourth diagram A, the fourth diagram B, and the fourth diagram C show the waveforms of the digital information signal of the PM circuit in the third diagram.

The fifth figure shows the circuit of an amplitude modulation (AM) transmitter;

The sixth diagram A, the sixth diagram B, and the sixth diagram C show the waveforms of the digital information signal of the AM circuit in the fifth diagram.

The seventh figure shows an internal phase/quarter phase modulation transmitter ("I/Q").

The eighth graph A, the eighth graph B, the eighth graph C, the eighth graph D, and the eighth graph E show the waveforms of the digital information signal of the I/Q circuit in the seventh graph.

Figure 9 shows a high-level flow chart of the transmitter according to the present invention.

Figure 10 shows a high-level block diagram of the transmitter according to the present invention.

Figure 11 shows a flowchart of the operation of the first embodiment of the present invention (such as FM mode).

Figure 12 shows a block diagram of the structure of the first embodiment of the present invention (such as FM mode).

Figure 13 shows a flowchart of the operation of the first embodiment of the present invention (such as PM mode).

Figure 14 shows a block diagram of the second embodiment of the present invention (such as PM mode).

Figure 15 shows a flow chart of the operation of the third embodiment of the present invention (such as AM mode).

Figure 16 shows a block diagram of the third embodiment of the present invention (such as AM mode).

Figure 17 shows the operation flow chart of the fourth embodiment of the present invention (such as "I/Q" mode).

Figure 18 shows a block diagram of the fourth embodiment of the present invention (such as "I/Q" mode).

The nineteenth figure A to the nineteenth figure I show the waveforms at multiple points in the high-level circuit diagram (the frequency modulation mode in the frequency shift input embodiment).

Figure twentieth A, twentieth B, and twentieth C show the waveform of an analog information signal in the FM circuit of the first figure.

Figure 21 A, Figure 21 B, Figure 21 C show the waveform of an analog information signal in the PM circuit of Figure 3.

Figure 22 A, Figure 22 B, Figure 22 C show the waveform of an analog information signal in the AM circuit of Figure 5.

Figure 23 shows an example of a voltage controlled oscillator (VCO).

Figure 24 shows an example of a local oscillator (LO).

Figure 25 shows an example of a phase shifter.

Figure 26 shows an example of a phase modulator.

Figure 27 shows an example of an adding amplifier.

Figure 28A-Figure 28C shows the switch module in FM and PM mode.

Figure 29A-Figure 29C show an example of the switch module in Figure 28A-Figure 28C, where the switch is a GaAs transistor.

Figure 30A-Figure 30C show a design example that can ensure the symmetry of GaAs field effect transistors in FM and PM modes.

Figure 31 A-Figure 31 C shows an example of the switch module in AM mode.

Figure 32 A-Figure 32 C show the modules from Figure 31 A to Figure 31 C, where the switch is a GaAs field-effect transistor.

Figure 33 A-Figure 33 C show a design example to ensure the symmetry of the GaAs field effect transistor in the AM mode.

Figure 34 shows an example of an adder.

Figure 35 shows an example of a filter.

Figure 36 shows the representative spectrum for calculating "Q;".

Figure 37 A and Figure 37 B show representative examples of filter circuits.

Figure 38 shows an example of the transmission module.

Figure 39A shows the first pulse shaping circuit using a digital logic device as the square wave input from the oscillator.

Figure 39 B, Figure 39 C and Figure 39 D show the relevant waveforms of the circuit of Figure 39 A.

Figure 40A shows a second pulse shaping circuit using a digital logic device as a square wave input from the oscillator.

The fortieth graph B, the fortieth graph C, and the fortieth graph D show the relevant waveforms of the circuit of the fortieth graph A.

Figure 41 shows a third example of a pulse shaping circuit, which serves as the input for any self-oscillator.

Figure 42 A, Figure 42 B, Figure 42 C, Figure 42 D and Figure 42 E show the relevant waveforms of the circuit of Figure 41.

Figure 43 shows the internal circuit of the cell in Figure 41 according to the present invention.

Figure 44A-Figure 44G show waveforms at multiple points in the high-level circuit diagram (operating in the amplitude modulation mode in the pulse wave shift adjustment embodiment), emphasizing the characteristics of the first three harmonics.

Figure 45 A to Figure 45 F show waveforms at multiple points in the high-level circuit diagram (operating in the amplitude modulation mode in the pulse wave shift adjustment embodiment), emphasizing the characteristics of the first three harmonics.

Figure 46 shows an example of the harmonic enhancement module.

Figure 47 shows an example of the amplitude module.

Figure 48 A and Figure 48 B show examples of linear amplifiers.

Figure 49 shows a typical heterodyne receiver.

Figure 50 shows a transmitter according to an embodiment of the present invention in a typical transceiver circuit with a full-duplex mode heterodyne receiver.

Figure 51 A, Figure 51 B, Figure 51 C, Figure 51 D show a transceiver circuit with a differential receiver outside of the half-duplex mode and using a general oscillator , The transmitter according to an embodiment of the present invention.

Figure 52 shows a receiver using universal frequency down conversion technology according to an embodiment.

Figure 53 shows the transmitter of the present invention.

Figure 54 A, Figure 54 B, Figure 54 C show a transceiver circuit with a universal frequency down receiver and operating in the half-duplex mode of FM and PM modulation. According to this Invented conveyor.

The fifty-fifth figure shows the transmitter according to the present invention in a transceiver circuit with a universal frequency down receiver and operating in the half-duplex mode of AM modulation.

Figure 56 shows the transmitter according to the present invention in a transceiver circuit with a universal frequency drop receiver and operating in full duplex mode.

Figure 57A to Figure 57C show the transmitter of the present invention, which is used in frequency modulation, phase modulation, and amplitude modulation examples, and has a pulse shaping circuit and an amplifier module.

The fifty-eighth graph shows the harmonic amplitude of 0.01 pulse width to period ratio.

The fifty-ninth graph shows the harmonic amplitude of 0.0556 pulse width to period ratio.

The sixtieth graph shows the relative amplitude table of the first 50 harmonics under six pulse width to period ratios.

Figure 61 shows the relative amplitude table of the first 25 harmonics under six pulse width to period ratios, of which the first to tenth harmonics are optimized.

Figure 62 shows a structural block diagram of an alternative embodiment of the present invention (for example, the mode of combining AM and PM).

Figure 63 shows the waveform of the information signal "A" in the embodiment of Figure 62.

Fig. 64 shows the waveform of the oscillation signal of the embodiment in Fig. 62.

Figure 65 shows the waveform of the phase modulation signal of the embodiment in Figure 62.

Figure 66 shows the waveform of the pulse wave shaping and modulating signal in the embodiment of Figure 62.

Figure 67 shows the waveform of the reference signal of the embodiment in Figure 62.

The sixty-eighth figure shows the waveform of the multi-harmonic signal of the embodiment in figure sixty-second.

Figure 69 shows the waveform of the fundamental harmonic signal of Figure 68 in the embodiment of Figure 62.

The seventieth figure shows the waveform of the second harmonic signal in the sixty-eighth figure in the embodiment of figure sixty-second.

Figure 71A and Figure 71B show examples of aliasing modules.

The seventy-first graph C to the seventy-first graph G show the waveforms of multiple points in the circuits of the seventy-first graph A and the seventy-first graph B.

Seventy-second Figure A shows a block diagram of the splitter according to the present invention.

Seventy-second Figure B is a more detailed block diagram of the splitter according to the present invention.

The seventy-second graph C and the seventy-second D are the relevant waveforms of the divider in the seventy-second graph A and the seventy-second graph B.

Figure 72 E is a block diagram of an I/Q circuit with a divider according to the present invention.

The seventy-second graph F-the seventy-second graph J shows the relevant waveforms of the seventy-second graph A.

Figure 73 is a block diagram of the switch module according to the present invention.

Figure 74 A is an example of the block diagram of Figure 73.

The seventy-fourth graph B to the seventy-fourth graph Q show the relevant waveforms of the seventy-fourth graph A.

Figure 75 A is another example of the block diagram of Figure 73.

The seventy-fifth figure B-the seventy-fifth figure Q shows the relevant waveforms of the seventy-fifth figure A.

A MOSFET 76 of the present invention FIG real examples.

Seventy-sixth FIG. B is an embodiment of the MOSFET of the present invention.

The 76th FIG. C is an embodiment of the MOSFET of the present invention.

Figure 77 A is another example of the block diagram of Figure 73.

The seventy-seventh figure B to the seventy-seventh figure Q are the relevant waveforms of the seventy-third figure.

The seventy-eighth figure shows an example of the present invention, in which a plurality of slits are generated in each cycle of the oscillating signal.

The seventy-ninth figure is a multi-slit generation module.

The 80th figure shows the waveform of a pulse train containing one to five pulses per cycle.

The eighty-first figure shows the frequency spectrum of one pulse per week.

The eighty-second graph shows the frequency spectrum of the second pulse of each week.

The eighty-third graph shows the frequency spectrum of the three pulse waves every week.

The eighty-fourth graph shows the frequency spectrum of the four pulse waves every week.

The eighty-fifth figure shows the frequency spectrum of its five pulse waves every week.

The 86th graph shows the amplitude of the output spectrum at the desired output frequency.

The eighty-seventh figure shows the circuit diagram of the double-pole pulse wave.

The eighty-eighth figure uses the frequency spectrum of the bipolar pulse wave.

The eighty-ninth figure shows the bipolar pulse flow.

The ninetieth figure shows the original pulse flow used to generate the bipolar pulse flow.

Ninety-first Figure A-Ninety-first Figure D is a switch module according to an embodiment of the present invention.

The ninety-second figure A-the ninety-first figure D shows an embodiment of the slit generator.

Ninety-second Figure E shows an oscillator according to an embodiment of the present invention.

Figure 93 shows an energy conversion system with a selective energy conversion module according to an embodiment of the present invention.

Figure 94 shows an aliasing module with input and output impedance matching according to an embodiment of the present invention.

Figure 95A shows an example of a pulse wave generator.

Figure 95 B and Figure 95 C show the relevant waveforms of the pulse generator in Figure 95 A.

Figure 96 shows an energy generation module with switches and related storage modules according to an embodiment of the present invention.

Figure 97 A-Figure B of 97 shows the energy conversion system based on the real name.

Ninety-eighth FIG. A shows an energy conversion signal module according to an embodiment of the present invention.

Ninety-eighth Figure B shows a flow chart of the operation of the state machine according to an embodiment of the present invention.

Ninety-eighth Figure C shows the energy conversion signal module.

The schematic diagram of FIG. 99 shows a circuit diagram of down conversion from 915 MHz to 5 MHz using a 101.1 MHz clock according to an embodiment of the present invention.

The first figure shows the analog waveform of the 99th circuit according to an embodiment of the present invention.

The simplified diagram of Figure 101 shows a circuit diagram of down-conversion from 915 MHz to MHz using a 101 MHz clock according to an embodiment of the present invention.

Figure 102 shows an analog waveform of the circuit of Figure 101 according to an embodiment of the present invention.

The simplified diagram of Fig. 103 shows a circuit diagram of down-conversion from 915 MHz to 5 MHz using a 101.5 MHz clock according to an embodiment of the present invention.

Figure 104 shows an analog waveform of the circuit of Figure 103 according to an embodiment of the present invention.

Figure 105 is a schematic diagram of the circuit of Figure 99, which is connected to the FSK source of 913 and 917 MHz at 500K packet rate according to the present invention.

Figure 106A shows the energy conversion system according to the present invention.

The 106th figure B-the 106th figure C shows the timing chart of the example of the first sixteenth figure A.

Figure 107 shows an example of a bandpass network according to an embodiment of the present invention.

Figure 108 shows an example of a bandpass network according to an embodiment of the invention.

Figure 109 shows an embodiment of the present invention.

The first 10A shows an embodiment according to the present invention, namely, a slot control circuit.

The first 100 diagram B shows a timing diagram of a clock signal for slot control according to an embodiment of the present invention.

The first 100 diagram C shows a timing diagram of a selective enable signal for slot control according to an embodiment of the present invention.

The first 100 diagram D shows a timing diagram of an inverted clock signal for slot control according to an embodiment of the present invention.

The first 100 diagram E shows a timing diagram of the delayed clock signal for slot control according to an embodiment of the present invention.

The first 10F shows a circuit diagram of an energy conversion circuit including pulses with real-time control slits according to an embodiment of the present invention.

The first figure shows an embodiment of the present invention.

The first and second figures show an embodiment of the present invention.

The first and third figures show an embodiment of the present invention.

The first and fourth figures show an embodiment of the present invention.

The first to fifth figure A shows the timing diagram of the embodiment of the first one to one.

The first and fifth diagrams B show the timing diagram of the embodiment of the first and second diagrams.

The first and sixteenth figures A shows the timing diagram of the embodiment of the first and third figures.

The first and the sixth figure B shows the timing diagram of the embodiment of the first and the third figure.

Figures 117 and A show an embodiment of the present invention.

The first and seventh diagrams B show the equations used to determine the charge conversion according to the present invention.

The first and seventh figures C show the relationship between the charging of the capacitor and the gap according to the present invention.

The first to seven figures D show the relationship between the charging of the capacitor and the gap according to the present invention.

The first and seventh diagrams E show the relational expression of charging the power supply according to the present invention.

The first and seventh graphs F show the insertion loss equation according to the present invention.