Controlled delay line signal processor for sound reproduction
10 claims: 2 independent, 8 dependent
- 1Urządzenie do odtwarzania sygnałów mowy ludzkiej lub podobnychKsygnałów w postaci zakodowanych sygnałów elektrycznych zarówno szybciej jak i wolniej niż prędkość zapisu przy 60 normalnym rozkładzie składowych częstotliwości, lecz w przedziałach czasu różnych od oryginalnego czasu trwania sygnałów, w którym do układu odtwarzającego jest dołączony regulator do ręcznego nastawiania prędkości, a wyjście układu odtwa- 65 rzającego jest dołączone poprzez wzmacniacz z automatyczną regulacją wzmocnienia do układu opóźniającego, do którego jest dołączony układ sterujący opóźnieniem, znamienne tym, że zawiera pierwszy generator (64), (94) przebiegu powtarzalnego dołączony do układu (58), (96) sterującego opóźnięniem i , drugi generator (67), (97) przebiegu powtarzalnego dołączony do pierwszego generatora (64), (94) przebiegu powtarzalnego, wzmacniacz (71), (92) z wygaszaniem, którego wejście jest dołączone do wyjścia układu (56) opóźniającego, a wyjście jest dołączone do filtru (73) pasmowo-przepustowego, przy czym do wzmacniacza (71), (92) ' z wygaszaniem jest dołączony co najmniej jeden generator (67), (94, 97) przebiegu , powtarzalnego, filtr (73) pasmowo-przepustowy jest dołączony do wyjścia układu (75), (91, 93) .wypełniania luk w sygnale wyjściowym· a wzmacniacz (53) z automatyczną regulacją wzmocnienia zawiera korzystnie filtr wejściowy dla układu (56) opóźniającego, najkorzystniej filtr o zmiennej częstotliwości granicznej.
- 2Urządzenie według zastrz. 1, znamienne tym, że jeden generator (64, 97) · przebiegu powtarzalnego jest generatorem przebiegu piłokształtnego a drugi generator (67, 94) przebiegu powtarzalnego · jest generatorem przebiegu ^prootokątneg-o.
- 3Urządzenie według ' zastrz. 1, znamienne tym, że generator (64) przebiegu powtarzalnego jest dołączony naprzemiennie poprzez przełącznik (63) kompresji/ekspansji bezpośrednio do jednego wejścia układu (58) sterującego opóźnieniem i do zanegowanego· przez inwerter (62) drugiego· wejścia układu (58) sterującego opóźnieniem a · układ wypełniania luk w sygnale wyjściowym stanowi źródło (75) odłączalne od filtru (73) pasmowo-przepustowego o.raz dołączone do wzmacniacza (71) z wygaszeniem i generatora (67) przebiegu powtarzalnego. '
- 4Urządzenie według zastrz. 1, znamienne tym, że generator (94) przebiegu powtarzalnego jest połączony poprzez układ (95) opóźniający do układu sterującego opóźnieniem, który stanowi generator (96) · przebiegu piłokształtnego a układ wypełniania luk w sygnale wyjściowym stanowi układ (91) opóźniający dołączony do układu (56) opóźniającego oraz wzmacniacz (93) z wygaszaniem, którego wejście jest dołączone dó wyjścia układu (91) opóźniającego a wyjście jest dołączone do wyjścia filtru (73) pasmowo-przepustowego.
- 5Urządzenie według zastrz. 1, znamienne tym, że układ (56) opóźniający zawiera rejestry przesujwne (ASR) posiadające , końcówki wejściowe i wyjściowe, przy czym wejściowy przewód (111) jest dołączony do układu (51) odtwarzającego, między dodatkowe końcówki rejestrów przesuwnych (ASR) jest włączony generator * (115) impulsów przesuwu o zmieniającym się okresowo, postępowo okresie impulsów, a wyjściowy przewód , (112) jest dołączony do wzmacniacza (71) z wygaszaniem.
- 6Urządzenie według zastrz. 1, znamienne tym, że układ (58) sterujący opóźnieniem zawiera generator (124) ‘impulsów synchronizacji o sterowanej częstotliwości i generator (123) dwóch przesunięl 95193 31 •tych, w fazie o 180° względem siebie sygnałów prostokątnych dołączony do sterującego nim generatora (124) oraz generator . (132) dwóch przesuniętych w fazie o 180° względem siebie sygnałów prostokątnych dołączony naprzemiennie poprzez 5 układy wygaszania (131), (133) odpowiednio do generatora (124) i do generatora* (134), przy czym generator (123) jest dołączony do analogowego re- 1 jestru przesuwnego (121) i jego odgałęzienia (126), a generator (132) jest dołączony -do'drugiego od- 10 gałęzienia (127) rejestru (121) dla naprzemiennego sterowania wzmacniaczem (130) z odgałęzień (126), (127) poprzez układy wygaszania (128), ' (129).
- 7Urządzenie według zaśtrz. 1, znamienne tym, że układ (56) opóźniający zawiera konwerter (138) 15 analogowo-cyfrowy, element psmięcil cyfrowej o sterowanej prędkości zapisu i odczytu oraz konwerter (140) cyfrowo-analogowy, a układ sterujący opóźnieniem stanowi generator (136) sygnałów o częstotliwościach różnych dla zapisu i odczytu. 2 0
- 8Urządzenie według zastrz. 7, znamienne tym, że elementy pamięci cyfrowej stanowią stopnie (139) cyfrowego rejestru przesuwnsfeo.
- 9Urządzenie ' według zastrz. 1, znamienne tym, że układ opóźniający (56) zawiera dwa analogową 25 rejestry przesuwne (ASRp ASR 2 ), generator (51) impulsów o częstotliwości zapisu, generator (S 2 ) impulsów o częstotliwości odczytu i generator (S 3 ) impulsów bramkujących, bramki (233), (234) sterowane przez generator (S 3 ) i dołączone odpowiednio do wejść analogowych rejestrów przesuwnych (ASRp, (ASR 2 ) dla naprzemiennego przepuszczania przez nie sygnałów, bramki (241), (242) i (243), (244) sterowane przez generator (S 3 ), których wejścia są dołączone odpowiednio do generatorów (S 1 ), (S2) a wyjścia są dołączone odpowiednio do analogowych rejestrów przesuwnych (ASRp, (A*SRp oraz bramki (235), (236) sterowane przez generator (S 3 ) i dołączone do wyjść analogowych rejestrów przesuwnych (ASRp, (ASR2) dla naprzemiennego łączenia wyjść dwóch analogowych rejestrów przesuwnych.
- 10Urządzenie według zastrz. 1, znamienne tym, że układ (58, 96) sterujący opóźnieniem jest wyposażony w regulator (54) wysokości tonu połączony z regulatorem (52) prędkości oraz w regulator (60) poziomu, generatory (64, 94) przebiegu powtarzalnego są wyposażone w regulator (65) okresu, a generatory (67, 97) przebiegu powtarzalnego są wyposażone w co najmniej jeden regulator (68, 70) długości przedziałów wwygaszania dla regulacji wielkości kompres ji/ekspans)i.
Independent claims10
189 paragraphs, as filed
The present invention relates to a device for reproducing human speech signals or similar signals as encoded electrical signals both faster and slower than the write speed, with a normal distribution of frequency components, but at intervals different from the original duration of the human speech signals.
In known devices for reproducing human speech signals or similar signals, a manual speed adjuster is coupled to the reproduction circuit, and the output of the reproduction circuit is coupled through an amplifier with automatic gain control to a variable-delay delay circuit to which in turn is coupled a delay control circuit. .
For example, from US Patent No. 2352023, devices for compression or expansion of sounds are known, which use the relative displacement between the magnetic tape and the air gap of the reading head for the signal recorded on the magnetic tape. This type of device has disadvantages in terms of handling, cost and weight due to the large mechanical moving parts. Also known from US Patent No. 1671151 is a device for compressing and expanding sounds with a delay line through which speech signals pass, and the moving reading element repeatedly analyzes the delay line. Later improvements relate to the elimination of the mechanical parts of the moving devices as a result of the use of electronic switching of successive taps of the electric delay line, as for example in US Patent No. 2,545,671.
It is known from US Patent No. 3,480,737 to analyze a tapped delay line to change the duration of recorded speech signals without changing its frequency components.
Frequency-to-time conversion devices using a signal driven delay line with a variable delay number for error correction are known. These devices eliminate the undesirable frequency effect caused by the irregularity in the frequency. the time of a train of signal pulses or changes in an acoustic device whereby the speed of the recording medium relative to the read head is subjected to periodic fluctuations resulting in the formation of an audible irregular phenomenon called "sound wobble". In reconstructing the original signal, these devices eliminate speed errors by servo-controlling the delay of the delay line incorporated in the signal channel. The devices that use
95193
05183 reference signal or timing paths at playback speed compensation for a variable delay delay line, for example, see US Patent Nos. 3,202,769 and 3,347,997.
Devices for reducing the frequency of speech signals are known from US patents Nos. 2352023, 1671151 and 3480737. by compressing the time or bandwidth of a given speech fragment, but in which there is always a rejection of part of the original speech flow. The ratio of the dropped signal to the reproduced signal is directly related to the compression ratio, and the process of frequency reduction and time compression for processing a given speech fragment is inherently related to the losses resulting from the rejection of a part of the signal. The reproduced components of the speech signal alternate with the rejected components, and combining these components for correct reproduction is a problem that is solved differently in known systems.
In the device disclosed in U.S. Patent No. 23,520: 23, a rotating magnetic read head has an oblique air gap or the tape extends. obliquely to the point of contact with the spinning. cracks. air,
In US Patent No. 1671151, the device includes two spaced-apart transducers rotating with respect to the delay circuit.
The object of the invention is to provide an apparatus for the reproduction of signals. human speech or similar signals, in which transients are removed and noise is minimized, and which is easy to handle, has lower production costs and lighter weight.
This object is achieved according to the invention by providing an apparatus which comprises a first repeating waveform generator connected to a delay control circuit and a second repeating waveform generator connected to the first repeating waveform generator. This device comprises a blanking amplifier whose input is connected to the output of the delay circuit and the output of which is connected to the bandpass filter. At least one repetitive waveform generator is connected to the blanking amplifier.
A bandpass filter is connected to the output of the output signal gap filler. Preferably, the amplifier with automatic gain control comprises an input filter for the delay circuit, most preferably a filter with a variable cutoff frequency.
According to the invention, one repetitive waveform generator is a sawtooth generator and the other repetitive waveform generator is a square wave generator.
In one embodiment of the device according to the invention, the repeating waveform generator is <sup>(</sup> connected alternately through the ji / dsparnsion switch directly to one input of the delay control system and to the second input of the system negated by the inverter <sup>5</sup> a circuit that is filled with gaps in the output signal is a source that is detachable from the sand-pass filter and connected to the blanking amplifier and the repeating waveform generator.
<sup>0</sup> In another embodiment of the device according to the invention, the repeating waveform generator is connected via a delay circuit to a delay control circuit which is a sawtooth waveform generator, and the gap filler circuit in the output signal is a delay circuit connected to said delay circuit and a blanking amplifier whose input is connected to the output of the delay circuit, and the output is connected to. filter and bandpass outputs.
In one embodiment, the delay circuit includes shift registers having input and output terminals. An input line is connected to the reproduction circuit, a shift pulse generator with a periodically changing progressive pulse period is connected between the additional ends of the shift registers, and the output line is connected to the blanking amplifier.
In one embodiment, the delay controller comprises a sync pulse generator. having a controlled frequency and a generator of two 180 [deg.] phase-shifted square-wave signals connected to the controller<sup>5</sup> generator; and the generator of two 180 ° phase-shifted square-wave signals connected alternately through blanking circuits to the generator and to the out-of-control timing pulse generator, respectively. One generator of two shifted signals is connected to the analog shift register and its branches, and the other generator of two shifted signals is connected to the second branch of the register for alternating control of the amplifier from branches via blanking circuits.
In one embodiment, the delay circuit includes an analog-to-digital converter, speed-controlled digital memory elements, and a digital-to-analog converter. The speed control circuit for writing and reading is a circuit generating frequency signals. different snip for write and read. Elements of pa. The digital memory is preferably digital shift register degrees.
In one embodiment, the delay circuit includes two analog shift registers, a genej, a write frequency pulse generator, and a read frequency pulse generator and a gating pulse generator.
The two gates are driven by a gating pulse generator and connected respectively to the analog shift register inputs to alternately pass the signals through them. The four other gates are driven by a gating pulse generator, the inputs of which are connected to the write and read frequency pulse generators respectively, and the outputs are connected to analog shift registers respectively. Yet another two gates are driven by the gating pulse generator and connected to the analog shift register outputs to alternately combine the outputs of the two analog shift registers.
According to the invention, the delay control system is equipped with a pitch controller connected to a speed controller and a level controller, one of the repeating waveform generators is equipped with a period controller, and the other repeating wave generators are equipped with at least one blanking interval length controller for adjusting the amount of compression. expansion.
The device according to the invention eliminates the inherent discontinuities in the transmitted signals resulting from the compression. rejection. parts of the speech signal. The discarded part of the speech signal may be stored and then removed in the delay line, or it may be made not to enter the delay line which is connected directly to the signal channel.
The device according to the invention adjusts the bandwidth of the input and output speech signals to be reproduced with the required intelligibility, thereby excluding those frequencies which could cause distortion or intermodulation due to improper sampling rates or excessive delay at high frequencies and insufficient slice length. output signal to ensure the conversion of the smallest frequencies. The invention minimizes the loss of information transmitted to the listener, enables noise components to be suppressed and prevents the introduction of false data that could change the information carried in subsequent parts of speech.
Due to the improved processing of the speech signals · 'in the device according to the invention, an essentially continuous output signal is obtained.
The subject of the invention is presented in the drawing, in which Fig. 1 shows the waveforms of speech signals reproduced from a magnetic tape, showing the operation of the device according to the invention at various compression factors, Fig. 2a - a time dependence diagram of input and output signals for compression, Fig. 2b - timing plot of input and output signals for expansion, Fig. 3a. - waveforms of the speech signal processing parameters for different compression factors, Fig. 3b - - waveforms similar to the waveforms of Fig. 3a for different expansion factors, Fig. 4 - waveforms for the transition between consecutive processed speech samples, Fig. 5 - transition processing waveforms between consecutive speech samples, fig. 6 - pi waveforms using two delay lines for the transition between consecutive speech samples, fig. 7 - speech compression / expansion device in a block diagram, fig. 8 - signal waveforms in the device of fig. * 7, fig. 0 '- double delay line device in the block diagram, fig. 10 - "signal waveforms in the device with Fig. 9 for the compression, Fig. 1.1 -. the waveforms in the device of Fig. 9 for expansion 1 and Fig. 12 show another embodiment of the part of the device of Fig. in the side view, Fig. 13 - waveforms in the device of fig. 12 for compression, fig. 14 - signal waveforms of the device of fig. 13 for expansion, fig. 15 - double delay device in a partial block diagram, fig. 16 - signal waveforms of the device of fig. 15, fig. 17 - signal reconstruction device speech with an analog shift register in the partial block diagram, Fig.
<sup>20</sup> 18 - device similar to the device. in Fig. 17, using the continuous signal 'in the block diagram, Fig. 19 - Variable delay shift register device w. block diagram, fig. 20 - another embodiment of the device z
2<sup>5</sup> with a variable delay shift register in a block diagram, Fig. 21 - an analog memory matrix speech reproduction device in a block diagram, Fig. 22 - a device according to the invention with a digital memory<sup>30</sup> Fig. 23 - gate control circuit of the zero signal level taking into account the direction in the logic diagram, Fig. 24 - signal waveforms in the circuit of Fig. 23, Fig. 25 - frequency diagram of 'synchroni'<sup>35</sup> and the maximum PzzsoH of the signal in the device of Fig. 17 as a function of time, Fig. 26 - a device with a double delay line and analog shift registers w. the block diagram and Fig. 27 gating waveforms<sup>40</sup> control signals for the device of 'Fig. 3.
Fig. 1 (pzzelplaces - waveforms of speech signals reproduced from a magnetic tape using a device with a delay line, which will give<sub>45</sub> them the maximum final signal delay. equal to 6 ms. Assuming that the processed speech signal is limited to components with frequencies between 333 Hz and 5000 Hz, it can be determined. certain parameters used in compression. Tape ^ magne<sub>50</sub> the signal 21 has a hammer signal recorded thereon, the component of which having the lowest frequency of 333 * Hz is represented as a sine wave 22, with. the tape is passed through the reading transducer 23 as it is wound on the spool<sub>55</sub> The winding 24 is at speed S. The electrical signal generated by the transducer 23 passes through the compression transducer. 25 and is reproduced as the signal heard from the loudspeaker 26.
The device reproduces the signal recorded on tape 21 'without changing the time and frequency if the take-up reel 24. advances the tape in transducer 23 at the write speed S, and then transducer 25 introduces a constant delay of a 'defined' value.
In the 'diagram b of Fig. 1, where c =' l, a sinusoidal signal with a frequency of 333 Hz, odί is shown.
unchanged except for a fixed phase lag which was ignored.
To compress the speech signals, the tape speed is increased by the factor c, and the pickup 25 changes the delay linearly from its minimum to its maximum value. As shown in the curves c, d and from FIG. 1, using a compression ratio of c = 2 for a signal delayed by '6 msec requiring an 8 ms delay line; w a portion of the originally recorded waveform 22 is reproduced. Only half of the stored signal duration, originally equal to 24 ms, is retained. This part of the signal is accelerated before processing, as shown by<sup>15 </sup>1, and includes cycles 1, 2, 3 and 4. Due to the compression of the 6 ms delayed signal, some of the original duration information is eliminated. 6 ms, representing a time of 12 ms at speed. write 2Sr
The rejected part shown in graph c includes 5, cycles. 6, 7, i. 8 of the original sine wave 22 i is a gap. in the information. . The audible output signal is shown in plot d, where the reproduced portion is represented by a section of tape 31 read at 2S over cycles 14-4, and after conversion, effectively extended to a section of tape 32 with an original duration of 12 ms containing cycles 1. —4 with the original recording frequency.
From plot d, it can be seen that the next cycle reproduced is cycle 9 of the original waveform, skipping cycles 54-8. Shown in the diagram d
The transition between the end of cycle 4 and the start of cycle 9 cannot be taken as a representation of the actual signal. In Fig. '1, idealized signals are shown.
The graphs f, g and h in Fig. 1 illustrate the situation for the compression ratio c = 5, when the tape is moved in the device 23 at a speed of 5S. With a signal delay of 6 ms with a compression ratio of c = 5, a 1.5 ms part of the waveform is obtained, containing 2.5 cycles of the sine 22 with a frequency of 333 Hz shown in the diagram a. The fragment cdirzuoana with a duration of 6 ms is equal to signal delay, which corresponds to a delay line of 18 ms delay. . However, the information gap was enlarged from the end of cycle 3 to the start of cycle 13 to 30 ms of the originally recorded speech signal.
. The relationships' between the parameters of the speech signal compression device and the parameters representing the information enabling the determination of the optimal operating conditions of the device according to the invention are shown in Table I for a device with a delay line with a maximum signal delay / Tmax of 6 ms ..
The principle of the frequency-time conversion used in the invention. may be presented as follows.
When the sinusoidal signal V = Esincot is recorded and when the tape is fed with speed- · <
a bone c times bigger than the original one. write speed, the following signal is obtained:
........ ..... V = E sin ca> <1)
Table I.
£ types parameters of the speech compression device
<td colspan="2">Factor compression</td><td rowspan="2">Line length <· T<sub>IN</sub>y (ms)</td><td colspan="2">Slice / part rejected ratio</td><td rowspan="2">Sampling period T (ms)</td><td rowspan="2">Repeat speed 1 / T (1 / cycle)</td><td rowspan="2">Number of cycles in the sample (fmin <sup>=</sup> 333 Hz)</td>
<td>c</td><td>d</td><td>(read time) Twe /<sup>with</sup>) Tmax</td><td>(Recording time)<sup>T.</sup>in<sup>y</sup>/<sup>part</sup>^'<sup>T.</sup>niax (ms)</td>
<td> 1,25 1,5 2 . 8 4 5</td><td> 2/9 2/5 2/3 1 6/5 4/3</td><td> 6 2/3 7 1/5 8. 9 8 3/5 10</td><td> 24/6 12/6 6/6 3/6 2/6 1,5/6</td><td> 30/7,5 18/9 12/12 9/18 8/24 7,5/30</td><td> 30 18 12 9 8 7 1/2</td><td> 33.3 55,6 83.3 111 125 . 133</td><td> 10 6 4 3 2 2/3 2 1/2</td>
where c is the compression ratio. If c> l, time compression of the given message is performed, and if c <l, time expansion is performed with a coefficient e = 1 / <c.
When a signal is applied to a delay line whose delay is increased as a function of time with a speed d such that the mean signal delay is c, the resulting signal is:
V - E sin (c - cOcot (2) es
The original signal remains. restored if the delay is:
<sup>c7 -</sup> C.<sup>with</sup>t (dia restoration) = (c — l) t (i)) then the total delay is c't = - (+ l) t (4)
Fig. 2a shows a plot of the signal output time i output as a function of the input time tlib
given segment of the signal. The I line with a slope of 4 represents a signal with a frequency four times the original frequency, and the period is one-quarter of the original period. The same goes for speed. Line II with a slope of 1 represents the restored or unchanged signal.
In order to convert the signal represented by line I 'into that represented by line II as the frequency decreases, it is necessary to incrementally delay the input signal by a value of c't or (c - l) t as shown by line III. The delay dt introduced by the delay line is represented by line IV.
c - 1
It can be shown that d = 2-, where for * c + · 1.
c ^ l. 0 <tiC2, and for c <l, —2 <d <0.
In Fig. 2b, the relationships for the signal expansion are shown. The line Ie with a slope of 1/4 represents a signal with a frequency or different speed - the original frequency. To convert such a signal into a signal represented by line II with a slope of 1, with increasing frequency, it is necessary to gradually decrease the input signal delay by the value c't. The delay dt introduced by the delay line is represented by line IVe.
The linear delay build-up process cannot continue indefinitely, and from time to time the delay of the delay line must reach the original value. At intervals greater than the period of the lowest-frequency component, slices of the original signal are restored at a frequency (c — c ') co, and the rest are discarded. The device works as if sections of the original tape were cut, glued together and played at normal speed. The signal sections are heard at the correct frequency, but the information is conveyed in a shorter amount of time (if · c> il).
The values summarized in Table I are plotted in Fig. 3a. For a given compression ratio, the signal sampling time is given by the curve T<sub>IN</sub>ya length 'of the slice Specified by the T curve<sub>IN</sub>e. The difference between the two curves represents the discarded portion whose time (tearing is equal to the final signal delay at the end of the signal sampling period (6 ms in the example shown in Fig. 3a).
Entering a compression factor such as c = 5 in Figure 3a yields slice and discard times for a tape running at 0 times the write speed, and these values projected onto the timeline represent real time for the respective 'playback parts. sampled and «rejected parts. As shown, for c = 5, the reproduced slice has a duration of 1.5 ms and the discarded portion has a duration of 6 ms, representing, respectively, a time of 7.5 ms of recorded and reproduced information and a time of 30 ms of information from »5183. 10 thrown, which is represented by · cdT<sub>m</sub>ax, which is also 'drawn in Fig. 3a.
; For a speech signal with the lowest frequency being 333 Hz and having a period of 3 ms, a slice with a duration of 1.5 ms at c = 5, representing 'and the time of 7.5 ms of recording, includes 2.5 periods of the signal at frequency 333 Hz. For all higher frequency components in the speech signal, a greater number of cycles in the 1.5 ms slice is left. The duration of the slice should be longer than the period of the lowest transmitted frequency and contain at least one complete cycle, otherwise satisfactory compression is not achieved.
In Fig. 3a, a signal at 333 Hz when processed at sampling periods close to 3 ms produces a compressed output signal of poor quality because the sampling causes a discontinuity for almost every cycle of the processed 333 Hz signal.
Sampling periods of less than 3 ms prevent the cycle from being completed, so the received output signal has not only discontinuities. but · also shows a frequency change. A sampling period smaller than the period of the lowest frequency component in the speech signal does not ensure proper compression.
Sampling periods larger than the lowest frequency component allow compression, and the dropout interval is the area where the sampling period is only slightly greater than the lowest frequency component period as shown in the timeline between the 3 ms and 6 ms point values on the Fig. 3a. The result is a distorted stretched signal with this interruption period, in which the discontinuity effect between the sampled signals becomes extremely strong as you approach a single cycle and becomes colder as you increase the cycles in the sampled signal. ,
Fig. 3a shows two and a half cycles of the sampled signal, but generally the more cycles of the sampled signal, the less distortion there is. To avoid extreme distortion, the smallest frequencies should be filtered out before the speech signal enters the delay line, otherwise these discontinuous and highly distorted signals are routed off the line and overlap the desired signal, possibly degrading the characteristics of the device considerably.
For compression ratio values less than 5, keeping JT<sub>m</sub>ax = 6 ms, the slice length increases, causing the current sampling time to increase to a value greater than 7.5 ms, so that for the lowest frequency component there is more than the minimum number of cycles in the slice. Thus, it is at the user's discretion to set the line to a delay less than the indicated 6 ms delay for / Tmax in order to reduce the number of parts rejected.
Assuming a constant value of the duration of the rejected part of the sample equal to 6 ms at the reduced playback speed, the information loss is 'equal to the product of the compression ratio and the time 6' ms, so at c = 5 the current information rejected for each sample is 30 ms of the recording time. 5) su. As shown on the timeline of FIG. 3a, this is the range from the 7.5 ms point to the 37.5 ms point. Information intelligibility decreases faster than the recognition of single 'words when presenting messages with increased <sup>in </sup>speed, so the problem of rejecting a part of the signal can be solved for intelligibility except for the purict where the intelligibility of individual words is deteriorated. <sup>15</sup>
When compressing speech, the loss of intelligibility may be related. with the rejection of parts of the message, the length of which varies, along with which the shorter ones are approximately in length<sub>2</sub>θ 10 ms to 20 ms.
A time of 30 ms can be taken as the required upper limit for the drop period, with a time value of about 15 ms being recommended.
- Fig. 3a (shows the dependence of the rejected write time part on the compression ratio as a linear function c * JTmax in the range from 18 ms to 30 ms, which is the indefinite range of the rejected parts. c = 5 should contain 3<sub>0 </sub>real write time interval from t = 7.5 to t = 37.5, which is the upper limit allowed for rejection without excessive loss of intelligibility, as required so that there is no significant effect on the disappearance of self-conceived belief 35 . Smaller values for the coefficient c 'give a lower actual time of the rejected parts and hence intelligibility is improved especially for those signals that are at the lower end of the time scale, i.e. in the vicinity of 10 ms. 40
Table I and Fig. 3a show the parameters for a typical speech compression device having a final signal delay of 6 ms and define operating limits in fairly narrow ranges, however the principles contained herein can be applied to. a wider scope of work. Important factors in the design are changes in the actual frequency band of the speech signal · and (maximum delay line length, which factors affect the choice of the chunk-discard part ratio and the sampling period for a given compression ratio range).
Fig. 3b is a plot of the corresponding relationships for the expansion. of the signal, showing · the variation of the lead gap, the exit slice and the maximum length of the delay line as a function of the expansion coefficient for a given interval · time T of the input sample. The output gap occurs at the beginning of each sampling period and the remainder of the sampling period there is a 60 output segment with a reduced frequency and extended over time. - Also shown. the required maximum delay dTwe as a function of the expansion coefficient.
1, one aspect 65 of speech compression is not shown, namely the audio output of the transducer 26 as the variable delay processing unit 25 is switched from the maximum delay to the minimum delay at the end of the sampling period. Just before the handover, the delay line is loaded with a speech signal which is discarded, and if the line is immediately switched to a zero delay, all information is rather condensed instead of being cleared in the output signal.
Practically in the usual delay lines with R and L or C elements there is a time interval required to switch from maximum to minimum delay.
The switching frequency is always in. audible frequency range, and thus appears as an undesirable intemmcodiuLacym component in the audio output signal of the circuit. .
Fig. 4 shows a signal at a frequency of 333 Hz at the transition point of Fig. Id, in which cycle 4 and cycle 9 of the originally recorded waveform at 333 Hz are shown as a continuous, uninterrupted sine wave.
The connection between the end of cycle 4 and the start of cycle 9 at point 41 is not a smooth transition, and one should expect to miss between the end of one slice and the start of the next slice in subsequent signal samples. This omission can undoubtedly be mitigated without any loss of intelligibility if the transient due to a line switch, loaded or unloaded, is not present in exactly that. point in time. Since this transient appears very painfully in the audible output signal of the device, it must be eliminated. To this end, a gating signal as shown in Fig. 4b can be applied symmetrically to transition point 41 to produce the output signal shown in Fig. 4c.
By using a gating signal long enough to cover the transient due to line switching, acoustic noise is eliminated. This is not ideal as an audible gating signal is introduced. This effect can be reduced by using an output filter designed for a particular repetition rate. and a gating signal width for smooth transition as shown in Fig. 4c. The output response is * shown in Fig. 4d. '
A further improvement is possible by using a gating signal as the gain control signal and softening the edge of the signals at on and off, thereby achieving a gradual transition of the audible signal from off to state. on state, and a relatively smooth transition is obtained, as shown in Fig. 4e.
On. Fig. 5 is shown more comprehensively.
a crafted solution for bridging the gap between adjacent sampling periods. As shown in Fig. 5a, the abrupt transition is a sharp discontinuity in the speech signal and causes line switching noise to occur. By inserting a gating signal, a zero level gated transition can be obtained as shown in Fig. 5c. 'Transition (o is free from line-switching noise and extends existing zero signal level for the duration of the gating signal, and causes distortion not to be sensed by the average listener.
Due to the property of human hearing, which is the ability of the ear to synthesize a message and concentrate on it even in the presence of noise, it is possible to introduce the apparent or real component in the zero-level interval shown in Fig. 5c. Correspondingly selected noise or signal components with approximately the same amplitude and frequency may be inserted in this' du. Such an embodiment of the invention is illustrated in Fig. 5d. Do. filling the noise gap, an appropriate source and symmetrical switching can be used to input noise from the source into the signal channel during the gating interval.
Fig. 6 shows a preferred gap bridging method where two signal controlled delay lines are provided. The speech signal is fed to both delay lines, referred to as channel A and channel B in Figures 6a and 6b. These lines are signal driven to have symmetrical, complementary gain characteristics and overlapping delay characteristics as shown in Figures 6c and 6d. As shown in Fig. 6d, the delay control signals are in phase so that they overlap at least a section corresponding to the transient portion of the gain characteristics in Fig. 6c. The output signals of both delay channels A and B. are combined to form the combined output shown in Fig. 6e.
The delay lines used for channels A and B in Fig. 6 are one full-length delay line and one relatively * shorter delay line to remember the signal used to fill the gap. This arrangement reduces the cost of the equipment provided by the multi-sectional delay lines necessary to obtain the maximum delay to meet the device requirements. In addition, for devices where cost is not an important factor, two equal full-length delay lines may be used, and their control signals may be alternated so that the signal channel is one delay line first and then the other. thus giving a full signal period to bring the idle line back to a minimum delay state, before it is used again for signal transfer. For such symmetrical delay lines it may still be useful to have some overlap during the transition as shown in Fig.
6d, when applying the respective gain control signals to the image gain shown in. Fig. 6c.
Fig. 7 shows a speech compression / expansion device according to the invention. The apparatus includes a variable speed playback system 51 to which is connected a tape advance system with a manual speed adjuster 52. The signal is fed to an amplifier 53 with automatic gain control, which also passes the signal through a bandpass filter with cutoff frequencies set by the manual regulator 52, depending on the reproduction speed of the reproduction circuit 51.
The handheld regulator 52 also provides an amplitude adjustment signal to the fine pitch adjuster 54, which provides a signal to line 55 for adjusting the final amplitude of the linearly ramping signal controlling the delay change of the delay line as described below.
After passing through the amplifier 53, the signal is supplied to a delay circuit 56, e.g. a delay line, the delay of which can be adjusted between a minimum value and a maximum value. The control signal 57 supplied to the delay circuit 56 is obtained from the control circuit 58 it receives. as input for compression, sawtooth of line 59, or for expansion, an inverted sawtooth signal appearing from line 61 after passing through inverter 62.
The signal is only supplied to one of the lines 59 and 61 depending on the setting of the switch 63, which routes the signal from the sawtooth generator 64. The repetition period of the sawtooth pulses may be set using the hand control 65. A signal appears on line 66 simultaneously with the termination of the linear portion of the sawtooth signal and this signal is applied to the blanking pulse generator 67 to produce a blanking output pulse, the width of which can be adjusted by the hand regulator 68, and which is synchronized with the input pulse on the line. 66.
The output of delay circuit 56 is fed to blanking circuitry and amplifier 71, which carries or blocks the signal, depending on blanking pulse applied to line 72 from generator 67, and when blanking pulse B is not present, delayed signal is applied to acoustic filter 73 in bandwidth. -passage whose output signal 'is. fed to the acoustic playback element 74.
In addition to setting the amplitude for the sawtooth signal from the generator 64, which is done with the hand regulator 52, the absolute level of the applied voltage can be adjusted by the level regulators 60. .
The delay circuit 56 may generally be of any known type, in particular it may be a 360 degree RC filter where the resistance
65183 A shunt is a semiconductor circuit that changes the resistance in response to an regulated voltage or current. Generally, such delay lines have favorable properties in terms of distortion of the transmitted signal if the phase delay per degree is kept well below the maximum possible value of 90 °. • Accordingly, a line may- be designed to operate with a phase lag of at most 45 ° or 60 ° - per degree and quality N degree-<sup>10 </sup>it is not then referred to as a formula.
N> (6 or '8) <c (f<sub>m</sub>and<sub>X</sub>) dT max In the above inequality, the digits 6 and 8 represent the number of degrees for the highest transmitted frequency,. corresponding to a delay of 60 ° or 45 °, respectively, as - the maximum phase shift per degree, c is the compression ratio, fmax is the highest frequency passed through the line, and dTmax is the maximum desired signal delay defined by the maximum allowed rejection interval. There are known many other delay line designs that may be. controlled by a signal, and the invention is not intended to be limited to any particular form of the delay line.
The operation-device of Fig. 7 will be discussed in connection with Figs. 8a and 8b. 81 sampling signal. has an adjustable period, set by regulator 65, to produce an asymmetric sawtooth wave 'of signal 82 which produces a relatively long, linearly declining voltage followed by a short linearly rising voltage. This waveform is used directly on line 59 for compression, while - after inversion in inverter 62, its inverse is used on line 61 for expansion. The waveform of the signal 83 for the expansion is shown in dashed lines in Figs. 8a. For a variable delay circuit 56 which increases delays, as the drive voltage becomes more negative, the waveforms 82 and 83 have the correct sign for controlling the delay interval value.
The delay value 'is determined by the amplitude rule 52, according to the voltage level set with the level regulator 60.
Thus, the 'work point on signal wave 82 is selected for a given compression factor in relation to' the sampling period, which is a fixed combination for a given compression ratio, assuming that the maximum 'delay dTmax on system 56 is a fixed value , which is obtained by choosing the length of the line. according to 'according to the value of dT<sub>IN</sub>y as set out in Fig. 3a and Table I for the desired compression ratio. If the maximum signal delay is not constant, the discard period varies as evidenced by the description of Fig. 1, and it is required to adjust the signal amplitude appropriately to obtain the slope d required for the coefficient d. The compression factor c. Similar considerations apply to the slope of the signal waveform 83, which must be set to the appropriate d value for the expansion factor e. 65
The operation of the blanking pulse generator is shown in Fig. 8b. This generator generates pulses 84 of a predetermined width in response to the start pulse of the sample signal 81. . call received on line 66. Pulse. this can be applied to circuit 71 for gain control, has a changed trailing edge to reduce the transient signal, and provides a gradual build-up of audio signals that pass to the reproducing element 74.
The controller 68 is responsive to the quench pulse width B, which is set to the Required value for the duration of the movement of the delay circuit 56 through the short steep line portion of the sawtooth waveform back to its zero or minimum delay state. .
The blanking period B * and the expansion leakage period B are shown in Fig. 8c. The expanded slices with initial exit gaps are shown in Figure 8d. ·
The apparatus of FIG. 7 may also be used to substitute noise or gap-filling pseudo-signals as shown in FIG. 5. Source 75 provides input to filter 73 during blanking period. The switch 76 allows for filling or not filling as required. The gap filling signal from the filling source 75 may also be obtained from the amplifier 53.
Fig. 9 shows another embodiment of the device according to the invention. Parts 1 and 2 of Fig. 9, which are substantially the same as Fig. 7, have the same reference symbols and only changes and additions will be discussed. In addition to the delay circuit 56, a second delay circuit 91 is provided, which is also a delay line, which receives a signal from the amplifier 53. The output of the delay lines are fed to the respective blanking auxiliary circuits 92 and 93. The signals passing through the * -th blanking circuits 92 and 93 are fed to the gain and filter circuit 73 and then passed to the acoustic transducer 74 as described above.
The pulse generator .94 produces the pulses shown in Fig. 10a and has an adjustable pulse repetition time set by the setting of the handwheel 65. The output pulse from generator 94 is delayed by a delay circuit 95 and fed to the first sawtooth generator 96 in a timeless form. is applied to a second sawtooth signal generator 97.
The signal level of the sawtooth generators 96 and 97 is adjusted by the hand control element 60 and the amplitude control of the sawtooth signal is performed by the hand control element. As discussed previously, a fine tone control 54 can be used to slightly change the slope of the slope by changing the frequency within a small range.
By means of the regulators 68 and 70, the lengths of the blanking intervals 5183 are adjusted. generator. The outputs of the generators 96 and 97 are applied to respective delay lines to control the time delay of the signals traveling on the respective lines according to the supplied control signals. Using the c or e dials, the sign of the slope of the slope waveforms for compression or expansion can be set. ·
The level and amplitude controls of the generators 96 and 97 should be interdependently adjusted to select a relationship between the two slope waveforms. Also, the desired overlapping of line delays can be achieved by the use of delay and phase controls 95. , It is also possible to change the components. to obtain additional gating on the inputs of both delay lines whose output signals are switched and combined on a common channel to be fed to amplifier 73. This arrangement enables the part of the speech signal which is not used by a particular line to be discarded before it enters that line. and thus eliminates the need for these parts to be precipitated when lines are switched between active states.
Operation of the speech compression device in fig; 9 will be described with reference to Fig. 10. Pulse generator 94 provides the timing waveform of Fig. 10a. The generated pulse induces a waveform of C2 in the sawtooth generator 97, which produces the blanking pulse shown in Fig. 10c, 'with a width B, adjustable by the blanking pulse width adjuster 68. After the delay shown in Fig. 10b, pulse from generator 94 switches sawtooth generator 96, the produced waveform C1 is shown in Fig. 10b. In such an arrangement, the control waveform C1 for the delay circuit 56 overlaps with time wave C2 having a slope - of the same sign and including the rising portion of the sawtooth waveform C1.
With asymmetric time slots as shown in Fig. 10, the stuffing methods shown in Figs. 5 and 6 may be implemented. For courses C1 and C2 having symmetric rising portions and. drooping,. a solution with alternative switching of patterns 56, 91 of variable slices of the sampled speech signal subject to compression or expansion is preferred.
The choice of the relative lengths of the sampled signals passed through the circuits 56, 91 will typically be determined by the cost of providing the delay line. Thus, for a major delay line having a length suitable for the desired compression ratio, it will usually be more economical to have a relatively shorter line 91 used only for filling the gaps. On the other hand, two full-length lines that are alternately activated to pass sections of the sampled speech signal, providing sufficient time for the idle line to return to its minimum delay state, za18.
ensure any-needed overlap and maximum time span for smooth transitions. for the line to go to the minimum delay state before it processes the next attempt<sup>5</sup> hard - signal. speech.
The operation of the device of Figure 9 in filling the gaps is illustrated in Figure 10 and generally corresponds to the operation previously described with reference to Figure 5. * '
Fig. 11 shows the operation of the device of Fig. 9 on speech expansion, i.e. increasing the duration of a given utterance and increasing its composite frequencies - coming from the transducer moving from pred.<sup>15</sup> a die slower than the write speed. In this case, the sawtooth generators 96 and 97 have reversed waveforms. outputs, thus produce the waveforms of the E1 and E2 expansion signals shown in Figs. 11a and 11b, respectively, and the blanking waveform is symmetric such that delay circuits 56 and 91 are alternately used at approximately equal times.
With the expansion of speech. there is a gap in the output signal - always because the delay lines are driven to change the delay from a maximum value at the beginning of sampling the signal to a minimum or zero value at the end of sampling the signal. Thus, when a line is switched to maximum delay, there will always be a time gap before a delayed signal appears at the output end of the line. Using the control sequence shown in Fig. 11 sampled speech signals processed by <sup>x</sup>Arrangements 56 and 91 overlap to fill the gap as shown in Fig. 12d with solid and broken line slices of signals ΕΪ and Έ2. The presence of a slight overlap in the produced signal does not interfere noticeably with understanding, as it is usually imperceptible and, in the worst case, may result in a slight echo effect.<sub>45</sub> pu commonly found in a telephone conversation.
The device - shown in 'Fig. 12 is a simplification of the device of Fig. 9, in which the delay circuit 101 constituting the delay p 5 line.<sub>0</sub> a fixed delay is used in place of the second variable delay line of Fig.
9. The control of the 'blanking circuits 92' and 93 'is simplified in that the blanking signal with a variable width B, supplied from the pulse generator 55 94, produces corresponding gaps in the output signals that have been delayed by passing through circuit 56 - retarding. The fixed delay of circuit 101 is adapted to additionally delay certain components<sup>60</sup> of the signal supplied from delay circuit 56 by an amount suitable to fill the gap caused by a 'width B' blanking pulse, whereby a portion of each message slice is repeated when circuit 56
65. delay is attached back to stand and
# 9163. 26 beep during signal B<sub>2</sub>and gate 105 is locked during signal B2 to pass the signal through during signal B<sub>2</sub>. The amplifier 109 combines the output signals of the gates. 104 and 105 and do5 runs connected. signal to the acoustic transducer 110.
In operation, the apparatus of Fig. 15 reconstructs the entire original signal with a compression ratio of two, as each delay line 10 processes the part that is the part rejected for the other line, as seen in Figs. 16a and '16b. Some message rejection takes place for compression ratios greater than two, and for compression ratios. less<sup>15</sup> higher than two, there is qrn overlapping or repetition in the output signal. By listening with both ears, understanding of the message is increased, since complete rejection is eliminated or significantly reduced for higher compression ratios, and message overlap or repetition is not detrimental to the listener's receipt of the message.
A device used to listen with both ears and used without additional gap filling is obtained by removing gates 165 and 166 from Fig. 15. Lines VDLx and VDL<sub>2 </sub>they then alternate the signal to the respective output converters 108 and 110.
Fig. 17 shows an embodiment of the device according to the invention with a line. delayed adapted. for processing speech signals in a way that the problems associated with discarding information stored on the line are greatly reduced. The apparatus shown in FIG. 17 includes an analog shift register having a plurality of ASR stages<sub>p</sub> ASR ^ ... ASRn.
Speech input is provided on line 111 and the compressed or expanded speech output is provided on line 112. Individual stages of the delay line are triggered by bi-phase synchronization signals supplied to lines 113 and 114 from the pickoff frequency generator 115. The frequency variation of generator 115 is such that the reciprocal of the timing frequency, or rather the pulse period, changes as a linear function of time by varying the frequency from the highest to the lowest. (in the case of compression and from the lowest to the highest in the case of expansion.
The shift registers sample the analog signal and drive the sampled value along the line at the synchronization speed while memorizing the load or. no charge, allowing the signal to be sampled at the output of the delay line after a delay time which is proportional to the synchronization speed.
When changing the synchronization speed so that its reciprocal is a linear function of time, the delay line expands or compresses the speech signal by adjusting the speed. line. and the linear repetition rate of pounds
Ó minimal delay. This repetition is not unpleasant 4 may introduce only a slight echo, which is far less unpleasant than the presence of a gap in the message signal. This sequence of operations is illustrated in Fig. 13, wherein the variable slice Cv and the constant slice C<sub>r </sub>alternately in the output signal.
The operation of the circuit of Fig. 12 during the expansion is illustrated in Fig. 14, where the signals are inversely sloped and the waveform for the expansion controls the delay circuit 56, varying the delay from maximum to minimum with time. a linear (sloping portion E shown in Fig. 14a. The blanking waveform B is chosen to subject a portion of the signal slice to a delay suitable to fill the gap between the slots in the output signal, as shown in Fig. 14c. Thus the output signal is composed of alternating slices Ef and Ev forming a continuous signal *
The device of Fig. 12 may be <sup>x</sup> further simplified by eliminating the delay line 101 and making the gate 93 'such that it introduces a pseudo-signal or noise from an appropriate source in the gap interval simulating the content of an actual speech signal. This solution is worse. than using the actual speech signal to fill the gap, 'however, it is better than reconstructing the speech signal in the presence of gaps in the message, since the audible effect of these gaps is detrimental to message content recognition, especially at high compression rates. The noise filling method is similar to that discussed with reference to Fig. 7.
Fig. 15 shows another embodiment of an apparatus according to the invention for signal processing for both ears. Speech from bandpass filter 53 is fed to symmetrical VDL1 and VDL2 variable delay delay lines controlled by generator 102. Signal 4 Output from VOL1 is fed as Input to gates 103 and 105.
The output of the VDL2 line is fed as an input signal to gates 104 and 106. 45
Delay line VDL1 is driven to linearly change delay according to the signal wave of Fig. 16c and the VDL2 line is driven to linearly change the delay according to the signal wave of Fig. 1d. Each of these<sub>5Q </sub>The gears have a fast return transition at the midpoint of the linear deceleration segment of the second run.
Gates 103 and 106 are controlled by the gating waveforms B<sub>vol</sub> and 'shown in fig.' 16e. Gate 103 passes the signal through the course of wave B<sub>vol</sub>, a is disabled during signal B<sub>r </sub>Gate 106 is blocked on signal Βχ and passes the signal through on signal B<sub>r</sub> The amplifier 107 combines the outputs of the gates 103 and 60 106 and provides the combined signal to the converter 108.
Gates 104 and 105 are driven by gating B signals<sub>2</sub> and b<sub>2</sub> shown in Fig * 16f. Gate 104 is blocked by signal B<sub>2</sub> and pass 65 control according to the above rules, continuous processing of random speech signals is achieved. By compressing at the end of each line segment of the control function produced by generator 115, all stages of the delay line may be disabled if a disable input is available, or the line may simply be flushed during the blanking period as the line is re-loaded at the start of the next speech signal segment at high-speed synchronization. This speed can be chosen so high that the decay is so short that it is imperceptible. In this way, obstacles related to gap filling, smoothing or blanking can be kept to a minimum in this version of the invention. '
The parameters for designing the analog shift register may be determined by taking the previously given criteria as will now be described.
The instantaneous delay τ (t) of the analog shift register at time t is equal to τ <t) = dt + το, where d is the rate of change of the delay and το is the initial delay. In a register with N p — 1 1 degrees, the delay dt is equal to N -— ϊ— p<sup>and</sup>t where ft is the frequency of the shift signal p -1 in time t. Marking N as Ν ', delay
P. .
is equal to where fo is the initial frequency of the shift signal.
The slopes of the delay time function for reproducing the original speech frequencies are the same quantities as before. For compression
C't = JTt = Total delay for incoming signal at time t.
= (c - l) t for the compression ratio c and
<img file="PL95183B1_D0001.tif" />
On the other hand, for the expansion for the coefficient 'e expansion -and
<img file="PL95183B1_D0002.tif" />
Thus, the inverse of the sweep frequency as a linear function of time multiplied by N 'gives the delay needed to achieve compression or expansion of speech while maintaining the original speech frequencies.
In Fig. 18, the switch-off time tN for evacuating N steps is.
<img file="PL95183B1_D0003.tif" />
which is the time taken to re-inject the first N pulses into the line 5183. By suppressing the transitions from sample switching by filtering or blanking, or the other method described, and maintaining time t<sub>N </sub>at values below 0.2 ms, the previously discussed gap intermodulation effect becomes virtually imperceptible.
Note that there is a limitation on the sampling timing due to the highest frequency fmax of the signal having to be passed through the line. As shown in graph 201 in Fig. 25, under compression, the frequency of the signal linearly decreases as it passes through the delay line. The timing frequency changes as a hyperbolic function 202, and throughout the sampling period must be equal to or greater than the value in plot 201 for which the relationship is given by the formula (for a two-phase analog register it is equal to 4fmax, to provide at least two samples per frequency cycle fmax)
Fig. 18 shows the embodiment of the analog shift register of Fig. 17. Analog register delay line 121 ASR processes the input signals from line 122 according to a variable sweep frequency from the square pulse generator 123 as previously described in connection with Fig. 17. The frequency of the pulses is such that the spacing of the pulses varies linearly as shown in the pulsed signal source 124, where the reciprocal of the frequency is linear as a function of time.
At point 125 of the analog shift register, the wire branches to give two paths 126 and 127 which are the steps of the shift register. The number of steps required in each marked square 126 and 127 is appropriate. to continue signal processing while line 121 is turned off. The branched outputs from stages 126 and 127 are additionally gated by gates 128 and 129 and, when triggered to pass the signals, provide input signals to the summing amplifier 130. In addition to controlling main lines 121-126 from generators 123 and 124, branch line 127 is driven by gate B signal 131 from pulse generator 124 which turns on second square wave generator 132 and, when signal B is time gated by gating element 133, speed turn-on for generator 132 is output from pulse generator 134. Pulse generator 134 may also operate at a pulse rate of y-.
Operation of the apparatus of Fig. 18 may be described in terms of the signal in lead 135. For a given sample period, the frequency of the generator 124 starts to vary and controls
65183
24 register line 121 as described above. In this state, signal B allows signals to pass through, and the output of stage 126 is applied to the input of amplifier 130, producing the frequency-changed output signal shown in the sample period. At the same time, signal B of the gate 131 allows the pulse control signal from generator 124 to turn on generator 132, thereby keeping the operation of branch register stages 127 in sync with corresponding stages 126.
The blanking signal B of the gate 129, however, prevents the output from stage 127 from reaching the input of the amplifier 130. During the blanking or off period of main line 121 of the register and generator 124, the gates switch, thereby interrupting signal flow from stage 126 to amplifier 130 and allowing signal flow from stage 126 to amplifier 130. 127 stage to the input of amplifier 130. Since the steps 126 and 127 were synchronized, this switch is done with identical signals, so it is imperceptible on lead 135 from the amplifier 130. At the same time, the switching of gates 133 and 131 causes the turn-on pulses of generator 124 to be interrupted and the turn-on pulses of generator 124 to pass. 134 to a square wave signal generator 132. This switchover ensures that generator 132 continues to process the signal in steps 127, while generator 124 can be turned off to begin the next sampling.
At the end of the blanking period, there is some discontinuity as signals B and B are switched back to their original state by switching generator 124 back, since the start of the next sampling period does not produce signals that match the signals at the end of the blanking pulse that were driven pulse generator 134.
Fig. 19 shows another embodiment of the apparatus of the invention in which a variable delay delay line driven by a variable frequency generator 136p is operated with a repetition rate control γ analogous to that described with reference to Fig. 17.
In FIG. 19, instead of passing the analog signal through the successive stages of the shift register, the output on lead 137 is first converted to a digital converter 138 in a converter 138 whose output is fed to the input registers SR of the first stage 139. This digital quantity is successively passed through a series of degrees, all the way to the output converter 140, where it is converted to an analog signal appearing at s, i and on lead 141. The operation is completely analogous to that described in Fig. 17, except for the encoding of information passed through a series of stages which are actuated at a variable sync frequency, providing the required frequency conversion.
The apparatus of Fig. 19 has the advantage of providing a trip pulse from generator 136 to lead 142 that can be applied to all registers and all stages simultaneously, causing an immediate emptying. <sup>5</sup> or turning off the line at the end of the sample period.
Fig. 20 shows another embodiment of a device according to the invention which is analogous to that shown in Fig. 19. except that the digital signal is serially processed by serial<sup>10</sup> register 150, after the digital output of converter 138 has been lined up in the scheduler 151. The shift register 150 is controlled by a shift frequency generator 136, · having a disable lead 142. The signal<sup>15</sup> the output of the serial digital shift register 150 is coupled to a parallel circuit 152 that converts the serial bit string into a parallel digital word for transform. they value it by using a converter 140 to the required analog output on lead 141.
Fig. 21 shows another embodiment of the device according to the invention in which it is applied <sub>23</sub> an analog memory matrix enabling the addressed writing and reading of the signal memory, the payload memory male 161 has multiple X write lines 162 and multiple Y write lines 163, the intersections of which represent the matrix addresses where <sub>30</sub> placed analog memory elements. Typically, the analog memory matrix at each intersection of the X and Y 'lines has a charge capacitor memory component, -co * is a matrix for patching the analog value determined by the capacitor charge. All such memory locations are also accessible by a plurality of X-read lines 164 and a corresponding number of Y-read lines 165, with the intersection of lines 164 and 165 being the location of the memory element 40 located at the intersection of record lines 162 and 163.
To store the analog signal in the stored charge memory 161, an analog is applied to the lead 166 <sup>4</sup>5 the input signal and its instantaneous value is stored in the charge memory element associated with the simultaneously energized lines X and Y of the record, enabling the 'writing of the X 167 counter and the recording of the Y counter
168.
Typically, counters 167 and 168 operate at a steady pulse rate controlled by a pulse generator 169, with the specified number of pulses running line X 162, then advancing the Y counter 168 and energizing the next series of intersections on the then triggered line Y by a sequence. pulses from the pulse generator 169. Accordingly, the memory capacity is equal to the number of cuts of the X and Y lines and is XXY memory elements. With the generator running. 169 pulses at a fixed frequency, the writing of the analog signal on lead 166 is at the preset speed, and the memory capacity is taken up to store the sampled signal.
-. 25 conforms to the general requirements set out above.
The variable frequency output is output from the output 171 to which the analog values stored in the charge memory elements 161 are serially fed when the 'matrix intersection points are' regularly selected by operating the readable counter X 172 and the readable counter Y 173. The pulse repetition rate for counters 172 and 173 is determined according to the sawtooth generator 174 driving the controlled variable voltage oscillator 175. speed selected to produce the desired compression or expansion of the signal in accordance with the principles of the invention. For this purpose, a speed control potentiometer 176 is provided to adjust the voltage wave in the generator 174. Dual control is provided. indicated by line 177.
Further adjustment from the speed control potentiometer 176 is transmitted on line 178 to the pulse generator 169 to control its pulse repetition rate, depending on the maximum read speed as determined by the control of the sawtooth voltage generator 174 and the oscillator 175. In particular, the speed of the write pulses must be kept faster. than the maximum speed of the read pulses d to avoid writing advance by reading. After reading the memory element, it is possible to store the value of the next signal sequence, and the memory element may either be turned off during reading or when inputting the next recorded signal. A sawtooth generator 174 turns off the counters by draining 179 on. end of each sawtooth voltage period, to begin storing the next sampled signal.
Fig. 22 shows a memory device 181 with * random access, with read and write controls 182 and 183, which works in a manner identical to that provided in the device of Fig.
21. Since memory 181 stores binary information, the input from lead 184 should be processed in converter 185 and the output signal must be processed in converter 186. The write and read performance for the memory matrix corresponds generally to that described in FIG. 21.
In filling the gaps, special measures are taken to minimize the interferences caused by discontinuities at the beginning and / or the ends of the signal sampling as shown in Fig. 23 when gated with the signal shown in Fig. 24. The logic controls are here arranged so as to cause the original zero point signal to terminate 191 and begin a complementary gap fill signal 192 at its next zero point of the same transition direction, and then, at the end of the blanking period of this original signal, terminate signal uu0518 & lt;
null followed by a new sampling 191 of the original signal at its next zero point with the same direction of transition. Thus, signals 193 and 194, after being filtered by lowpass filters 195 and 196 to remove high frequency input, are applied to gates 197 and 198 and voltage comparators 199 and 200, these comparators being so grounded through directional circuits 201 and 202 that they turn on pulse generator 203 or 204 whenever there is a zero value on ramp of signal 193 or 194. Gates 197 and 198 are driven from flip-flops 207 and 208 via leads 205 and 206 and pass signals 193 and 194.
The flip-flop 207 is turned on by a pulse on lead 209 from gate 211 when the gate is opened by lead 213 from trigger 208 and by inverted output signal 216 from sample period pulse generator 219. The flip-flop 287 is turned off by the output of the gate 217 when it is opened by the direct output signal 215 from the pulse generator 219 '. Likewise, the flip-flop 208 is turned on by the pulse 210 of the gate 212, and it is opened by the output on the lead 214 from the flip-flop 207 and by the direct output 215 of the pulse generator 219. The flip-flop 208 is turned off by the output of the gate 218 when it is opened by the inverted output of the pulse generator 219.
Gate pairs 211 and 217 or 212 and 218 are opened by the output of the pulse generator 203 or 204, respectively, whenever there is a signal zero in its rising portion, as described above. With flip-flop 207 on, allowing primitive signal 191 to pass, and flip-flop 208 off, blocking filler signal 192, when output waveform 215 of pulse generator is positive, as in portion 220, the gate allows flip-flop 207 to be turned off by the next signal from pulse generator 203. thereby blocking the original signal. At the same time . gate 212 passes the next pulse from the pulse generator 204 to turn on the flip-flop 208, which allows the supplemental signal to pass until the end of the gap period. At this time, the inverted output signal 216 from the pulse generator is positive as in section 221, allowing gate 218 to pass the next pulse from pulse generator 204 and disables the flip-flop 208, clipping complementary signal 192 and allowing gate 211 to pass the next pulse from pulse generator 203 . This last pulse turns on flip-flop 207; allowing original signal 191 to pass to amplifier 222 and output to an lead 233. This process is then repeated in the order described above.
Fig. 26 shows a device with a double delay line having analog
21 shift registers with different read and write speeds. Input 231 feeds input audio from any source, such as a tape recorder driven at a speed other than the write speed, or some other source of signal to the<sup>5</sup> a signal that is to be frequency-processed and whose duration is to be changed from zero to a slightly longer or shorter time than the normal period during which the sound occurred in the original. <sub>10 </sub>The signal from input 231 is driven to feed to the analog ASRx shift register by passing through the G gate 233 and controlled to feed to the analog ASR shift register<sub>2</sub> by passing through the G 234 gate. Output signals of the ASRx and ASR registers<sub>2</sub> are combined at output 232 after passing from the ASR register output<sub>x</sub> via gate G 235 and from the ASR register output<sub>2 </sub>via gate G 236. 20
Analogue ASR registers<sub>x</sub> and ASR ^ shift registers are multi-stage registers adapted to pass the input signal through successive stages to the output, the shifts taking place at a sync rate determined by the speed of the sync pulses supplied to leads 237 and 238. Number of register stages to be run through non-sampled analog signals as described above.
In particular, the generator S<sub>x</sub> speed of the write pulses provides an adjustable speed of repetition of the write pulses through gate G 241 to input 237 and through gate G 242 to input 238. Generator S<sub>2</sub> speed of the read pulses provides a constant speed of the read pulses through gate G 243 to input 237 and through gate G 244 to input 238. Gates G and G are powered by generator S<sub>3</sub> pulses gating <sub>40 </sub>which may have a settable period and produces a substantially symmetrical square wave output for both the gating functions G and G.
The speed of the write pulses' produced by the generator S.<sub>x</sub> is variable and is generally set to a variable speed control system 245 regulating the speed at which a tape recorder or other audio signal source reproduces the sound signal, different from the speed of the original speech. The speed controller 245 is set to the speed of playback by the tape recorder, for example twice the normal speed, then the write sync pulses from the generator Sx may be set to twice the speed of the sync speed of the generator S<sub>2</sub>, thus ensuring typing at speed. a sync chip that is twice the speed at which the information will be read when the signals of the generators S<sub>x</sub> and S2 are alternately fed into shift registers, et W of generator S.<sub>x</sub> a feedback controller 246 may be used to vary the sync frequency of this generator in accordance with the error signal for swing and jitter compensation of the Rotary plate and u and b for other periodic variations of W in the signal source, which should be · elimino-. important.
Generator frequency 'S<sub>3</sub> The square wave signal may be adjusted by the controller 247 and generally its period T will be determined by where P is the phase of the analog shift register, i.e. two phases per step, and N is the total number of steps. On expansion, in order to avoid gaps, period T should be
<img file="PL95183B1_D0004.tif" />
For this, with manual generator adjustment S<sub>x </sub>the frequency regulation of the generator S can be combined<sub>3</sub> with regulator 247.
In addition, regulators 248 and 249 may be used for the generators S2 and 'S<sub>3</sub>if desired.
Operation of the apparatus of Fig. 26 will be discussed in relation to the signal waveforms of Figs. 27a and 27b. The general working principles described above apply, and the compression factor C is equal to the ratio -, where f<sub>x</sub> and f2 are the frequencies fa of the square-wave signals produced by the generators S.<sub>x</sub> and S2. In the case of expansion, the coefficient c is a fractional value and corresponds to the expansion coefficient e discussed above. Inputs to lead 231 are gated by gate 233 and load the ASR<sub>x</sub> during the portion of the G-gate shown in Fig. 27a, and the stages of the ASR register<sub>x</sub> are filled at the rate determined by the rectangular sync waveform on lead 237 which is taken from generator S.<sub>x</sub> through the G 241 gate. During this period there is no output from the ASRp register, but to ensure the absence of false or noise signals at the output, the G 235 blocks the signals from the ASR register output<sub>x</sub> at output 232.
W '(G gate duration, generator S2 applies clock pulses to lead 238 to shift register ASRg, and gate G 236 passes signals from the output of this ASRg register to output 232.'
At the moment that the generator S<sub>3</sub> The square wave changes state, the G signals of the gates pass the signal, and the G signals of the gates block the signal from traversing. During the signal intervals' G shown in Fig. 27lb, the signals from input 231 are passed through · gate 234 · to the ASR? with the generator synchronization speed Sp supplied through the gate G 242 to the lead 238 and the signals stored in the ASR register<sub>x</sub> are supplied through gate 235 to output 232 at generator speed S2 supplied through gate 243 to lead 237.
With the alternating half cycles of the G and G signals shown in Fig. 27, the input signal
95ί &
2S is alternately <stored in the ASR registers<sub>X</sub> and ASR<sub>2</sub> and while storage in one register is taking place, a signal stored in another register is outputted to output 232. The speed is determined by <sup>5 </sup>the repetition rate of the S generators<sub>x</sub> and S.<sub>2</sub> and for different frequencies of these generators at the output 232, compression or expansion of the signal from input 231 may be obtained. Thus, a further form of storage delay is provided. <sup>io </sup>signal processing for frequency conversion using analog shift registers controlled at different input and output speeds. This solution enables the processing of analog signals from input 231,<sup>15</sup> containing complex speech and the like without having to digitize or otherwise process the input waveform to perform delay and frequency transformations. '<sup>20</sup>
A further advantage of operating the analog shift registers at different output and input synchronization rates, compared to their operation as variable delay lines, is that they eliminate the need for a generator with an inverse frequency control function. In the embodiment of Fig. 26, the sync rates are constant but different for controlling the input and output of the analog shift registers, and<sub>3</sub>θ the ratio of the sync speed directly determines the compression ratio or expansion ratio that is applied to the signal passing through it. Although the invention has been described with reference to<sub>55 </sub>to the frequency-time transformation of the original signal, the provided examples of solutions also apply to the frequency transformation depending on other factors, such as the change of the propagation velocity of the sound waves. For<sub>40 </sub>For example, a person living in an artificial atmosphere with a high helium content speaks with a higher-than-normal voice timbre but other parameters essentially unchanged. By using the speech compression according to the invention, speech<sub>45 </sub>such can be restored to its normal frequency range without changing the timescale.
The devices described herein can of course also be used for acoustic signals other than speech, such as, for example, music, given the relevant parameters relevant to reception. Many other modifications may be made within the scope of the invention. '
4 sheets
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48 members in 25 offices
Priority claims7
| Document | Office | Kind | Date |
|---|---|---|---|
| 17157171 | United States of America | A | |
| 17157171 | United States of America | A | |
| 22403572 | United States of America | A | |
| 22403572 | United States of America | A | |
| 1971171571 | – | – | – |
| US19710171571 | – | – | – |
| US19720224035 | – | – | – |
Members48
| Document | Office | Kind | |
|---|---|---|---|
| IL40057A0 | Israel | A0 | |
| BE787492A | Belgium | A | |
| NL7210770A | Netherlands (Kingdom of the) | A | |
| DE2238136A1 | Germany | A1 | |
| FR2150067A5 | France | A5 | |
| JPS4835703A | Japan | A | |
| BR7205491D0 | Brazil | D0 | |
| DD100347A5 | German Democratic Republic (until 1990) | A5 | |
| IT962099B | Italy | B | |
| US3786195A | United States of America | A | |
| LU65886A1 | Luxembourg | A1 | |
| AU4542572A | Australia | A | |
| ZA725451B | South Africa | B | |
| US3813396A | United States of America | A | |
| US3828361A | United States of America | A | |
| NL7401915A | Netherlands (Kingdom of the) | A | |
| DE2404282A1 | Germany | A1 | |
| FR2217754A2 | France | A2 | |
| US3846827A | United States of America | A | |
| AR201269A1 | Argentina | A1 | |
| US3869708A | United States of America | A | |
| CA965014A | Canada | A | |
| HU166544B | Hungary | B | |
| JPS5089002A | Japan | A | |
| IL40057A | Israel | A | |
| CH564815A5 | Switzerland | A5 | |
| GB1406831A | United Kingdom | A | |
| PH9570A | Philippines | A | |
| US3936610A | United States of America | A | |
| SE383934B | Sweden | B | |
| CA988859A | Canada | A | |
| ES405791A1 | Spain | A1 | |
| GB1462203A | United Kingdom | A | |
| FR2217754B2 | France | B2 | |
| PL95183B1This record | Poland | B1 | |
| SU656557A3 | Soviet Union (until 1991) | A3 | |
| ATA699872A | Austria | A | |
| AT354126B | Austria | B | |
| JPS551596B2 | Japan | B2 | |
| CS195258B2 | Czechoslovakia (until 1993) | B2 | |
| DE2404282B2 | Germany | B2 | |
| DE2404282C3 | Germany | C3 | |
| NL172200B | Netherlands (Kingdom of the) | B | |
| NL172200C | Netherlands (Kingdom of the) | C | |
| JPS592039B2 | Japan | B2 | |
| DE2238136C2 | Germany | C2 | |
| NL182519B | Netherlands (Kingdom of the) | B | |
| NL182519C | Netherlands (Kingdom of the) | C |
Numbers
- Publication, DOCDB
- 95183
- Publication, EPODOC
- PL95183B
- Application
- 157037
- Application, DOCDB
- 15703772
- Application, EPODOC
- PL19720157037
Classification
- CPC, 8
- H04B3/10
- G10L21/04
- G11B5/00
- G11B21/00
- H03K4/502
- H03K7/08
- H04B1/66
- H04B1/662
- IPC, 11
- A47L9 10
- A47L9 14
- G10L21 04
- G11B5 00
- G11B21 00
- H03H7 30
- H03H11 26
- H03K4 502
- H03K7 08
- H04B1 66
- H04B3 10
