Organic solder dam for a semiconductor device.

0001This invention relates to a process for defining a solder barrier utilizing a silylated photoresist. In joining a semiconductor chip to a substrate, a solder joint is employed to provide the necessary electric coupling between the microminiature semiconductor component and terminal metallurgy on the substrate surface. This invention is directed to a process and the resulting structure of employing a high tempera­ture organic solder dam to isolate the terminal area on the substrate from the overflow of solder during the joining operation.

0002In the manufacture of semiconductor devices, a number of semiconductor chips are joined to a substrate. Typically, solder contacts are employed. Such are shown in U.S. Patents 3,392,442 and 3,495,133. The solder ball, generally comprising a solder alloy of tin and lead collapses in a controlled manner to provide the necessary connection. During this controlled collapse of the solder ball, it is necessary to provide a stop-off or solder dam to prevent solder material from spreading and typi­cally running down the circuit line.

0003In the 3,392,442 patent, the solder mounds are deposited respectively on a composite of contact metallization which comprises layers of chromium, copper, and gold which are vacuum deposited to provide the desired electrical contact to aluminum land 26. It is recognized in the art that the chromium deposit is necessary to establish the necessary isolation of the contact area such as clearly is illustrated in Figure 3 of the 3,392,422 patent.

0004Reference is made to IBM Technical Disclosure Bulletin, Volume 16, No. 11, pp. 3610-3611 (April 1974). This TDB discloses techniques of joining semiconductor chips to a substrate by means of a lead-indium solder joint. It is recognized, where controlled collapse chip connec­tions (C4) are employed, isolation of the terminal area is required. Consequently, glass is used in one embodiment, chromium in another, ceramic in a third and silicon dioxide in a fourth implementation of the isolation structure.

0005In another known process, chromium-copper-chromium blankets are successively deposited onto the substrate. The deposition may be vacuum deposition or sputtering. The first layer of the chromium acts as an adhesion barrier between the copper layer and the ceramic or polyimide forming the substrate material. The inter­mediate copper layer is the conducting circuit layer as in the case of the 3,392,442 patent. The top chromium layer is employed as the solder stop-off or solder dam layer. Thus, as in the case of the 3,392,442 patent, this solder dam prevents run off of solder from the solder ball forming the C4 interconnection from contaminating adjacent portions of the substrate. Typically, the solder during collapse tends to run down the circuit line of the chip to be interconnected, thereby ruining that chip. Consequently, as recognized in the art, the top chromium layer is the key to having control collapse of the solder ball in achieving positive chip connection without run-off.

0006In accordance with this technique and by the extension of that described in the 3,392,442 patent, circuiti­zation of the blanket layers, that is chromium-copper-­chromium requires two complete photolithographic and etching processes. The first step defines the circuitry, or personalization and the second creates the solder dam. The second step is, therefore, a select etch. The photo­resist of choice is currently KTFR (trademark of Kodak Co.), a negative photoresist which comprises a partially cyclized poly-cis-isoprene with an average unsaturation of one double bond per 10 carbon atoms and 2,6-bis(p-azido­benzylidene)-4-methylcyclohexane as sensitizer compound. Etchant of choice is KMnO₄/KOH as a chromium etchant and FeCl₃/HCl as the copper etchant.

0007One of the difficulties in using this choice of materials is the inability of achieving fine line resolution. An­other problem is that of stripping. Consequently, within the technology, there exists a limitation on line reso­lution which may be achieved and, therefore, overall den­sity of the device. The potential use of a positive photoresist would provide a solution. However, a positive photoresist cannot be used because it is incompatible with the use of the top chromium layer. The incompatibility is that when the chrome layer is etched the positive photo­resist will also be etched in the same step. Thus, given the use of chromium, the only reliable etchant used to date has been KMnO₄/KOH.

0008Another problem with the use of a negative photoresist such as KTFR is the use of the particular stripping material. J100 (trademark of Indust-Ri-Chem Lab., Richardson, Texas) which comprises the Na-salt of an alkyl naphthalene sulfonate, free sulfonic acid, and tetrachloroethylene, o- and p-dichlorobenzene, and phenol, is currently employed. This material is con­sidered aggressive and presents environmental and health problems. Moreover, it must be used under extremely controlled conditions to prevent yield losses on the product.

0009Consequently, given the limitations in the technology, the definition of a system which would allow the use of a positive photoresist offers numerous advantages. However, to use standard positive photoresists, the requirement of top level chromium as a solder dam must be eliminated. This is because chromium is etched by basic solutions such as NaOH or KOH which, in use would be destructive to the positive photoresist. Con­sequently, there existed prior to this invention no technique by which a positive photoresist can be used compatibly with a chromium solder dam layer.

0010Given these deficiencies in the prior art, the object of this invention is a technique of depositing a high temperature organic solder dam and the resulting package structure. The object of the invention is achieved according to claims 4 and 1.

0011This invention employs a silylated photoresist. Such a photoresist comprises a plasma-resistant polymeric material which is prepared by reacting a polymeric material containing reactive hydrogen functional groups with a multifunctional organometallic material containing at least two functional groups which are reactive with the reactive hydrogen functional groups of the polymeric material. Such a material can be hexamethylcyclotrisilazane. A silylated photoresist of this type suitable for this invention is described in detail in U.S. Patent Application Serial No. 713,509, entitled "Plasma-Resistant Polymeric Material, Preparation Thereof and Use Thereof", filed on March 19, 1985 by Babich et al (≙ EP-A 0 198 215). This disclosure of that commonly assigned patent application is expressly incorporated herein by reference.

0012This invention, therefore, is directed to a specific use of a silylated photoresist as a solder dam layer joining of semiconductor devices to a substrate. This material is used in place of the chromium layer in the process described herein.

0013In accordance with this invention, a semiconductor substrate is provided with a blanket Cr-Cu deposition. The positive photoresist is then blanket covered over the Cr-Cu layer. The photoresist is then exposed and developed to obtain the necessary personalization. Metallization lines defining the circuitry are then defined by appropriate etching. The positive photo­resist is then stripped followed by etching the bottom chromium layer. The solder dam is then created by reapplying a second positive resist pattern which is exposed and developed to provide the desired connection patterns. The positive photoresist is then silylated and baked. In accordance with this invention, the resulting silylated photoresist is left in place to define the solder barrier.

0014Using this invention, improved line resolution is attained. Importantly, the requirement for top chromium is eliminated. This in turn reduces the number of processing steps such as top chrome etch which is required in the definition of the solder barrier. Moreover, the process of photoresist stripping is eliminated and this requirement for the use of aggressive and environmentally unsafe material is eliminated.

0015This invention will be described in greater detail by referring to the attached drawings and the descrip­tion of the preferred embodiments as follows. <ul id="ul0001" list-style="none"><li>Figures 1 through 4 are schematic sectional views illustrating various steps in the process of this invention; and</li><li>Figure 5 is a schematic section view of a portion of a completed device illustrating the silylated photo­resist in place as a solder dam.</li></ul>

Description of the Preferred Embodiment

0016Referring now to Figures 1 through 4, the process in accordance with this invention is illustrated. Figure 1 illustrates a portion of a substrate that has received intermediate processing. As illustrated in Figure 1 onto a substrate 10 a blanket layer 14 of chromium and a blanket layer 16 of copper are deposited. A positive photoresist 18 is deposited over the chromium copper layers 14 and 16. Figure 1 illustrates the exposure, development and etching of the positive photoresist 18 to define the personality pattern.

0017With this intermediate structure then defined, the copper layer 16 is etched with an appropriate copper etchant. Such is illustrated in Figure 2. Thus, the openings 20 and 22 which define the personality pattern extend through the copper layer 16 and terminate at the chromium layer. An appropriate copper etchant is FeCl₃/HCl, CuCl₂ or the like. Following this definition of the personality pattern the photoresist is stripped away with an appro­priate stripper. Then, using the etched copper as a mask, the bottom chromium layer 14, is etched in appro­priate chromium etchant. Such may be KMnO₄/KOH or any appropriate chromium etchant. Alternatively, the chromium may be etched with the positive photoresist layer in place, that is, immediately following copper etch, but prior to stripping of the resist layer how­ever, the chromium etchant may remove the positive photoresist.

0018Figure 3 illustrates the next salient intermediate step in accordance with this invention. The second layer of a positive photoresist 24 is blanketly applied over the copper layer 16 filling the openings 20 and 22. This photoresist 24 is then exposed and developed to provide the select patterning for the solder barriers, I/O (input/output) patterns and the like. Those openings 25 are illustrated in Fig. 4 as to the select pattern where the solder dams are placed. The positive photo­resist is then silylated and baked. This is accomplished in accordance with techniques which are disclosed in the aforementioned U.S. application Serial No. 713,509 which has been incorporated herein by reference.

0019It is noted that the silylated photoresist is left in place as the solder barrier. Processing then occurs in accordance with established techniques such as described in U.S. Patent 3,392,442. That is, solder is deposited into openings 25 via immersion in a molten solder bath or the like. Such is well known in the technology. Alternatively, solder need not be deposited in openings but may be delivered to the interconnection site by the chip. The resulting structure is illustrated in Figure 4. Next, the chip is joined to the solder connections, that is to connection 28. This is illustrated in Fig. 5 and represents the final product.

0020The presence of the silylated photoresist 24 acts as a barrier affirmatively preventing the solder reflow from running down the circuit lines thus causing collapse of the chip which may result in the shorting of the chip to the substrate. As can be appreciated the requirement previously existing in the technology for top chromium is eliminated by this invention. Also, given the use of a positive photo­resist fine line resolution capability is achieved.

0021Figure 5 illustrates the silylated photoresist remain­ing on the total surface of the substrate. Alternative­ly, silylated photoresist may be selectively removed once solder barriers are defined by the necessary dams for the solder connections. Advantages, however, occur by allowing the silylated photoresist to remain on the top surface. Corrosion protection over both the circuit lines and the bare copper edge of the circuit lines occurs. Additionally, dip tinning is possible because bridging of fine lines will not occur.

0022It is apparent that other improvements and advantages of this invention will be appreciated and modifications may be practiced without departing from the essential scope of this invention.