Isolated digital transmission with improved emi immunity
Claim Score by NHIP
Abstract
Embodiments of the present invention may provide a circuit. The circuit may include a primary side, a secondary side, and an isolated energy transfer device electrically isolating the primary side and the secondary side. The primary side may include a first energy storage device coupled to a power source, a control system coupled to the first energy storage device for power, a second energy storage device, and a coupling system, coupled to the control system, to selectively couple the second energy storage device to the power source in a first phase and to selectively couple the second energy storage device to the primary side of the isolated energy transfer device during a second phase.

Term
7.8 yearsto projected expiry
Projected expiry 30 July 2034, counted from filing; an application has no term until it is granted.
- Priority and filed
- Published
- Today
- Projected expiry
18 claims: 2 independent, 16 dependent
- 1A circuit, comprising:a primary side, a secondary side, and an isolated energy transfer device electrically isolating the primary side and the secondary side, wherein the primary side comprises: a first energy storage device coupled to a power source, a control system coupled to the first energy storage device for power, a second energy storage device, and a coupling system, coupled to the control system, to selectively couple the second energy storage device to the power source in a first phase and to selectively couple the second energy storage device to the primary side of the isolated energy transfer device during a second phase.
- 12Broadest claimClaim Score 68, broad(NHIP)A method for transmitting data across an isolation barrier, comprising:coupling a first energy storage device to a power source;supplying power to a control system using the first energy storage device;responsive to at least one control signal generated by the control system, coupling a second energy storage device to the power source during a charge phase, and coupling the second energy storage device to a primary side of an electrically isolating energy transfer device during a dump phase.
Independent claims2
52 paragraphs in 3 sections, as filed
BACKGROUND
0001The present invention relates to energy or data transmission system with improved electromagnetic interference (EMI) immunity.
0002In a variety of environments, signals must be transmitted between diverse sources and circuitry that uses those signals while maintaining electrical (i.e., galvanic) isolation between the sources and the using circuitry. Electrical isolation can prevent extraneous transient signals, including common-mode transients, from inadvertently being processed as status or control information. Also, among other known objectives and uses, electrical isolation is used to protect the equipment from shock hazards, or to permit the equipment on each side of an isolation barrier to be operated at a different supply voltage. For example, isolation is typically needed between microcontrollers and devices or transducers that use microcontroller output signals.
0003Coil (or transformer) based isolators are widely used signal transformers in which a primary winding and a secondary winding are inductively coupled. Conventional transformers, however, transmit pulses by switching one terminal of the inductor on and off to a power supply voltage. Thus, in the conventional transformers, the signaling current is an integral part of the supply current and any electromagnetic interference on the power supply voltage severely affects the signal transmission. Therefore, the inventors perceive a need in the art for an isolated digital signal transmission mechanism with improved EMI immunity.
BRIEF DESCRIPTION OF THE DRAWINGS
0004<figref idref="DRAWINGS">FIG. 1</figref> illustrates a circuit according to an embodiment of the present invention.
0005<figref idref="DRAWINGS">FIG. 2</figref> illustrates a circuit according to an embodiment of the present invention.
0006<figref idref="DRAWINGS">FIG. 3</figref> illustrates a transmission system according to an embodiment of the present invention.
0007<figref idref="DRAWINGS">FIG. 4</figref> illustrates signals generated by a transmission system according to an embodiment of the present invention.
0008<figref idref="DRAWINGS">FIG. 5A</figref> illustrates transient charges affecting the transmission system of <figref idref="DRAWINGS">FIG. 3</figref> according to one embodiment of the present invention.
0009<figref idref="DRAWINGS">FIG. 5B</figref> illustrates signals generated in a primary winding of the transformer of <figref idref="DRAWINGS">FIG. 3</figref> according to an embodiment of the present invention.
0010<figref idref="DRAWINGS">FIG. 6</figref> illustrates a drive buffer for a transmission system according to an embodiment of the present invention.
DETAILED DESCRIPTION
0011Embodiments of the present invention may provide a circuit. The circuit may include a primary side, a secondary side, and an isolated energy transfer device electrically isolating the primary side and the secondary side. The primary side may include a first energy storage device coupled to a power source, a control system coupled to the first energy storage device for power, a second energy storage device, and a coupling system, coupled to the control system, to selectively couple the second energy storage device to the power source in a first phase and to selectively couple the second energy storage device to the primary side of the isolated energy transfer device during a second phase.
0012Embodiments of the present invention may provide a method for transmitting data across an isolation barrier. The method may include coupling a first energy storage device to a power source and supplying power to a control system using the first energy storage device. The method may also include responsive to at least one control signal generated by the control system, coupling a second energy storage device to the power source during a charge phase, and coupling the second energy storage device to a primary side of an electrically isolating energy transfer device during a dump phase.
0013<figref idref="DRAWINGS">FIG. 1</figref> illustrates a circuit <b>100</b> according to an embodiment of the present invention. The circuit <b>100</b> may include a primary side and a secondary side separated by an isolation barrier. The circuit <b>100</b> may be used for energy transmission from the primary side to the secondary side, and the energy transmission may correspond to data transmission.
0014The circuit <b>100</b> may include a first energy storage device <b>110</b>, a control system <b>120</b>, a second energy storage device <b>130</b>, and a coupling system <b>140</b> provided on the primary side. An isolated energy transfer device <b>150</b> may be provided in between the primary side and the secondary side, which are separated by the isolation barrier. The circuit <b>100</b> may further include a receiver system <b>160</b> provided on the secondary side. The primary side may be coupled to a power source with a high voltage source V<sub>DD+</sub> and a low voltage source V<sub>DD−</sub> (collectively V<sub>DD</sub>). In an embodiment, the low voltage source V<sub>DD−</sub> may be provided with a ground connection. In an embodiment, the power source V<sub>DD </sub>may be an external power source to the primary side components. For example, the primary side may be provided on an integrated circuit and may include a pin coupled to the power source V<sub>DD</sub>. Alternatively, the power source V<sub>DD </sub>may be a local power generator that receives input signals transmitted across the isolation barrier. The configuration of the power source V<sub>DD </sub>is immaterial unless described below. For purposes of the present disclosure, it is sufficient to note the power source V<sub>DD </sub>is subject to noise effects that can impair operations of the primary side.
0015Further, the first energy storage device <b>110</b> may be coupled to the power source V<sub>DD</sub>. The first energy storage device <b>110</b> may include capacitor(s), inductor(s) and/or other suitable energy storage components. In an embodiment, the first energy storage device <b>110</b> may be provided as a filter and, hence the first energy storage device <b>110</b> may store a filtered charge from the power source V<sub>DD</sub>.
0016The first energy storage device <b>110</b> may be coupled to the control system <b>120</b>, and the first energy storage device <b>110</b> may provide power to the control system <b>120</b> for control system operations. In an embodiment, the control system <b>120</b> may include logic circuitry components. The control system <b>120</b> may receive control input(s) such as a clock input. Responsive to the control input(s), the control system <b>120</b> may generate control signal(s) to control the operations of the coupling system <b>140</b>. By having the control system <b>120</b> powered by the first energy storage device <b>110</b>, the control system <b>120</b> may improve its EMI immunity because the stored charge in the first energy storage device <b>110</b> may be immune to charge spikes and/or other EMI related effects present in the power source V<sub>DD</sub>.
0017The coupling system <b>140</b> may be provided with switch(es), amplifier(s), current source(s), other suitable electrical coupling components and/or a combination thereof. Different embodiments of coupling systems are described below in further detail. The coupling system <b>140</b> may be coupled to the power source V<sub>DD</sub>, the second energy storage device <b>130</b>, and the isolated energy transfer device <b>150</b>. The energy transfer device <b>150</b> may provide a transmission medium for energy or data across the isolation barrier and may include primary terminals on the primary side and secondary terminals on the secondary side.
0018The circuit <b>100</b> may operate in two phases—a charge phase and a dump phase—based on control signal(s) generated by the control system <b>120</b>. In a charge phase, no energy or data is transmitted across the isolated energy transfer device <b>150</b>. In the charge phase, the coupling system <b>140</b>, responsive to control signal(s) from the control system <b>120</b>, may couple the power source V<sub>DD </sub>to the second energy storage device <b>130</b>, which may include capacitor(s), inductor(s) and/or other suitable energy storage components. Thus, in the charge phase, the second energy storage device <b>130</b> be charged by the power source V<sub>DD</sub>.
0019In a dump phase, the coupling system <b>140</b>, responsive to control signal(s) from the control system <b>120</b>, may de-couple the power source V<sub>DD </sub>from the second energy storage device <b>130</b>. Also, in the dump phase, the coupling system <b>140</b> may couple the second energy storage device <b>130</b>, which may hold a charge from the prior charge phase, to the primary terminal of the isolated energy system <b>150</b> in order to transmit energy or data across to the secondary side.
0020The energy or data may be transmitted across the isolated energy transfer device <b>150</b> to the secondary side to the receiver system <b>160</b>. After the energy or data are transmitted across to the secondary side, the primary side may then re-enter the charge phase.
0021Therefore, the circuit <b>100</b> may provide improved EMI immunity for at least two reasons. First, energy or data transmissions across isolated energy transfer device <b>150</b> may be powered by the stored charge in the second energy storage device <b>130</b>, which is not subject to noise effects or other EMI related irregularities as compared to the power source V<sub>DD</sub>, which can be subject to noise and other EMI related irregularities. Second, the control system <b>120</b> may be powered by the first energy storage device <b>110</b> and thus the control system <b>120</b> operations, including energy transfer operations using coupling system <b>140</b>, may be further immunized from noise and other EMI related irregularities that can be found in the power source V<sub>DD</sub>.
0022<figref idref="DRAWINGS">FIG. 2</figref> illustrates a circuit <b>200</b> according to an embodiment of the present invention. The circuit <b>200</b> may include a primary side and a secondary side separated by an isolation barrier.
0023The circuit <b>200</b> may be used for energy transmission from the primary side to the secondary side, and the energy transmission may correspond to data transmission. The circuit <b>200</b> may include a first energy storage device <b>210</b>, a control system <b>220</b>, a second energy storage device <b>230</b>, and a coupling system <b>240</b> provided on the primary side. An isolated energy transfer device <b>250</b> may be provided in between the primary side and the secondary side, which are separated by the isolation barrier. The isolated energy device <b>250</b> may provided as a transformer with a primary winding <b>252</b> and a secondary winding <b>254</b>. The circuit <b>200</b> may further include a receiver system <b>260</b> coupled to the secondary winding <b>254</b> provided on the secondary side.
0024The primary side may be coupled to a power source with a high voltage source V<sub>DD+</sub> and a low voltage source V<sub>DD−</sub> (collectively V<sub>DD</sub>). In an embodiment, the low voltage source V<sub>DD−</sub> may be provided with a ground connection. In an embodiment, the power source V<sub>DD </sub>may be an external power source to the primary side components. For example, the primary side may be provided on an integrated circuit and may include a pin coupled to the power source V<sub>DD</sub>. Alternatively, the power source V<sub>DD </sub>may be a local power generator that receives input signals transmitted across the isolation barrier. The configuration of the power source V<sub>DD </sub>is immaterial unless described below. For purposes of the present disclosure, it is sufficient to note the power source V<sub>DD </sub>is subject to noise effects that can impair operations of the primary side.
0025Further, the first energy storage device <b>210</b> may include resistors <b>212</b>, <b>216</b> and a storage capacitor <b>214</b>, and may be coupled to the power source V<sub>DD</sub>. In an embodiment, the resistor <b>212</b>, <b>216</b> and the storage capacitor <b>214</b> may operate as RC filter and, hence, the storage capacitor <b>214</b> may store a filtered charge from the power source V<sub>DD</sub>.
0026The first energy storage device <b>210</b> may be coupled to the control system <b>220</b>, and the first energy storage device <b>210</b> may provide power to the control system <b>220</b> for control system operations. For example, the control system <b>220</b> may be powered by the filtered charge stored on the storage capacitor <b>214</b>. In an embodiment, the control system <b>220</b> may include logic circuitry components.
0027The control system <b>220</b> may receive control input(s) such as a clock input and a data input. Responsive to the control input(s), the control system <b>220</b> may generate control signal(s), such as a charge control signal and a transmit control signal, to control the operations of the coupling system <b>240</b>. By having the control system <b>220</b> powered by the first energy storage device <b>210</b>, in particular the storage capacitor <b>214</b>, the control system <b>220</b> may improve its EMI immunity because the stored charge in the first energy storage device <b>210</b> may be immune to charge spikes and/or other EMI related effects present in the power source V<sub>DD</sub>.
0028The coupling system <b>240</b> may include charge switches <b>244</b>.<b>1</b>, <b>244</b>.<b>2</b> (and resistors <b>242</b>.<b>1</b>, <b>242</b>.<b>2</b>) and dumping switches <b>246</b>.<b>1</b>, <b>246</b>.<b>2</b>. The charge switches <b>244</b>.<b>1</b>, <b>244</b>.<b>2</b> may selectively couple a charge capacitor <b>232</b> in the second energy storage device <b>230</b> to the power source V<sub>DD</sub>. The charge capacitor <b>232</b> may be provided as a single capacitor as shown in <figref idref="DRAWINGS">FIG. 2</figref> or, alternatively, may be provided as multiple capacitors. Multiple capacitor embodiments are described below in further detail. The charge switches <b>244</b>.<b>1</b>, <b>244</b>.<b>2</b> operations may be controlled by the charge control signal generated by the control system <b>220</b>. The dumping switches <b>244</b>.<b>1</b>, <b>244</b>.<b>2</b> may selectively couple the charge capacitor <b>232</b> to the primary winding <b>252</b>. The dumping switches <b>246</b>.<b>1</b>, <b>246</b>.<b>2</b> operations may be controlled by the transmit control signal generated by the control system <b>220</b>. Hence, the coupling system <b>240</b> may be controlled by the control system <b>220</b>, which again may be powered by the first energy storage device <b>210</b>.
0029The second energy storage device <b>230</b>, the coupling system <b>240</b>, and the primary winding <b>252</b> (collectively referred to as a transmission system) may generate pulse(s) to transmit data across the isolation barrier.
0030The circuit <b>200</b> may operate in two phases—a charge phase and a dump phase—based on control signal(s) generated by the control system <b>220</b>. In a charge phase, no energy or data may be transmitted across the isolated energy transfer device <b>250</b>. In other words, no pulses may be transmitted across the primary winding <b>252</b>. In the charge phase, the charge switches <b>244</b>.<b>1</b>, <b>244</b>.<b>2</b> may be closed responsive to the charge control signal from the control system <b>220</b> to couple the power source V<sub>DD </sub>to the charge capacitor <b>232</b>. Thus, in the charge phase, the charge capacitor <b>232</b> may be charged by the power source V<sub>DD</sub>, and the charge capacitor <b>232</b> may store that charge on its plates. Also, the resistors <b>242</b>.<b>1</b>, <b>242</b>.<b>2</b> may form a RC filter with charge capacitor <b>232</b>, and, consequently, a filtered charge may be stored in the charge capacitor <b>232</b>. Further, in the charge phase, the charge capacitor <b>232</b> may not be coupled to a terminal of the primary winding <b>252</b> via the dumping switches <b>246</b>.<b>1</b>, <b>246</b>.<b>2</b> (i.e., the dumping switches <b>246</b>.<b>1</b>, <b>246</b>.<b>2</b> may be open), and, therefore, there may be no data transmission in the charge phase.
0031In a dump phase, energy or data may be transmitted across the isolated energy transfer device <b>250</b>. In other words, data pulse(s) may be transmitted across the primary winding <b>252</b>. In the dump phase, the coupling system <b>240</b>, responsive to control signal(s) from the control system <b>220</b>, may de-couple the power source V<sub>DD </sub>from the second energy storage device <b>230</b>. For example, the charge switches <b>244</b>.<b>1</b>, <b>244</b>.<b>2</b> may be turned open to de-couple the charge capacitor <b>232</b> from the power source V<sub>DD</sub>. Also, in the dump phase, the coupling system <b>240</b> may couple the second energy storage device <b>230</b>, which may hold a charge from the prior charge phase, to the primary terminal of the isolated energy system <b>250</b> to transmit energy or data across to the secondary side. For example, dumping switches <b>246</b>.<b>1</b>, <b>246</b>.<b>2</b> may be closed to couple the charged plate of the charge capacitor <b>234</b> to the terminal of the primary winding <b>252</b> to transmit pulse(s) across the primary winding <b>254</b>. The dumping switches <b>246</b>.<b>1</b>, <b>246</b>.<b>2</b> may be provided in a bi-polarity arrangement as shown in <figref idref="DRAWINGS">FIG. 2</figref> or, alternatively, may be provided in a single polarity arrangement. The charge stored on the charge capacitor <b>232</b> from the earlier charge phase may provide sufficient charge for the pulse(s) transmission, and, the power source V<sub>DD </sub>may be decoupled from the transmission system during the pulse(s) transmission. The number of pulses may be based on the data to be transmitted and may be adjustable.
0032The pulse(s) may be transmitted across the primary winding <b>252</b> to the secondary winding <b>252</b> on the secondary side. The pulse(s) may then be demodulated by a receiver system <b>260</b>, coupled to the secondary winding <b>254</b>, to recover the data. After the pulse(s) are sent from the primary winding <b>252</b> to the secondary winding <b>254</b>, the primary side may then re-enter a charge phase.
0033In an embodiment, the second energy storage device <b>230</b> may include a plurality of capacitors that may be coupled to the power source during the charge phase. For example, the plurality of capacitors may be arranged parallel to each other. In another example, the plurality of capacitors may be arranged in bi-polar manner. Also, the plurality of capacitors may be coupled to the primary winding <b>254</b> sequentially during the dump phase to transmit multiple bits of information in the same dump phase.
0034Again, the circuit <b>200</b> may provide improved EMI immunity for at least two reasons. First, energy or data transmissions across isolated energy transfer device <b>250</b> may be powered by the stored charge in the second energy storage device <b>230</b>, which is not subject to noise effects or other EMI related irregularities as compared to the power source V<sub>DD</sub>, which can be subject to noise and other EMI related irregularities. Second, the control system <b>220</b> may be powered by the first energy storage device <b>210</b> and thus the control system <b>220</b> operations, including energy transfer operations using coupling system <b>240</b>, may be further immunized from noise and other EMI related irregularities that can be found in the power source V<sub>DD</sub>.
0035<figref idref="DRAWINGS">FIG. 3</figref> illustrates a transmission system <b>300</b> according to an embodiment of the present invention. In an embodiment, the transmission system <b>300</b> may be implemented in the circuits <b>100</b> and <b>200</b> of <figref idref="DRAWINGS">FIGS. 1 and 2</figref>. The transmission system <b>300</b> may comprise a primary winding <b>302</b> and a drive circuit for the primary winding <b>302</b>. The drive circuit may comprise a pair of charge capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> that each has a plate coupled to a common point G. The other plate (e.g., top plate as shown) of the charge capacitor <b>316</b>.<b>1</b> may be coupled to a power source V<sub>DD </sub>via a charge switches <b>306</b>, <b>318</b> and resistors <b>304</b>, <b>320</b>. The capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> may be coupled to the primary winding <b>302</b> by dumping switches <b>310</b>.<b>1</b>, <b>310</b>.<b>2</b>, <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b>, and resistors <b>308</b>.<b>1</b>, <b>308</b>.<b>2</b>, <b>314</b>.<b>1</b> and <b>314</b>.<b>2</b>. The transmission system <b>300</b> may further comprise optional parking switches <b>322</b> and <b>324</b> showing in phantom. All switch operations may be controlled by a control system (for example control system <b>220</b> of <figref idref="DRAWINGS">FIG. 2</figref>), and in an embodiment, the control system may be powered by a first energy storage device (not shown) as described above in the discussion of <figref idref="DRAWINGS">FIGS. 1 and 2</figref>. Furthermore, one capacitor may be used as the charge capacitor (e.g., one single capacitor <b>316</b>.<b>1</b> but no capacitor <b>316</b>.<b>2</b>); however, two capacitors may provide a common mode to cancel out the electrical charges generated by the transient charge current.
0036The transmission system <b>300</b> may operate in a charge phase and a dump phase. In the charge phase, the charge switches <b>306</b> and <b>318</b> may be connected. All other switches, including the dumping switches <b>310</b>.<b>1</b>, <b>310</b>.<b>2</b>, <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b> and the parking switches <b>322</b> and <b>324</b>, may all be disconnected. Thus, during the charge phase, the top plate of the capacitor <b>316</b>.<b>1</b> may be connected to the power source V<sub>DD </sub>via the resistor <b>304</b> and the capacitor <b>316</b>.<b>1</b> to be charged by the power source V<sub>DD</sub>. The charge rate may be determined by the RC constant based on the resistance of the resistor <b>304</b> and capacitance of the capacitor <b>316</b>.<b>1</b>. In an embodiment, the larger the resistance of the resistor <b>304</b>, the more isolation from the fluctuation or interference on the power supply pin (e.g., V<sub>DD</sub>). In an embodiment, the voltage across the capacitor <b>316</b>.<b>1</b> may be a filtered version of the power source.
0037In the dump phase, one pair of dumping switches, <b>310</b>.<b>1</b> and <b>310</b>.<b>2</b>, or <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b>, may be connected while all other switches, including charge switches <b>306</b> and <b>318</b>, may be disconnected. If the dumping switches <b>310</b>.<b>1</b> and <b>310</b>.<b>2</b> are connected, the top of the primary winding <b>302</b> may be connected to the top plate of the capacitor <b>316</b>.<b>1</b> via the resistor <b>308</b>.<b>1</b> and the bottom of the primary winding <b>302</b> may be connected to the bottom plate of the capacitor <b>316</b>.<b>2</b> via the resistor <b>308</b>.<b>2</b>. Thus, the electrical charges accumulated on the top plate of the capacitor <b>316</b>.<b>1</b> may be dumped (redistributed) through the primary wingding <b>302</b> to the capacitor <b>316</b>.<b>2</b>. The dumping of the electrical charge may trigger a signal of a first polarity being sent from the primary winding <b>302</b> to a secondary winding, which is not shown.
0038If the dumping switches <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b> are connected while all other switches may be disconnected, the top of the primary winding <b>302</b> may be connected to the bottom plate of the capacitor <b>316</b>.<b>2</b> via the resistor <b>314</b>.<b>2</b> and the bottom of the primary winding <b>202</b> may be connected to the top plate of the capacitor <b>216</b>.<b>1</b> via the resistor <b>314</b>.<b>1</b>. Thus, the electrical charges accumulated on the top plate of the capacitor <b>316</b>.<b>1</b> may be dumped through the primary winding <b>302</b> to the bottom plate of the capacitor <b>316</b>.<b>2</b>. The dumping of the electrical charge may trigger a signal of a second polarity being sent from the primary winding <b>302</b> to the secondary winding. The first polarity may be positive and the second polarity may be negative, or vice versa.
0039In an embodiment, when either pair of the dumping switches (<b>310</b>.<b>1</b> and <b>310</b>.<b>2</b>, or <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b>) are connected and all other switches are disconnected, the primary winding <b>302</b> and the two capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> may form a resonant LCR circuit. The resonant frequency of the LCR circuit may be decided by a desired signal frequency for signaling across the primary winding <b>302</b> to the secondary winding, and the capacitance of the capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> may be set in tandem with the inductance of the primary winding depending on the resonant frequency. The resistance of the resistors in the LCR circuit (<b>308</b>.<b>1</b> and <b>308</b>.<b>2</b>, or <b>314</b>.<b>1</b> and <b>314</b>.<b>2</b>) may be set based on the damping requirement for the LC circuit. Thus, the pulse width for signaling may be determined by the LCR circuit characteristics. The transient response of this circuit may come from the initial charge stored on capacitor <b>316</b>.<b>1</b>, which results in a damped oscillation. The resistance may be set for critical damping so the transient response now has just one overshoot. The point where the voltage reaches zero the first time is the square root of LC (√{square root over (LC)}) for the critically damped system. For example, a 100 nH coil and a 10 pF capacitor may have a corresponding feature that is ins wide.
0040If the charge phase is greater than the pulse width then the capacitor <b>316</b>.<b>1</b> may be smaller than a filter capacitor used in a conventional filtering scheme by ratio. For example, in a conventional H bridge filtering configuration, in which a terminal of the primary winding is connected to a power supply directly with a filtering capacitor between the terminal and ground, the capacitor may be in of the order hundreds of pF (say, 500 pF) for a 500 MHz signal. Additionally the corner frequency of the transfer of voltage from the external supply to the voltage across the charge cap may be reduced, improving supply immunity.
0041After the signal is sent from the primary winding <b>302</b> to the secondary winding, the connected pair of dumping switches may be disconnected, and the charging switches <b>306</b> and <b>318</b> may be connected to charge for the next signaling operation (i.e., re-enter charging phase). In an embodiment, at the same time during the charging, the parking switches <b>320</b> and <b>322</b> may be connected to couple the top and bottom of the primary winding <b>202</b> to ground. In an embodiment, the parking switches <b>320</b> and <b>322</b> may be low impedance switches such that the field may already be dissipated by the switch <b>308</b>, and the parking switches <b>322</b> and <b>324</b> may stop currents from being induced in the coil by external transient behavior. In an embodiment, the parking switches <b>322</b> and <b>324</b> may be resistive (or with additional resistors coupled in the path to the ground) to allow for faster signaling by dissipating the field during the charge phase.
0042In one or more embodiments, one or more or all switches of the transmission system <b>300</b> may be bootstrapped switches with series resistors that provide a linear resistance when turned on.
0043<figref idref="DRAWINGS">FIG. 4</figref> illustrates signals generated by a transmission system according to an embodiment of the present invention. The signals <b>402</b> and <b>404</b> may represent two input signals. Although they are marked as “up in” and “down in” respectively, the polarities of the input signals are for illustration only. The secondary voltage signals <b>406</b> and <b>408</b> may represent the EM voltage in the primary and secondary windings of a transformer according to an embodiment of the present invention. For example, the secondary voltage signal <b>406</b> may represent the EM voltage of the primary winding <b>302</b> in a discharge dump phase when the dumping switches <b>310</b>.<b>1</b> and <b>310</b>.<b>2</b> are connected, and the secondary voltage signal <b>408</b> may represent the EM voltage of the primary winding <b>302</b> in a discharge dump phase when the dumping switches <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b> are connected. In an embodiment, the secondary voltage signals <b>406</b> and <b>408</b> may be triggered by the rising edges of the input signals <b>402</b> and <b>404</b>.
0044Both secondary voltage signals <b>406</b> and <b>408</b> may include a head portion and a tail portion. The head portion of the secondary voltage signal <b>406</b> that exceeds a certain positive threshold may correspond to a positive secondary voltage <b>414</b> and the tail portion of the secondary voltage signal <b>406</b> that is lower than a certain negative threshold may correspond to a negative secondary voltage <b>418</b>. The head portion of the secondary voltage signal <b>408</b> that is lower than the certain negative threshold may correspond to a negative secondary voltage <b>414</b> and the tail portion of the secondary voltage signal <b>406</b> that exceeds the certain positive threshold may correspond to a positive secondary voltage <b>416</b>. The certain positive and negative thresholds may be configured according to preference to reject interferers. In an embodiment, the rising or falling edge of a secondary voltage signal may trigger a one shot that defines a time window to capture the transmitted signals. For example, the rising edge of the secondary voltage signal <b>406</b> may trigger a time window <b>410</b> and the falling edge of the secondary voltage signal <b>408</b> may trigger a time window <b>412</b>. The rising edge of the positive secondary voltage <b>414</b> and the falling edge of the negative secondary voltage <b>418</b> may be within the time window <b>410</b>, and these two edges may be used to construct the output signal <b>422</b> that may correspond to the input signal <b>402</b>. The rising edge of the negative secondary voltage <b>420</b> and the falling edge of the positive secondary voltage <b>416</b> may be within the time window <b>412</b>, and these two edges may be used to construct the output signal <b>424</b> that may correspond to the input signal <b>404</b>. The point where the secondary voltage passes zero and goes to the opposite polarity is the square root of LC (√{square root over (LC)}).
0045<figref idref="DRAWINGS">FIG. 5A</figref> illustrates transient charges affecting the transmission system <b>300</b> of <figref idref="DRAWINGS">FIG. 3</figref> according to one embodiment of the present invention. The transmission system <b>500</b> in <figref idref="DRAWINGS">FIG. 5A</figref> are identical to the transmission system <b>300</b> in <figref idref="DRAWINGS">FIG. 3</figref>, with the exception of the switches <b>312</b>.<b>1</b> and <b>312</b>.<b>2</b> and resistors <b>314</b>.<b>1</b> and <b>314</b>.<b>2</b> being omitted for simplicity. In addition to the components already illustrated and described in <figref idref="DRAWINGS">FIG. 3</figref> and corresponding description, the transformer <b>500</b> in <figref idref="DRAWINGS">FIG. 5A</figref> also illustrates parasitic diodes <b>502</b>, <b>504</b>, <b>506</b> and <b>508</b>, parasitic capacitors <b>510</b> and <b>512</b> and a parasitic charge current source <b>514</b>. The diodes <b>502</b>, <b>504</b>, <b>506</b> and <b>508</b> illustrate how the top and bottom of the primary winding are electrically separated from the power supply and ground, respectively.
0046<figref idref="DRAWINGS">FIG. 5A</figref> also includes two dashed arrows indicating the electrical currents generated during a transient stage. The transient currents may charge the top plate of the capacitor <b>316</b>.<b>1</b> and the bottom plate of the capacitor <b>316</b>.<b>2</b>, respectively. The capacitors <b>510</b> and <b>512</b> are not explicit capacitors but represent inherent parasitic capacitance between the primary winding <b>302</b> and its corresponding secondary winding (not shown). The coil of the primary winding <b>302</b> may have about half of its capacitance between each terminal, so the capacitors <b>510</b> and <b>512</b> are coupled between each terminal and the voltage source <b>514</b> that causes the currents to flow through capacitors <b>510</b> and <b>512</b>. In an embodiment, the capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> may have substantially identical capacitance, so the transient charge currents may only generate a common mode.
0047<figref idref="DRAWINGS">FIG. 5B</figref> illustrates the effects of transient charge currents in the primary winding <b>302</b>. The signal <b>516</b> may represent the voltage at the top of the primary winding <b>302</b> and the signal <b>518</b> may represent the voltage at the bottom of the primary winding <b>302</b>, with the transient charge currents. The signal <b>520</b> may represent the voltage at the top of the primary winding <b>302</b> and the signal <b>522</b> may represent the voltage at the bottom of the primary winding <b>302</b>, without the transient charge currents. As shown in <figref idref="DRAWINGS">FIG. 5B</figref>, the signal <b>520</b> starts from its peak (when the top terminal of the primary winding <b>302</b> is connected to the charged side of the capacitor) and goes down, while the signal <b>522</b> starts from ground (when the bottom terminal of the primary winding <b>302</b> is connected to the un-charged side of the capacitor) and goes up. In the end, the two signals <b>520</b> and <b>522</b> may reach the same level in the middle between the peak and ground. In comparison, because the two capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> each having one side grounded, the transient charge currents only cause the signals <b>516</b> and <b>518</b> to shift away from <b>520</b> and <b>522</b> but still maintain the same differential between the top and bottom of the primary winding <b>302</b>. In an embodiment, the parasitic charge current source <b>514</b> may be a current sink that draws positive electrical charges away from the capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> so the signals <b>516</b> and <b>518</b> may be below the ground level in the curves.
0048In an embodiment, the capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> may need to be large enough that none of the parasitic diodes switches on before a pulse being transmitted is finished. That is, if the capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> are small, the voltages on these capacitors may change fast and the parasitic diodes may be switched on. For example, if the capacitors <b>316</b>.<b>1</b> and <b>316</b>.<b>2</b> are correctly sized as the field has been mostly dissipated by the time the parasitic diodes <b>506</b> and <b>508</b> switch on. To correctly size the capacitors, capacitor <b>510</b>/<b>512</b> and capacitor <b>316</b>.<b>1</b>/<b>316</b>.<b>2</b> may form a voltage divider in which case capacitor <b>316</b> may be made large enough that the scaled version of our voltage waveform on the voltage source <b>514</b> will not forward bias any of the parasitic diodes.
0049In the case where a transient large enough to switch on the diodes was applied to the voltage source <b>514</b>, once the pulse is completely transmitted there is no differential signal at the two terminals of the primary winding <b>302</b>, both terminals will be equal to the diode voltage. With no transient, both terminals will be equal to Vdd/2. When there is no pulse, the parking switches <b>323</b> and <b>324</b> may be switched on to ground the terminals of the primary winding <b>302</b>. Timing of switching may not be important and transient may have no effect outside of the pulse.
0050<figref idref="DRAWINGS">FIG. 6</figref> illustrates a drive buffer <b>600</b> for a transmission system according to an embodiment of the present invention. The drive buffer circuit <b>600</b> may comprise a drive current source <b>602</b> to control charging of the top plate of the charge capacitor <b>316</b>.<b>1</b> and a drive amplifier <b>604</b> to control charging of the bottom plate of the charge capacitor <b>316</b>.<b>2</b>. The current source <b>602</b> may be implemented using components known in the art and may be controlled by a control system (not shown) as described above in the discussion of <figref idref="DRAWINGS">FIGS. 1 and 2</figref>. The drive amplifier <b>604</b> may be driven by a control signal Vdrv and may be implemented using components known in the art. Further, the drive amplifier <b>604</b> may also be controlled by a control system (not shown) as described above in the discussion of <figref idref="DRAWINGS">FIGS. 1 and 2</figref>.
0051In an embodiment, the top plate of the capacitor <b>316</b>.<b>1</b> may be charged to a voltage level of the power source V<sub>DD </sub>and the bottom plate of the capacitor <b>316</b>.<b>2</b> may be charged to a voltage level of a control signal Vdrv. Thus, at the beginning of the dump phase, the voltage differential between the top and bottom of the primary winding <b>302</b> of may be V<sub>DD</sub>−Vdrv.
0052Several embodiments of the invention are specifically illustrated and/or described herein. However, it will be appreciated that modifications and variations of the invention are covered by the above teachings and within the purview of the appended claims without departing from the spirit and intended scope of the invention.
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Numbers
- Publication
- 20140119082
- Publication, DOCDB
- 2014119082
- Publication, EPODOC
- US2014119082
- Application
- 13662100
- Application, DOCDB
- 201213662100
- Application, EPODOC
- US201213662100
Titles
- English
- ISOLATED DIGITAL TRANSMISSION WITH IMPROVED EMI IMMUNITY
Patent term adjustment
- A delay
- +477 daysthe office missed an examination deadline
- B delay
- +202 dayspendency past three years
- Applicant delay
- −37 days
- Net adjustment
- 642 days
Classification
- CPC, 4
- H02J50/12
- H02M1/44
- H04L25/0266
- H02J50/70
- IPC, 1
- H02M7 42
- USPC, 1
- 363106000