Semiconductor device, display device including semiconductor device, electronic device including semiconductor device, and method for manufacturing semiconductor device

Semiconductor devices, display devices including semiconductor devices, electronic devices including semiconductor devices, and manufacturing methods of semiconductor devices

Semiconductor device, display device including semiconductor device, electronic device including semiconductor device, and method for manufacturing semiconductor device

One aspect of the present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. In addition, one aspect of the present invention relates to a display device and an electronic device including the semiconductor device.

The technology of forming a transistor (also called a thin film transistor (TFT)) using a semiconductor thin film formed on a substrate having an insulating surface is attracting attention. This transistor is widely used in electronic devices such as integrated circuits (IC) or video display devices (display devices). As semiconductor thin films that can be applied to transistors, silicon-based semiconductor materials are widely known, and oxide semiconductors are attracting attention as other materials.

For example, a technique of manufacturing a transistor using a Zn-O-based oxide or an In-Ga-Zn-O-based oxide as an oxide semiconductor has been disclosed (see Patent Document 1 and Patent Document 2).

In addition, the screen size of display devices using transistors (for example, liquid crystal panels, organic EL panels) has been increased in size. With the increase in screen size, the following problem has arisen. In display devices using active elements such as transistors, the voltage applied to the element due to wiring resistance varies depending on the position of the wiring connected to the element, resulting in uneven display or Deterioration of display quality such as gray scale failure.

Furthermore, in terms of the screen resolution of display devices, high-definition has also been promoted, such as high-definition image quality (HD, 1366×768), full high-definition image quality (FHD, 1920×1080), and is currently accelerating Develop display devices for so-called 4K digital movies with a resolution of 3840×2048 or 4096×2180.

As the resolution of the screen of the display device increases, the drive frequency of the drive circuit and the like used for the display device also tends to increase, and it is necessary to use low-resistance materials with less signal delay for wiring or signal lines.

As a material for wiring and signal lines, aluminum films have been mostly used in the past, but now in order to further reduce resistance, active research and development of technologies using copper films have been carried out. However, the copper film has the following disadvantages: low adhesion to the base film; copper element in the copper film diffuses into the semiconductor layer of the transistor to cause deterioration of the characteristics of the transistor; and so on. Therefore, it is disclosed to use a silicon nitride film, a copper alloy layer formed on the silicon nitride film, and a copper alloy layer formed on the copper alloy layer in order to improve the adhesion with the base film and prevent the diffusion of copper elements. A technique for manufacturing a transistor with a pure copper layer (refer to Patent Document 3).

[Patent Document 1] Japanese Patent Application Publication No. 2007-123861

[Patent Document 2] Japanese Patent Application Publication No. 2007-96055

[Patent Document 3] Japanese Patent Application Publication No. 2010-230965

In Patent Document 1, a silicon-based semiconductor material is assumed as a semiconductor thin film that can be used for a transistor. Therefore, the manufacturing method and structure of the transistor shown in Patent Document 1 are not suitable for the transistor using the oxide semiconductor film for the channel formation region.

In view of the above-mentioned problems, one of the objects of one aspect of the present invention is to provide a method for manufacturing a transistor with stable electrical characteristics and less signal delay due to wiring resistance, which is used in a semiconductor device including an oxide semiconductor film middle. In addition, one of the objects of one aspect of the present invention is to provide a semiconductor device including the transistor. In addition, one of the objects of one aspect of the present invention is to provide a high-performance display device including the transistor.

In a method of manufacturing a semiconductor device including a transistor of a bottom gate structure using an oxide semiconductor film for the channel formation region, the source electrode and the drain electrode are formed in contact with the oxide semiconductor film. The source electrode and the drain electrode respectively include first to third metal films, and a material containing copper element is used as the second metal film.

The manufacturing method of the source electrode and the drain electrode in contact with the oxide semiconductor film is as follows: a first metal film and a second metal film are formed; the second metal film is subjected to a first photolithography process and removed by a first etching A part of the second metal film; forming a third metal film on the first metal film and the second metal film; performing a second photolithography process on the third metal film to remove the first metal film by a second etching And a part of the third metal film. In addition, the second etching removes a part of the first metal film and the third metal film located outside the end of the second metal film removed by the first etching. By using the above-mentioned manufacturing method, the second metal film is covered by the first metal film and the third metal film (preferably the second metal film is surrounded by the first metal film and the third metal film), so the use of the second metal film can be suppressed. The copper-containing material of the second metal film diffuses into the oxide semiconductor film. The details will be further explained below.

One aspect of the present invention is a method of manufacturing a semiconductor device. The manufacturing method includes the following steps: forming a gate electrode; forming a gate insulating film on the gate electrode; An oxide semiconductor film is formed at the overlapping position; and a source electrode and a drain electrode are formed on the oxide semiconductor film. In order to form the source electrode and the drain electrode, the method includes the following steps: forming a first metal film and a second metal Film; performing a first photolithography process on the second metal film to remove part of the second metal film by first etching; forming a third metal film on the first metal film and the second metal film; The film undergoes a second photolithography process to remove part of the first metal film and the third metal film by the second etching, and the second etching removes the first metal film and the third metal film located by the first etching A part of the outside of the end of the second metal film is removed.

The above manufacturing method may further include the following steps: forming a first insulating film on the source electrode and the drain electrode; introducing oxygen into the first insulating film; forming a second insulating film on the first insulating film; and forming a second insulating film on the second insulating film An aluminum film is formed; oxygen is introduced into the aluminum film to form an aluminum oxide film; and a planarization insulating film is formed on the aluminum oxide film.

In each of the above-mentioned manufacturing methods, the first metal film and the third metal film are preferably metal films or metal nitride films containing one or more elements of tungsten, tantalum, titanium, and molybdenum. In addition, the second metal film preferably contains copper element.

In addition, in the above-mentioned manufacturing method, it is preferable that the first etching is a wet etching method, and the second etching is a dry etching method.

In addition, another aspect of the present invention is a semiconductor device including: a gate electrode; a gate insulating film on the gate electrode; an oxide semiconductor film that is in contact with the gate insulating film and overlaps the gate electrode; And the source electrode and the drain electrode on the oxide semiconductor film, wherein the source electrode and the drain electrode include a first metal film, a second metal film, and a third metal film, and the second metal film is located on the first metal film. The area inside the end of the film and the third metal film.

In addition, another aspect of the present invention is a semiconductor device including: a gate electrode; a gate insulating film on the gate electrode; an oxide semiconductor film that is in contact with the gate insulating film and overlaps the gate electrode; The source electrode and the drain electrode on the oxide semiconductor film; and a signal line electrically connected to the source electrode, wherein the signal line includes a first metal film, a second metal film, and a third metal film, and the second metal film is located at A region inside the ends of the first metal film and the third metal film, and the source electrode and the drain electrode include the first metal film and the third metal film.

The above structure may further include: a first insulating film of the oxygen excess type on the source electrode and the drain electrode; a second insulating film on the first insulating film; an aluminum oxide film on the second insulating film; and an aluminum oxide film on the aluminum oxide film The flattening insulating film.

In addition, in each of the above structures, the first metal film and the third metal film are preferably metal films or metal nitride films containing one or more elements of tungsten, tantalum, titanium, and molybdenum. In addition, the second metal film preferably contains copper element.

In addition, in each of the above structures, the gate electrode preferably contains one or more elements of tungsten, tantalum, titanium, molybdenum, and copper.

In addition, display devices and electronic devices including the above-mentioned semiconductor devices are all included in the scope of the present invention.

One aspect of the present invention can provide a method for manufacturing a transistor having stable electrical characteristics and less signal delay due to wiring resistance, the transistor being used in a semiconductor device including an oxide semiconductor film. In addition, a semiconductor device including the transistor can be provided. In addition, it is possible to provide a high-performance display device including the transistor.

<p>102Substrate </p><p>104Gate electrode </p><p>104aFirst gate electrode </p><p>104bSecond gate electrode </p><p>106Gate insulation film </p><p>106aFirst gate insulating film </p><p>106bSecond gate insulating film </p><p>108Oxide semiconductor film </p><p>109aThe first metal film </p><p>109bSecond metal film </p><p>109cThird metal film </p><p>110Source electrode </p><p>110aThe first metal film </p><p>110bSecond metal film </p><p>110cThird metal film </p><p>112Drain electrode </p><p>112aThe first metal film </p><p>112bSecond metal film </p><p>112cThird metal film </p><p>114aFirst insulating film </p><p>114bSecond insulating film </p><p>115Aluminum film </p><p>116Alumina film </p><p>118Planarized insulating film </p><p>141Photoresist mask </p><p>142Photoresist mask </p><p>145Oxygen </p><p>147oxygen </p><p>150Transistor </p><p>204Gate electrode </p><p>204aFirst gate electrode </p><p>204bSecond gate electrode </p><p>206Gate insulation film </p><p>206aFirst gate insulating film </p><p>206bSecond gate insulating film </p><p>208Oxide semiconductor film </p><p>209aThe first metal film </p><p>209bSecond metal film </p><p>209cThird metal film </p><p>210Source electrode </p><p>210aThe first metal film </p><p>210bSecond metal film </p><p>210cThird metal film </p><p>212Drain electrode </p><p>212aThe first metal film </p><p>212cThird metal film </p><p>232Signal line </p><p>241Photoresist mask </p><p>242Photoresist mask </p><p>250Transistor </p><p>260Signal line area </p><p>300Substrate </p><p>301Substrate </p><p>302Pixel </p><p>304Source drive circuit section </p><p>306Gate drive circuit section </p><p>308FPC terminal </p><p>310Signal line </p><p>312Sealing material </p><p>316FPC </p><p>350Transistor </p><p>352Transistor </p><p>360Terminal electrode </p><p>360aFirst Metal Film </p><p>360bSecond metal film </p><p>360cThe third metal film </p><p>364Insulation film </p><p>366Protective insulating film </p><p>368Planarized insulating film </p><p>370aConductive film </p><p>370bConductive film </p><p>380Anisotropic conductive film </p><p>402Liquid crystal element </p><p>404Counter electrode </p><p>406Liquid crystal layer </p><p>408Liquid crystal layer </p><p>410Insulation film </p><p>412Insulation film </p><p>435Spacer </p><p>450Light-emitting element </p><p>452Electroluminescent layer </p><p>454Upper electrode </p><p>456Separating Wall </p><p>458filling material </p><p>2700E-Book Reader </p><p>2701Shell </p><p>2703Shell </p><p>2705Display </p><p>2707Display </p><p>2711Shaft </p><p>2721Power switch </p><p>2723Operation keys </p><p>2725Speaker </p><p>2800Shell </p><p>2801Shell </p><p>2802Display Panel </p><p>2803Speaker </p><p>2804Microphone </p><p>2805Operation keys </p><p>2806Pointing device </p><p>2807Camera lens </p><p>2808External connection terminal </p><p>2810Solar battery unit </p><p>2811External storage tank </p><p>3001Main body </p><p>3002Shell </p><p>3003Display </p><p>3004Keyboard </p><p>3021Main body </p><p>3022Touch Pen </p><p>3023Display </p><p>3024Operation button </p><p>3025External interface </p><p>3051Main body </p><p>3053Viewfinder </p><p>3054Operation switch </p><p>3056Battery </p><p>5000Tablet Terminal </p><p>5001Shell </p><p>5003Display </p><p>5005Power button </p><p>5007Front camera </p><p>5009Back camera </p><p>5011External connection terminal </p><p>5013External connection terminal </p><p>5015 icon </p><p>6000Tablet Terminal </p><p>6001Shell </p><p>6003Shell </p><p>6005Hinge </p><p>6007Display </p><p>6009Display </p><p>6011Power button </p><p>6013Camera </p><p>6015Camera </p><p>6017Text icon </p><p>6019 icon </p><p>6021Keyboard </p><p>9600TV </p><p>9601Shell </p><p>9603Display </p><p>9605Support </p>

In the drawings: FIGS. 1A to 1C are plan views and cross-sectional views showing one mode of the semiconductor device; FIGS. 2A to 2E are cross-sectional views showing an example of the manufacturing process of the semiconductor device; FIGS. 3A to 3D are diagrams showing A cross-sectional view showing an example of a manufacturing process of a semiconductor device; FIGS. 4A to 4D are cross-sectional views showing an example of a manufacturing process of a semiconductor device; FIGS. 5A to 5C are cross-sectional views showing an example of a manufacturing process of a semiconductor device; 6A and 6B are plan views and cross-sectional views showing one mode of the semiconductor device; FIGS. 7A to 7D are cross-sectional views showing an example of the manufacturing process of the semiconductor device; FIGS. 8A to 8D are the manufacturing process of the semiconductor device Fig. 9 is a plan view showing a mode of a display device; Fig. 10 is a cross-sectional view showing a mode of a display device; Fig. 11 is a cross-sectional view showing a mode of a display device; Fig. 12A 12F are diagrams showing an example of an electronic device including a semiconductor device; FIGS. 13A to 13D are diagrams of an example of a tablet terminal including a semiconductor device.

The following describes in detail the embodiments of the invention disclosed in this specification using the drawings. However, a person of ordinary skill in the technical field can easily understand a fact, and its method and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the content described in the embodiments shown below.

Note that for ease of understanding, the positions, sizes, and ranges of each structure shown in the drawings and the like sometimes do not indicate the actual positions, sizes, and ranges. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings and the like.

In addition, the ordinal numbers such as "first", "second", and "third" used in this specification and the like are attached for the convenience of identifying the constituent elements, and are not limited in terms of numbers.

In addition, in this specification and the like, "upper" or "lower" is not limited to the positional relationship of the constituent elements being "upright" or "upright". For example, the expression of "gate electrode on gate insulating film" includes a case where another constituent element is included between the gate insulating film and the gate electrode.

In addition, in this specification and the like, "electrodes" or "wirings" do not limit the functions of constituent elements. For example, sometimes "electrodes" are used as part of "wiring" and vice versa. Furthermore, the term "electrode" or "wiring" also includes a case where a plurality of "electrodes" or "wirings" are formed as a whole, and the like.

In addition, the functions of "source" and "drain" are sometimes interchanged when transistors with different polarities are used or when the direction of current changes during circuit operation. Therefore, in this specification and the like, "source" and "drain" can be interchanged.

In addition, in this specification and the like, "electrical connection" includes the case of connection by "an element having a certain electrical function". Here, the "component with a certain electrical function" is not particularly limited as long as it can transmit and receive electrical signals between connection targets. For example, "an element having a certain electrical function" includes not only electrodes and wiring, but also switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions.

In this manual, etc., the photolithography process is used for patterning. Note that the patterning is not limited to the photolithography process, and processes other than the photolithography process can also be used. In addition, the mask formed by the photolithography process is removed after the etching process.

Embodiment 1

In this embodiment, one mode of a semiconductor device and a method of manufacturing the semiconductor device will be described with reference to FIGS. 1A to 5C. In this embodiment mode, a transistor using an oxide semiconductor film is shown as an example of a semiconductor device.

&lt;Semiconductor device structure example 1&gt;

1A to 1C show structural examples of the transistor 150. FIG. 1A is a plan view of the transistor 150, FIG. 1B is a cross-sectional view along the line X1-Y1 of FIG. 1A, and FIG. 1C is a cross-sectional view along the line V1-W1 of FIG. 1A. Note that in FIG. 1A, for convenience, a part of the constituent elements of the transistor 150 (for example, the gate insulating film 106, etc.) is omitted and illustrated.

The transistor 150 shown in FIGS. 1A to 1C includes: a gate electrode 104 formed on a substrate 102; a gate insulating film 106 formed on the gate electrode 104; and a gate insulating film 106 formed in contact with the gate insulating film 106 The oxide semiconductor film 108 at a position overlapping with the gate electrode 104; the source electrode 110 and the drain electrode 112 formed on the oxide semiconductor film 108.

In addition, the gate electrode 104 is composed of a first gate electrode 104a and a second gate electrode 104b. The first gate electrode 104a preferably uses a metal film or a metal nitride film containing one or more elements of tungsten, tantalum, titanium, and molybdenum. In addition, the second gate electrode 104b preferably contains a copper element. For example, in this embodiment, a tungsten film is used as the first gate electrode 104a, and a copper film is used as the second gate electrode 104b. By adopting the above-mentioned laminated structure, a low-resistance gate electrode 104 can be obtained. In addition, by providing the first gate electrode 104a, the adhesion between the substrate 102 and the copper film used as the second gate electrode 104b can be improved, and/or the copper film used as the second gate electrode 104b can be suppressed The diffusion of copper in the element.

In addition, the gate insulating film 106 is composed of a first gate insulating film 106a and a second gate insulating film 106b. It is sufficient that the first gate insulating film 106a has a function of suppressing the diffusion of the copper element in the copper film used as the second gate electrode 104b, and a silicon nitride film, a silicon oxynitride film, an aluminum oxide film, and an aluminum oxynitride film can be used.Film and so on. Film and so on. Film and so on. In addition, the second gate insulating film 106b may have a function of supplying oxygen to the oxide semiconductor film 108 to be formed later, and a silicon oxide film, a silicon oxynitride film, or the like can be used. For example, in this embodiment, a silicon nitride film is used as the first gate insulating film 106a, and a silicon oxynitride film is used as the second gate insulating film 106b. By adopting the gate insulating film 106 of the above-described stacked structure, the diffusion of the copper element in the copper film used for the gate electrode 104 can be suppressed, and oxygen can be supplied to the oxide semiconductor film 108 formed later.

In addition, the source electrode 110 is composed of a first metal film 110a, a second metal film 110b, and a third metal film 110c, and the drain electrode 112 is composed of a first metal film 112a, a second metal film 112b, and a third metal film 112c. In addition, the second metal film 110b and the second metal film 112b are formed in regions inside the ends of the first metal film 110a, the first metal film 112a, the third metal film 110c, and the third metal film 112c.

In addition, the first metal film 110a, the first metal film 112a, the third metal film 110c, and the third metal film 112c are preferably metal films or metal nitrides containing one or more elements of tungsten, tantalum, titanium, and molybdenum. membrane. In addition, the second metal film 110b and the second metal film 112b preferably contain a copper element.

For example, in this embodiment, a tungsten film is used as the first metal film 110a and the first metal film 112a, a copper film is used as the second metal film 110b and the second metal film 112b, and the third metal film 110c and the third metal film are used. The film 112c uses a tantalum nitride film. In addition, the second metal film 110b and the second metal film 112b are formed on the first metal film 110a and the first metal film 112a and are covered by the third metal film 110c and the third metal film 112c.

In other words, the tungsten film used as the first metal film 110a and the first metal film 112a covers the lower surface of the copper film used as the second metal film 110b and the second metal film 112b, and functions as the third metal film 110c and the third metal film 110c and the third metal film 110c. The tantalum nitride film of the metal film 112c covers the upper surface and side surfaces of the copper film used as the second metal film 110b and the second metal film 112b. The first metal film 110a, the first metal film 112a, the third metal film 110c, and the third metal film 112c have a function as a barrier metal that suppresses the diffusion of the copper element in the copper film.

By adopting the above structure, the source electrode 110 and the drain electrode 112 with low resistance can be obtained, and the copper element in the copper film used in the source electrode 110 and the drain electrode 112 can be suppressed from diffusing to the outside.

Examples of the method of forming the source electrode 110 and the drain electrode 112 are as follows. A first metal film and a second metal film are formed on the oxide semiconductor film 108, and the second metal film is subjected to a first photolithography process and a first etching is performed to remove a part of the second metal film to form a second metal film 110b and the second metal film 112b. Then, a third metal film is formed on the first metal film and the second metal film (the second metal film 110b and the second metal film 112b) so as to cover the second metal film. Then, the third metal film is subjected to a second photolithography process and a second etching is performed to remove a part of the first metal film and the third metal film to form the first metal film 110a, the first metal film 112a, and the third metal film. 110c and the third metal film 112c. By adopting the above-mentioned manufacturing method, the copper film used as the second metal film is not in direct contact with the oxide semiconductor film 108, so it is possible to suppress impurities (especially copper element ) Of the proliferation.

In addition, it may further include: an oxygen-excess type first insulating film 114a formed on the source electrode 110 and the drain electrode 112; a second insulating film 114b formed on the first insulating film 114a; and a second insulating film formed on the second insulating film 114a. An aluminum oxide film 116 on 114b; and a planarization insulating film 118 formed on the aluminum oxide film 116.

In addition, the details of other constituent elements will be described with reference to FIGS. 2A to 5C in the method of manufacturing the transistor 150 shown in FIGS. 1A to 1C described later.

&lt;Method 1 of manufacturing semiconductor device&gt;

First, the gate electrode 104 including the first gate electrode 104a and the second gate electrode 104b is formed on the substrate 102 (see FIG. 2A).

There is no particular limitation on the substrate that can be used as the substrate 102, but the substrate 102 needs to have at least a degree of heat resistance that can withstand the heat treatment performed later. For example, various glass substrates used in the electronics industry such as barium borosilicate glass substrates or aluminum borosilicate glass substrates can be used. In addition, as the substrate, it is preferable to use a thermal expansion coefficient of 25×10^-7/°C above and 50×10^-7/°C below (preferably 30×10^-7/°C above and 40×10^-7/°C or less) and a substrate having a strain point of 650°C or higher and 750°C or lower (preferably 700°C or higher and 740°C or lower).

In addition, when using the 5th generation (1000mm×1200mm or 1300mm×1500mm), the 6th generation (1500mm×1800mm), the 7th generation (1870mm×2200mm), the 8th generation (2200mm×2500mm), the 9th generation (2400mm× In the case of large glass substrates such as 2800mm) and the 10th generation (2880mm×3130mm), microfabrication may become difficult due to shrinkage of the substrate due to heat treatment in the semiconductor device manufacturing process. Therefore, when using the above-mentioned large glass substrate as a substrate, it is preferable to use a glass substrate with less shrinkage. For example, as the substrate, a large glass substrate having a shrinkage amount of 20 ppm or less, preferably 10 ppm or less, and more preferably 5 ppm or less after heat treatment at a temperature of 450°C, preferably 500°C for 1 hour, can be used.

In addition, a flexible substrate may be used as the substrate 102 to manufacture a semiconductor device. When manufacturing a flexible semiconductor device, the transistor 150 including the oxide semiconductor film 108 may be directly formed on the flexible substrate, or the transistor 150 including the oxide semiconductor film 108 may be formed on another manufacturing substrate and combined It is peeled from the manufacturing substrate and transferred to the flexible substrate. In addition, in order to peel off and transfer the transistor 150 from the manufacturing substrate to the flexible substrate, it is preferable to provide a peeling layer between the manufacturing substrate and the transistor 150 including an oxide semiconductor film.

A base insulating film may also be provided on the substrate 102. As the base insulating film, silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, hafnium oxide, gallium oxide, and other oxide insulating films, silicon nitride, and silicon oxynitride can be used by plasma CVD or sputtering. , Aluminum nitride, aluminum oxynitride and other nitride insulating films or their mixed materials.

In addition, the substrate 102 may be subjected to heat treatment. For example, a GRTA (Gas Rapid Thermal Anneal) apparatus that uses high-temperature gas for heat treatment can be used to perform heat treatment at 650°C for 1 minute to 5 minutes. In addition, as the high-temperature gas used in GRTA, an inert gas that does not react with the object to be processed even if it is heated, such as a rare gas such as argon or nitrogen, is used. In addition, an electric furnace may be used to perform heat treatment at 500°C for 30 minutes to 1 hour.

The gate electrode 104 may be formed using a material containing one or more elements of tungsten, tantalum, titanium, molybdenum, and copper. In this embodiment, as the second gate electrode 104b, a copper film having a thickness of 100 nm or more and 400 nm or less is formed by a sputtering method. In addition, as a lower layer of the second gate electrode 104b, a first gate electrode 104a serving as a barrier metal that prevents the diffusion of the copper element in the copper film is formed. In this embodiment, as the first gate electrode 104a, a tantalum nitride film having a thickness of 20 nm or more and 100 nm or less is formed by a sputtering method.

In addition, in this embodiment, the stacked structure of the first gate electrode 104a and the second gate electrode 104b is described, but it is not limited to this structure. For example, a third gate electrode may be further formed on the second gate electrode 104b. The third gate electrode may use the same material as the first gate electrode 104a.

Next, a gate insulating film 106 including a first gate insulating film 106a and a second gate insulating film 106b is formed on the substrate 102 and the gate electrode 104 (see FIG. 2B).

As the first gate insulating film 106a, a nitride insulating film having a thickness of 10 nm or more and 100 nm or less, and more preferably 20 nm or more and 50 nm or less, formed by a plasma CVD method, a sputtering method, or the like, is preferably used. For example, a silicon nitride film, a silicon oxynitride film, etc. can be used. By using a nitride insulating film as the first gate insulating film 106a in contact with the substrate 102 and the gate electrode 104, the effect of preventing the diffusion of impurities from the substrate 102 or the gate electrode 104 can be obtained. In particular, when a metal material containing copper element is used as the gate electrode 104 (more specifically, the second gate electrode 104b), the first gate insulating film 106a can be used to suppress the diffusion of the copper element into the oxide semiconductor.membrane108middle. The film 108.

In this embodiment, as the first gate insulating film 106a, a 50-nm-thick silicon nitride film formed by a plasma CVD method is used. As the film forming gas used to form the silicon nitride film, for example, silane (SiH₄) And nitrogen mixed gas or silane, nitrogen and ammonia (NH₃) Mixed gas, etc.

As the second gate insulating film 106b, an oxide insulating film having a thickness of 100 nm or more and 350 nm or less, and more preferably 100 nm or more and 200 nm or less, formed by a plasma CVD method, a sputtering method, or the like, is preferably used. For example, a silicon oxide film, a gallium oxide film, an aluminum oxide film, a silicon oxynitride film, an aluminum oxynitride film, etc. can be used.

In addition, by using hafnium oxide, yttrium oxide, hafnium silicate (HfSi_xO_y(x&gt;0, y&gt;0)), hafnium silicate with nitrogen (HfSiO_xN_y(x&gt;0, y&gt;0)), hafnium aluminate (HfAl_xO_y(x&gt;0, y&gt;0)) and high-k materials such as lanthanum oxide, which can reduce gate leakage current.

In this embodiment, as the second gate insulating film 106b, a silicon oxynitride film having a thickness of 200 nm is formed by a plasma CVD method. The plasma CVD method can form a film in a shorter time than the sputtering method. In addition, compared with the case of using the sputtering method, when the plasma CVD method is used for film formation, the unevenness of the film thickness on the surface of the second gate insulating film 106b is small, and the mixing of particles is less likely to occur.

In addition, the second gate insulating film 106b is an insulating film in contact with the oxide semiconductor film 108, and therefore preferably contains oxygen and contains no impurities such as water and hydrogen as much as possible. However, compared with the case of using the sputtering method, it is difficult to reduce the hydrogen concentration in the film in the case of using the plasma CVD method. Therefore, the second gate insulating film 106b after the film formation may be subjected to heat treatment (dehydration treatment or dehydrogenation treatment) for reducing hydrogen atoms, more preferably removing hydrogen atoms.

The temperature of the heat treatment is set to 250°C or higher and 650°C or lower, preferably 450°C or higher and 600°C or lower or lower than the strain point of the substrate. For example, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the gate insulating film 106 is heated at 650° C. for 1 hour in a vacuum (reduced pressure) atmosphere.

Note that the heat treatment device is not limited to an electric furnace, and a device that uses heat conduction or heat radiation generated by a heating element such as a resistance heating element to heat the object to be processed may be used. For example, an RTA (Rapid Thermal Anneal) device such as a GRTA (Gas Rapid Thermal Anneal) device and an LRTA (Lamp Rapid Thermal Anneal) device can be used. The LRTA device is a device that uses radiation (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high pressure sodium lamps, or high pressure mercury lamps to heat the object to be processed. The GRTA device is a device that uses high-temperature gas for heat treatment. As the high-temperature gas, an inert gas that does not react with the object to be processed, such as a rare gas such as argon, or nitrogen, is used even if heat treatment is performed. Note that when the GRTA device is used as a heat treatment device, the heat treatment time is very short, so the substrate can also be heated in an inert gas heated to a high temperature of 650°C to 700°C.

The heat treatment may be carried out in an atmosphere of nitrogen, oxygen, ultra-dry air (water content of 20 ppm or less, preferably 1 ppm or less, and more preferably air of 10 ppb or less) or rare gas (argon, helium, etc.). However, it is preferable that the atmosphere such as nitrogen, oxygen, ultra-dry air, or rare gas does not contain water, hydrogen, or the like. In addition, it is preferable to set the purity of nitrogen, oxygen, or rare gas introduced into the heat treatment device to 6N (99.9999%) or more, preferably to 7N (99.99999%) or more (that is, to set the impurity concentration to 1 ppm). Hereinafter, it is preferably set to 0.1 ppm or less).

The gate insulating film 106 can be dehydrated or dehydrogenated by the heat treatment, and the gate insulating film 106 can be formed from which impurities such as hydrogen or water, which cause changes in the characteristics of the transistor, are removed.

In addition, the heat treatment for dehydration or dehydrogenation may be performed multiple times, and the heat treatment for dehydration or dehydrogenation may also be used as other heat treatment.

Next, an oxide semiconductor film 108 is formed at a position overlapping with the gate electrode 104 so as to be in contact with the gate insulating film 106 (see FIG. 2C).

The oxide semiconductor film 108 may have either a single-layer structure or a stacked structure. In addition, it may have both an amorphous structure and a crystalline structure. When the oxide semiconductor film 108 has an amorphous structure, the oxide semiconductor film 108 may be heated in a subsequent process to obtain a crystalline oxide semiconductor film. The temperature of the heat treatment for crystallization of the amorphous oxide semiconductor film is set to 250°C or higher and 700°C or lower, preferably 400°C or higher, more preferably 500°C or higher, and still more preferably 550°C or higher. In addition, this heat treatment can also be used as another heat treatment in the manufacturing process.

As a film formation method of the oxide semiconductor film 108, sputtering method, MBE (Molecular Beam Epitaxy) method, plasma CVD method, pulse laser deposition method, ALD (Atomic Layer Deposition: atomic Layer deposition) method and so on.

When forming the oxide semiconductor film 108, it is preferable to reduce the concentration of hydrogen contained in the oxide semiconductor film 108 as much as possible. In order to reduce the hydrogen concentration, for example, when the film is formed by the sputtering method, the atmosphere gas supplied to the processing chamber of the sputtering device is appropriately used: a high-purity one in which impurities such as hydrogen, water, hydroxyl, or hydride are removed Rare gas (typically argon); oxygen; a mixed gas of rare gas and oxygen.

In addition, by introducing a sputtering gas from which hydrogen and water have been removed to perform film formation while removing moisture remaining in the processing chamber, the hydrogen concentration of the formed oxide semiconductor film 108 can be reduced. In order to remove the moisture remaining in the processing chamber, it is preferable to use an adsorption-type vacuum pump, for example, a cryogenic pump, an ion pump, and a titanium sublimation pump. In addition, turbomolecular pumps equipped with cold traps can also be used. Since the cryopump is very sensitive to hydrogen molecules, water (H₂O) and other compounds containing hydrogen atoms (preferably including compounds containing carbon atoms) and the like have a high ability to exhaust gas, so it is possible to reduce the content of oxide semiconductor film 108 formed in the processing chamber where cryopumps are used for exhaust gas. The concentration of impurities.

In addition, in this embodiment, the oxide semiconductor film 108 uses a metal oxide target with an atomic ratio of In:Ga:Zn=1:1:1 or a metal oxide with an atomic ratio of In:Ga=2:1. The target material is formed by sputtering. Note that the material and composition of the target used to form the oxide semiconductor film 108 are not limited to this. In addition, the oxide semiconductor film 108 can be formed by a sputtering method in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen. In addition, as a target material for forming the oxide semiconductor film 108, it is preferable to use a target material having crystallinity, such as a single crystal target material or a polycrystalline target material. By using a crystalline target, a crystalline thin film can be formed, and in particular, c-axis-aligned crystals are easily formed in the formed thin film.

In addition, the oxide semiconductor film 108 immediately after the film formation is preferably in a supersaturated state containing more oxygen than the stoichiometric composition. For example, in the case of forming the oxide semiconductor film 108 by a sputtering method, it is preferable to form the film under the conditions that the ratio of oxygen in the film forming gas is high, and it is particularly preferable to form the film in an oxygen atmosphere (the oxygen gas is 100 %) under the film formation. For example, when an In-Ga-Zn-based oxide (IGZO) is used and the oxide semiconductor film 108 is formed under conditions where the ratio of oxygen in the film forming gas is high (especially in an atmosphere where the oxygen gas is 100%), Even if the film formation temperature is set to 300°C or higher, the release of Zn from the film can be suppressed.

In addition, when the oxide semiconductor film 108 is formed using a metal oxide target having an atomic ratio of In:Ga:Zn=1:1:1, the composition of the target may be different from the composition of the thin film formed on the substrate. . For example, in the case of using a metal oxide target of In:Ga:Zn=1:1:1, although it depends on the film forming conditions, the composition of the thin oxide semiconductor film 108 may be In:Ga:Zn. =1:1:0.6 to 0.8 (atomic ratio). This is considered to be because Zn sublimates when the oxide semiconductor film 108 is formed; or the sputtering rates of the respective components of In, Ga, and Zn are different.

Therefore, when a thin film having a desired composition is to be formed, the composition of the metal oxide target needs to be adjusted in advance. For example, in order to make the composition of the thin-film oxide semiconductor film 108 In:Ga:Zn=1:1:1 (atomic ratio), the composition of the metal oxide target is set to In:Ga:Zn=1:1 : 1.5 (atomic ratio) is sufficient. In other words, the content ratio of Zn in the metal oxide target is increased in advance. Note that the composition of the target is not limited to the above-mentioned numerical value, and can be appropriately adjusted according to the film forming conditions or the composition of the formed thin film. In addition, by increasing the content ratio of Zn in the metal oxide target, the crystallinity of the obtained thin film is improved, which is preferable.

In addition, in the case of forming the oxide semiconductor film 108 by a sputtering method, the relative density of the metal oxide target used for film formation is 90% or more and 100% or less, preferably 95% or more, and more preferably 99.9% or more. By using a metal oxide target with a high relative density, a dense oxide semiconductor film 108 can be formed.

In addition, in order to reduce the concentration of impurities that may be contained in the oxide semiconductor film 108, it is also effective to form the oxide semiconductor film 108 while keeping the substrate 102 at a high temperature. The heating temperature of the substrate 102 can be set to 150° C. or more and 450° C. or less, preferably 170° C. or more and 350° C. or less. In addition, by heating the substrate at a high temperature during film formation, the crystalline oxide semiconductor film 108 can be formed.

The oxide semiconductor used for the oxide semiconductor film 108 preferably contains at least indium (In) or zinc (Zn). It is particularly preferable to include In and Zn. In addition, as a stabilizer for reducing variations in the electrical characteristics of the transistor using the oxide semiconductor, it is preferable to include gallium (Ga) in addition to the above-mentioned elements. Moreover, it is preferable to contain tin (Sn) as a stabilizer. In addition, it is preferable to include hafnium (Hf) as a stabilizer. Moreover, it is preferable to contain aluminum (Al) as a stabilizer. Moreover, it is preferable to contain zirconium (Zr) as a stabilizer.

In addition, as other stabilizers, lanthanum (La), cerium (Ce), samarium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gamma (Gd), pomegranate can also be included as other stabilizers. One or more of (Tb), dysprosium (Dy), (Ho), erbium (Er), (Tm), ytterbium (Yb), and (Lu).

For example, as an oxide semiconductor, indium oxide, tin oxide, zinc oxide, In-Zn-based oxide, Sn-Zn-based oxide, Al-Zn-based oxide, Zn-Mg-based oxide, Sn-Mg can be used Type oxide, In-Mg type oxide, In-Ga type oxide, In-Ga-Zn type oxide (also called IGZO), In-Al-Zn type oxide, In-Sn-Zn type oxide , Sn-Ga-Zn oxides, Al-Ga-Zn oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-La-Zn oxides, In-Ce- Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn Type oxide, In-Lu-Zn type oxide, In-Sn-Ga-Zn type oxide, In-Hf-Ga-Zn type oxide, In-Al-Ga-Zn type oxide, In-Sn- Al-Zn-based oxides, In-Sn-Hf-Zn-based oxides, In-Hf-Al-Zn-based oxides.

Here, for example, the In-Ga-Zn-based oxide refers to an oxide containing In, Ga, and Zn as main components, and the ratio of In, Ga, and Zn is not limited. In addition, metal elements other than In, Ga, and Zn may also be included.

In addition, as an oxide semiconductor, InMO can also be used₃(ZnO)_m(m&gt;0, and m is not an integer) represents the material. Note that M represents one metal element or multiple metal elements selected from Ga, Fe, Mn, and Co. In addition, as an oxide semiconductor, In₂SnO₅(ZnO)_n(n&gt;0, and n is an integer) represents the material.

For example, the atomic ratio can be used as In:Ga:Zn=1:1:1(=1/3:1/3:1/3), In:Ga:Zn=2:2:1(=2/ 5: 2/5: 1/5) or In: Ga: Zn = 3: 1: 2 (= 1/2: 1/6: 1/3) In-Ga-Zn oxide or similar compositionofoxide. Alternatively, it is preferable to use the atomic ratio of In:Sn:Zn=1:1:1(=1/3:1/3:1/3), In:Sn:Zn=2:1:3(= 1/3:1/6:1/2) or In:Sn:Zn=2:1:5 (=1/4:1/8:5/8) In-Sn-Zn oxides or similar The composition of the oxide.

However, it is not limited to this, and an oxide semiconductor of an appropriate composition can be used according to the required semiconductor characteristics (mobility, critical value, non-uniformity, etc.). In addition, it is preferable to use appropriate carrier concentration, impurity concentration, defect density, atomic ratio between metal elements and oxygen, interatomic distance, density, etc., to obtain desired semiconductor characteristics.

For example, using In-Sn-Zn oxides can easily obtain higher mobility. However, when an In-Ga-Zn-based oxide is used, the mobility can also be improved by reducing the defect density in the block.

In addition, for example, the atomic ratio of In, Ga, and Zn is In:Ga:Zn=a:b:c (a+b+c=1). The composition to atomic ratio of the oxide is In:Ga:Zn=A : B: C (A+B+C=1) The similar composition of oxides means that a, b, and c satisfy the following formula: (aA)²+(bB)²+(cC)²<img file="TWI698024B_D0001.tif" />r². r may be 0.05, for example. The same is true for other oxides.

In addition, the oxide semiconductor film 108 is preferably a CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) film.

The CAAC-OS film is not completely single crystal, nor is it completely amorphous. The CAAC-OS film is an oxide semiconductor film of a crystal-amorphous mixed phase structure having an amorphous portion in an amorphous phase. In addition, in many cases, the size of the crystal portion is a size that can be accommodated in a cube whose one side is shorter than 100 nm. In addition, in an image observed with a transmission electron microscope (TEM: Transmission Electron Microscope), the boundary between the amorphous part and the crystalline part included in the CAAC-OS film is not clear. In addition, no grain boundary was observed in the CAAC-OS film by TEM. Therefore, in the CAAC-OS film, the decrease in electron mobility due to grain boundaries is suppressed.

In the crystalline portion included in the CAAC-OS film, the c-axis coincides in the direction parallel to the normal vector of the formed surface of the CAAC-OS film or the normal vector of the surface of the CAAC-OS film. When viewed from the direction of the ab plane, a triangular or hexagonal atomic arrangement is formed, and when viewed from a direction perpendicular to the c-axis, the metal atoms are arranged in a layered form or the metal atoms and oxygen atoms are arranged in a layered form. In addition, the directions of the a-axis and the b-axis of different crystal parts may be different from each other. In this specification, when only "perpendicular" is described, the range of 85° or more and 95° or less is included. In addition, when only "parallel" is described, the range of -5° or more and 5° or less is included.

In addition, in the CAAC-OS film, the distribution of crystal parts may not be uniform. For example, during the formation of the CAAC-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, it may be near the surface of the oxide semiconductor film compared to the vicinity of the surface where the oxide semiconductor film is formed. The proportion of crystal parts is high. In addition, by adding an impurity to the CAAC-OS film, the crystal portion in the impurity-added region may be amorphized.

Because the c-axis of the crystalline part included in the CAAC-OS film coincides in the direction parallel to the normal vector of the formed surface of the CAAC-OS film or the normal vector of the surface of the CAAC-OS film, it is sometimes based on the CAAC -The shape of the OS film (the cross-sectional shape of the surface to be formed or the cross-sectional shape of the surface) faces in directions different from each other. In addition, the c-axis direction of the crystal portion when the CAAC-OS film is formed is a direction parallel to the normal vector of the surface to be formed of the CAAC-OS film or the normal vector of the surface of the CAAC-OS film. The crystal portion is formed by film formation or crystallization treatment such as heat treatment after film formation.

In the transistor using the CAAC-OS film, the change in electrical characteristics caused by the irradiation of visible light or ultraviolet light is small. Therefore, the reliability of the transistor is high.

When a CAAC-OS film is used as the oxide semiconductor film 108, three methods can be cited as a method of obtaining the CAAC-OS film. The first method is to form an oxide semiconductor film by setting the film forming temperature to 100°C or higher and 450°C or lower, preferably 150°C or higher and 400°C or lower, and perform c-axis alignment in a direction substantially perpendicular to the surface . The second method is to form a thin oxide semiconductor film, and then heat treatment at 200° C. or higher and 700° C. or lower, and perform c-axis alignment in a direction substantially perpendicular to the surface. The third method is to form a thin first layer, heat treatment at 200° C. or higher and 700° C. or lower, then form the second layer, and perform c-axis alignment in a direction substantially perpendicular to the surface.

In addition, when an oxide semiconductor film (single crystal or microcrystalline) having crystallinity other than the CAAC-OS film is formed as the oxide semiconductor film 108, the film formation temperature is not particularly limited.

In addition, the energy gap of the oxide semiconductor film 108 is 2.8 eV to 3.2 eV, which is larger than 1.1 eV of the energy gap of silicon. In addition, the intrinsic carrier density of the oxide semiconductor film 108 is 10^-9/cm^-3, Which is 10 times lower than the intrinsic carrier density of silicon¹¹/cm^-3Much smaller.

The majority carriers (electrons) of the oxide semiconductor film 108 only flow from the source electrode of the transistor. In addition, since the channel formation region can be completely depleted, the off-state current of the transistor can be minimized. The off-state current of the transistor using the oxide semiconductor film 108 is extremely small, that is, 10 yA/μm or less at room temperature, and 1 zA/μm or less at a temperature of 85°C to 95°C.

In addition, the oxide semiconductor film 108 may have a structure in which a plurality of oxide semiconductor layers are stacked. For example, a stack of a first oxide semiconductor layer and a second oxide semiconductor layer may be used as the oxide semiconductor film 108, and the first oxide semiconductor layer and the second oxide semiconductor layer may use metal oxides of different compositions. Things. For example, a ternary metal oxide may be used as the first oxide semiconductor layer, and a binary metal oxide may be used as the second oxide semiconductor layer. In addition, a ternary metal oxide may be used as both the first oxide semiconductor layer and the second oxide semiconductor layer.

In addition, the constituent elements of the first oxide semiconductor layer and the second oxide semiconductor layer may be the same, and the composition of the two may be different. For example, the atomic ratio of the first oxide semiconductor layer may be set to In:Ga:Zn=1:1:1, and the atomic ratio of the second oxide semiconductor layer may be set to In:Ga:Zn=3: 1:2. In addition, the atomic ratio of the first oxide semiconductor layer may be set to In:Ga:Zn=1:3:2, and the atomic ratio of the second oxide semiconductor layer may be set to In:Ga:Zn=2: 1:3.

At this time, it is preferable to set the content ratio of In and Ga in the oxide semiconductor layer on the side (channel side) of the first oxide semiconductor layer and the second oxide semiconductor layer closer to the gate electrode to In &gt;Ga. In addition, it is preferable to set the In and Ga content ratio of the oxide semiconductor layer on the side far from the gate electrode (back channel side) to In<img file="TWI698024B_D0002.tif" />Ga. In oxide semiconductors, the s-orbitals of heavy metals mainly contribute to carrier conduction, and by increasing the content ratio of In, there is a tendency to increase the overlap rate of the s-orbitals, thereby having the mobility of an oxide composed of In&gt;Ga Than having In<img file="TWI698024B_D0003.tif" />The composition of Ga has a high oxide. In addition, the formation energy of oxygen vacancies in Ga is larger than that in In, and Ga is less prone to oxygen vacancies, so it has In<img file="TWI698024B_D0004.tif" />The oxide of the composition of Ga has stable characteristics compared with the oxide of the composition of In&gt;Ga. Therefore, by using an oxide semiconductor layer with the composition of In&gt;Ga on the channel side and the back channel side with In<img file="TWI698024B_D0005.tif" />The oxide semiconductor layer composed of Ga can further improve the mobility and reliability of the transistor.

In addition, when the oxide semiconductor film 108 is formed by stacking, oxide semiconductors with different crystallinities may be used as the first oxide semiconductor layer and the second oxide semiconductor layer. That is, it is also possible to adopt a structure in which a single crystal oxide semiconductor, a polycrystalline oxide semiconductor, an amorphous oxide semiconductor, or an oxide semiconductor having crystallinity (for example, CAAC-OS) is appropriately combined. In addition, when an amorphous oxide semiconductor is used as at least one of the first oxide semiconductor layer and the second oxide semiconductor layer, the internal stress or external stress of the oxide semiconductor can be alleviated, and the characteristic unevenness of the transistor can be reduced, and Further improve the reliability of the transistor. On the other hand, an amorphous oxide semiconductor easily absorbs impurities that become a donor, such as hydrogen, and tends to generate oxygen defects and become n-type. Therefore, it is preferable to use a crystalline oxide semiconductor (for example, CAAC-OS) for the oxide semiconductor layer on the channel side.

In addition, an example of a combination of composition and crystallinity when forming the oxide semiconductor film 108 by stacking is as follows: an amorphous oxide having an atomic ratio of In:Ga:Zn=1:1:1 is sequentially formed on the gate insulating film 106 The laminated structure of the semiconductor layer and the crystalline oxide semiconductor layer with the atomic ratio of In:Ga:Zn=3:1:2; the crystalline oxide with the atomic ratio of In:Ga:Zn=1:1:1 A stacked structure of a crystalline oxide semiconductor layer with a physical semiconductor layer and an atomic ratio of In:Ga:Zn=3:1:2. In addition, as other structures, a crystalline oxide semiconductor layer with an atomic ratio of In:Ga:Zn=3:1:2 and a crystalline oxide with an atomic ratio of In:Ga:Zn=1:1:1 can be used. Stacked structure of semiconductor layers. In addition, as other laminated structures, an amorphous oxide semiconductor layer with an atomic ratio of In:Ga:Zn=1:1:1 and an atomic ratio of In:Ga:Zn=3:1:2 can be used. A laminated structure of an amorphous oxide semiconductor layer; an amorphous oxide semiconductor layer with an atomic ratio of In:Ga:Zn=3:1:2 and an atomic ratio of In:Ga:Zn=1:1:1 The stacked structure of the left and right amorphous oxide semiconductor layers.

In addition, the surface on which the oxide semiconductor film 108 is formed may be planarized before the oxide semiconductor film 108 is formed. The planarization treatment is not particularly limited, and polishing treatment (for example, Chemical Mechanical Polishing (CMP)), dry etching treatment, and plasma treatment can be used.

As the plasma treatment, for example, reverse sputtering in which argon gas is introduced to generate plasma can be performed. Reverse sputtering refers to a method in which an RF power supply is used to apply a voltage to one side of a substrate in an argon atmosphere to form a plasma near the substrate to perform surface modification. In addition, nitrogen, helium, oxygen, etc. may be used instead of argon. By performing reverse sputtering, powdery substances (also referred to as particles and dust) adhering to the surface on which the oxide semiconductor film 108 is formed can be removed.

As the planarization treatment, multiple polishing treatments, dry etching treatments, and plasma treatments may be performed, or the above treatments may be combined to perform the planarization treatment. In addition, when the planarization treatment is performed in combination with the above-mentioned treatments, the process sequence is not particularly limited, and it can be appropriately set according to the unevenness of the surface on which the oxide semiconductor film 108 is formed.

In addition, it is preferable to perform heat treatment (dehydration or dehydrogenation) to reduce or remove excess hydrogen (including water and hydroxyl) contained in the oxide semiconductor film 108 after the oxide semiconductor film 108 is formed. . The heat treatment can be performed under the same conditions as the heat treatment performed on the second insulating film 106b described above.

The above-mentioned heat treatment can reduce hydrogen in the oxide semiconductor film 108, and more preferably remove hydrogen from the oxide semiconductor film 108, which is an impurity that imparts n-type conductivity. In addition, when an insulating film containing oxygen is used as the second gate insulating film 106b, oxygen contained in the second gate insulating film 106b is supplied to the oxide semiconductor film 108 by this heat treatment. Even if the oxide semiconductor film 108 releases oxygen when the oxide semiconductor film 108 is subjected to dehydration treatment or dehydrogenation treatment, oxygen can be supplied from the second gate insulating film 106b, so that oxygen defects of the oxide semiconductor film 108 can be filled.

In addition, after the oxide semiconductor film 108 is heated by heat treatment, while maintaining the heating temperature or gradually lowering the heating temperature, high-purity oxygen gas and high-purity one can be introduced into the same furnace. Nitrous oxide gas or ultra-dry air (using CRDS (Cavity Ring Down laser Spectroscopy: optical cavity ring down spectroscopy) method of dew point meter to measure the moisture content is 20ppm (dew point converted to -55 °C) or less, preferably It is 1 ppm or less, more preferably 10 ppb or less of air). It is preferable that the oxygen gas or nitrous oxide gas does not contain water, hydrogen, or the like. Alternatively, it is preferable to set the purity of the oxygen gas or nitrous oxide gas introduced into the heat treatment device to be 6N or more, preferably 7N or more (that is, the impurities in the oxygen gas or nitrous oxide gas The concentration is set to 1 ppm or less, preferably 0.1 ppm or less). Even if oxygen is reduced during impurity discharge processes such as dehydration treatment or dehydrogenation treatment, the oxide semiconductor film 108 can be formed by supplying oxygen as the main component of the oxide semiconductor film 108 with oxygen gas or nitrous oxide gas. Highly purified and i-type (essential).

The heat treatment used for dehydration or dehydrogenation can also be used as other heat treatment in the manufacturing process of the transistor 150.

Next, on the gate insulating film 106 and the oxide semiconductor film 108, a first metal film 109a and a second metal film 109b (refer to Figure 2D).

The first metal film 109a is preferably a metal film or a metal nitride film containing one or more elements of tungsten, tantalum, titanium, and molybdenum. In this embodiment, a 50-nm-thick tungsten film formed by a sputtering method is used as the first metal film 109a.

In addition, the first metal film 109a may also have a laminated structure. For example, the following laminated structure can be adopted: as the first layer of the first metal film 109a, a metal film containing one or more elements of tungsten, tantalum, titanium, and molybdenum is used, and as the second layer of the first metal film 109a A metal nitride film of one or more elements of tungsten nitride, tantalum nitride, titanium nitride, and molybdenum nitride.

Since the first metal film 109a is in contact with the oxide semiconductor film 108, it is preferable to use a material that does not extract oxygen from the oxide semiconductor film 108 without making it n-type or does not diffuse into the oxide semiconductor film as the first metal film 109a. The film 108 does not make it an n-type material. In addition, as the first metal film 109a, it is preferable to use a material (a so-called barrier metal material) that suppresses the diffusion of copper elements from the copper film used as the second metal film 109b into the oxide semiconductor film 108.

The second metal film 109b preferably contains copper element. In addition, copper alloys in which several wt% of aluminum, gold, silver, zinc, tin, nickel, or the like are added to copper can also be used. In this embodiment, a 200-nm thick copper film formed by a sputtering method is used as the second metal film 109b.

Next, a resist is coated on the second metal film 109b and the first patterning is performed to form a photoresist mask 141 (refer to FIG. 2E).

The photoresist mask 141 may be formed by exposing and developing the photosensitive resin after coating the photosensitive resin. In addition, as the photosensitive resin, either negative type or positive type can be used. In addition, the photoresist mask 141 may be formed by an inkjet method. When the photoresist mask 141 is formed by the inkjet method, the photomask is not used, so the manufacturing cost can be reduced.

Next, a part of the second metal film 109b is removed by the first etching to form the second metal film 110b and the second metal film 112b (see FIG. 3A).

As a method of removing the second metal film 109b, a wet etching method is preferably used. In addition, the chemical solution used in the wet etching method may be a chemical solution that can etch the second metal film 109b but the first metal film 109a does not disappear. For example, a tungsten film is used as the first metal film 109a and the second metal film 109a is used. When a copper film is used for the metal film 109b, a mixture of water, hydrogen peroxide water, and carboxylic acid; a mixture of water, phosphoric acid, nitric acid, sulfuric acid, and potassium sulfate, etc. can be used as a chemical solution.

In addition, the time of wet etching may be adjusted and isotropic etching may be performed to form a shape in which the side surfaces of the second metal film 110b and the second metal film 112b are located on the inner side than the side surface of the photoresist mask 141.

Next, the photoresist mask 141 is removed (refer to FIG. 3B).

As a removal method of the photoresist mask 141, a wet removal method using a stripping liquid, a dry removal method such as plasma treatment, or a removal method combining the above methods, or the like can be used.

Next, a third metal film 109c is formed on the first metal film 109a, the second metal film 110b, and the second metal film 112b (see FIG. 3C).

The third metal film 109c can be formed using the same method and material as the first metal film 109a. In addition, in this embodiment, a 100-nm-thick tantalum nitride film formed by a sputtering method is used as the third metal film 109c.

Next, a resist is coated on the third metal film 109c and second patterning is performed to form a photoresist mask 142 (see FIG. 3D).

The photoresist mask 142 can be formed using the same method and material as the photoresist mask 141.

Next, a part of the first metal film 109a and the third metal film 109c is removed by the second etching to form the first metal film 110a, the first metal film 112a, the third metal film 110c, and the third metal film 112c (see FIG. 4A ).

In addition, a part of the first metal film 109a and the third metal film 109c located outside the ends of the second metal film 110b and the second metal film 112b removed by the first etching is removed by the second etching.

As a method of removing the first metal film 109a and the third metal film 109c, a dry etching method is preferably used. For example, in the case where a tungsten film is used as the first metal film 109a and a tantalum nitride film is used as the third metal film 109c, SF may be used as a gas for dry etching.₆And O₂Mixed gas or SF₆And BCl₃The mixed gas and so on.

Note that when the first metal film 109a and the third metal film 109c are etched, it is preferable to adopt the most suitable etching conditions so as not to cause the oxide semiconductor film 108 to be etched and disconnected. However, it is difficult to obtain conditions under which only the first metal film 109a and the third metal film 109c are etched and the oxide semiconductor film 108 is not etched at all. Therefore, when the first metal film 109a and the third metal film 109c are etched, A part of the oxide semiconductor film 108 may be etched to have grooves (recesses).

Next, the photoresist mask 142 is removed to form the source electrode 110 composed of the first metal film 110a, the second metal film 110b, and the third metal film 110c, and the source electrode 110 composed of the first metal film 112a, the second metal film 112b, and the third metal film 112a. The drain electrode 112 is composed of a metal film 112c (see FIG. 4B).

By using the above method to form the source electrode 110 and the drain electrode 112, the oxide semiconductor film 108 (specifically, the back channel side) is not in contact with the copper film used as the second metal film 110b and the second metal film 112b Therefore, the adhesion or diffusion of copper elements into the oxide semiconductor film 108 can be suppressed.

In addition, the photoresist mask 142 can be removed by the same method as the photoresist mask 141.

In addition, it is preferable to clean the oxide semiconductor film 108 (specifically, the back channel side) after the source electrode 110 and the drain electrode 112 are formed. As cleaning of the oxide semiconductor film 108, for example, oxygen plasma treatment or washing treatment using diluted hydrofluoric acid treatment, etc. are effective. By performing the cleaning described above, the etching gas component used in forming the source electrode 110 and the drain electrode 112, the residue of the photoresist mask 142, etc. can be removed from the oxide semiconductor film 108, thereby further making the oxide The semiconductor film 108 is highly purified.

In addition, the heat treatment may be performed after the source electrode 110 and the drain electrode 112 are formed. The temperature of the heat treatment is 250° C. or higher and 650° C. or lower, preferably 450° C. or higher and 600° C. or lower or lower than the strain point of the substrate.

Through the above steps, the transistor 150 shown in this embodiment is formed.

Next, on the transistor 150, specifically, the first insulating film 114a is formed on the oxide semiconductor film 108, the source electrode 110, and the drain electrode 112. Then, oxygen 145 is introduced into the first insulating film 114a and the oxide semiconductor film 108 (see FIG. 4C).

The first insulating film 114a can be formed by a plasma CVD method or a sputtering method, and an oxide insulating film such as a silicon oxide film, a gallium oxide film, an aluminum oxide film, a silicon oxynitride film, or an aluminum oxynitride film can be used. The thickness of the first insulating film 114a is preferably 50 nm or more and 100 nm or less.

In addition, the first insulating film 114a is preferably an oxygen-excess type oxide insulating film. By using an oxygen-excess type oxide insulating film, oxygen can be efficiently supplied to the oxide semiconductor film 108.

In this embodiment, as the first insulating film 114a, a 30-nm-thick silicon oxynitride film is formed by a plasma CVD method. Examples of film forming conditions of the first insulating film 114a are as follows: SiH₄And N₂The gas flow ratio of O is SiH₄: N₂O=20sccm: 3000sccm; pressure is 200Pa; RF power (power output) is 100W; substrate temperature is 350°C±15°C. In addition, the first insulating film 114a is an insulating film that is in contact with the oxide semiconductor film 108, so it is preferable that the gate insulating film 106 does not contain impurities such as water and hydrogen as much as possible.

The oxygen 145 contains at least any one of oxygen radicals, ozone, oxygen atoms, and oxygen ions (including oxygen molecular ions and oxygen cluster ions).

As a method of introducing oxygen 145 into the first insulating film 114a, for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, a plasma treatment, etc. can be used. In addition, as the ion implantation method, a gas cluster ion beam (gas cluster ion beam) may also be used. In addition, the introduction of oxygen 145 can be performed on the entire surface of the first insulating film 114a by one treatment, for example, a linear ion beam can be used for the introduction of oxygen. In the case of using a linear ion beam, by relatively moving (scanning) the substrate or the ion beam, oxygen 145 can be introduced to the entire surface of the first insulating film 114a.

As the gas for supplying oxygen 145, a gas containing O may be used, for example, O can be used₂Gas, N₂O gas, CO₂Gas, CO gas, NO₂Gas etc. Note that a rare gas (for example, Ar) may be contained in the oxygen supply gas.

In addition, for example, in the case of introducing oxygen by ion implantation, the dose of oxygen 145 is set to 1×10¹³ions/cm²Above and 5×10¹⁶ions/cm²the following. The first insulating film 114a after the oxygen introduction treatment preferably contains oxygen in an amount exceeding the stoichiometric composition of the first insulating film 114a. Note that the depth of oxygen injection may be appropriately controlled according to the injection conditions.

In the case of using an oxide insulating film (for example, a silicon oxide film or a silicon oxynitride film) as the first insulating film 114a, oxygen is one of the main component materials of the oxide insulating film. Therefore, it is difficult to accurately estimate the oxygen concentration in the oxide insulating film by a method such as SIMS (Secondary Ion Mass Spectrometry). That is, it is difficult to judge whether oxygen is intentionally added to the oxide insulating film. In addition, this is also the case where the excess oxygen contained in the first insulating film 114a is supplied to the oxide semiconductor film 108 in a subsequent process.

In addition, oxygen has¹⁷O and¹⁸O is equivalent to the top, and is generally considered to be in nature¹⁷O and¹⁸The existence ratio of O is about 0.038% and 0.2% of the total oxygen atoms, respectively. That is, the concentration of the above-mentioned isotope in the insulating film (in this embodiment, the first insulating film 114a) in contact with the oxide semiconductor film or in the oxide semiconductor film is a level that can be estimated by a method such as SIMS. So sometimes by measuring¹⁷O and¹⁸The concentration of O can accurately estimate the oxygen concentration in the insulating film in contact with the oxide semiconductor film or in the oxide semiconductor film. Therefore, it is also possible to determine whether oxygen is added to the insulating film in contact with the oxide semiconductor film by measuring these concentrations.

As described above, by performing the oxygen 145 introduction process, the oxygen-excess type first insulating film 114a is formed. By using the oxygen-excess type first insulating film 114a, it is possible to supply oxygen to the oxide semiconductor film 108 by solid phase diffusion resulting from the heat treatment in the manufacturing process of the transistor. In addition, in the oxygen 145 introduction process, oxygen may be introduced into the oxide semiconductor film 108 so as to pass through the first insulating film 114a.

Next, a second insulating film 114b is formed on the first insulating film 114a (refer to FIG. 4D).

The second insulating film 114b can be formed by a plasma CVD method or a sputtering method, and a silicon oxide film, a gallium oxide film, an aluminum oxide film, a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or an oxynitride film can be used. Silicon film. The thickness of the second insulating film 114b is preferably 50 nm or more and 500 nm or less.

In this embodiment, as the second insulating film 114b, a silicon oxynitride film having a thickness of 370 nm is formed by a plasma CVD method. Examples of film forming conditions of the second insulating film 114b are as follows: SiH₄And N₂The gas flow ratio of O is SiH₄: N₂O=30sccm: 4000sccm; pressure is 200Pa; RF power (power output) is 150W; substrate temperature is 220°C±15°C.

In addition, if the second insulating film 114b is formed of the same material as the first insulating film 114a, the interface between the first insulating film 114a and the second insulating film 114b may be unclear. For this reason, in this embodiment, the interface between the first insulating film 114a and the second insulating film 114b is shown by a broken line.

In addition, like the first insulating film 114a, the second insulating film 114b preferably contains no impurities such as water and hydrogen as much as possible. Therefore, in this embodiment, the second insulating film 114b after the film formation is subjected to heat treatment (dehydration treatment or dehydrogenation treatment) for removing hydrogen atoms.

The temperature of the heat treatment is set to, for example, 250°C or higher and 600°C or lower, preferably 300°C or higher and 600°C or lower. In this embodiment, the heat treatment is performed at 350°C for 1 hour.

Next, an aluminum film 115 is formed on the second insulating film 114b (refer to FIG. 5A).

The aluminum film 115 is preferably formed by a sputtering method, an evaporation method, a CVD method, or the like. In addition, the thickness of the aluminum film 115 is preferably 3 nm or more and 10 nm or less. In this embodiment, a 5 nm thick aluminum film is formed by a sputtering method.

In addition, the aluminum film 115 formed on the second insulating film 114b is later subjected to an oxygen introduction process to become an aluminum oxide film, which serves as a barrier film of the transistor. The aluminum oxide film has barrier properties, that is, the barrier effect of blocking impurities such as hydrogen and water and oxygen from passing through the film and entering the transistor is high.

Next, oxygen 147 is introduced into the aluminum film 115. Thereby, the aluminum film 115 becomes the aluminum oxide film 116 (refer to FIG. 5B).

Oxygen 147 can be introduced in the same way as oxygen 145.

In the introduction process of oxygen 147, oxygen may also be introduced into a part of the second insulating film 114b so as to pass through the aluminum film 115. Thus, even if oxygen is released from the second insulating film 114b in the previous heat treatment, it is possible to form a region containing oxygen in the second insulating film 114b in an amount exceeding the stoichiometric composition while supplying oxygen to the second insulating film 114b. . In addition, the region containing oxygen in an amount exceeding the stoichiometric composition may be formed in a part of the second insulating film 114b. Note that the depth of oxygen injection may be appropriately controlled according to the injection conditions.

In addition, a region containing oxygen in an amount exceeding the stoichiometric composition may be formed in the aluminum oxide film 116. Note that the portion of the aluminum oxide film 116 formed by the oxygen introduction process other than the above-mentioned region does not need to contain oxygen in an amount consistent with the stoichiometric composition, and may have a smaller conductivity. For example, the composition consists of Al₂O_xIn the case of the aluminum oxide film shown, x is preferably 1 or more and 3.5 or less. When the aluminum oxide film 116 has conductivity, it is preferable to set its resistivity ρ to 10¹⁰Ω. m or more and 10¹⁹Ω. m or less, more preferably 10¹⁰Ω. m or more and 10¹⁸Ω. m or less, more preferably 10¹¹Ω. m or more and 10¹⁵Ω. m or less. When the aluminum oxide film 116 has the above-mentioned resistivity, the electrostatic damage of the transistor 150 can be prevented.

In addition, the aluminum oxide film 116 is a film formed by oxidizing the aluminum film 115. Compared with the case where the aluminum oxide film is formed by the sputtering method, the aluminum oxide film 116 is formed by oxidizing the aluminum film 115, and the productivity can be improved.

In addition, heat treatment may be performed after introducing oxygen 147 into the aluminum film 115. By this heat treatment, oxygen contained in the first insulating film 114a or the second insulating film 114b can be supplied to the oxide semiconductor film 108 to fill the oxygen defects of the oxide semiconductor film 108. The temperature of the heat treatment can be set to 250°C or more and 600°C or less, preferably 300°C or more and 600°C or less. In this embodiment, the heat treatment is performed at 300°C for 1 hour.

Next, a planarization insulating film 118 is formed on the aluminum oxide film 116 (refer to FIG. 5C).

The flattening insulating film 118 may have the function of flattening the unevenness of the transistor 150. For example, heat-resistant organic materials such as polyimide resins, acrylic resins, polyimide resins, and benzoic resins may be used. Cyclobutene resins, polyamide resins, epoxy resins, etc. In addition, in addition to the above-mentioned organic materials, low-dielectric constant materials (low-k materials), silicone-based resins, and the like can also be used. In addition, a plurality of insulating films formed of these materials may be stacked to form the planarization insulating film 118. In this embodiment, as the planarizing insulating film 118, an acrylic resin having a thickness of 1.5 μm is formed.

As described above, in the transistor 150 shown in this embodiment, an oxide semiconductor film is used for the channel formation region and copper, which is a low-resistance material, is used for the gate electrode, the source electrode, and the drain electrode. In addition, when the source electrode and the drain electrode are formed, the back channel side of the oxide semiconductor film is not in contact with the copper film, so the adhesion or diffusion of the copper element into the oxide semiconductor film can be suppressed. In addition, each of the gate electrode, the source electrode, and the drain electrode uses a copper film and has a barrier metal capable of suppressing the diffusion of the copper element. Therefore, it is possible to provide a transistor that has stable electrical characteristics and has a small signal delay due to wiring resistance.

The structure, method, etc. shown in this embodiment can be implemented in appropriate combination with the structures, methods, etc. shown in other embodiments.

Embodiment 2

In this embodiment mode, a modification example of the semiconductor device shown in Embodiment Mode 1 and a manufacturing method different from the manufacturing method of the semiconductor device shown in Embodiment Mode 1 will be described with reference to FIGS. 6A to 8C. In addition, the symbols shown in FIGS. 1A to 5C are used to denote the same parts, and repeated descriptions thereof are omitted.

&lt;Semiconductor device structure example 2&gt;

6A and 6B show structural examples of the transistor 250 and the signal line region 260. FIG. 6A is a plan view of the transistor 250 and the signal line region 260, and FIG. 6B is a cross-sectional view along the line X2-Y2 of FIG. 6A. Note that in FIG. 6A, part of the constituent elements of the transistor 250 and the signal line region 260 (for example, the gate insulating film 206, the second metal film 210b, etc.) are omitted for the sake of convenience.

The semiconductor device shown in FIGS. 6A and 6B includes: a gate electrode 204 formed on a substrate 102; a gate insulating film 206 formed on the gate electrode 204; and a gate insulating film 206 formed in contact with the gate insulating film 206 The oxide semiconductor film 108 where the gate electrode 204 overlaps; the source electrode 210 and the drain electrode 212 formed on the oxide semiconductor film 108; the signal line 232 electrically connected to the source electrode 210. The signal line 232 is composed of a first metal film 210a, a second metal film 210b, and a third metal film 210c, and the second metal film 210b is formed in a region inside the ends of the first metal film 210a and the third metal film 210c. The source electrode 210 and the drain electrode 212 are composed of a first metal film 210a, a first metal film 212a, a third metal film 210c, and a third metal film 212c.

In addition, the gate electrode 204 is composed of a first gate electrode 204a and a second gate electrode 204b. The first gate electrode 204a preferably uses a metal film or a metal nitride film containing one or more elements of tungsten, tantalum, titanium, and molybdenum. In addition, the second gate electrode 204b preferably contains a copper element. For example, in this embodiment, a tungsten film is used as the first gate electrode 204a, and a copper film is used as the second gate electrode 204b. By adopting the above-mentioned laminated structure, a low-resistance gate electrode 204 can be obtained. In addition, by providing the first gate electrode 204a, the adhesion between the substrate 102 and the copper film used as the second gate electrode 204b can be improved, and/or the copper film used as the second gate electrode 204b can be suppressed The diffusion of copper in the element.

In addition, the gate insulating film 206 is composed of a first gate insulating film 206a and a second gate insulating film 206b. It is sufficient that the first gate insulating film 206a has a function of suppressing the diffusion of the copper element in the copper film used as the second gate electrode 204b, and a silicon nitride film, a silicon oxynitride film, an aluminum oxide film, and an aluminum oxynitride film can be used.Film and so on. Film and so on. Film and so on. In addition, the second gate insulating film 206b only needs to have a function of supplying oxygen to the oxide semiconductor film 108 to be formed later, and a silicon oxide film, a silicon oxynitride film, or the like can be used. For example, in this embodiment, a silicon nitride film is used as the first gate insulating film 206a, and a silicon oxynitride film is used as the second gate insulating film 206b. By adopting the gate insulating film 206 of the above-mentioned laminated structure, the diffusion of the copper element in the copper film used for the gate electrode 204 can be suppressed, and oxygen can be supplied to the oxide semiconductor film 108 formed later.

In addition, the first metal film 210a, the first metal film 212a, the third metal film 210c, and the third metal film 212c are preferably metal films or metal nitrides containing one or more elements of tungsten, tantalum, titanium, and molybdenum. membrane.

For example, in this embodiment, a tungsten film is used as the first metal film 210a and the first metal film 212a, and a tantalum nitride film is used as the third metal film 210c and the third metal film 212c.

In addition, the second metal film 210b preferably contains a copper element. In this embodiment, a copper film is used as the second metal film 210b.

As such, the structure of the source electrode 210 and the drain electrode 212 used for the transistor 250 is different from the structure of the signal line 232. By electrically connecting the signal line 232 using a copper film to the source electrode 210 and the drain electrode 212, it is possible to suppress signal delay due to wiring resistance and the like. In addition, since a material containing copper element is not used in the source electrode 210 and the drain electrode 212 used for the transistor 250, the copper element that may diffuse into the oxide semiconductor film 108 can be isolated from the oxide semiconductor film 108. , So it is effective. In addition, since the signal line 232, the source electrode 210 and the drain electrode 212 can be manufactured by the same process in the semiconductor manufacturing process, the manufacturing cost can be reduced.

Next, a method of manufacturing the transistor 250 and the signal line region 260 shown in FIGS. 6A and 6B will be described with reference to FIGS. 7A to 8D.

&lt;Method of Manufacturing Semiconductor Device 2&gt;

First, the gate electrode 204, the gate insulating film 206, and the oxide semiconductor film 108 are formed on the substrate 102. In addition, the gate electrode 204, the gate insulating film 206, and the oxide semiconductor film 108 can be formed with reference to the process shown in FIGS. 2A to 2D shown in Embodiment Mode 1. Then, a first metal film 209a and a second metal film 209b that become a source electrode, a drain electrode, and a signal line are formed on the gate insulating film 206 and the oxide semiconductor film 108 (see FIG. 7A).

The first metal film 209a is preferably a metal film or a metal nitride film containing one or more elements of tungsten, tantalum, titanium, and molybdenum. In this embodiment, a 50-nm-thick tungsten film formed by a sputtering method is used as the first metal film 209a.

In addition, the first metal film 209a may also have a laminated structure. For example, the following laminated structure may be adopted: as the first layer of the first metal film 209a, a metal film containing one or more elements of tungsten, tantalum, titanium, and molybdenum is used, and as the second layer of the first metal film 209a A metal nitride film of one or more elements of tungsten nitride, tantalum nitride, titanium nitride, and molybdenum nitride.

Since the first metal film 209a is in contact with the oxide semiconductor film 108, it is preferable to use a material that does not extract oxygen from the oxide semiconductor film 108 and makes it n-type or does not diffuse into the oxide semiconductor film as the first metal film 209a. 108 is its n-type material. In addition, as the first metal film 209a, it is preferable to use a material that suppresses the diffusion of copper elements from the copper film used as the second metal film 209b into the oxide semiconductor film 108.

The second metal film 209b preferably contains copper element. In addition, copper alloys in which several wt% of aluminum, gold, silver, zinc, tin, nickel, or the like are added to copper can also be used. In this embodiment, a 200-nm thick copper film formed by a sputtering method is used as the second metal film 209b.

Next, a resist is coated on the second metal film 209b and the first patterning is performed to form a photoresist mask 241 (refer to FIG. 7B).

The photoresist mask 241 can be formed using the same material and method as the photoresist mask 141 shown in Embodiment Mode 1.

Next, a part of the second metal film 209b is removed by the first etching to form the second metal film 210b (see FIG. 7C).

As a method of removing the second metal film 209b, a wet etching method is preferably used. In addition, as the chemical solution used in the wet etching method, it is sufficient to use a chemical solution that can etch the second metal film 209b but the first metal film 209a does not disappear. For example, a tungsten film is used as the first metal film 209a and the second metal film 209a is used. When a copper film is used for the metal film 209b, a mixture of water, hydrogen peroxide water, and carboxylic acid; a mixture of water, phosphoric acid, nitric acid, sulfuric acid, and potassium sulfate, etc. can be used as a chemical solution.

In addition, the time of wet etching may be adjusted and isotropic etching may be performed to form a shape in which the side surface of the second metal film 210b is located on the inner side of the side surface of the photoresist mask 241.

In this way, when the first etching is performed, the second metal film 209b in the region where the oxide semiconductor film 108 is formed is removed, and the second metal film 209b of the signal line region 260 is left.

Next, the photoresist mask 241 is removed and a third metal film 209c is formed on the first metal film 209a and the second metal film 210b (refer to FIG. 7D).

The photoresist mask 241 can be removed by the same method as the photoresist mask 141 shown in Embodiment Mode 1.

The third metal film 209c can be formed using the same method and material as the first metal film 209a. In addition, in this embodiment, a 100-nm-thick tantalum nitride film formed by a sputtering method is used as the third metal film 209c.

Next, a resist is coated on the third metal film 209c and second patterning is performed to form a photoresist mask 242 (refer to FIG. 8A).

The photoresist mask 242 can be formed using the same material and method as the photoresist mask 241.

Next, parts of the first metal film 209a and the third metal film 209c are removed by the second etching to form the first metal film 210a, the first metal film 212a, the third metal film 210c, and the third metal film 212c (see FIG. 8B ).

In addition, a part of the first metal film 209a and the third metal film 209c located outside the end of the second metal film 210b removed by the first etching is removed by the second etching.

As a method of removing the first metal film 209a and the third metal film 209c, a dry etching method is preferably used. For example, in the case where a tungsten film is used as the first metal film 209a and a tantalum nitride film is used as the third metal film 209c, SF may be used as a gas for dry etching.₆And O₂Mixed gas or SF₆And BCl₃The mixed gas and so on.

Note that when etching the first metal film 209a and the third metal film 209c, it is preferable to adopt the most suitable etching conditions so as not to cause the oxide semiconductor film 108 to be etched and disconnected. However, it is difficult to obtain conditions that only etch the first metal film 209a and the third metal film 209c and not etch the oxide semiconductor film 108 at all. Therefore, when the first metal film 209a and the third metal film 209c are etched, there is At this time, a part of the oxide semiconductor film 108 is etched to have grooves (recesses).

Next, the photoresist mask 242 is removed to form the source electrode 210 composed of the first metal film 210a and the third metal film 210c and the drain electrode 212 composed of the first metal film 212a and the third metal film 212c. In addition, in the signal line region 260, a signal line 232 composed of a first metal film 210a, a second metal film 210b, and a third metal film 210c is formed (see FIG. 8C).

In this way, the signal line 232 using the copper film used as the second metal film 210b and the source electrode 210 and the drain electrode 212 not using the second metal film 210b can be formed by the same process.

The photoresist mask 242 can be removed by the same method as the photoresist mask 241.

In addition, it is preferable to clean the oxide semiconductor film 108 (specifically, the back channel side) after forming the signal line 232, the source electrode 210, and the drain electrode 212. As cleaning of the oxide semiconductor film 108, for example, oxygen plasma treatment or washing treatment using diluted hydrofluoric acid treatment, etc. are effective. By performing the cleaning described above, the etching gas component used in forming the source electrode 210 and the drain electrode 212, the residue of the photoresist mask 242, etc. can be removed from the oxide semiconductor film 108, thereby making it possible to further increase the oxide The semiconductor film 108 is highly purified.

In addition, heat treatment may be performed after forming the signal line 232, the source electrode 210, and the drain electrode 212. The temperature of this heat treatment is 250° C. or higher and 650° C. or lower, preferably 450° C. or higher and 600° C. or lower or lower than the strain point of the substrate.

Through the above steps, the transistor 250 and the signal line region 260 shown in this embodiment are formed.

Next, a first insulating film 114a, a second insulating film 114b, an aluminum oxide film 116, and a planarizing insulating film 118 are formed on the transistor 250 and the signal line region 260 (see FIG. 8D).

The first insulating film 114a, the second insulating film 114b, the aluminum oxide film 116, and the planarizing insulating film 118 can be formed by referring to the process shown in Embodiment Mode 1.

In this way, the structure of the source electrode 210 and the drain electrode 212 of the transistor 250 is different from the structure of the signal line 232 of the signal line area 260. By electrically connecting the signal line 232 using a copper film to the source electrode 210 and the drain electrode 212, it is possible to suppress signal delay due to wiring resistance and the like. In addition, since a material containing copper element is not used in the source electrode 210 and the drain electrode 212 for the transistor 250, the copper element that may diffuse into the oxide semiconductor film 108 can be isolated from the oxide semiconductor film 108. , So it is effective. In addition, since the signal line 232, the source electrode 210 and the drain electrode 212 can be manufactured by the same process in the semiconductor manufacturing process, the manufacturing cost can be reduced.

The structure, method, etc. shown in this embodiment can be implemented in appropriate combination with the structures, methods, etc. shown in other embodiments.

Embodiment 3

A display device with a display function can be manufactured by using the transistors or signal lines described in the first and second embodiments. In addition, a system-on-panel can be formed by forming part or all of the driving circuit including the transistor and the pixel portion on the same substrate. An example of the display device will be described with reference to FIG. 9.

In FIG. 9, a sealing material 312 is provided so as to surround the pixel portion 302, the source drive circuit portion 304 and the gate drive circuit portion 306 provided on the first substrate 300. In addition, a second substrate 301 is provided on the pixel portion 302, the source drive circuit portion 304, and the gate drive circuit portion 306. Therefore, the pixel portion 302, the source driving circuit portion 304, and the gate driving circuit portion 306 are sealed by the first substrate 300, the sealing material 312, and the second substrate 301 together with the display element.

In FIG. 9, in a region different from the region surrounded by the sealing material 312 on the first substrate 300, an FPC (Flexible FPC) electrically connected to the pixel portion 302, the source driving circuit portion 304, and the gate driving circuit portion 306 Printed Circuit: a flexible printed circuit) terminal portion 308. The FPC terminal portion 308 is connected to the FPC 316. The FPC 316 supplies various signals and potentials to the pixel portion 302, the source drive circuit portion 304, and the gate drive circuit portion 306.

In addition, in FIG. 9, the pixel portion 302, the source drive circuit portion 304, the gate drive circuit portion 306, and the FPC terminal portion 308 are all connected to the signal line 310. Various signals and potentials supplied by the FPC 316 are supplied to the pixel portion 302, the source driving circuit portion 304, the gate driving circuit portion 306, and the FPC terminal portion 308 through the signal line 310.

In addition, FIG. 9 shows an example in which the source drive circuit section 304 and the gate drive circuit section 306 are formed on the same substrate as the pixel section 302, that is, the first substrate 300, but the structure is not limited to this structure. For example, only the gate driving circuit part 306 may be formed on the first substrate 300, or only the source driving circuit part 304 may be formed on the first substrate 300. At this time, a separately prepared substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) for forming a source drive circuit or a gate drive circuit, etc. may be mounted on the first substrate 300. .

In addition, there is no particular limitation on the connection method of the separately formed drive circuit board, and COG (Chip On Glass) method, wire bonding method, or TAB (Tape Automated Bonding) method can be used. Wait.

In addition, the display device includes a panel in which the display element is in a sealed state and a module in a state in which an IC including a controller is installed in the panel.

Note that the display device in this specification refers to an image display device, a display device, or a light source (including lighting equipment). In addition, the display device also includes: a module with a connector such as FPC, TAB tape or TCP (Tape Carrier Package) installed; a module with a printed circuit board at the end of the TAB tape or TCP; or A module that directly mounts the drive circuit board or IC to the display element by the COG method.

In addition, the pixel portion 302, the source drive circuit portion 304, and the gate drive circuit portion 306 provided on the first substrate 300 each include a plurality of transistors, and the transistors described in the first and second embodiments can be applied. In this embodiment mode, a case where the transistor shown in Embodiment Mode 2 is used will be described.

In addition, as the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element) and a light-emitting element (also referred to as a light-emitting display element) can be used. Light-emitting elements include elements whose brightness is controlled by current or voltage, and specifically include inorganic EL (Electro Luminescence), organic EL, and the like. In addition, electronic ink and other display media that change the contrast due to electrical action can also be used.

One mode of the display element provided in the display device will be described with reference to FIGS. 10 and 11. 10 and 11 correspond to cross-sectional views along the broken line QR shown in FIG. 9.

In the display device shown in FIG. 10, the FPC terminal portion 308 provided on the first substrate 300 includes a terminal electrode 360 composed of a first metal film 360a, a second metal film 360b, and a third metal film 360c. The terminal electrode 360 is electrically connected to the terminal of the FPC 316 via the anisotropic conductive film 380.

The terminal electrode 360 is formed by the same process as the source electrode and drain electrode of the transistor 350 and the transistor 352 and the signal line 310.

In addition, the pixel portion 302 and the source drive circuit portion 304 provided on the first substrate 300 each include a plurality of transistors. FIGS. 10 and 11 illustrate the transistor 350 and the source drive circuit portion 304 included in the pixel portion 302. Included transistor 352.

In addition, in this embodiment, the size of the transistor 350 included in the pixel portion 302 and the transistor 352 included in the source driving circuit portion 304 are the same, but it is not limited to this. The size (L/W) or number of transistors used in the pixel portion 302 and the source driving circuit portion 304 can be appropriately changed. In addition, although the gate drive circuit section 306 is not shown in FIGS. 10 and 11, the gate drive circuit section 306 may have the same structure as the source drive circuit section 304. Note that the elements connected to the gate drive circuit section 306 and the connection method are different from those of the source drive circuit section 304.

In addition, in FIGS. 10 and 11, the transistor 350, the transistor 352, and the signal line 310 can have the same structure as the transistor 250 and the signal line 232 shown in the second embodiment.

In other words, the transistor 350 and the transistor 352 include a source electrode and a drain electrode composed of a first metal film and a third metal film, and the signal line 310 includes a first metal film, a second metal film, and a third metal film. The wiring. The first metal film and the third metal film are metal films or metal nitride films containing one or more elements of tungsten, tantalum, titanium, and molybdenum, and the second metal film is formed of a material containing copper.

In addition, the terminal electrode 360 has the same structure as the signal line 310, and it is composed of a first metal film, a second metal film, and a third metal film.

In this way, the transistor 350 and the transistor 352 include a source electrode and a drain electrode that are formed without using a copper film, and the signal line 310 and the terminal electrode 360 are formed of a copper film. By using the transistor 350, the transistor 352, the signal line 310, and the terminal electrode 360, it is possible to provide a display device with stable electrical characteristics and low resistance electrodes or wiring.

In addition, in FIGS. 10 and 11, an insulating film 364, a protective insulating film 366, and a planarizing insulating film 368 are provided on the transistor 350 and the transistor 352.

In this embodiment, a silicon oxynitride film is used as the insulating film 364, and an aluminum oxide film is used as the protective insulating film 366. In addition, the insulating film 364 and the protective insulating film 366 can be formed by a sputtering method or a plasma CVD method.

Since the silicon oxynitride film used as the insulating film 364 is provided in contact with the oxide semiconductor film, oxygen can be supplied to the oxide semiconductor film.

The aluminum oxide film used as the protective insulating film 366 has a high blocking effect (blocking effect), that is, an effect of preventing both impurities such as hydrogen and water and oxygen from passing through the film. Therefore, the aluminum oxide film is used as a protective film to prevent impurities such as hydrogen and water, which are the main causes of characteristic changes during and after manufacturing, from being mixed into the oxide semiconductor film, and to prevent release from the oxide semiconductor film as a constituent oxide The main component of the semiconductor film is oxygen.

In addition, the planarizing insulating film 368 may use an organic material having heat resistance, such as polyimide resin, acrylic resin, polyimide resin, benzocyclobutene resin, polyimide resin, Epoxy and so on. In addition, a plurality of insulating films formed of these materials may be stacked to form the planarization insulating film 368.

In addition, in the display device shown in this embodiment mode, a planarization insulating film 368 is formed on the transistor 352 formed in the source driving circuit portion 304, and the oxide semiconductor film is formed on the planarization insulating film 368. A conductive film 370a is provided at a position where the channel formation region overlaps. However, it is not limited to this structure, and a structure in which the conductive film 370a is not provided may also be adopted. By disposing the conductive film 370a at a position overlapping with the channel formation region of the oxide semiconductor film, the amount of change in the threshold voltage of the transistor 352 before and after the BT test can be reduced. In addition, the electric potential of the conductive film 370a may be the same as or different from the gate electrode of the transistor 352, and may also be used as a second gate electrode. In addition, the potential of the conductive film 370a may be GND, 0V, or the conductive film 370a may be in a floating state.

In addition, the conductive film 370a also has a function of shielding an external electric field, that is, preventing an external electric field from acting on the inside (the circuit portion including the transistor 352) (especially, an electrostatic shielding function for shielding static electricity). The shielding function of the conductive film 370a can prevent the electrical characteristics of the transistor 352 from changing due to the influence of an external electric field such as static electricity. In addition, the conductive film 370a may be provided in a large area so that the conductive film 370a and the transistor 352 overlap. As a result, the electrostatic shielding function can be further improved.

In addition, in the display device shown in this embodiment mode, a planarization insulating film 368 is formed on the transistor 350 formed in the pixel portion 302, and the planarization insulating film 368 is provided with a source electrode or a drain electrode. The electrode is connected to the conductive film 370b. The conductive film 370b is used as a pixel electrode in the pixel portion 302.

The transistor 350 provided in the pixel portion 302 is electrically connected to the display element to constitute a display panel. The display element is not particularly limited as long as it can display, and various display elements can be used.

The display device shown in FIG. 10 shows an example of a liquid crystal display device using a liquid crystal element as a display element. In FIG. 10, a liquid crystal element 402 as a display element includes a conductive film 370b, a counter electrode 404, and a liquid crystal layer 406. In addition, an insulating layer 410 and an insulating film 412 serving as alignment films are provided in a manner of sandwiching the liquid crystal layer 406. The counter electrode 404 is provided on the second substrate 301 side, and the conductive film 370 b and the counter electrode 404 are laminated with the liquid crystal layer 406 sandwiched therebetween.

In addition, the spacer 435 is a columnar spacer obtained by selectively etching an insulating film, and it is provided for controlling the thickness (cell gap) of the liquid crystal layer 406. In addition, spherical spacers can also be used.

When a liquid crystal element is used as a display element, thermotropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. The above-mentioned liquid crystal material exhibits a cholesterol phase, a smectic phase, a cubic phase, a chiral nematic phase, and homogeneity depending on conditions.

In addition, in the case of adopting the lateral electric field method, it is also possible to use a blue phase liquid crystal that does not use an alignment film. The blue phase is one of the liquid crystal phases. When the temperature of the cholesteric phase liquid crystal is increased, the blue phase appears just before the cholesteric phase is transformed into a homogeneous phase. Since the blue phase only appears in a narrow temperature range, in order to improve the temperature range, a liquid crystal composition mixed with a few wt.% or more of a chiral agent is used for the liquid crystal layer. Since the liquid crystal composition including the liquid crystal exhibiting a blue phase and a chiral agent has a fast response speed and is optically isotropic, it does not require alignment treatment and has a small viewing angle dependence. In addition, since there is no need to provide an alignment film, and no rubbing treatment is required, electrostatic damage caused by rubbing treatment can be prevented, and the failure and damage of the liquid crystal display device in the manufacturing process can be reduced. Thus, the productivity of the liquid crystal display device can be improved. In a transistor using an oxide semiconductor film, the electrical characteristics of the transistor may change significantly due to the influence of static electricity, which may exceed the design range. Therefore, it is more effective to use a liquid crystal material exhibiting a blue phase for a liquid crystal display device including a transistor using an oxide semiconductor film.

In addition, the intrinsic resistance of the liquid crystal material is 1×10⁹Ω. cm or more, preferably 1×10¹¹Ω. cm or more, more preferably 1×10¹²Ω. cm above. In addition, the intrinsic resistance value in this specification is a value measured at a temperature of 20°C.

The size of the storage capacitor provided in the liquid crystal display device is set in consideration of the leakage current of the transistor arranged in the pixel portion and the like so that the charge can be held for a predetermined period. The size of the storage capacitor can be set in consideration of the off-state current of the transistor. By using a transistor including an oxide semiconductor film that achieves a high degree of purification and suppresses the formation of oxygen defects, a storage capacitor including a capacitance of 1/3 or less of the liquid crystal capacitance in each pixel, preferably 1/5 or less is provided ,Will suffice.

The transistor used in the present embodiment, which includes an oxide semiconductor film that achieves a high degree of purification and suppresses the formation of oxygen defects, can reduce the current value in the off state (off-state current value). Therefore, the retention time of electrical signals such as video signals can be extended, and the writing interval can be extended even when the power is turned on. Therefore, the frequency of the update operation can be reduced, so the effect of suppressing power consumption can be exerted.

In addition, the transistor used in the present embodiment, which includes an oxide semiconductor film that achieves a high degree of purification and suppresses the formation of oxygen vacancies, can obtain a high field-effect mobility, and therefore can be driven at a high speed. For example, by using such a high-speed driving transistor for a liquid crystal display device, the switching transistor for the pixel portion and the driving transistor for the driving circuit portion can be formed on the same substrate. In other words, since there is no need to separately use a semiconductor device formed of a silicon wafer or the like as a driving circuit, the number of parts of the semiconductor device can be reduced. In addition, high-quality images can be provided by using transistors capable of high-speed driving in the pixel portion.

In addition, as a signal line connected to the switching transistor in the pixel portion and the driving transistor in the driving circuit portion, wiring containing copper is used. Therefore, signal delay due to wiring resistance is small, and the above-mentioned transistor can be used in a large-screen display device.

The liquid crystal display device can adopt TN (Twisted Nematic: twisted nematic) mode, IPS (In-Plane-Switching: in-plane switching) mode, FFS (Fringe Field Switching: fringe electric field switching) mode, ASM (Axially Symmetric aligned Micro-cell) : Axisymmetrically arranged microcells) mode, OCB (Optical Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (Anti Ferroelectric Liquid Crystal) mode, etc.

In addition, a normally black type liquid crystal display device, such as a transmissive liquid crystal display device in a vertical alignment (VA) mode, may also be used. As the vertical alignment mode, several examples can be cited. For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, etc. can be used. In addition, it can also be used for VA-type liquid crystal display devices. The VA type liquid crystal display device is a way to control the arrangement of liquid crystal molecules of a liquid crystal display panel. The VA-type liquid crystal display device is a method in which liquid crystal molecules face the direction perpendicular to the panel when no voltage is applied. In addition, a method called multi-domain design or multi-domain design in which pixels are divided into several regions (sub-pixels) and the molecules are respectively tilted in different directions can also be used.

In addition, in the display device, optical members (optical substrates) such as a black matrix (light-shielding layer), a polarizing member, a phase difference member, an anti-reflection member, and the like are appropriately provided. For example, circular polarization using a polarizing substrate and a retardation substrate can also be used. In addition, as a light source, a backlight, a side light, etc. may also be used.

In addition, as a display method in the pixel portion, a progressive scan method, an interlace scan method, or the like can be adopted. In addition, the color factors controlled in the pixels when performing color display are not limited to the three colors of RGB (R represents red, G represents green, and B represents blue). For example, RGBW (W represents white) or one or more colors of yellow, cyan, magenta, and the like may be added to RGB. In addition, the size of the display area may be different for each color factor. However, the disclosed invention is not limited to a color display display device, but can also be applied to a monochrome display display device.

In addition, as the display element included in the display device, a light-emitting element using electroluminescence can be applied. Light-emitting elements using electroluminescence are classified according to whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element, and the latter is called an inorganic EL element.

In an organic EL element, by applying a voltage to the light-emitting element, electrons and holes are respectively injected from a pair of electrodes into a layer containing a light-emitting organic compound to allow current to flow. And, by recombining these carriers (electrons and holes), the light-emitting organic compound forms an excited state, and emits light when returning from the excited state to the ground state. Due to this mechanism, such light-emitting elements are called current-excited light-emitting elements.

Inorganic EL elements are classified into dispersion-type inorganic EL elements and thin-film inorganic EL elements according to the structure of the element. The dispersion-type inorganic EL element includes a light-emitting layer in which light-emitting material particles are dispersed in a binder, and its light-emitting mechanism is donor-acceptor recombination light emission using donor energy levels and acceptor energy levels. The thin-film inorganic EL element includes a structure in which a light-emitting layer is sandwiched by a dielectric layer and the light-emitting layer is sandwiched by an electrode, and its light-emitting mechanism is localized light-emission using inner electron transitions of metal ions. In addition, here, an organic EL element is used as a light-emitting element for description.

In order to extract light, at least one of the pair of electrodes of the light-emitting element may be translucent. The transistor and the light-emitting element are formed on the substrate. The light-emitting element may adopt any one of the following structures: a top-emission structure that emits light from the side opposite to the substrate; a bottom-emission structure that emits light from the side of the substrate; and from the side of the substrate and the opposite side of the substrate. Take out the light-emitting double-sided emission structure on the side surface.

FIG. 11 shows an example of a display device using a light-emitting element as a display element. The light-emitting element 450 as a display element is electrically connected to the transistor 350 provided in the pixel portion 302. In addition, the light-emitting element 450 has a laminated structure of the conductive film 370b, the electroluminescent layer 452, and the upper electrode 454, but it is not limited to the structure shown. The structure of the light emitting element 450 can be appropriately changed according to the direction of light taken out from the light emitting element 450 and the like.

The partition wall 456 is formed using an organic insulating material or an inorganic insulating material. In particular, the partition wall 456 preferably uses a photosensitive resin material. For example, in the case where the partition wall 456 is formed of the photosensitive resin material, by coating the photosensitive resin material on the planarization insulating film 368 and the conductive film 370b and irradiating a desired area with light, a part of the conductive film 370b The resin material forms the opening, and the side wall of the opening is formed as an inclined surface having a continuous curvature.

The electroluminescent layer 452 may be composed of a single layer, or may be composed of a stacked layer of a plurality of layers.

In order to prevent oxygen, hydrogen, water, carbon dioxide, etc. from entering the light emitting element 450, a protective film may be formed on the upper electrode 454 and the partition wall 456. As the protective film, a silicon nitride film, a silicon oxynitride film, or the like can be formed. In addition, a filling material 458 is provided and sealed in the space sealed by the first substrate 300, the second substrate 301, and the sealing material 312. In this way, in order not to be exposed to external air, it is preferable to use a protective film (adhesive film, ultraviolet curable resin film, etc.) and a covering material with high airtightness and little outgassing for encapsulation (enclosure).

As the filler 458, in addition to inert gases such as nitrogen or argon, ultraviolet curable resins and thermosetting resins can also be used. PVC (polyvinyl chloride), acrylic resins, polyimide resins, epoxy resins, and silicon can also be used. Ketone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate). For example, nitrogen can be used as the filler 458.

In addition, if necessary, a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a phase difference plate (λ/4 plate, λ/2 plate), or a color filter can also be appropriately provided on the emission surface of the light-emitting element. And other optical films. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. For example, anti-glare treatment may be performed, that is, a treatment that can reduce glare by diffusing the reflected light by using irregularities on the surface.

In addition, in FIGS. 10 and 11, as the first substrate 300 and the second substrate 301, in addition to the glass substrate, a flexible substrate may be used. For example, a transparent plastic substrate or the like can be used. As the plastic, FRP (Fiberglass-Reinforced Plastics: glass fiber reinforced plastic) board, PVF (polyvinyl fluoride) film, polyester film, or acrylic resin film can be used. In addition, a sheet having a structure in which aluminum foil is sandwiched between PVF films or polyester films can also be used.

As described above, by applying the transistor or the signal line described in Embodiment 1 or 2, it is possible to provide a display device with various functions.

This embodiment mode can be implemented in appropriate combination with other embodiment modes.

Embodiment 4

The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). Examples of electronic devices include televisions (also called televisions or television receivers), displays used in computers, electronic paper, digital cameras, digital video cameras and other imaging devices, digital photo frames, and mobile phones (also called Mobile phones, mobile phone devices), portable game machines, mobile information terminals (PDA), portable terminals (including smart phones, tablet computers, etc.), audio reproduction devices, pinball machines and other large game machines, etc. An example of an electronic device including the semiconductor device described in the above embodiment will be described with reference to FIGS. 12A to 13D.

FIG. 12A shows a notebook type personal computer, which includes a main body 3001, a housing 3002, a display portion 3003, a keyboard 3004, and the like. By applying the semiconductor device described in any of the above-mentioned embodiments to the display portion 3003, it is possible to provide a notebook personal computer having stable electrical characteristics and less signal delay due to wiring resistance.

FIG. 12B shows a mobile information terminal (PDA). The main body 3021 is provided with a display unit 3023, an external interface 3025, operation buttons 3024, and the like. In addition, a stylus 3022 as an accessory for operation is also provided. By applying the semiconductor device shown in any of the above-mentioned embodiments to the display portion 3023, it is possible to provide a mobile information terminal (PDA) having stable electrical characteristics and less signal delay due to wiring resistance.

Fig. 12C shows an example of an e-book reader. For example, the e-book reader 2700 is composed of two shells, namely, a shell 2701 and a shell 2703. The housing 2701 and the housing 2703 are integrally formed by a shaft portion 2711, and the shaft portion 2711 can be used as an axis for opening and closing operations. By adopting this structure, it is possible to perform operations like a paper book.

The housing 2701 is installed with a display portion 2705, and the housing 2703 is installed with a display portion 2707. The display unit 2705 and the display unit 2707 may be configured to display a continuous screen, or may be configured to display different screens. By adopting a structure that displays different screens, for example, an article can be displayed on the right display portion (display portion 2705 in FIG. 12C) and an image can be displayed on the left display portion (display portion 2707 in FIG. 12C). By applying the semiconductor device described in any of the above-mentioned embodiments to the display portion 2705 and the display portion 2707, it is possible to provide an e-book reader with stable electrical characteristics and less signal delay due to wiring resistance. When a transflective or reflective liquid crystal display device is used as the display portion 2705, it can be expected that the e-book reader will be used in a brighter situation. Therefore, solar cells can also be installed for power generation and use of solar cells. Use battery charging. In addition, when a lithium ion battery is used as a battery, there are advantages such as miniaturization.

In addition, FIG. 12C shows an example in which the housing 2701 is provided with an operation unit and the like. For example, the housing 2701 includes a power switch 2721, operation keys 2723, a speaker 2725, and the like. Use the operation key 2723 to turn pages. In addition, a keyboard, pointing device, etc. may be provided on the same surface as the display portion of the housing. In addition, a configuration in which external connection terminals (earphone terminals, USB terminals, etc.), storage medium insertion portions, and the like are provided on the back or side surfaces of the housing may also be adopted. Furthermore, the e-book reader 2700 may also have the function of an electronic dictionary.

In addition, the e-book reader 2700 may also adopt a structure capable of sending and receiving information wirelessly. It is also possible to use a structure in which the desired book materials, etc., are purchased from the e-book server in a wireless manner, and then downloaded.

FIG. 12D shows a mobile phone, which is composed of two housings, a housing 2800 and a housing 2801. The housing 2801 includes a display panel 2802, a speaker 2803, a microphone 2804, a pointing device 2806, a camera lens 2807, an external connection terminal 2808, and the like. In addition, the housing 2800 includes a solar battery unit 2810 for charging the mobile phone, an external storage tank 2811, and the like. In addition, an antenna is installed in the housing 2801. By applying the semiconductor device described in any of the above-mentioned embodiments to the display panel 2802, it is possible to provide a mobile phone with stable electrical characteristics and less signal delay due to wiring resistance.

In addition, the display panel 2802 includes a touch screen, and FIG. 12D shows a plurality of operation keys 2805 displayed as images with broken lines. In addition, a booster circuit for boosting the voltage output by the solar cell 2810 to the voltage required by each circuit is also installed.

The display panel 2802 appropriately changes the direction of display according to the mode of use. In addition, since the camera lens 2807 is provided on the same surface as the display panel 2802, a video phone can be realized. The speaker 2803 and the microphone 2804 are not limited to audio calls, but can also perform visual calls, recording, and reproduction. Furthermore, the housing 2800 and the housing 2801 can be moved from the unfolded state to the overlapping state as shown in FIG. 12D by sliding, so that miniaturization suitable for portability can be achieved.

The external connection terminal 2808 can be connected with an AC adaptor and various cables such as a USB cable, etc., and can be used for charging and data communication with a personal computer. In addition, by inserting the storage medium into the external storage slot 2811, it can correspond to the storage and movement of a larger amount of data.

In addition, it may also be a mobile phone that has an infrared communication function, a TV reception function, and the like in addition to the above-mentioned functions.

12E shows a digital video camera, which includes a main body 3051, a display portion (A) 3057, a viewfinder 3053, an operation switch 3054, a display portion (B) 3055, a battery 3056, and the like. By applying the semiconductor device shown in any of the above embodiments to the display portion (A) 3057 and the display portion (B) 3055, it is possible to provide a digital camera with stable electrical characteristics and less signal delay due to wiring resistance .

Fig. 12F shows an example of a television. In the television 9600, a display portion 9603 is installed in the housing 9601. The display unit 9603 can display images. In addition, a structure in which the housing 9601 is supported by the bracket 9605 is shown here. By applying the semiconductor device described in any one of the above-mentioned embodiments to the display portion 9603, it is possible to provide a television having stable electrical characteristics and less signal delay due to wiring resistance.

The television 9600 can be operated by using the operation switch provided in the housing 9601 or the remote control provided separately. In addition, it is also possible to adopt a configuration in which a display unit is provided in the remote control, and the display unit displays information output from the remote control.

In addition, the television 9600 adopts a structure including a receiver, a modem, and the like. You can receive general TV broadcasts by using the receiver. Furthermore, by connecting a modem to a wired or wireless communication network, one-way (from sender to receiver) or two-way (between sender and receiver or between receivers, etc.) information can also be carried out. Communication.

FIGS. 13A to 13D show an example of a tablet terminal, FIGS. 13A to 13C show a tablet terminal 5000, and FIG. 13D shows a tablet terminal 6000.

13A to 13C show the tablet terminal 5000, FIG. 13A shows a front view, FIG. 13B shows a side view, and FIG. 13C shows a rear view. In addition, FIG. 13D shows a front view of the tablet terminal 6000.

The tablet terminal 5000 includes: a housing 5001; a display portion 5003; a power button 5005; a front camera 5007; a rear camera 5009; a first external connection terminal 5011; and a second external connection terminal 5013, and the like.

In addition, the display portion 5003 is installed in the housing 5001, and the display portion 5003 can also be used as a touch screen. For example, by touching the icon 5015 or the like on the display part 5003, e-mail can be used or the schedule can be managed. In addition, a front camera 5007 is installed on the front side of the housing 5001, and the front camera 5007 can be used to capture images on the user's side. In addition, a back camera 5009 is installed on the back side of the housing 5001, and the back camera 5009 can capture an image on the side opposite to the user. In addition, the housing 5001 includes a first external connection terminal 5011 and a second external connection terminal 5013. For example, the first external connection terminal 5011 can output sound to earphones, etc., and the second external connection terminal 5013 can perform data movement, etc. .

In addition, the tablet terminal 6000 shown in FIG. 13D includes: a first housing 6001; a second housing 6003; a hinge portion 6005; a first display portion 6007; a second display portion 6009; a power button 6011; a first camera 6013; a second camera 6015 and so on.

In addition, the first display portion 6007 is installed in the first housing 6001, and the second display portion 6009 is installed in the second housing 6003. For example, the first display portion 6007 can be used as a display panel, and the second display portion 6009 can be used as a touch panel. By looking at the text icon 6017 displayed on the first display portion 6007 while using the icon 6019 displayed on the second display portion 6009 or the keyboard 6021 (actually, the keyboard image displayed on the second display portion 6009), you can Perform image selection or text input, etc. Of course, the following structure may also be adopted: the first display portion 6007 is used as a touch screen, and the second display portion 6009 is used as a display panel; and both the first display portion 6007 and the second display portion 6009 are used as touch screens.

In addition, the first housing 6001 and the second housing 6003 are connected by a hinge portion 6005, and can be opened and closed. By adopting the above structure, when the tablet terminal 6000 is carried, the first display part 6007 installed in the first housing 6001 and the second display part 6009 installed in the second housing 6003 can be combined together to protect the first display part 6009. The surfaces of a display portion 6007 and a second display portion 6009 (such as a plastic substrate, etc.) are therefore preferable.

In addition, a structure in which the first housing 6001 and the second housing 6003 are separated by a hinge portion 6005 (so-called convertible type) may be adopted. By adopting the above structure, the use range can be expanded. For example, the tablet terminal can be used in a state where the first housing 6001 is placed vertically and the second housing 6003 is placed horizontally, so it is preferable.

In addition, the first camera 6013 and the second camera 6015 can be used to capture 3D images.

In addition, the tablet terminal 5000 and the tablet terminal 6000 may also adopt a structure capable of transmitting and receiving information wirelessly. For example, you can purchase and download desired information through wireless Internet access.

In addition, the tablet terminal 5000 and the tablet terminal 6000 can also have the following functions: display various information (still images, moving images, text images, etc.); display calendar, date, or time on the display unit; Touch input for operation or editing of the information displayed on the screen; control processing by various software (programs), etc. In addition, a detection device such as a light sensor that can set the brightness of the display to the most suitable brightness based on the amount of external light, and a sensor that detects inclination such as a gyroscope and an acceleration sensor may be installed.

By using the semiconductor device described in the above-mentioned embodiment in the display portion 5003 of the tablet terminal 5000 and the first display portion 6007 or/and the second display portion 6009 of the tablet terminal 6000, it is possible to provide stable electrical characteristics due to wiring. Flat terminal with less signal delay of resistance.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments.