Radio frequency (rf) integrated circuit (ic) packages with integrated aperture-coupled patch antenna(s) in ring and/or offset cavities

Radio frequency integrated circuit package with integrated aperture coupling microstrip antenna in annular cavity and/or bias cavity

RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES WITH INTEGRATED APERTURE-COUPLED PATCH ANTENNA(S) IN RING AND/OR OFFSET CAVITIES

The present invention generally relates to communication circuits, and more specifically, to radio frequency (RF) integrated circuit (IC) packaging.

In a wireless network, by attaching an antenna to a receiver or transmitter to radiate required signals to or from other components of the network, connection and communication between devices are achieved. In wireless communication systems such as millimeter wave radios, discrete components are usually assembled with a low degree of integration. These systems are usually assembled using expensive and bulky waveguides and package-level or circuit-board-level microstrip structures to interconnect semiconductors and their required transmitter antennas or receiver antennas. With recent advances in semiconductor technology and packaging engineering, the size of these radio communication systems has been increasingly reduced. For applications such as wireless universal serial bus (USB), the working distance limit is about 1 meter, and a single antenna of about 7dBi at 60GHz will provide the necessary antenna gain. For point-to-point applications up to 10 meters (such as wireless video) or longer (such as radar) distances, depending on the application, an antenna gain of up to 30dBi is required. However, high-gain antennas used in wireless video applications have extremely narrow beam widths, so it is difficult for consumers to align the antennas. Therefore, it is necessary to have a radiation pattern steerable array, such as a phased array. Phased arrays are also widely used in military radars. However, due to the expensive components and high labor costs involved, the packaging of RF chips with integrated antennas or phased arrays is extremely difficult and very expensive.

The principles of the present invention provide techniques for constructing RF IC packages with integrated aperture-coupled microstrip antennas in, for example, loops and/or offset cavities.

In an exemplary embodiment, according to an aspect of the present invention, a radio frequency integrated circuit chip package has N integrated aperture-coupled microstrip antennas, where N is at least 2, and the package includes N substantially planar microstrips And at least one substantially planar ground plane, the at least one substantially planar ground plane is spaced inwardly from the N substantially planar microstrips and is substantially parallel to the N substantially planar microstrips. At least N coupling aperture slots are formed in the ground plane, and the slots are substantially opposite to the microstrips. The package also includes: N feed lines spaced inwardly from the ground plane and substantially parallel to the ground plane; at least one radio frequency chip spaced inwardly from the feed lines and coupled to the feed lines and the ground plane. Ground plane; and a first substrate layer, which is spaced inwardly from the feeders. The first substrate layer is formed with a wafer accommodating cavity, and the wafer is located in the wafer accommodating cavity. An additional element includes a second substrate layer placed in an area between the ground plane and a plane defined by the microstrip. The microstrip is formed in a first metal layer, the ground plane is formed in a second metal layer, and the second substrate layer defines an antenna cavity. The N roughly planar microstrips are located in the antenna cavity.

If necessary, an island is formed in the second substrate layer in the cavity, thereby defining an annular shape of the cavity, and the N substantially planar microstrips are located in the annular shape. The island is substantially opposite to the wafer accommodating cavity.

In another alternative method, when viewed in a plane, the antenna cavity is spaced apart (offset) from the wafer accommodating cavity so that the load caused during the insertion of the wafer into the wafer accommodating cavity is substantially Support away from the antenna cavity.

In another aspect, a method of manufacturing a radio frequency integrated circuit chip package is provided, the radio frequency integrated circuit chip package has N integrated aperture-coupled microstrip antennas, and N is at least 2. The method includes the following steps: A package of the above-mentioned type (without a chip), the package having the above-mentioned optional island; and inserting at least one radio frequency chip into the cavity, wherein the island supports the load caused by the chip being inserted into the cavity.

In yet another aspect, a method for manufacturing a radio frequency integrated circuit chip package is provided. The radio frequency integrated circuit chip package has N integrated aperture-coupled microstrip antennas, where N is at least 2. The method includes the following steps: A package of the above-mentioned type (without a chip), the package having the above-mentioned optional bias cavity configuration; and inserting at least one radio frequency chip into the cavity so as to be caused during the insertion of the chip into the chip accommodating cavity The load is supported substantially away from the antenna cavity.

One or more specific embodiments of the present invention are suitable for automatic manufacturing processes and reduce the number of components involved in the previous packaging of antennas.

Reading the following detailed description of the illustrative embodiments of the present invention in conjunction with the accompanying drawings, these and other objects, features and advantages of the present invention will become clear.

One or more embodiments of the present invention provide devices and methods for low-cost packaging with integrated antennas and phased arrays operating in the millimeter wave (mmWave) range. An exemplary inventive package with an integrated antenna is based on a multilayer printed circuit board (PCB). The package includes, for example, a rectangular or annular cavity for building high-performance antennas or antenna arrays, and another cavity for accommodating millimeter-wave radio frequency (RF) integrated circuit chips. One or more specific embodiments of the present invention also provide techniques for overcoming the difficulties of fabricating the inner cavity and avoiding the need for wire bonding techniques using millimeter wave frequencies. The specific embodiment of the packaging technology of the present invention is related to the PCB manufacturing process, and can be used for packaging with integrated antennas or antenna arrays.

Examples of the present invention thus provide low-cost packages with integrated antennas or planar phased arrays; specifically, chip packages with integrated antennas or planar phased arrays for millimeter wave and above frequencies.

A typical chip package with an integrated antenna has three main components: (i) the RF chip, (ii) one or more antennas, and (iii) the package carrier (and in some instances, the package used to protect the package Cover or cover or packaging material). One or more specific embodiments of the present invention provide a package having multiple high-performance antennas, an interface for flip-chip mounting an RF chip, and an interface for flip-chip mounting the package to a printed circuit mother board The interface.

FIG. 1 shows a cross-sectional view of an exemplary package 100 according to an aspect of the present invention. It should be noted that for the sake of clarity, hatching is omitted in all figures. The package has a total of seven layers, including the substrate and the bonding layer. For millimeter wave applications, especially for applications with frequencies higher than 60 GHz, the thickness of the combined film and/or layer must be considered during the design process. According to the teachings in this article, those skilled in the field of antennas and packaging will know how to take the thickness into consideration and how to use high-precision PCB manufacturing techniques to implement specific embodiments of the present invention. The package 100 also has several metal layers. Specifically, there is an outermost substrate 102. A metal layer is immediately attached to the inside of the microstrip antenna, which is used for the microstrip 104 of the microstrip antenna. The substrate 102 and the microstrip antenna 104 (only a single antenna is shown in the first figure, but as described below, more antennas can be provided) inner side is a bonding film layer 106, another substrate layer 108 and another bonding film Layer 109. The other metal layer inside the bonding film 109 is used for the ground plane 110 of the microstrip antenna. The slot 113 on the ground plane is used for the aperture coupling of the microstrip antenna. The ground plane 110 is also used to separate the radiating element (microstrip) 104 from the feed line and the RF chip as described below.

The other substrate 112 is inward from the ground plane 110. The other metal layer is inward from the substrate 112 and is used to construct the antenna feeder 114 and the bonding pad 116 for the RF chip connection (preferably the flip chip/C4 ("Controlled Collapse Chip Connection") type connection) , 118, 120 and interconnection lines 122 (where appropriate) leading to one or more through holes (such as through holes 124). The interconnection line 122 is located in another bonding film layer inward from the metal layer forming the feed line 114 126 and the self-bonding film 126 inwardly in another substrate 128. Another metal layer provides all solder pads for signal, control, power supply, and ground connections to the PCB motherboard (for clarity, the PCB motherboard is omitted in the figure). The bonding pads may include ground bonding pads 130 interconnected with ground plane 110 through ground vias 140 and one or more signal, power and control bonding pads, which are connected by through holes 124 The pad 132 to the interconnection line 122 and the isolation pad 142 is exemplified. The through holes can be, for example, plated through holes. Package pads 134 can also be provided. Depending on the design of the microstrip antenna, an optional reflector 144 can also be constructed on the same metal layer as the bonding pads 130, 132, and 134. In some examples as described below, the reflector 144 is embedded.

To implement the flip chip method, the chip 162 preferably has a plurality of solder joints directly connected to the chip connection pads 116, 118, and 120.

To enhance the bandwidth of the microstrip antenna, the microstrip can be suspended or supported by a foam material. In low frequency applications, the foam material has a dielectric constant close to 1. However, at millimeter wave frequencies, especially for packaging applications, microstrips suspended or supported by foam are not feasible. Therefore, in one or more specific embodiments of the present invention, an air cavity 150 may be constructed in the package. In order to avoid problems caused by hot gas during the PCB manufacturing process, the vent hole 152 can be used. The holes can be designed so that they have minimal impact on antenna performance. For example, the hole 152 can be located near the middle of the cavity 150 or close to the edge of the cavity 150, and can be made relatively small when fully ventilated. Depending on the manufacturing process used, the vent holes can be located at the top (upper part) of the cavity 150 as shown in Figure 1 or on the side of the cavity as described below.

The ground plane 110 is also used to form a ground connection through a through hole (such as a through hole 140), and through a through hole and an isolation pad (such as a through hole 124 with an isolation pad 142), which represents a through hole with an isolation pad. It can be used for signal, power or control functions) to form signal, power and control connections. From a manufacturing point of view, isolation pads are beneficial and can enhance reliability because it is difficult to achieve partial vias (ie via holes 124 that do not completely extend through a structure) when isolation pads are not used. The reliability.

An open chip accommodating cavity or socket is realized in the substrate 128 and the bonding film 126. The socket is used for accommodating the RF chip 162. The chip is mounted to the package by flip chip bonding.

It should be noted that all millimeter wave components (antennas, power amplifiers, low noise amplifiers, etc.) are in the package 100. The through holes 124 and 140 are used to transmit DC or much lower low frequency signals.

The package 100 can be advantageously mounted to a motherboard (not shown) by means of a ball grid array (BGA).

FIG. 2 shows a specific embodiment 200 which is substantially similar to the specific embodiment 100 except that the reflector 144 is encapsulated by another bonding layer 170 inside the reflector 144 and another substrate 172 inside the bonding layer 170. Similar items have the same reference number, so they will not be repeated here. In this embodiment, a chip receiving socket 160 is also formed in the substrate 172 and the bonding layer 170.

FIG. 3 shows a specific embodiment 300, which is substantially similar to the specific embodiment 200, except that the vent holes 352 penetrate and extend along the side of the layer 108 to allow the cavity 150 to ventilate. Similar items have the same reference number, so they will not be repeated here.

FIG. 4 presents a bottom view 400 in which the chip 162 is packaged with the packaging material 402. The wafer may be partially or completely encapsulated, for example to block moisture. The plurality of outer pads 404 may correspond to, for example, mounting pads, thermal conductive pads, or ground pads (such as pads 130), and the plurality of inner pads 406 may correspond to, for example, signal pads, control pads, or power pads. Pad (for example, solder pad 132). In Figure 4, there is no reflector or the reflector is embedded. Fig. 5 shows a view 500, which is similar to view 400 but is a view of a package with reflector 144 (for example, the package of Fig. 1). Similar items have the same reference number, so they will not be repeated here.

Figure 6 shows an exemplary package 600 with a 2×2 planar phased array layout. There can be more than two antennas on each column. This basic 2x2 array can be used to form a much larger array. In addition to the first antenna microstrip 104 with the first feeder 114, it also includes the second, third and fourth antenna microstrips 602, the third and fourth antenna microstrips with corresponding second, third and fourth feeders 608, 610, and 612. 604, 606. Each of the feeders is connected to the chip 162 as described above. Although for ease of description, Figure 6 shows that the feeders terminate at the microstrip, it should be understood that the feeders can overlap the corresponding microstrips when viewed in the top view or the bottom view. The cross-sectional view shown in Figures 1-3 is separated from the corresponding microstrip and coupling aperture when viewed (for example, one end of the feeder passes through the center of the microstrip (Figure 17) or is located in the center (Figure 18) The other end of the feeder just passes through the edge of the RF chip).

Therefore, it should be understood that aspects of the present invention include a package with a socket for the RF chip and a planar antenna. In one or more examples, the RF chip is a flip chip mounted to the package. The inner cavity can be used to improve the microstrip bandwidth. The vent holes can be used to remove hot gases during the PCB manufacturing process. The package can be mounted on the PCB mother board by BGA. The package can construct a planar phased array.

In the discussion of FIGS. 1-6, it should be understood that, generally speaking, the aperture-coupled microstrip antenna package according to one aspect of the present invention may include at least one substantially planar microstrip, such as the microstrip 104. It also includes at least one substantially planar ground plane, such as a plane 110, which is spaced inwardly from the substantially planar microstrip 104 and is substantially parallel to the microstrip 104. At least one coupling aperture slot, such as slot 113, is formed in the ground plane. The slot 113 is substantially opposite to the microstrip 104. At least one feeder line (such as the feeder line 114) is spaced inwardly from the ground plane 110 and is substantially parallel to the ground plane 110. At least one radio frequency chip (such as the chip 162) is spaced inwardly from the feeder 114 and is coupled to the feeder 114 and the ground plane 110. It also includes a first substrate layer, such as one formed by the bonding film 126 and the substrate 128, which is spaced inwardly from the feeder 114. The first substrate layer is formed with a wafer accommodating cavity, such as cavity 160. The wafer 162 is located in the wafer accommodating cavity 160.

According to the description herein, those who are familiar with PCB and antenna technology can implement specific embodiments of the present invention. Non-limiting examples of materials that can be used include thermosetting plastics/ceramics/woven glass or similar laminates (e.g., Rogers RO4000 available from Rogers Corporation of Rogers, Connecticut USA)<img file="TWI497828B_D0001.tif" he="66" id="i0001" img-content="character" img-format="tif" inline="no" orientation="portrait" wi="41" />Series materials (and other compatible materials)), and copper used for the metal layer (gold-plated on the solder pads or other exposed surfaces). Similar techniques can be used for all the illustrated embodiments, including Figures 1-18.

It should be understood that, preferably, the specific embodiments of the present invention (such as 100, 200, and 300) provide a complete package instead of only providing a microstrip antenna separated from the chip and other packages.

It should be noted that, for example, plated through holes may be used to form through holes such as 124 and 140.

Specific embodiments of the present invention may also include a second substrate layer placed in an area between the ground plane 110 and the plane defined by the microstrip 104, such as formed by the substrate 108 and the bonding films 106 and 109. The microstrip 104 can be advantageously formed in a first metal layer, and the ground plane 110 can be advantageously formed in a second metal layer.

In one or more specific embodiments, a third substrate layer (for example, formed by the substrate 112) is placed in an area between the ground plane 110 and the feeder 114. The feed line 114 can be advantageously formed in a third metal layer. In addition, one or more packages according to specific embodiments of the present invention may include at least one through hole, such as a through hole 190, which is formed in the third substrate layer 112 and is coupled to the ground plane 110. A plurality of chip connection bonding pads (for example, bonding pads 116, 118, 120) may be formed in the third metal layer. At least one of the chip connection pads (for example, 118) can be coupled to at least one through hole 190 in the third substrate layer. The chip connection pads couple the chip to the feed line 114 (pad 120), via 190 (pad 118), and via 124 (pad 116).

One or more specific embodiments of the present invention may include one or more signal pads, one or more control pads, and one or more power pads (all these pads are exemplified by pads 132), And one or more ground pads (such as 130). The signal pads, power pads and ground pads are advantageously formed in a fourth metal layer. As described herein, package bonding pads 134 may be provided as needed.

One or more specific embodiments also include at least one ground via, such as 140, for coupling the ground plane 110 and the ground pad 130. The at least one ground via 140 passes through the first and third substrate layers (for example, the substrate 112, the bonding film 126, and the substrate 128) in an area that does not intersect the feed line 114. One or more specific embodiments include at least one of power isolation pads, signal isolation pads, and control isolation pads formed substantially coplanar with the ground plane 110, such as isolation pads 142. Similarly, at least one power via is coupled to the power isolation pad and the power pad, and passes through the first and third substrate layers. In addition, at least one control via is coupled to the control isolation pad and the control pad, and passes through the first and third substrate layers. As described herein, the solder pad 132, the through hole 124, and the isolation pad 142 are used to exemplify the solder pad, through hole, and isolation pad components that can provide power, signal, and control functions.

As described herein, in some instances, a reflector (eg, 144) is spaced inwardly from the third substrate layer and generally opposite the coupling aperture slot 113. The reflector may be located on an inner surface of the first substrate layer (for example, the innermost surface of the substrate 128). The reflector can be exposed as shown in Figure 1, or embedded as shown in Figures 2 and 3-in this case, the package can include a fourth substrate layer spaced inwardly from the reflector 144, for example It is formed by combining the thin film 170 and the substrate 172. The reflector can thus be embedded between the first and fourth substrate layers.

Advantageously, an air cavity, such as cavity 150, is formed in the second substrate layer (for example, formed by the thin films 106 and 109 and the substrate 108). The air cavity 150 is located between the microstrip 104 and the coupling aperture slot 113 in the ground plane 110. Preferably, the air cavity is formed to communicate with a vent hole (for example, vent hole 152 or 352). In the latter case as shown in FIG. 3, the vent hole 352 is formed in the second substrate layer; specifically, in the substrate 108. In the former case, the vent hole 152 is formed in another substrate layer spaced outwardly from the microstrip 104, such as that formed by the substrate 102. The microstrip is formed in the other substrate layer 102, and the vent holes are formed in the other substrate layer 102.

As described with reference to FIG. 6, in one or more specific embodiments of the present invention, two or more microstrips are constructed to form a planar phased array. Therefore, generally speaking, the aforementioned microstrip 104 can be referred to as a first microstrip, and the aforementioned feeder 114 is a first feeder. The ground plane may be formed with one or more additional coupling aperture slots, such as slot 113. The package may include one or more additional substantially planar microstrips, such as microstrips 602, 604, 606, spaced outwardly from the ground plane. The additional slots may substantially oppose the additional microstrips. The package may also include one or more additional feed lines, such as lines 608, 610, 614, spaced inwardly from the ground plane and substantially parallel to the ground plane. The at least one RF chip 162 is coupled to the additional feeder(s), and the first microstrip and the additional microstrip(s) are arranged to form a planar phased array. In the specific embodiment of the phased array, a single large ground plane with multiple slots can be used. A phased array can include any number of microstrips greater than or equal to 2; however, it is preferred that the number is a power of 2, such as 2, 4, 8, 16, 32, and so on.

For array applications, the distance between antenna elements is approximately one-half of the free-space wavelength (for example, 2.5 mm at 60 GHz). Therefore, it is quite challenging to construct multiple antenna cavities because the cavity walls are too thin. Hereinafter, specific embodiments of the present invention for solving this problem will be discussed with reference to FIGS. 7-18. One or more such specific embodiments advantageously reduce the difficulty of manufacturing in the case of arrays.

Figures 7 and 8 respectively show a bottom view and a cross-sectional view of an exemplary package with an integrated antenna. Elements similar to those shown in the preceding figures have the same reference signs. As shown in Figure 8, the package has the same "stack" as the existing package in Figure 3 (pads and through holes are omitted for clarity). However, there is a rectangular ring cavity 750 for all antennas to help make the antenna have a wide bandwidth and high efficiency. There is also a central island 702 to support the packaging cover 102 so that the cover does not sag. The reason why the island 702 is desirable is that the package will not be deformed during the mounting process of the chip 162. With this configuration, there can be more than one antenna loop (as shown in Figs. 9 and 11) and the antenna feed line 114 can be extremely short. Island 702 may include layers 106, 108, 109, and may be formed, for example, by drilling cavities 750 in these layers. Figures 9 and 10 are similar to Figures 7 and 8, but have a larger cavity 750 for accommodating more antennas.

Figures 11 and 12 respectively show a bottom view and a cross-sectional view of another exemplary package with an integrated antenna. Here, a circular annular cavity 750 is used. In at least some examples, the circular annular cavity 750 may be easier to manufacture than the rectangular annular cavity shown in FIGS. 7-10 (because the circular shape is often easier to mill). In this specific embodiment, the island 702 is also circular. Figures 13 and 14 are similar to Figures 11 and 12, but have a smaller cavity 750 for accommodating fewer antennas. Simulations have shown that, in at least some instances, circular arrays have slightly better radiation patterns than rectangular arrays.

For smaller arrays, an offset or side-by-side configuration can be used, as shown in Figure 15 and Figure 16. The RF chip 162 is generally much smaller than the antenna array. Therefore, this configuration will not increase the package size much. However, the feeder 114 will be longer than the configuration shown in FIGS. 7-14, so the methods in FIGS. 15 and 16 are better for small array applications. Biasing the chip 162 in the cavity 160 from the antenna cavity 750 prevents undesirable deflection and stress when the chip 162 is installed in the cavity 160 due to the layers 102, 106, 108, 109, 110, 112 above the cavity 160 Support is provided and therefore no island is needed in cavity 750. The antenna radiation pattern in the biased case is also slightly larger than that in the ring cavity because the array is completely filled. However, in at least some cases, the design of the array feeder is more challenging in the biased case, especially for larger arrays.

Figure 17-18 shows the phase control configuration of the first (receiver) and second (transmitter) sixteen antenna elements. In FIGS. 17 and 18, as in other exemplary island embodiments, the cavity 750 is defined in the layers 106, 108, 109, and has an island 1702 and an outer portion 1704. For the configuration in Figure 17 and Figure 18, the package size is only 28 mm x 28 mm, and the height (pointing to the inside of the page) is 46 mils (note that 46 mils = 0.046 inches = 1.17 mm). In Figure 17, the RF chip 162 needs to use a coplanar waveguide (CPW) to feed the antenna, so there are sixteen microstrips leading to the CPW transition zone 1902. The wafer 162 resides in the wafer cavity 160. Note also the feed line 114, the reflector 144, and the ground plane slot 113. The configuration in Figure 17 uses one ground plane slot per microstrip, and the configuration in Figure 18 uses two ground plane slots 113 per microstrip 104. It should also be noted that Figures 17 and 18 are bottom views, in which, for ease of illustration, dashed lines (hidden lines) are not used. The wafer 162 in the cavity 160 is located under the island 1702, as shown in Figures 7-14.

Therefore, one or more embodiments of the present invention provide a package having a socket 160 for the RF chip 162 and a cavity 750 for a planar antenna array. The antenna cavity 750 can be, for example, a circular or rectangular ring, or a large cavity for a side-by-side configuration (an example of the latter is shown in Figs. 15 and 16). This embodiment of the package can construct a planar phased array, preferably without the use of vias for RF feed, and in one or more embodiments, has substantially the same and relatively short feed line length. If a relatively large phased array is required, larger antenna elements can be used by enlarging the cavity size, as shown in Figs. 9-12.

According to the description of Figures 7-18, it should be understood that, generally speaking, a radio frequency integrated circuit chip package with N integrated aperture-coupled microstrip antennas (where N is at least 2) includes N substantially planar microstrips. The strip 104 and at least one substantially planar ground plane 110 are spaced inwardly from the N substantially planar microstrips and are substantially parallel to the N substantially planar microstrips. N coupling aperture slots 113 are formed in the ground plane, and the slots are substantially opposite to the microstrip 104 (in some cases, such as in Figure 18, there may be more than N slots-for example 2N slots, 2 slots in each microstrip). The N feeders 114 are spaced inwardly from the ground plane 110 and are substantially parallel to the ground plane 110. At least one RF chip 162 is spaced inwardly from the feed line 114 and is coupled to the feed line 114 and the ground plane 110. It should be noted that the through holes, solder pads, and isolation solder pads described with reference to FIGS. 1 to 6 can also be used in the specific embodiments shown in FIGS. 7 to 18. The N microstrips 104 can be arranged to form a planar phased array.

A first substrate layer, for example, formed by the bonding film 126 and the substrate 128, is spaced inwardly from the feeder 114 and forms a wafer accommodating cavity 160, in which the wafer 162 is located in the wafer accommodating cavity. A second substrate layer, such as those formed by the thin films 106 and 109 and the substrate 108, is placed in an area between the ground plane 110 and a plane defined by the microstrip 104. The microstrip 104 is formed in a first metal layer, the ground plane 110 is formed in a second metal layer, and the second substrate layer defines an antenna cavity 750, wherein the N substantially planar microstrips 104 are located in the antenna cavity 750 middle.

In some examples, an island 702, 1702 is formed in the cavity 750 in the second substrate layer, thereby defining an annular shape of the cavity, and the N substantially planar microstrips 104 are located in the annular shape, The islands 702 and 1702 are substantially opposite to the wafer accommodating cavity 160. The "substantially opposed" described herein is intended to describe a configuration in which when viewed in a cross-sectional view, the island at least partially overlaps the wafer-containing cavity to help support the wafer 162 caused by the insertion of the wafer 162 into the cavity 160. Insert the load. The islands and cavities can have various shapes, and in any particular example can have the same or different shapes. In some exemplary and non-limiting situations, when viewed in a cross-sectional view, both are substantially rectangular (rectangular encompasses but not limited to squares), while in other illustrative and non-limiting situations, when When viewed in the cross-sectional view, both are generally circular.

In some instances, a third substrate layer, such as that formed by the substrate 112, is placed in an area between the ground plane 110 and the feeder 114, and the feeder 114 is formed in a third metal layer. In one or more specific embodiments, the N reflectors 144 are spaced inwardly from the third substrate layer and are substantially opposite to the coupling aperture slot 113. The reflector 144 may be located on an inner surface of the first substrate layer, for example. In addition, in some examples, a fourth substrate layer, such as the one formed by the bonding film 170 and the substrate 172, is spaced inwardly from the reflector 144, where the reflector 144 is embedded between the first and fourth substrate layers .

In other situations such as those shown in FIGS. 15 and 16, when viewed in a cross-sectional view, the antenna cavity 750 is spaced apart from the wafer accommodating cavity 160, and the chip 162 is inserted into the wafer accommodating cavity 160. The resulting load is supported substantially away from the antenna cavity (e.g., supported by squeezing in the layers 102, 108, 106, 109, 110, 112 immediately above the chip 162).

In some instances, a cover (such as layer 102) is fastened above the antenna cavity 750 and is at least partially supported by the island 702.

In another aspect, a method of manufacturing one of the above-mentioned types of RF integrated circuit chip packages includes: providing one of the above-mentioned types of packages, which is not inserted into the chip 162 and has the above-mentioned island 702; and inserting at least one RF chip 162 Insert into the cavity 160, where the island 702 supports the load caused by inserting the wafer into the cavity.

In yet another aspect, a method of manufacturing one of the above-mentioned types of RF integrated circuit chip packages includes: providing one of the above-mentioned types of packages, which are not inserted into the chip 162 and have an antenna cavity. When viewed in a plan view, the antenna The cavity is spaced apart from the wafer accommodating cavity (for example, as shown in FIGS. 15 and 16); and at least one RF chip 162 is inserted into the cavity 160, which is caused when the wafer 162 is inserted into the wafer accommodating cavity 160 The load is supported substantially away from the antenna cavity (for example, supported by squeezing in the layers 102, 108, 106, 109, 110, 112 immediately above the chip 162).

It should be understood and understood that the exemplary embodiments of the present invention described above can be constructed in many different ways. Based on the teachings of the present invention provided herein, those of ordinary skill in the relevant fields will be able to conceive other embodiments of the present invention.

Although the exemplary embodiments of the present invention are described above with reference to the accompanying drawings, it should be understood that the present invention is not limited to their exact embodiments, and those skilled in the art can make various other changes and modifications. Without departing from the spirit of the present invention.

<p>100. . . Illustrative package</p><p>102. . . Substrate</p><p>104. . . Microstrip antenna</p><p>106. . . Bonding film layer</p><p>108. . . Substrate layer</p><p>109. . . Bonding film layer</p><p>110. . . Ground plane</p><p>112. . . Substrate layer</p><p>113. . . Slot</p><p>114. . . Antenna feeder</p><p>116. . . Pad</p><p>118. . . Pad</p><p>120. . . Pad</p><p>122. . . Interconnection line</p><p>124. . . Through hole</p><p>126. . . Bonding film layer</p><p>128. . . Substrate</p><p>130. . . Ground pad</p><p>132. . . Pad</p><p>134. . . Package pad</p><p>140. . . Through hole</p><p>142. . . Isolation pad</p><p>144. . . reflector</p><p>150. . . Cavity</p><p>152. . . hole</p><p>160. . . Cavity</p><p>162. . . Chip</p><p>170. . . Bonding film layer</p><p>172. . . Substrate</p><p>190. . . Through hole</p><p>200. . . Specific embodiment</p><p>300. . . Specific embodiment</p><p>352. . . Vent</p><p>400. . . Bottom view</p><p>402. . . Packaging materials</p><p>404. . . Outer pad</p><p>406. . . Inside pad</p><p>500. . . view</p><p>600. . . Illustrative package</p><p>602. . . Microstrip</p><p>604. . . Microstrip</p><p>606. . . Microstrip</p><p>608. . . Feeder</p><p>610. . . Feeder</p><p>612. . . Feeder</p><p>702. . . Central island</p><p>750. . . Annular cavity</p><p>1702. . . island</p><p>1704. . . external</p><p>1902. . . Transition zone</p>

Figure 1 shows an exemplary embodiment of a package according to an aspect of the present invention in cross-sectional view;

Figure 2 shows an exemplary embodiment of another package according to another aspect of the present invention in cross-sectional view;

Fig. 3 shows an exemplary embodiment of still another package according to another aspect of the present invention in the form of a cross-sectional view;

Figure 4 is a bottom view of an exemplary package without reflector or with embedded reflector;

Figure 5 is a bottom view of an exemplary package with visible reflectors;

Figure 6 is a bottom view of a specific embodiment of an exemplary planar phased array;

Figure 7 is a bottom view of a rectangular toroidal cavity package according to another aspect of the present invention (please note that the terms "bottom view" and "plan view" in this article are common);

Figure 8 is a cross-sectional view taken along the line VIII-VIII of Figure 7;

Figure 9 is a larger version of the package of Figure 7;

Figure 10 is a cross-sectional view taken along the line XX of Figure 9;

Figure 11 is a bottom view of a circular ring cavity package according to another aspect of the present invention;

Figure 12 is a cross-sectional view taken along the line XII-XII of Figure 11;

Figure 13 is a smaller version of the package of Figure 11;

Figure 14 is a cross-sectional view taken along the line XIV-XIV of Figure 13;

Figure 15 is a bottom view of an offset (side-by-side) cavity package according to still another aspect of the present invention;

Figure 16 is a cross-sectional view taken along the line XVI-XVI of Figure 15;

Figure 17 is a bottom view of an exemplary sixteen-antenna phased array configuration according to another aspect of the present invention;

Figure 18 is a bottom view of another exemplary sixteen-antenna phased array configuration according to an additional aspect of the present invention.