Optical display systems and methods
Abstract
Optical display systems and methods are disclosed.
Term
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131 claims: 105 independent, 26 dependent
- 1一種光學顯示系統,包括:一微型顯示器,具有一表面;以及一發光裝置,包括一多材料疊層與一第一層,該多材料疊層包括一光產生區,該第一層是由該光產生區所支承,在對於該第一層之一表面之設計作用下,由該光產生區所產生之該光線是可經由該第一層之該表面而自該發光裝置進行發出;其中,該微型顯示器之該表面之一寬度深度比例與該第一層之該表面之一寬度深度比例之一比例是大約介於0.5至2。
- 2如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該表面之該寬度深度比例與該第一層之該表面之該寬度深度比例之該比例是大約介於9/16至16/9。
- 3如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該表面之該寬度深度比例與該第一層之該表面之該寬度深度比例之該比例是大約介於3/4至4/3。
- 4如申請專利範圍第1項所述之光學顯示系統更包括至少一光學元件,該光學元件設置於該發光裝置與該微型顯示器之間。
- 5如申請專利範圍第4項所述之光學顯示系統,其中,該光學元件為一透鏡。
- 6如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該寬度深度比例是由包括了640x480、800x600、1024x700、1024x768、1024x720、1280x720、1280x768、1280x960、1920x1080及1280x1064所構成之群組中所選出。
- 7如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該表面之一形狀為矩形、圓形、梯形、三角形、方形、橢圓形或六角形。
- 8如申請專利範圍第7項所述之光學顯示系統,其中,該第一層之該表面之一形狀為矩形、圓形、梯形、三角形、方形、橢圓形或六角形。
- 9如申請專利範圍第1項所述之光學顯示系統,其中,該第一層之該表面之一形狀為矩形、圓形、梯形、三角形、方形、橢圓形或六角形。
- 10如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該表面之一形狀為矩形,並且該第一層之該表面之一形狀為矩形。
- 11如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該表面之一形狀為方形,並且該第一層之該表面之一形狀為方形。
- 12如申請專利範圍第1項所述之光學顯示系統,其中,該發光裝置為一非朗伯發光裝置。
- 13如申請專利範圍第1項所述之光學顯示系統,其中,該發光裝置為一光子晶格發光裝置。
- 14如申請專利範圍第1項所述之光學顯示系統,其中,該第一層具有一介電函數,該介電函數是根據一圖案而產生空間變化,該圖案具有一理想晶格常數與一調變參數,該調變參數所具有之一數值是大於零。
- 15如申請專利範圍第1項所述之光學顯示系統,其中,該第一層之該表面具有一介電函數,該介電函數是根據一非周期性圖案而產生空間變化。
- 16如申請專利範圍第1項所述之光學顯示系統,其中,該第一層之該表面具有一介電函數,該介電函數是根據一複雜周期性圖樣而產生空間變化。
- 17如申請專利範圍第1項所述之光學顯示系統,其中,該發光裝置是由發光二極體、雷射、光放大器及其組合所構成之群組中所選出。
- 18如申請專利範圍第1項所述之光學顯示系統,其中,該發光裝置包括一發光二極體。
- 19如申請專利範圍第1項所述之光學顯示系統,其中,該發光裝置是由有機發光二極體、面射型發光二極體、高亮度發光二極體及其組合所構成之群組中所選出。
- 20如申請專利範圍第1項所述之光學顯示系統,其中,由該發光裝置所發出之該光線的一形狀於實質上是相同於該微型顯示器之一形狀。
- 21如申請專利範圍第1項所述之光學顯示系統更包括一接觸件,該接觸件設置在圍繞於該第一層之該表面之一周長的一區域之上。
- 22如申請專利範圍第21項所述之光學顯示系統,其中,該接觸區域係對應於該發光裝置所成像於該微型顯示器上之一區域之外側的一區域。
- 23如申請專利範圍第1項所述之光學顯示系統,其中,該微型顯示器之該表面之該寬度深度比例與該第一層之該表面之該寬度深度比例之該比例是大約為1。
- 24如申請專利範圍第1項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一背投射式投影機。
- 25如申請專利範圍第1項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一背投射式電視機。
- 26如申請專利範圍第1項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一前投射式投影機。
- 27如申請專利範圍第1項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一家庭影院系統。
- 28如申請專利範圍第1項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一可攜式投影機。
- 29一種光學顯示系統,包括:一微型顯示器,具有一表面;一發光裝置;以及至少一光學元件,該光學元件沿著自該微型顯示器朝向於該發光裝置之一光徑而設置,其中,在對於該微型顯示器、該發光裝置、該光學元件進行定位之下,於使用過程中係可使得該光學顯示系統之一影像平面是不一致於經由該發光裝置所射出且照射於之該微型顯示器之一表面。
- 30如申請專利範圍第29項所述之光學顯示系統,其中,該發光裝置為一非朗伯發光裝置。
- 31如申請專利範圍第29項所述之光學顯示系統,其中,該發光裝置為一光子晶格發光裝置。
- 32如申請專利範圍第29項所述之光學顯示系統,其中,該發光裝置包括一多材料疊層與一第一層,該多材料疊層包括一光產生區,該第一層是由該光產生區所支承,在對於該第一層之一表面之設計作用下,由該光產生區所產生之該光線是可經由該第一層之該表面而自該發光裝置進行發出。
- 33如申請專利範圍第32項所述之光學顯示系統,其中,該第一層之該表面具有一介電函數,該介電函數是根據一圖案而產生空間變化,該圖案具有一理想晶格常數與一調變參數,該調變參數所具有之一數值是大於零。
- 34如申請專利範圍第32項所述之光學顯示系統,其中,該第一層之該表面具有一介電函數,該介電函數是根據一非周期性圖案而產生空間變化。
- 35如申請專利範圍第32項所述之光學顯示系統,其中,該第一層之該表面具有一介電函數,該介電函數是根據一複雜周期性圖樣而產生空間變化。
- 36如申請專利範圍第29項所述之光學顯示系統,其中,於使用過程中,相較於該發光裝置所射出且照射於之該微型顯示器之一表面之該光線之光密度的分佈而言,該影像平面之光密度的分佈是較不均勻的。
- 37如申請專利範圍第29項所述之光學顯示系統,其中,一第一距離是位於該透鏡之一影像平面、該微型顯示器之一表面之間,於使用過程中之該發光裝置所發出之該光線是撞擊在該微型顯示器之上,並且一第二距離是位於該發光裝置之一表面、該透鏡之該影像平面之間,於使用過程中之該發光裝置是發射出該光線,並且該第一距離與該第二距離之一比值之一絕對值是大約是由0.00001至1。
- 38如申請專利範圍第29項所述之光學顯示系統,其中,該至少一光學元件為一透鏡。
- 39如申請專利範圍第29項所述之光學顯示系統,其中,該發光裝置是由發光二極體、雷射、光放大器及其組合所構成之群組中所選出。
- 40如申請專利範圍第29項所述之光學顯示系統,其中,該發光裝置包括一發光二極體。
- 41如申請專利範圍第29項所述之光學顯示系統,其中,該發光裝置是由有機發光二極體、面射型發光二極體、高亮度發光二極體及其組合所構成之群組中所選出。
- 42如申請專利範圍第29項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一背投射式投影機。
- 43如申請專利範圍第29項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一背投射式電視機。
- 44如申請專利範圍第29項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一前投射式投影機。
- 45如申請專利範圍第29項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一家庭影院系統。
- 46如申請專利範圍第29項所述之光學顯示系統,其中,該光學顯示系統是設計應用於一可攜式投影機。
- 47一種利用複數發光裝置對於一微型顯示器進行照射之方法,該方法包括:對於該等發光裝置進行活化步驟,如此使得該等發光裝置中之至少一發光裝置是具有一活化時間,該活化時間是不同於該等發光裝置中之其它該等發光裝置中之至少一發光裝置之一活化時間。
- 48如申請專利範圍第47項所述之方法,其中,對於該等發光裝置進行之該活化步驟包括了依序對於該等發光裝置進行活化步驟。
- 49如申請專利範圍第47項所述之方法,其中,對於一指定發光裝置之一活化時間是基於該發光裝置之一效率而定。
- 50如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置為一LED。
- 51如申請專利範圍第50項所述之方法,其中,該LED為一綠光LED。
- 52如申請專利範圍第47項所述之方法,其中,各該等發光裝置為一LED。
- 53如申請專利範圍第52項所述之方法,其中,具有最長活化時間之該LED為一綠光LED。
- 54如申請專利範圍第47項所述之方法,其中,該等發光裝置包括一紅光發光裝置、一綠光發光裝置及一藍光發光裝置。
- 55如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置為一光子晶格發光裝置。
- 56如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置之一表面係為具有一介電函數之一表面,該介電函數是根據一圖樣而產生空間變化,該圖案具有一理想晶格常數與一調變參數,該調變參數所具有之一數值是大於零。
- 57如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置之一表面是具有一介電函數,該介電函數是根據一非周期性圖案而產生空間變化。
- 58如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置之一表面是具有一介電函數,該介電函數是根據一複雜周期性圖樣而產生空間變化。
- 59如申請專利範圍第47項所述之方法,其中,具有最低效率之該發光裝置之該活化時間是至少約為該等發光裝置中之另一發光裝置之該活化時間的1.25倍。
- 60如申請專利範圍第47項所述之方法更包括了對於該微型顯示器之該更新率進行了減少步驟。
- 61如申請專利範圍第47項所述之方法更包括了對於具有較多效率之該等發光裝置中之至少一發光裝置所進行顯示之一時間進行了壓縮步驟。
- 62如申請專利範圍第61項所述之方法,其中,對於該時間之該壓縮步驟中包括了對於該相對LED之尺寸進行了增加步驟。
- 63如申請專利範圍第61項所述之方法更包括了對於該微型顯示器之資料傳輸率進行了增加步驟。
- 64如申請專利範圍第63項所述之方法,其中,對於該微型顯示器之該資料傳輸率所進行之該增加步驟包括了利用一交錯格式。
- 65如申請專利範圍第61項所述之方法,其中,該方法包括了利用一壓縮算術,該壓縮算術僅根據來自於一先前影像之一差異而更新。
- 66如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置是由發光二極體、雷射、光放大器及其組合所構成之群組中所選出。
- 67如申請專利範圍第47項所述之方法,其中,該等發光裝置中之至少一發光裝置是由有機發光二極體、面射型發光二極體、高亮度發光二極體及其組合所構成之群組中所選出。
- 68如申請專利範圍第47項所述之方法,其中,該微型顯示器是設計應用於一前投射式投影機。
- 69如申請專利範圍第47項所述之方法,其中,該微型顯示器是設計應用於一背投射式投影機。
- 70如申請專利範圍第47項所述之方法,其中,該微型顯示器是設計應用於一背投射式電視機。
- 71如申請專利範圍第47項所述之方法,其中,該微型顯示器是設計應用於一家庭影院系統。
- 72如申請專利範圍第47項所述之方法,其中,該微型顯示器是設計應用於一可攜式投影機。
- 73一種發光裝置,包括:一多材料疊層與一第一層,該多材料疊層包括一光產生區,該第一層是由該光產生區所支承,在對於該第一層之一表面之設計作用下,由該光產生區所產生之該光線是可經由該第一層之該表面而自該發光裝置進行發出,並且於該第一層之該表面具有一接觸區,在該接觸區之設計作用下,於使用時之經由該發光二極體照射在一微型顯示器上之一面積中之至多約20%是包括了複數暗點,該等暗點是由該接觸區所形成。
- 74如申請專利範圍第73項所述之發光裝置,其中,經由該發光二極體照射在該微型顯示器之該面積中之至多約10%是包括了該等暗點,該等暗點是由該接觸區所形成。
- 75如申請專利範圍第73項所述之發光裝置,其中,經由該發光二極體照射在該微型顯示器之該面積中之至多約5%是包括了該等暗點,該等暗點是由該接觸區所形成。
- 76如申請專利範圍第73項所述之發光裝置,其中,在該發光裝置之該接觸區的設置作用下,在使用過程中便可以使得經由該接觸區所形成之該等暗點是不對應於該發光裝置所照射之該微型顯示器之該面積。
- 77如申請專利範圍第73項所述之發光裝置,其中,該第一層之該表面具有一周長,該接觸區是以圍繞於該周長的方式進行設置。
- 78如申請專利範圍第73項所述之發光裝置,其中,該發光裝置為一非朗伯發光裝置。
- 79如申請專利範圍第73項所述之發光裝置,其中,該發光裝置為一光子晶格發光裝置。
- 80如申請專利範圍第73項所述之發光裝置,其中,該第一層具有一介電函數,該介電函數是根據一圖案而產生空間變化,該圖案具有一理想晶格常數與一調變參數,該調變參數所具有之一數值是大於零。
- 81如申請專利範圍第73項所述之發光裝置,其中,該第一層之該表面具有一介電函數,該介電函數是根據一非周期性圖案而產生空間變化。
- 82如申請專利範圍第73項所述之發光裝置,其中,該第一層之該表面具有一介電函數,該介電函數是根據一複雜周期性圖樣而產生空間變化。
- 83如申請專利範圍第73項所述之發光裝置,其中,該發光裝置是由發光二極體、雷射、光放大器及其組合所構成之群組中所選出。
- 84如申請專利範圍第73項所述之發光裝置,其中,該發光裝置包括一發光二極體。
- 85如申請專利範圍第73項所述之發光裝置,其中,該發光裝置是由有機發光二極體、面射型發光二極體、高亮度發光二極體及其組合所構成之群組中所選出。
- 86如申請專利範圍第73項所述之發光裝置,其中,該發光裝置是設計應用於一背投射式投影機。
- 87如申請專利範圍第73項所述之發光裝置,其中,該發光裝置是設計應用於一背投射式電視機。
- 88如申請專利範圍第73項所述之發光裝置,其中,該發光裝置是設計應用於一前投射式投影機。
- 89如申請專利範圍第73項所述之發光裝置,其中,該發光裝置是設計應用於一家庭影院系統。
- 90如申請專利範圍第71項所述之發光裝置,其中,該發光裝置是設計應用於一可攜式投影機。
- 91一種光學顯示系統,包括:複數發光二極體;一微型顯示器;至少一光學元件,該光學元件沿著自該微型顯示器朝向於該發光裝置之一光徑而設置;以及一光束聚集裝置,用以對於該等發光二極體所產生之該光線進行結合。
- 92如申請專利範圍第91項所述之光學顯示系統,其中,該光束聚集裝置為一合光稜鏡。
- 93如申請專利範圍第91項所述之光學顯示系統,其中,該光束聚集裝置是選自於稜鏡、分色鏡及合光稜鏡。
- 94如申請專利範圍第91項所述之光學顯示系統,其中,該等發光二極體包括了經由紅光發光二極體、藍光發光二極體及綠光發光二極體所構成之群組中所選出之至少一發光二極體。
- 95如申請專利範圍第91項所述之光學顯示系統,其中,該等發光二極體包括了一紅光發光二極體、一藍光發光二極體及一綠光發光二極體。
- 96如申請專利範圍第91項所述之光學顯示系統,其中,該發光二極體為一光子晶格發光二極體。
- 97如申請專利範圍第91項所述之光學顯示系統,其中,該等發光二極體具有矩形狀。
- 98如申請專利範圍第91項所述之光學顯示系統,其中,該等發光二極體之一表面之一寬度深度比例為4x3。
- 99如申請專利範圍第91項所述之光學顯示系統,其中,該等發光二極體之一表面之一寬度深度比例為16x9。
- 100如申請專利範圍第91項所述之光學顯示系統,其中,由該等發光二極體所發出之該光線的形狀於實質上是相同於該微型顯示器的形狀。
- 101如申請專利範圍第91項所述之光學顯示系統,其中,該等發光二極體中之至少一發光二極體為一非朗伯發光二極體。
- 102如申請專利範圍第91項所述之光學顯示系統,其中,相較於一非朗伯發光二極體之向前發射方向之下,該等發光二極體中之至少一發光二極體之向前發射方向是受到較多的校正。
- 103如申請專利範圍第91項所述之光學顯示系統,其中,該發光二極體為一光子晶格發光二極體。
- 104如申請專利範圍第103項所述之光學顯示系統,其中,該光子晶格發光二極體之一頂層之一表面具有一介電函數,該介電函數是根據一圖案而產生空間變化,該圖案具有一理想晶格常數與一調變參數,該調變參數所具有之一數值是大於零。
- 105如申請專利範圍第103項所述之光學顯示系統,其中,該光子晶格發光二極體之一頂層之一表面具有一介電函數,該介電函數是根據一非周期性圖案而產生空間變化。
- 106如申請專利範圍第103項所述之光學顯示系統,其中,該光子晶格發光二極體之一頂層之一表面具有一介電函數,該介電函數是根據一複雜周期性圖樣而產生空間變化。
- 107如申請專利範圍第91項所述之光學顯示系統,其中,該光學顯示系統包括至少一矽液晶顯示面板。
- 108如申請專利範圍第107項所述之光學顯示系統,其中,該LCOS面板是被包含於一高解析度光引擎之中。
- 109如申請專利範圍第108項所述之光學顯示系統,其中,該高解析度光引擎是被包含於一電視系統之中。
- 110如申請專利範圍第108項所述之光學顯示系統,其中,該電視系統為一背投射式電視系統。
- 111如申請專利範圍第107項所述之光學顯示系統,其中,該等發光二極體之各該發光二極體具有一對應矽液晶顯示面板。
- 112如申請專利範圍第107項所述之光學顯示系統,其中,該至少一光學元件包括一裝置,該裝置是用以對於該等發光二極體所射出之該光線之極化進行過濾。
- 113如申請專利範圍第108項所述之光學顯示系統,其中,對於該極化進行過濾之該裝置包括了一極化光束分離器。
- 114如申請專利範圍第108項所述之光學顯示系統,其中,該光學顯示系統包括了一裝置,該裝置是用以對於該等發光二極體所中之至少一該發光二極體所射出之該光線之極化進行改變。
- 115如申請專利範圍第109項所述之光學顯示系統,其中,用以對於該極化進行改變之該裝置為一半波片。
- 116如申請專利範圍第91項所述之光學顯示系統,其中,該光學顯示系統包括至少一數碼光處理器面板。
- 117如申請專利範圍第116項所述之光學顯示系統,其中,該DLP面板是被包含於一高解析度光引擎之中。
- 118如申請專利範圍第117項所述之光學顯示系統,其中,該高解析度光引擎是被包含於一電視系統之中。
- 119如申請專利範圍第117項所述之光學顯示系統,其中,該電視系統為一背投射式電視系統。
- 120如申請專利範圍第116項所述之光學顯示系統,其中,該至少一光學元件包括一透鏡。
- 121如申請專利範圍第116項所述之光學顯示系統更包括一全反射式稜鏡。
- 122如申請專利範圍第118項所述之光學顯示系統,其中,該全反射式稜鏡是沿著自該光束聚集裝置朝向於該DLP面板之一光徑而設置。
- 123如申請專利範圍第119項所述之光學顯示系統,其中,在該光學顯示系統的設計作用下,由該等發光二極體所產生之該光線係經由該光束聚集裝置所聚集、經由該全反射式稜鏡所反射且經由該DLP面板所調變。
- 124如申請專利範圍第91項所述之光學顯示系統,其中,該光學顯示系統包括至少一液晶顯示器面板。
- 125如申請專利範圍第124項所述之光學顯示系統,其中,該LCD面板是被包含於一高解析度光引擎之中。
- 126如申請專利範圍第125項所述之光學顯示系統,其中,該高解析度光引擎是被包含於一電視系統之中。
- 127如申請專利範圍第124項所述之光學顯示系統,其中,該電視系統為一背投射式電視系統。
- 128如申請專利範圍第124項所述之光學顯示系統,其中,該至少一光學元件包括一透鏡。
- 129如申請專利範圍第124項所述之光學顯示系統,其中,該等發光二極體之各該發光二極體具有一對應液晶顯示器面板。
- 130如申請專利範圍第124項所述之光學顯示系統,其中,該光學顯示系統包括了一裝置,該裝置是用以對於該等發光二極體所射出之該光線之極化進行改變。
- 131如申請專利範圍第130項所述之光學顯示系統,其中,用以對於該等發光二極體所射出之該光線之該極化進行改變該裝置為一半波片。
Independent claims131
263 paragraphs, as filed
Optical display system and method
The present invention relates to an optical display system and method.
Compared with incandescent lamps or electric lamps (incandescent light sources) and/or fluorescent lamps (fluorescent light sources), the light provided by light emitting diodes (LEDs) can have higher performance. In addition, since the related equipment of LEDs can provide quite high power efficiency, it has replaced traditional light sources in various lighting facilities. For example: LEDs are used as traffic lights and used to illuminate cell phone keypads and displays.
Generally speaking, LEDs are formed by multiple layers, where at least part of the layer structures in the multiple layers are made of different materials and are determined by the material and thickness of these layer structures. The wavelength of the light emitted by the LED (wavelength). On the other hand, through the selection of the chemical composition of these layer structures, the optical power can be effectively contracted in this way, and the electrical charge emitted can be effectively reduced. Carriers are isolated to prevent them from entering certain regions (generally called quantum wells). Generally, the layer structure on one side of the junction where the quantum well is generated is doped with donor atoms, thereby resulting in high electron concentration (commonly referred to as these layers). The structure is the generation of n-type layers; in addition, the layer structure on the opposite side is doped with acceptor atoms, thereby resulting in a relatively high hole concentration ( hole concentration) (These layer structures are usually called p-type layers).
The following will explain the production method of LED. A plurality of material layers are formed during the manufacturing process of the wafer. Generally speaking, these layer structures are formed by epitaxial deposition techniques, such as metal-organic chemical vapor deposition (MOCVD). The deposition layer structure has been pre-formed in the upper system. Then, the exposed layer structure is made by various etching and metallization techniques for current injection contact pads (contact), and then the crystal The circle is cut to produce individual LED chips (LED chips). Generally, the individual LED chips after being cut are covered by packaging technology.
When the LED is operated, electrical energy is generally injected into the LED. This electrical energy can then be converted into electromagnetic radiation (light), and part of the electromagnetic radiation or light can be passed through the LED. Lead out.
The present invention relates to an optical display system and method.
The purpose of the present invention is to provide an optical display system including a micro-display and a light-emitting device. The microdisplay has a surface. The light-emitting device includes: a multi-material stack and a first layer. The multi-material laminate includes a light-generating area. The first layer is supported by the light-generating area. Under the design of a surface of the first layer, the light generated by the light-generating area can pass through the surface of the first layer. And the self-luminous device emits. The ratio of a width-to-depth ratio of the surface of the microdisplay to the ratio of a width-to-depth ratio of the surface of the first layer is approximately between 0.5 and 2.
Another object of the present invention is to provide an optical display system, comprising: a micro display having a surface; a light emitting device; and at least one optical element, the optical element is arranged along an optical path from the micro display to the light emitting device Wherein, under positioning the microdisplay, light emitting device, and optical element, during use, an image plane of the optical display system can be made to be inconsistent with a surface of the microdisplay emitted by the light emitting device and irradiated on.
Another object of the present invention is to provide a method for irradiating a micro display with a plurality of light-emitting devices. The method includes: performing an activation step on the light-emitting devices, so that at least one of the light-emitting devices has an activation time , The activation time is different from the activation time of at least one of the light-emitting devices among the other light-emitting devices.
Another object of the present invention is to provide an optical display system. The optical display system includes an LED and a cooling system. During the use of the optical display system, the cooling system can be used to adjust the temperature of the LED.
Another object of the present invention is to provide a light-emitting device, including: a multi-material laminate and a first layer, the multi-material laminate includes a light generating region, the first layer is supported by the light generating region, in the first layer Under the design of the surface of one layer, the light generated by the light generating area can be emitted from the light-emitting device through the surface of the first layer, and there is a contact area on the surface of the first layer, and the design function of the contact area Next, at most about 20% of an area irradiated by a light-emitting diode on a micro-display during use includes a plurality of dark spots, and these dark spots are formed by the contact area.
Another object of the present invention is to provide an optical display system, comprising: a plurality of light-emitting diodes; a micro-display; at least one optical element, the optical element is arranged along an optical path from the micro-display to the light-emitting device; and a The beam condensing device is used to combine the light generated by these light-emitting diodes.
Another object of the present invention is to provide an optical display system, wherein the light emitting device includes a multi-material laminate and a first layer, the multi-material laminate includes a light generating area, and the first layer is supported by the light generating area. Under the design of a surface of the first layer, the light generated by the light generating area can be emitted from the light emitting device through the surface of the first layer. In addition, the light-emitting device includes at least one electrical contact and a packaging structure. The electrical contacts are arranged along the surface of the first layer. The packaging structure includes a plating layer structure, a plurality of bolt groove structures and a plurality of bonding wires. The light-emitting device provides electrical contact through the plating structure, and the bonding wire is connected between the plating structure and at least one electrical contact pad.
An object of the present invention is to provide a device that includes: a material body designed to be used in an electronic device, the material body including a surface; and a contact structure supported by the surface of the material body. The contact structure includes: a patterned conductive layer with an inner part; and a patterned insulating layer with a plurality of edges. The patterned insulating layer is arranged between the inner part of the patterned conductive layer and the surface of the material body. The patterned insulating layer makes The conductive layer extends through all these edges of the insulating layer, so that an electrical contact can be formed to the material body.
Another object of the present invention is to provide a device comprising: a semiconductor die having a surface layer, the surface layer has a first side and a second side, the second side is opposite to the first side; A conductive pad structure is arranged along the first side of the surface layer of the semiconductor die; a second conductive pad structure is arranged along the second side of the surface layer of the semiconductor die; a plurality of conductive contact pads are electrically contacted In at least one of the first conductive pad structure and the second conductive pad structure, the conductive contact pads extend from at least one of the first conductive pad structure and the second conductive pad structure toward the center of a semiconductor die Region; and an insulating layer disposed between at least a part of the inner part of the conductive contact pads and the top layer of the semiconductor die.
Another object of the present invention is to provide a device comprising: a rectangular light-emitting diode with a surface layer, the surface layer has one side; a conductive pad structure along one of the surface layers of the rectangular light-emitting diode The other electric pad structure is arranged along the opposite side of the surface layer of the rectangular light-emitting diode; a plurality of conductive contact pads are electrically connected to at least one conductive pad structure, and these conductive contact pads are made of At least one conductive pad structure extends toward a central area of the rectangular light-emitting diode.
Another object of the present invention is to provide a device, which includes: a material stack having a surface; and a contact structure disposed on the surface of the material stack. The contact structure includes: a patterned conductive layer; and a patterned insulating layer, which is arranged between the patterned conductive layer and the material stack. Under the design of the patterned conductive layer and the patterned insulating layer, the patterned conductive layer can pass through the patterned conductive layer. One of the voltage drops used is approximately equal to a plurality of segments, and these segments are arranged along the length of the patterned conductive layer.
Another object of the present invention is to provide a device, which includes: a material stack having a surface; and a contact structure disposed on the surface of the material stack. The contact structure includes: a patterned conductive layer. Under the design of the patterned conductive layer, the heat generation of the patterned conductive layer during operation is approximately equal to the heat generation of a plurality of sections, which are along the pattern. The length of the conductive layer is set.
Each embodiment of the present invention has at least one of the following advantages.
In certain embodiments, the light emitting system includes an LED and/or a relatively large LED chip, and the relatively large LED chip can exhibit relatively high light extraction.
In some embodiments, the light emitting system includes an LED and/or a relatively large LED chip. The relatively large LED chip can exhibit relatively high surface brightness, relatively high average surface brightness, relatively small heat dissipation requirements, or relatively high heat dissipation rate. , Relatively low source sound range and/or relatively high power efficiency.
In certain embodiments, the light emitting system may include a packaged LED (for example, a relatively large packaged LED), thereby replacing the molding material. Under the action of the packaged LED, the specific problems of reduced performance and/or inconsistent time function performance caused by the encapsulant material can be avoided, so that relatively ideal and/or reliable performance can be obtained over a relatively long period of time .
In certain embodiments, the light emitting system may include an LED (for example, a packaged LED, which may be a relatively large packaged LED), and the LED may be a relatively uniform phosphor material coating.
In some embodiments, a light emitting system may include an LED (for example, a packaged LED, which may be a relatively large packaged LED), and the designed LED may be in a specific angle range (for example, two normal to the surface of the LED). Within a specific angle range) to provide a desired light output.
In some embodiments, a light emitting system may include an LED and/or a relatively large LED die, and the LED and/or a relatively large LED die may be manufactured through a process at a relatively reasonable price.
In certain embodiments, a light emitting system may include an LED and/or a relatively large LED die. The LED and/or a relatively large LED die can be produced in a large-scale manner and will not be impossible to implement due to economy. And cause a waste of capital.
In some embodiments, rectangular LEDs (for example, compared to square LEDs) can provide one or more of the advantages listed below. The rectangular LED can have a larger number of bonding wires per unit area, thereby increasing the power that can be input to the LED. Since the rectangular structure can be selected to match a specific width to depth ratio of a pixel or a miniature display, the need for complex beam shaping lenses can be reduced. In addition, in addition to increasing the heat dissipation speed of rectangular LEDs, the possibility of failure due to overheating of the device can also be reduced. In addition, since the cross-section of one of the individual LEDs cut by the wafer is slightly larger than the light emitting surface area of the LED, the other individual LEDs and the separable addressable LEDs can be closely stacked on each other in an array manner. If the LEDs are unable to work (for example, due to large defects), since the individual LEDs are closely stacked with each other, the performance of the array-shaped LEDs cannot be greatly reduced.
In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment, together with the accompanying drawings, is described in detail as follows:
FIG. 1 shows a schematic diagram of a light emitting system 50 in which an array 60 composed of a plurality of light emitting diodes (LEDs) 100 is combined. Under the design of the array 60, the light emitted through the LEDs 100 (described below) can be emitted from the light emitting system 50 through the surface 55 during operation.
For example, light-emitting systems include projectors (such as rear projection projectors, front projection projectors), portable electronic devices ( For example: cell phone, personal digital assistants, laptop computers, computer monitor, large area signage (e.g. highway sign) signage), vehicle interior lighting (e.g. dashboard lighting), vehicle exterior lighting (e.g. vehicle headlights), including color changing headlights ( color changeable headlights), general lighting (general lighting) (e.g. office overhead lighting), high brightness lighting (e.g. streetlights), camera flashes, medical devices (e.g. internal view Endoscopes), telecommunications (e.g. plastic fibers for short range data transmission), security sensing (e.g. biometrics) ), integrated optoelectronics (such as intrachip and interchip optical interconnects, optical clocking), military field communications (such as point-to-point communications) to point communications), biosensing (e.g. photo-detection of organic or inorganic substance), photodynamic therapy (e.g. skin treatment) )), night-vision goggles, solar powered transit lighting, emergency lighting systmes, airport runway lighting, airline lighting, surgical surface Single (surgical goggles), wearable light sources (for example: life-vests). For example, the rear projection projector is a rear projection TV (rear projection TV). television); A front projection projector is a projector used to display on a surface (for example, a screen or a wall). In some embodiments, the laptop computer may include a front projection type projector.
Generally speaking, the surface 55 is composed of at least about 20% (for example: at least about 30%, at least about 40%, at least about 50%, at least about 60%, at least about 60%) that can transmit from the LEDs 100 and impact on the surface 55. About 70%, at least about 80%, at least about 90%, at least about 95%) of the light of the material is made, for example: surface 55 can be made of glass (glass), silicon (silica), quartz (quartz), plastic ( Plastic) and polymers (ploymers) and other materials.
In some embodiments, it is essentially desired to be generated by each LED 100 (for example, total light intensity, light intensity as a function of wavelength, and/or peak emission wavelength). The same, for example: in the display facilities (displaying applications) (for example: to achieve vivid full-color displays (vibrant full-color displays) of the essential monochromatic sources (e.g.: LEDs) timing (time- Sequencing). As far as the optical system in communication is concerned, a particular wavelength of the light running through the light source to the light guide and through the light guide to the detector is its advantage. For the optical system in vehicle lighting, it uses colors to indicate signals. Another example is in medical applications (such as photosensitive drug activation or biological sensing facilities). (biosensing applications), its wavelength and color response are advantages).
In certain embodiments, it is desirable that the light emitted by at least a part of the LED 100 (for example: total light density, light density as a function of wavelength, and/or peak emission wavelength) are different Light emitted from other LEDs 100 (for example, total light density, light density as a function of wavelength, and/or peak emission wavelength). Taking general lighting (for example: its multi-wavelength system can increase the color rendering index (CRI)) as an example, it can be seen that CRI means: the same object, and the equivalent relative temperature (comparable Correlated temperature (reference lighting systems) (for example: daylight) observation, these objects under the light emitted by the lighting system when they pass through the color shift (color shift) measurement method. Other examples are: camera flash (for example: it is essentially a high CRI, and is essentially close to the noon daylight (sunlight) CRI, it is hoped that the photographed object or subject can have a realistic color display (realistic rendering)), medical device (for example, it has a fixed CRI in its essence, and is beneficial to the differentiation and/or identification of tissues, organs, fluids, etc.) , Backlighting displays (for example: the white light with a specific CRI is quite suitable for the human eye).
Although the LEDs 100 in Figure 1 are formed in an array, the LEDs 100 can also take other different forms. In some embodiments, the lighting system 50 includes a single LED 100. In other specific embodiments, the light from various light sources can be guided at an angle to the same point position (for example, an optical lens such as a lens) by means of a curved array system . In addition, in some embodiments, the array-shaped light-emitting devices are arranged in a hexagonal shape, so that a compact package and high-efficiency surface brightness can be achieved. Moreover, in some embodiments, the light-emitting devices are distributed around a mirror (for example, a dichroic mirror), and the light emitted by the LEDs in the array can be controlled by the mirror. Combine or reflect.
As shown in Figure 1, the light emitted by the LEDs 100 directly propagates onto the surface 55. However, the light emitted by the LEDs 100 of some embodiments may be transmitted to the surface 55 in an indirect manner. In some embodiments, the lighting system 50 includes a single LED 100. In addition, in certain embodiments, the light emitted by the LEDs 100 is focused on a mirco display (eg, focused on a light valve, such as a digital light processor (DLP)) . Furthermore, in some embodiments, the light system is guided through various lenses, mirrors, or ploarizers (for example, for LCDs). In certain embodiments, the light is projected through the primary and secondary lenses, such as lenses or lens groups.
In Figure 2A, an optical display system 1100 (described below) includes a non-lambertian LED 1110 (described below), a lens 1120, and a microdisplay 1130. The LED 1110 is spaced from the lens 1120 by a distance L1, and the microdisplay 1130 is spaced from the lens 1120 by a distance L2. Under the action of appropriate distances L1 and L2, the light emitted by the LED 1110 hits the lens 1120, and the image plane of the lens 1120 is the surface of the microdisplay 1130 hit by the light emitted from the LED 1110 They are consistent with each other.
Under the effect of the above arrangement, the optical display system 1100 irradiates the light emitted by the LED 1110 onto the surface of the microdisplay 1130 in a fairly efficient manner according to the surface shape of the LED 1110, and the light emitted by the LED 1110 illuminates the surface of the microdisplay 1130. Above the micro display 1130, the light emitted by the LED 1110 is substantially the same as the surface shape of the micro display 1130. Taking some embodiments as an example, the ratio between the aspect ratio of the LED 1110 and the width-to-depth ratio of the microdisplay 1130 is approximately between 0.5 and 2 (for example, approximately from 9/16 to 16/9). , About from 3/4 to 4/3, about 1). For example, the width to depth ratio of the micro display 1130 can be 1920x1080, 640x480, 800x600, 1024x700, 1024x768, 1024x720, 1280x720, 1280x768, 1280x960 or 1280x1064.
Generally speaking, the surface of the microdisplay 1130 and/or the surface of the LED 1110 can be any desired shape, such as square, circular, rectangular, or triangular. , Trapezoidal and hexagonal.
In some embodiments, when there is no lens between the LED 1110 and the micro display 1130, the optical display system can still irradiate the light emitted by the LED 1110 to the micro display in a fairly efficient manner according to the surface shape of the LED 1110 On the surface of 1130, the light emitted by the LED 1110 is irradiated on the microdisplay 1130, and the light emitted by the LED 1110 is substantially the same as the surface shape of the microdisplay 1130. For example, Figure 2B shows an optical display system 1102. When there is no lens between the LED 1110 and the micro display 1130, a square LED (square LED) 1110 is imaged on a square microdisplay 1130 (square microdisplay 1130). ) Above. Taking the example of Figure 2C again, Figure 2C shows an optical display system 1104, in which a rectangular LED (rectangular LED) 1110 can be imaged on a rectangle without a lens between the LED 1110 and the micro display 1130 Above a rectangular microdisplay (similarly proportioned aspect ratio).
In certain embodiments, an anamorphic lens may be positioned between the LED 1110 and the micro display 1130. For example, when the width to depth ratio of the LED 1110 is substantially different from the width to depth ratio of the microdisplay 1130, the anamorphic lens positioned between the LED 1110 and the microdisplay 1130 can be determined according to requirements. Taking an optical display system 1106 shown in Figure 2D as an example, it can be seen that the optical display system 1106 includes: a substantially square shaped surface (substantially square shaped surface) and a substantially square shaped surface of a microdisplay 1130 ( For example, the width to depth ratio is approximately 16:9, or approximately 4:3), and an anamorphic lens 1120, which is disposed between the LED 1110 and the micro display 1130. In this embodiment, the anamorphic lens 1120 can essentially convert the light emitted by the LED 1110 into a shape corresponding to the microdisplay 1130. Therefore, the efficiency of the optical display system can be improved by increasing the amount of light emitted by the LED 1110 that strikes the surface of the microdisplay 1130.
FIG. 3 shows an optical display system 1200, where the optical display system 1200 includes an LED 1110, a lens 1120, and a micro display 1130. The light emitting surface of the LED 1110 has a plurality of contact regions, and a plurality of electrical leads 1115 are attached to the contact regions (as described below). The LED 1110 is separated from the lens 1120 by a distance L3, and the microdisplay 1130 is separated from the lens 1120 by a distance L4, and the wire 1115 blocks the light emitted from the contact area of the LED 1110. If the plane of the surface of the microdisplay 1130 hit by the light emitted from the LED 1110 is consistent with the image plane of the lens 1120, then a series of patterns will appear on this surface of the microdisplay 1130 A plurality of dark spots 1202, these dark spots 1202 correspond to the contact area of the light-emitting surface of the LED 1110. In order to reduce the dark spots 1202 covering the surface of the micro display 1130, the selected distances L3 and L4 can make the light emitted by the LED 1110 hit the lens 1120, so that the image plane of the lens 1120 and the micro display 1130 Surface (this is the LED The positions of the surface hit by the emitted light of 1110 are not consistent with each other (that is, there is a distance ΔL between the image plane of the lens 1120 and the surface of the microdisplay 1130 hit by the emitted light of the LED 1110. Under a configuration, the light emitted by the LED 1110 is defocused at the location of the surface of the microdisplay 1130 (this is the surface where the light emitted by the LED 1110 strikes), and is generated on the surface of the microdisplay 1130 The intensity of light is more uniform than that of the image plane of the lens 1120. The total distance between the LED 1110 and the microdisplay 1130 can be expressed as the difference between the image plane of the LED 1110 and the lens 1120 The distance (L5) plus the distance L. Generally speaking, when the distance between the LED 1110 and the microdisplay 1130 is increased to increase the distance L, although the density of dark spots can be reduced, it is also It will reduce the density on the surface of the microdisplay 1130 (this is the surface hit by the emitted light of the LED 1110). On the other hand, when the microdisplay 1130 is moved, the LED is reduced. When the distance between 1110 and the micro display 1130, although a larger density can be obtained on the image plane of the lens 1120, the micro display 1130 will only be partially illuminated. In some embodiments, the absolute value of L/L5 is approximately 0.00001 to 1 (for example: approximately 0.00001 to 0.1, approximately 0.00001 to 0.01, approximately 0.00001 to 0.001 Or approximately between 0.00001 and 0.0001). In some embodiments, multiple LEDs can be used to illuminate a single microdisplay (for example, LEDs with a 3x3 matrix). Therefore, when multiple LEDs illuminate a single micro-display, if one of the LEDs fails, the system can still maintain the system in use (if a particular LED (particular LED) cannot supply light, it will Produce dark spots). Under the design of the optical display system, if multiple LEDs are used to illuminate a single micro display, no dark spots will be generated on the surface of the micro display. For example, when the microdisplay is moved to the outside of the image plane, there will be no dark spots in the area between the LEDs.
In some embodiments, the density of dark spots on the surface of the micro-display 1130 can be reduced through proper design planning for the contact area of the LED 1110. Taking FIG. 4A as an example, it can be seen that FIG. 4A shows a top view of an LED 1110 having a contact area, where the contact area is arranged along the perimeter of the LED 1110. Under the effect of the above configuration, regardless of whether there is a lens (with or without defocusing), the optical display system can be designed (for example, the size of the surface of the microdisplay 1130 can be adjusted appropriately). The dark spots on the surface of the microdisplay 1130 (caused by the contact area on the surface of the LED 1110) have relatively low density values. The above method is also applicable to optical display systems with multiple LEDs (for example, LEDs with a 3x3 matrix).
Taking FIG. 4B as an example, FIG. 4B shows an optical display system 300. The optical display system 300 includes an LED 1110 and a micro display 1130. The LED 1110 includes a contact area, and the contact area is formed by a plurality of wires 1115. Due to the design of this contact area, the region (region) where the dark spot 1202 is located will not be imaged on the surface of the microdisplay 1130. In this embodiment, since the dark spot is located on the surface of the micro display 1130 and located outside the imaging area on the image plane of the lens 1120, the surface of the micro display 1130 can be located on the image plane of the lens 1120 . If the shape of the LED 1110 corresponds to the shape of the microdisplay 1130, the wire 1115 can be arranged on the surface of the LED 1110 along the periphery of the LED 1110. In this embodiment, the area inside the contact area on the surface of the LED 1110 is the same as the surface area of the microdisplay 1130 (for example, the width to depth ratio is the same). The above method is also applicable to optical display systems with multiple LEDs (for example, LEDs with a 3x3 matrix).
Taking FIG. 5 as an example, FIG. 5 shows an optical display system 1700. The optical display system 1700 includes an LED 1110 and a micro display 1130. The LED 1110 includes a contact area and a homogenizer 1702 (also called a light tunnel or light pipe). The contact area is formed by a plurality of wires 1115. In addition, the homogenizer 1702 can guide the light emitted by the LEDs 100 to a lens 1120. Under the effect of the total internal reflection of the light emitted by the LEDs 100 (deviated from the inside surface of the homogenizer 1702), it can substantially form a uniform output distribution of light In addition, it can also reduce the dark spots caused by the wires 1115. In essence, the LED 1110 can be used to illuminate the microdisplay 1130 fairly uniformly (for example, an image generated in an image plane 1131) It is substantially uniform).
In addition, the optical display system 1700 may also include one or more additional optical components. In some embodiments, the optical display system 1700 may include a lens, which is disposed on a path and in front of the homogenizer, so that the light can be focused in the homogenizer. In a specific embodiment, since the width-to-depth ratio of the homogenizer 1702 corresponds to the width-to-depth ratio of the LED 1110, when the LED 1110 is arranged in a manner that is quite close to the homogenizer 1702, unnecessary additional lenses are provided. It is omitted or can be provided with a lens before the homogenizer 1702 to improve the efficiency of light coupling to the homogenizer 1702.
Taking FIG. 6 as an example, FIG. 6 shows an optical display system 1710. The optical display system 1710 includes an LED 1110 and a micro-display 1130. The LED 1110 includes a contact area and a set of multiple lenses 1712, wherein the contact area is formed by a plurality of wires 1115, the lens 1712 is arranged between the LED 1110 and the lens 1120, and the lens 1712 The size, shape and number (number) can be changed. For example, the number and size of the lens 1712 are proportional to the cross-sectional area of the LED 1110. In some embodiments, the lens 1712 includes a group of lenses ranging from about 1 to 100. For example, the size of this group of lenses ranges from about 1 mm to 10 cm. The light emitted through the LED 1110 enters the lens 1712 and is refracted. Under the action of the lens 1712 with a curved surface, the light is refracted at different angles, which causes the overlap between the light beams emitted through the lens 1712. Since the overlapping of the light beams can reduce the dark spot formed by the wire 1115, the LED can be used essentially 1110 performs fairly uniform illumination on the microdisplay 1130 (for example, an image generated in an image plane 1131 is substantially uniform).
Although a single lens is used in the above-mentioned optical display systems, in some embodiments, multiple lenses can be used to achieve the same effect. Furthermore, in certain embodiments, one or more optical elements different from the above-mentioned lens (es) can also be used. For example, these optical elements may include: mirrors, reflectors, collimators, beam splitters, beam combiners, dichroic mirrors, and dichroic mirrors. mirrors, filters, polarizers, polarizing beam splitters, prisms, total internal reflection prisms, optical fibers, guides Light guides and beam homogenizers. In terms of how to select the appropriate optical elements in the optical display system and the corresponding configuration of the optical elements, this related technology is known to anyone who is familiar with the art.
Furthermore, although a single non-Lambertian LED is used in the above-mentioned optical display system, in some embodiments, more than one non-Lambertian LED may be used to illuminate the microdisplay 1130. Taking Figure 7 as an example, Figure 7 shows an optical display system 1500. The optical display system 1500 includes a blue LED 1410 (the dominant output wavelength is approximately 450 to 480 nm). One LED), a green light emitting diode (green LED) 1420 (the main output wavelength is about 500 to 550nm) and a red light emitting diode (red LED) 1430 (which is the main output The wavelength is about one of the LEDs of 610 to 650 nm), the blue LED 1410, the green LED 1420, and the red LED 1430 are in optical communication with the surface of the micro display 1130. The blue LED 1410, the green LED 1420, and the red LED 1430 can be activated simultaneously, sequentially, or two of them can be activated simultaneously. In other embodiments, at least a part of the LEDs can perform optical communication with individual surfaces of the microdisplay.
In some embodiments, the blue LED 1410, the green LED 1420, and the red LED 1430 are activated in a sequential manner. In such embodiments, the viewer's eye is usually maintained on the multiple images generated by the multiple colors of the blue LED 1410, the green LED 1420, and the red LED 1430, and it is also Combine these images. For example, when a particular pixel (or a set of pixels) or a miniature display (or a part of a miniature display) is designated as purple in the color of a frame , The red LED 1430 and the LED 1410 can irradiate the surface of the microdisplay with appropriate portions in a refresh cycle. The eye of the observer combines red and blue light and "sees" a purple microdisplay. In order to prevent humans from perceiving the sequential illumination of LEDs, an appropriate frequency (for example: refresh rate) is generally used. Rate) is greater than 120Hz) update cycle to achieve.
The density and brightness of the blue LED 1410, green LED 1420, and red LED 1430 can be changed. For example, the efficiency of the green LED 1420 is lower than that of the red LED 1430 or the blue LED 1410. Since a particular LED (e.g. green LED 1420) has lower efficiency, the color of light (e.g. green light) emitted by low-efficiency LEDs (e.g. green LED 1420) cannot be easily Produces high brightness to illuminate the microdisplay. With the adjustment of the activation cycles of multiple LEDs, the disparity in the efficiency of multiple LEDs can be compensated for (a non-distorted image is generated based on different light brightness) ). For example, compared to other LEDs with higher efficiency, the LED with the smallest efficiency can be configured with a longer activation time (continuing for a longer time). In a specific embodiment, it replaces the red/green/blue projection system (red/green/blue projection system), one of the duty cycle allocations of 1/3:1/3:1/3. In terms of system, the ratio of this cycle can be 1/6:2/3:1/6 (red:green:blue). In another embodiment, the ratio of this period may be 0.25:0.45:0.30 (red: green: blue). In other embodiments, the activation duty cycle designated as the green LED 1420 can be further improved. For example, the duty cycle designated for imaging on the green LED 1420 can be increased to approximately 40% or more (for example: approximately greater than 45%, approximately greater than 50%, approximately greater than 60%, approximately greater than 70%, approximately More than 80%, about more than 90%). In some embodiments, the duty cycle of each LEDs is different. For example, the duty cycle of the red LED 1430 can be greater than the duty cycle of the blue LED 1410. The activation period in each optical display system proposed above is determined based on the density and/or brightness of an LED. In some embodiments, the activation period of the LED can be determined based on one or more other parameters. Decide. In some embodiments, the activation time of the light emitting device The time is at least about 1.25 times (times) of the activation time of other light-emitting devices (for example: at least about 1.5 times, at least about 2 times, at least about 3 times).
Figures 8A and 8B show an embodiment of a liquid crystal display (LCD) based on an optical display system 1720, where the optical display system 1720 includes a blue LED 1410, a green LED 1420, and a red LED 1430 (as above As mentioned above), the blue LED 1410, the green LED 1420, and the red LED 1430 perform optical communication between the surfaces of their related LCD panels 1728, 1730, and 1732. In addition, the optical display system 1720 includes a plurality of lenses 1722, 1724, and 1726. These lenses 1722, 1724, 1726 are located between the blue LED 1410/green LED 1420/red LED 1430 and the related LCD panel 1728/1730/1732. A relative optical path (corresponding optical path), and use lenses 1722, 1724, 1726 to focus the light on the related LCD panels 1728, 1730, 1732. The optical display system 1720 further includes a device 1734 (for example, an x-cube). The device 1734 is used to combine multiple beams of light from the LCD panels 1728, 1730, and 1732 into A single beam 1736 (as indicated by the arrow), this beam 1736 can be directed at a projection lens 1735 or other display. On the other hand, the optical display system 1720 may also include a polarizer. When the polarizer is used to transmit a desired polarization (for example,'p' polarization), another polarization is also performed at the same time. (For example:'s' polarization) reflection. The polarizer can be set between the blue LED 1410/green LED 1420/red LED 1430 and its related lens 1722/1724/1726, the blue LED 1410/green LED 1420/red LED On an optical path between the 1430 and its related LCD panel 1728/1730/1732, or the polarizer can be placed at other positions along the optical path. As shown in FIG. 8B, in some embodiments, the width-to-depth ratio of one of the LEDs (for example, the red LED 1430) can correspond to the width-to-depth ratio of the aforementioned microdisplay (for example, the LCD panel 1732).
Figure 9 shows an embodiment of a digital light processor (DLP) based on an optical display system 1750. The optical display system 1750 includes a blue LED 1410, a green LED 1420, and a red LED 1430 (as described above). The blue LED 1410, the green LED 1420, and the red LED 1430 perform optical communication between the surfaces of the lenses 1722, 1724, and 1726 related to them. The light emitted by the blue LED 1410, the green LED 1420, and the red LED 1430 passes through the related lenses 1722, 1724, 1726 and is collected by a device 1734 (for example, a light beam). This device 1734 is It is used to combine the multiple beams formed by the light emitted by the blue LED 1410, the green LED 1420, and the red LED 1430 into a single beam, which can be directed to a total internal reflection beam (total internal reflection(TIR)prisms)1752. For example, the light emitted by the light beam 1734 can be directed to the TIR beam 1752 through a mirror 1754 or other devices (such as a light guide), and the light is reflected and transferred by the TIR beam 1752. Point to a DLP panel 1756. The DLP panel 1756 includes a plurality of mirrors, and a specific image can be generated by the activation of these mirrors. For example, the light 1760 (as indicated by the arrow) can be directed to a projection lens 1755 through the reflection of a specific mirror, or the specific mirror can be used to reflect the light away from the projection lens 1755. With the combination of blue LED 1410/green LED 1420/red LED 1430 and the DLP panel 1756, better control of the signal can be obtained. For example, in addition to using the mirror in the DLP panel 1756 to reduce the amount of data sent to the DLP panel 1756, by turning on and off the blue LED 1410, green LED 1420, and red LED 1430 The (off) switch can also reduce the amount of data sent to the DLP panel 1756. For example, if red is not needed in a particular image, the red LED The 1430 can be turned off, so that there is no need to send a signal to the DLP panel 1756 to switch its related mirrors. The ability to modulate LEDs can increase color quality, image quality, or contrast.
Figure 10 shows an embodiment of a liquid crystal on silicon (LCOS) panel based on an optical display system 1770, where the optical display system 1770 includes a blue LED 1410, a green LED 1420, and a red LED 1430 (As mentioned above), the blue LED 1410, the green LED 1420, and the red LED 1430 are in optical communication between their related polarized beam splitters 1774, 1778, and 1782. The light emitted by the blue LED 1410, the green LED 1420, and the red LED 1430 passes through the related polarized beam splitters 1774, 1778, 1782 and is projected onto one of the related LCOS panels 1772, 1776 or 1780 . Since the LCOS panels 1772, 1776, and 1780 are not sensitive to the polarization of all light, under the sensitivity of the LCOS panels 1772, 1776, and 1780, the polarization beam splitters 1774, 1778, and 1782 will The polarization of light becomes a particular polarization (particular polarization) (for example: transmitting a desired polarization (for example:'p' polarization) while also performing another polarization (for example:'s' polarization) and transmitting other polarizations). A device 1734 (for example: an x-cube) is used to collect the light reflected by the LCOS panels 1772, 1776, and 1780. By this device 1734, the light from the LCOS panels 1772, 1776, 1780 is collected The beams of light combine into a beam 1790 (as indicated by the arrow), which can be directed at a projection lens 1795.
Although the optical display systems in the above embodiments include red LEDs, green LEDs, and blue LEDs, they are not intended to limit the present invention, and any other colors and combinations thereof can also be used. For example, the types of colors of the optical display system are not limited to three. Others, such as yellow, can also be used and configured as part of the duty cycle. On the other hand, multiple LEDs with dominant output wavelengths can be optically combined to produce a resulting color. For example, a blue LED (for example, an LED with a main output wavelength, whose main output wavelength is between the blue wavelength and the green wavelength) can be combined with a yellow LED to generate a green light ('green' light). Generally speaking, the number of LEDs and the color of each LED can be determined according to requirements. In addition, the optical display system may also include an additional microdisplay.
In some embodiments, the duty cycle of LEDs with lower efficiency (for example, green LEDs) can be improved through various data compression techniques and algorithms. For example, when using a transmission method that only differs from the image information of the previous image instead of the transmission method for all the information required to reconstruct each image, the data rate (data rate) can be effectively increased. Under the effect of the above method, a higher data rate can be achieved with a small amount of data transmission, and the complementary colors of a given refresh cycle can have reduced duty cycles. .
Although in the above embodiment, multiple LEDs are used to illuminate a given microdisplay (given microdisplay), the optical componentry does not necessarily follow the light path between one or more LEDs and the microdisplay. set up. For example, a composite light or a set of dichroic mirrors are used to combine the light from multiple LEDs into a single microdisplay. In some embodiments, the optical elements are arranged along the optical path, and different optical elements can be designed and applied to each LED (for example, if the surface of the LEDs has different sizes and shapes), or the same optical element It can be designed and applied in at least one LED.
In some embodiments, in terms of the required different brightness of a specific color based on the required chromaticity of an image, it can use the configured specific LED to perform a part of the activation time of the display Illuminated. For example, when in order to obtain intense blue, the blue LED must be activated during the entire activation time; when in order to obtain less intense blue, the blue LED only needs to be activated during the entire configuration of the part of the activation time ( Activate within total allocated activation time). For example, a set of mirrors can be used to adjust the activation time of the part of the display that illuminates the display. The fixed pull mode of the mirrors is determined by transmitting the light to the microdisplay or reflecting the light away from the microdisplay.
In certain embodiments, the array of movable microdisplays (for example, a movable mirror) can be activated to generate a desired intensity. For example, a pixel can be represented by each micromirror, and the density of the pixel can be determined according to the positioning method of the micro display. For example, the micro-mirror can be in the on state or the off state, and in terms of the activation time of a specific color of the LED, the proportion of the time occupied in the on state can be used to determine the image The density.
Regarding the multiple LEDs in the above embodiment, the width-to-depth ratio of one or more LEDs (for example, each LED) used therein is relative to the width-to-depth ratio of the microdisplay 1130.
Figure 11 shows an optical display system 1600. The optical display system 1600 includes an LED 1110, a microdisplay 1130, a cooling system 1510, and a sensor 1520, wherein the sensor 1520 can perform thermal communication with the LED 1110, respectively , Conduct electrical communication with the cooling system 1510. Therefore, during the use of the optical display system 1600, the sensor 1520 and the cooling system 1510 can be used to adjust the temperature of the LED 1110. For example, when the LED 1110 is one of the relatively large LEDs (as described below), the LED can generate a lot of heat. As shown in Figure 11, the sensor 1520 is used and the LED 1110 is cooled by the cooling system 1510. The amount of power input to the LED 1110 can be increased (mainly for higher drive currents). (operational efficiency) under (higher drive currents) to improve), and at the same time for LED The probability of damage caused by 1110 can also be reduced. The cooling system may include thermal electric coolers, fans, heat pipes, and liquid cooling systems. For example, the sensor 1520 can be controlled manually or by a computer. In some embodiments, the optical display system does not need to include a sensor (for example, the cooling system 1510 can be permanently on or controlled manually). Under the action of the cooling system, in addition to reducing the damage of the LED that may be caused by excess temperature, it can also improve the operating efficiency of the LED at a higher driving current. In addition, the cooling system can also reduce the wavelength shift caused by temperature.
In some embodiments, non-Lambertian LEDs may cause non-uniform angular distribution of light. In this type of embodiment, the uneven angular distribution of light can be reduced by moving the microdisplay away from the image plane. In certain embodiments, the information flow can be transmitted to the microdisplay under the action of electrical or optical connection. In some embodiments, the use of optical connections can increase the information flow rate.
In some embodiments, the size of the PLLED or other non-lambertian source can be reduced, and the light emitted by it can be concentrated at a small angle, thereby increasing the display on the display The brightness of the image.
Figure 12 shows a side view of an LED 100, which has a package die type. The LED 100 includes a multi-layer stack 122, and the multi-layer stack 122 is disposed on a submount 120. The multi-push stack 122 includes a silicon doped (n-doped) GaN layer 134 with a thickness of 320 nm. The upper surface 110 of the (n-doped) GaN layer 134 has a pattern formed by a plurality of openings 150. In addition, the multi-push stack 122 also includes a bonding layer ( bonding layer 124, a silver layer 126 with a thickness of 100 nm, a magnesium doped (p-doped) GaN layer (magnesium doped, (p-doped) GaN layer) 128, a thickness of 40 nm Light-generating region 130 is a 120nm light-generating region 130. Multiple InGaN/GaN quantum wells (multiple InGaN/GaN) are formed on the light-generating region 130. quantum wells); and an AlGaN layer 132. An n-side contact pad 136 is provided on the silicon doped (n-doped) gallium nitride layer 134, and a p-side contact pad 138 is provided On the silver layer 126. The encapsulant material (epoxy with an index of refraction of 1.5) 144 is located on the silicon doped (n-doped) gallium nitride layer 134, a cover glass (cover slip) 140 and a plurality of support members (supports) 142. The sealing material layer 144 does not extend into the openings 150.
The following will describe the light generated by the LED 100. Compared with the n-side contact pad 136, the p-side contact pad 138 is at a positive potential, so that an electrical current is input to the LED 100. When the current passes through the light generating region 130, the electrons (electrons) emitted from the silicon doped (n-doped) gallium nitride layer 134 are different from those from the magnesium doped (p-doped) gallium nitride layer 128. The holes are combined together on the light generating area 130, so that light can be generated in the light generating area 130. In addition, the light generating area 130 contains a large number of point dipole radiation sources. Under the action of the point dipole radiation source, the light generated by the light generating area 130 (for example: isotropic ( isotropically)) can have the characteristics of the spectrum of the light wavelength of the material made of the light generating region 130. Under the action of the InGaN/GaN quantum well, the light generating region 130 can generate a peak wavelength of about 445 nanometers (namomewters (nm)) and a full width at half width of about 30 nm. maximum) (FWHM) spectrum of light wavelength.
It is worth noting that, compared with the charge carriers in the silicon doped (n-doped) gallium nitride layer 134, the magnesium doped (p-doped) gallium nitride layer 128 is Relatively low carrier mobility (mobility). In this way, by placing the silver layer 126 (which is conductive) along the surface of the magnesium doped (p-doped) gallium nitride layer 128, from the p-side contact pad 138 to the magnesium doped The (p-doped) gallium nitride layer 128 and the uniformity of charge injection in the light generating region 130 can be effectively improved, and at the same time, the electrical resistance and electrical resistance of the LED 100 can be reduced. /Or improve the injection efficiency of the LED 100. In addition, since the silicon doped (n-doped) gallium nitride layer 134 has higher carrier mobility, electrons can quickly pass through the aluminum gallium nitride layer 132 from the n-side contact pad 136 The silicon doped (n-doped) gallium nitride layer 134 can substantially make the current density at any position in the production area 130 and through the production area 130 in a uniform state. Furthermore, since the silver layer 126 has relatively high thermal conductivity (thermal conductivity), so that the silver layer 126 can be used as a heat sink for the LED 100 (the heat is transferred to the carrier 120 in a vertical manner through the multiple push-up layers 122).
At least a part of the light generated by the light generating area 130 can be guided onto the silver layer 126. Subsequently, the light system reflected by the silver layer 126 can be emitted toward the outside of the LED 100 through the upper surface 110 of the silicon doped (n-doped) gallium nitride layer 134, or the light system reflected by the silver layer 126 can be emitted toward the outside of the LED 100. A hole pair (electron-hole pair) can be formed by the absorption of the semiconductor material in the LED 100, and when the hole is combined with the light generating area 130, the light generating area 130 is easily formed. Can produce light. Similarly, part of the light generated by the light generating area 130 can be guided to the n-side contact pad 136, and is made of the material (for example: Titanium (Ti)/aluminum (Al)/nickel (Ni)/gold (Au)) reflects at least a part of the light generated by the light generating region 130. Therefore, the light guided to the n-side contact pad 136 can be reflected through the n-side contact pad 136, and the reflected light can pass through the silicon doped (n-doped) gallium nitride layer 134 Surface 110 (for example: reflected from the silver layer 126), facing the LED The light emitted from the outside of 100 or guided to the n-side contact pad 136 and reflected by the n-side contact pad 136 can be absorbed by the semiconductor material in the LED 100 to form a pair of holes, and the hole is for light Under the action of the combination in the generating area 130, light can be generated in the light generating area 130 (for example, by or not having to be reflected by the silver layer 126).
As shown in FIGS. 12 and 13, the surface 110 of the LED 100 is not flat. The surface 110 includes a modified triangular pattern formed by a plurality of openings 150. Generally speaking, the depth of the opening 150 can be any value, and the diameter of the opening 150 and the nearest spacing between adjacent openings 150 can be changed arbitrarily. Unless it can be annotated in other ways, the results of numerical calculations are used below to clearly explain the figures: the depth 146 of the opening 150 is about 280nm; the non-zero diameter is about 160nm ; The nearest interval between adjacent openings 150 is about 220nm; and the refractive index is 1.0. Since the triangle pattern has been modulated, the center-to-center distance between adjacent patterns 150 is between (a-a) and (a+a), where, " a" represents the lattice constant of the triangle pattern, and "a" represents the detuning parameter with dimensions of length. parameter), here the modulation system can be obtained according to random directions. In order to effectively increase the light extraction of the LED 100 (please refer to the following description), the modulation parameter a is approximately at least 1% (one percent) of the ideal lattice constant a (for example: at least approximately 2 %, at least about 3%, at least about 4%, at least about 5%), and/or at most about 25% of the ideal lattice constant (for example: at most 20%, at most 15%, at most 10 %). In some embodiments, the distance between the nearest centers of adjacent patterns 150 can be any value between (a-a) and (a+a), so that the pattern 150 can be adjusted arbitrarily. .
Based on the modified triangle pattern formed by the plurality of openings 150, it can be seen that the extraction efficiency of the LED 100 can be improved by non-zero modulation parameters. Please refer to Figure 14. Based on the above description of the LED 100, when the modulation parameter Δa increases from zero to about 0.15a, the mathematical modeling of the electromagnetic fields in the LED 100 (numerical modeling) The extraction efficiency of the light-emitting device shown in) (to be described later) is increased from 0.60 to 0.70.
In Figure 14, the extraction efficiency is estimated by the three-dimensional finite-difference time-domain (FDTD) method to estimate the LED 100 under Maxwell's equations. The size of the inner light and outer light. For example: KSKunz and RJLuebbers, The Finite-Difference Time-Domain Methods (CRC, Boca Raton, FL, 1993), A. Taflove, Computational Electrodynamics: The Finite-Difference Time-Domain Method (Artech House, London, 1995) Etc. have been incorporated by reference in the present invention. In order to show the optical behaviour of the LED 100 with a specific pattern 150, the input parameters in the FDTD calculation include the center frequency (center frequency). frequency), the bandwidth of the light emitted by the point dipole radiation source in the light generating area 130, the dimensions and dielectric properties of each layer structure in the multi-layer stack 122, and The diameter, depth, and nearest neighbor distances (NND) (nearest neighbor distances (NND)) between the openings in the pattern 150.
In a specific embodiment, the extraction efficiency data used by the LED 100 is calculated using the FDTD method as shown below. The FDTD method is used to solve the full-vector time-dependent Maxwell's equations:<maths><img file="TW200529116A_D0001.tif" /></maths>Among them, through the polarizability (polarizability)<img file="TW200529116A_D0002.tif" />It can capture the frequency-dependent response of the quantum wells region of the light generating region 130, the p-contact layer 126, and other layer structures in the LED 100.<img file="TW200529116A_D0003.tif" />Items are values derived empirically based on the different contributions of various polarizability of materials (for example: polarization response for bound electron oscillations) , Used for the polarization response of free electron oscillations). especially,<maths><img file="TW200529116A_D0004.tif" /></maths>Among them, polarization (polarization) is equivalent to a dielectric constant (dielectric constant)<maths><img file="TW200529116A_D0005.tif" /></maths>
In order to facilitate the numerical calculation, only the encapsulant material layer 144, the silver layer 126, and the structure of each layer between the encapsulant material layer 144 and the silver layer 126 are considered here. Since this estimation assumes that the molding material layer 144 and the silver layer 126 have sufficient thickness, the optical performance of the LED 100 will not be affected by the surrounding layers. In the LED 100, the relevant structures such as the silver layer 126 and the light generating region 130 are assumed to have a frequency dependent dielectric constant, while other structures are not assumed to have a frequency dependent dielectric constant. It is worth noting that in some embodiments, the encapsulant material layer 144 and the silver layer 126 of the LED 100 include a plurality of additional metal layers (additional metal layers), wherein each additional metal layer has its corresponding The frequency-dependent dielectric constant. It is also worth noting that the silver layer 126 (and any other metal layer in the LED 100) has a frequency dependent term for bound electrons and free electrons. term), but the light-generating region 130 only has a frequency-dependent term for bound electrons, but does not have a frequency-dependent term for free electrons. In other embodiments, when performing the frequency-dependent model calculation of the dielectric constant, other examples include electron-phonon interactions, atomic polarizations, ionic polarizations, and / Or molecular polarizations (molecular polarizations) and other items can also be considered at the same time.
By combining several randomly-placed, constant-current (randomly-placed, constant-current) dipole sources in the light generating area 130, the quantum well area for the light generating area 130 can be completed. In the modeling process of the emitted light, each emitting short Gaussian pulse in the spectral width is equivalent to the short Gaussian pulse in the actual quantum well, and each emitting short Gaussian pulse The Gaussian pulse system has an arbitrary initial phase (random initial phase) and start-time (start-time).
In order to process the pattern formed by the openings 150 in the upper surface 110 of the LED 100, a larger supercell is used in the lateral direction, and the supercell is also matched The use of periodic boundary conditions. Under the action of the above method, in addition to assisting the simulation of the size of large (for example: edge (edge) greater than 0.01mm) devices, when the energy of all dipole sources is completely emitted, and until the system is completely absent At any time of energy, full evolution equations can still complete related calculations in time. During the simulation, the emission of total energy, the energy flux drawn through the upper surface 110, and the energy absorbed by the quantum well and the n-doped layer are all monitored. After Fourier's time (time) and space (space) conversion, in addition to the frequency and angle resolved data of the energy flow, the efficiency can be derived for the angle and frequency analysis ( angle-and frequency-resolved extraction efficiency) to perform calculations. By the cooperation of the total energy emitted by the light generating area 130 and the experimentally known luminescence of the light generating area 130, it can be used for a given electrical input (given electrical input). Absolute angle-resolved extraction of unit brightness (lumen/per) of input and solid angle of unit chip area (solid angle/per chip area).
It is believed that the extraction efficiency of the light generated by the light generating area 130 and emitted by the upper surface 110 of the LED 100 can be improved under the action of the detuned pattern 150 after modulation. The opening 150 can establish a dielectric function according to the pattern type, whereby the dielectric function can be spatially changed in the silicon doped (n-doped) gallium nitride layer 134. Based on the above knowledge, the actual results are not equivalent to the calculated results based on the theory. Furthermore, according to the above results, the radiation modes (that is, the light modes emitted by the upper surface 110) and the guided modes (that is, restricted The density of the light emitting mode in the multi-push stack 122). In addition, without the function of the pattern 150 and through the above-mentioned radiation mode and guiding mode change, part of the light in the LED 100 is incident on the LED 100 in a scattered manner (for example: Bragg scattered) In the guided mode, these scattering modes may also leak into the radiation mode. In a specific embodiment, the pattern 150 can eliminate all the guided modes in the LED 100.
It is believed that the effect of detuning of the lattice can be understood by the way of Bragg scattering off of crystals with point scattering sites. For the perfect lattice in the complex lattice planes separated by a distance d, the monochromatic light of wavelength λ is based on the Bragg condition n λ=2dsin θ, An angle θ is used for scattering, where n represents the order of scattering, where n is an integer. However, for a light source with a spectral width λ/λ and incident to Θ at a solid angle, the spacing between a and lattice sites is determined by the detuning parameter. ) Under the effect of modulation, the Prague conditions can become more relaxed. Therefore, under the action of the spectral width and the spatial emission profile, the modulation system of the lattice can improve the scattering effectiveness of the pattern. effectiveness), angle of acceptance (angular acceptance).
Based on the above description, in addition to the modified triangle pattern 150 with a non-zero detuning parameter a to increase the amount of light extracted by the LED 100, other patterns can also increase the amount of light emitted by the LED 100. The amount of light emitted. When deciding whether to use a given pattern to increase the amount of light extraction emitted by the LED 100 and/or which opening pattern can be used to increase the amount of light extraction emitted by the LED 100, perform relevant Before numerical calculation, a basic pattern must be estimated by means of physical insight, and the basic pattern can be used to increase the amount of light extracted by the LED 100.
In addition, since the dielectric function can be spatially changed according to the pattern 150, the extraction efficiency of the LED 100 can be understood by considering the Fourier transformation of the dielectric function. Figure 4 shows an explanation for the Fourier transform of an ideal triangular lattice. The extraction of light rays entering along the particular direction of the in-plane wavevector k is the same as entering all radiation modes along the in-plane wave vector k'(that is, parallel to the pattern 150) ( radiation modes) of the emission source (source emission) S<sub>k</sub>The in-plane wave vector k can be obtained by adding (addition) or subtracting (subtraction) the reciprocal lattice vector G to the in-plane wave vector k', that is, k =k'±G. The extraction efficiency is proportional to the relative dielectric function ε<sub>G</sub>The Fourier component (Fourier component) F<sub>k</sub>, The relationship is<maths><img file="TW200529116A_D0006.tif" /></maths>
In addition, the light propagation system in the material layer can satisfy the equation k<sup>2</sup>(In-plane)+k<sup>2</sup>(Normal)=ε(ω/c)<sup>2</sup>Wherein, the maximum value of the reciprocal lattice vector G obtained through actual consideration is fixed and limited by the frequency (ω) of the light emitted by the light generating region 130 and the dielectric constant of the light generating region 130. As shown in Figure 4, the ring system of the reciprocal space group is usually called the light line. Since the light generating area 130 has a finite bandwidth, the light energy level formed by it will be an annulus, and for ease of description, a monochromatic source is used here. The introduction of the light energy level. Similarly, the propagation of light in the molding material layer is limited by the light energy level (inner circle in Figure 4). Therefore, the dielectric function ε is increased<sub>G</sub>Fourier component F<sub>k</sub>At the same time, the extraction efficiency on the light energy level in the encapsulant material layer and in the direction of the wave vector k in each plane can be improved. Among them, the light energy level in the encapsulant material layer is equal to that in the encapsulant material layer. The increment of the inverted lattice vector G points (G points), the scattering strength (dielectric function) ε of the inverted lattice vector G points on the light energy level in the sealing material layer<sub>G</sub>The sum of increments. When the selected pattern can improve the extraction efficiency, the physical image can be used for estimation.
For example, Figure 16 shows the effect of adding an ideal triangular pattern to the lattice constant. It is worth noting that the data in Figure 16 is calculated by calculating the parameters given in Figure 12, but these parameters do not include: the emitted light with a peak wavelength of 450nm and the nearest neighboring distance "A" is the depth of the opening 150 at the ratio of 1.27a, 0.72a, 1.27a-40nm, the diameter of the opening 150, and the silicon doping (n-doping) nitriding of the adjacent opening 150 The thickness of the gallium layer 134. With the increase of the lattice constant, the number of the inverted lattice vector G points in the light energy level in the sealing material layer can also be increased at the same time, and can be easily derived by having the nearest neighbor distance (NND) Efficiency trends (trend). It is certain that when the nearest neighbor distance (NND) is similar to the wavelength of light in a vacuum, the maximum extraction efficiency is obtained at this nearest neighbor distance (NND). The reason is that: The uniformity is improved. When the nearest neighbor distance (NND) is much greater than the wavelength of the light, the scattering effect can be reduced.
For example, Figure 17 shows the effect of increasing the hole size or filling factor. The expression of the filling factor of the modified triangular pattern is (2 π/ 3)*(r/a)<sup>2</sup>, Where r is the radius of the opening. The data shown in Figure 17 is obtained by calculating the parameters used by the LED 100 in Figure 12, but these parameters do not include the value of the fill factor on the x-axis (a-axis) The diameter of the opening is changed. When the scattering intensity (ε<sub>G</sub>) In increments, the extraction efficiency increases with the fill factor. When the fill factor is ~48%, this particular system has the maximum value. In certain embodiments, the fill factor of the LED 100 is at least about 10% (for example: at least about 15%, at least about 20%) and/or at most about 90% (for example: at most about 80%) , Up to about 70%, up to about 60%).
From the modified triangle pattern proposed above, we can see the correlation between the positioning system of the openings in the pattern and the modulation parameters on each position of the ideal triangular lattice; in addition, the center of the pattern is maintained At each position of the ideal triangular pattern (ideal triangular pattern), this modified (detuned) triangular pattern can still be obtained by modifying the openings in the ideal triangular pattern. The embodiment in Figure 18 shows a modified (modulated) triangle pattern for this. In this embodiment, the increase in the amount of light extraction (enhancement), the method for corresponding numerical calculations, and the method for the light-emitting diode with the pattern of Figure 18 are discussed. The physical explanation for improving the elicitation efficiency is the same as the above method. In a specific embodiment, the openings in the correction (modulation) pattern can be displaced through the ideal position, and the openings at the ideal position have a change in diameter.
In other embodiments, different types of patterns are used to help increase the amount of light extracted by the light-emitting diode. These types of patterns include complex periodic patterns and nonperiodic patterns (complex periodic patterns and nonperiodic patterns) . In the complex periodic pattern, each unit cell has more than one feature, and the unit cell is repeated in a periodic fashion. For example, complex periodic patterns include honeycomb patterns, honeycomb base patterns, 2x2 base patterns, ring patterns, and Archimedes. Archimidean patterns. In the following embodiments, part of the openings in the complex periodic pattern may have a single diameter, while other openings may have a smaller diameter. In addition, the aperiodic pattern is a single unit without translational symmetry (translational symmetry). symmetry), wherein the length of the monomer is at least 50 times the peak wavelength generated by the light generating region 130. For example, aperiodic patterns include aperiodic patterns, quasicrystalline patterns, Robinson patterns, and Amman patterns.
Figure 19 shows the numerical calculation data of two different aperiodic patterns for the LED 100. Among them, some of the openings in the aperiodic pattern have a specific diameter, while in the aperiodic pattern The other openings can have a smaller diameter. The numerical calculation data in Figure 19 shows the behavior of the extraction efficiency (larger opening with a diameter of 80 nm) when the diameter of the opening dR is changed from 0 nm to 95 nm with a smaller diameter. The parameters used in the LED 100 in Figure 1 are calculated to obtain the data shown in Figure 6, but these parameters do not include the aperture diameter that changes according to the value of the fill factor on the x-axis in the graph. . In order not to be limited by theory, the effect of multiple hole sizes can allow scattering from multiple periodicities in the pattern, thereby increasing the acceptance angle and spectral effectiveness of the pattern ( spectral effectiveness). In this embodiment, with regard to the increase in the amount of light extraction, the method for relative numerical calculation, and the physical explanation of the improved extraction efficiency in the light-emitting diode with the pattern of Figure 19, etc. , Are the same as above.
Figure 20 shows the numerical calculation data for the LED 100, which includes different ring patterns (complex periodic patterns). The number of openings of the first ring surrounding the central hole is different (6, 8, or 10) from the number of openings of other different ring patterns. The data shown in Fig. 20 is obtained by calculating the parameters used by the LED 100 in Fig. 1, but these parameters do not include the emitted light having a peak wavelength of 450 nm. In Figure 9, the numerical calculation shows the extraction efficiency of the LED 100 when the number of ring patterns per unit cell is from 2 to 4, where the number of ring patterns passes through the cell in a repeated manner. In this embodiment, regarding the increase in the amount of light extraction, the method for relative numerical calculation, and the physical explanation of the improved extraction efficiency in the light-emitting diode with the pattern of Figure 20, etc. , Are the same as above.
Figure 21 shows the numerical calculation data of the LED 100 with Archimedean pattern A7. The Archimedes pattern A7 is composed of hexagonal uint cells 230 with 7 equally-spaced holes (equally-spaced holes), and the distance between them is the nearest neighbor distance (NND)a. In the hexagonal cell 230, the 6 openings are arranged in the shape of a regular hexagon, and the 7th opening is located at the center of the hexagon. Subsequently, the center-to-center spacing of these hexagonal cells 230 is a'=a*(1+<img file="TW200529116A_D0007.tif" />), and cooperate with each other along its edges to form all the pattern surfaces of the LED. This method is the familiar A7 tiling, which uses 7 holes to form a single body. Similarly, Archimidean tiling A19 is composed of 19 openings with the nearest adjacent distance (NND)a and the same interval, of which 6 openings are in the form of an inner hexagon Arranged, 12 openings are arranged in an outer hexagon, and a central opening is arranged in the inner hexagon. Subsequently, the center-to-center spacing of these hexagonal monomers 230 is a'=a*(3+<img file="TW200529116A_D0008.tif" />), and cooperate with each other along its edges to form all the pattern surfaces of the LED. In this embodiment, with regard to the increase in the amount of light extraction, the method used for relative numerical calculation, and the physical explanation of the improved extraction efficiency in the light-emitting diode with the pattern of Figure 21, etc. , Are the same as above. In Figure 10, the extraction efficiency of the A7 and A19 textures is about 77%, and the data shown in Figure 21 is obtained by calculating the parameters used by the LED 100 in Figure 12, except for these parameters Except for the emitted light with a peak wavelength of 450nm, these parameters also do not include individual monomers with openings defined by the nearest neighbor distance (NND).
Figure 22 shows the numerical calculation data of the LED 100 with a quasi-crystalline pattern. For example, in M. Senechal, Quasicrystals and Geometry (Cambridge University Press, Cambridge, England 1996), the related quasicrystal pattern technology is disclosed, which is also incorporated into the description here. Here we use numerical calculations to illustrate the performance of elicitation efficiency when the class of 8-fold based qusi-periodic structure changes. It is believed that due to high degree of in-plane rotational symmetries allowed by such structure), so that a very high extraction efficiency can be exhibited by the quasi-crystal pattern. In this embodiment, regarding the increase in the amount of light extraction, the method used for relative numerical calculation, and the physical explanation of the improved extraction efficiency in the light-emitting diode with the pattern of Figure 22, etc. , Are the same as above. According to the calculation data of the three-dimensional finite difference time domain (FDTD) method shown in Figure 22, the extraction efficiency achieved by the quasi-crystalline pattern structure is about 82%. According to the calculation of the parameters used by the LED 100 in Figure 12, the data shown in Figure 22 is obtained. In addition to the fact that these parameters do not include the emitted light with a peak wavelength of 450nm, these parameters are also Individual cells with openings defined by the nearest neighbor distance (NND) are not included.
Based on the various patterns proposed above, it can be known that any pattern that satisfies the basic principles proposed above can improve the extraction efficiency of the LED 100. It is certain that the extraction efficiency can be effectively improved by adding the quasi-crystal pattern structure or the detuning of the complex periodic pattern.
In some embodiments, the total amount of light emitted by the LED 100 and generated in the light generating area 130 is at least 45% (for example, at least about 50%, at least about 55%). , At least about 60%, at least about 70%, at least about 80%, at least about 90%, at least about 95%) will be emitted through the upper surface 110.
In some embodiments, the LED 100 can have a relatively large cross-sectional area, so that the LED 100 can still exhibit effective light extraction. For example, at least or more of the edges in the LED 100 may be at least about 1 millimeter (mm) (millimeter) (for example: at least about 1.5mm, at least about 2mm, at least about 2.5mm, at least About 3mm), and at least about 45% of the total light emitted by the LED 100 and generated in the light generating area 130 (for example: at least about 50%, at least about 55%, at least about 60% , At least about 70%, at least about 80%, at least about 90%, at least about 95%) will be emitted through the upper surface 110. In this way, the LED can have a relatively large cross-sectional area (for example, at least about 1.5 mm×at least about 1.5 mm), thereby exhibiting ideal power conversion efficiency.
In some embodiments, the extraction efficiency of the LED with the LED 100 design is substantially independent of the length of the edge of the LED. For example, compared to the extraction efficiency of LEDs with a design of LED 100 and at least one or more edges of about 0.25 mm, the extraction of LEDs with a design of LED 100 and at least one or more edges of about 1 mm In terms of efficiency, the difference between the two is less than 10% (for example, less than 8%, less than 5%, less than 3%). The extraction efficiency of an LED is the ratio between the light emitted by the LED and the intensity of the light generated by the light-emitting device (here, it can be measured by "energy" or "photons"). In this way, the LED can have a relatively large cross-sectional area (for example, at least about 1 mm x at least about 1 mm), thereby exhibiting ideal power conversion efficiency.
In some embodiments, the quantum efficiency of the LED with the LED 100 design is substantially independent of the length of the edge of the LED. For example, compared to the quantum efficiency of an LED with a design of LED 100 and at least one or more edges of approximately 0.25 mm, the quantum efficiency of an LED with a design of LED 100 and at least one or more edges of approximately 1 mm In terms of efficiency, the difference between the two is less than 10% (for example, less than 8%, less than 5%, less than 3%). The quantum efficiency of the LED proposed here is the ratio between the number of photons generated by the LED and the number of electron-hole recombinations in the LED. In this way, the LED can have a relatively large cross-sectional area (for example, at least about 1 mm x at least about 1 mm), thereby exhibiting good performance.
In some embodiments, the wall plug efficiency of the LED with the LED 100 design is substantially independent of the length of the edge of the LED. For example, compared to the electro-optical conversion efficiency of an LED with a design of LED 100 and at least one or more edges of about 0.25 mm, an LED with a design of LED 100 and at least one or more edges of about 1 mm In terms of electro-optical conversion efficiency, the difference between the two is less than 10% (for example, less than 8%, less than 5%, and less than 3%). The electro-optical conversion efficiency of the LED proposed here is: the injection efficiency of the LED (the ratio between the number of carriers injected into the light-emitting device and the number of recombined carriers in the light-generating region of the light-emitting device) , The radiative efficiency of the LED (the ratio between a radiative event caused by the recombination of the holes and the total number of the recombination of the holes), and the extraction efficiency of the LED (the result of the recombination of the LED) The product of the ratio between the number of photons and the total number of photons formed. In this way, the LED can have a relatively large cross-sectional area (for example, at least about 1 mm x at least about 1 mm), thereby exhibiting good performance.
In some embodiments, the angular distribution of the light emitted by the LED 100 can be cleverly controlled via the upper surface 110. In order to improve the extraction efficiency into a given solid angle (for example: into a solid angle surrounding the normal direction of the upper surface 110), the extraction efficiency can be based on the pattern 150 (as described above) Perform the Fourier transform of the dielectric function of the spatial change to check. Figure 23 shows the Fourier transformation construction of two ideal triangular lattices with different lattice constants. In order to improve the extraction efficiency, the number of reciprocal lattice vector G points in the encapsulant light line and the scattering of the reciprocal lattice vector G points in the material light line are added here. Strength (ε<sub>G</sub>), this method implies that by increasing the nearest neighbor distance (NND), the effect as proposed in Figure 16 can be achieved. However, special attention is paid to the increase in the extraction efficiency when entering the solid angle, which is centered on the normal direction of the upper surface 110. Therefore, when it is hoped that the introduction of the inverted lattice vector G point can be restricted by reducing the radius of the light energy level of the encapsulant at the same time, the magnitude of the inverted lattice vector G will be greater than (ω(n<sub>e</sub>))/c, that is, G>(ω(n<sub>e</sub>))/c. It can be seen that by reducing the refractive index of the encapsulant (the bare minimum is to remove all encapsulants together), a larger nearest neighbor distance (NND) can be obtained, thus increasing The number of inverted lattice vector G points in the light energy level of the material, and the light energy level of the material can be caused in the normal direction (F<sub><i>k</i></sub>=0), while avoiding the higher order (oblique angles) of diffraction (diffraction) in the sealant. Figure 24 shows the trend of the above description and the extraction efficiency into the solid angle (given by the collection half-angle in the figure). The data shown in Figure 24 is obtained by calculating the parameters used by the LED 100 in Figure 12, but these parameters do not include: the emitted light with a peak wavelength of 530nm and the bandwidth of 34nm, The refractive index of the encapsulant is 1.0, the thickness of the p-doped material layer is 160nm, the thickness of the light-generating layer is 30nm, as shown in Figure 24, the nearest neighbor distance (NND) to the three curves (a), and the depth at 1.27a, 0.72a, 1.27a+40nm, the hole diameter and the thickness of the n-doped material layer in proportion to "a". When the lattice constant increases, then at a narrow angle (narrow The extraction efficiency of angles) and the total extraction efficiency of entering all angles can be increased. However, in terms of a larger lattice constant, even if the total extraction efficiency into all angles is increased, the higher order mode formed by diffraction in the encapsulant will limit the extraction efficiency of the narrow angle. From the calculation result of the lattice constant of 460nm, it can be seen that the extraction efficiency of the half-angle into the collection is greater than 25%. In other words, only approximately half of the extracted light in the upper hemisphere is collected at approximately 13.4% of the solid angle, thereby showing the collimation effect of the pattern. It is certain that any increase in the number of inverted lattice vector G points in the light energy level of the material, but limited to the inverted lattice vector G point in the encapsulant light energy level when the in-plane wave vector k=0 In terms of the number of patterns, these patterns can improve the extraction efficiency into the solid angle, where the solid angle is centered and aligned with the normal direction of the upper surface 110.
It's worth noting that the above method is particularly effective in reducing the source etendue. This source etendue is usually proportional to n<sup>2</sup>, Where n represents the refractive index of the surrounding material (for example, molding compound). Therefore, by reducing the refractive index of the encapsulant material layer in the LED 100, this will result in more collimated emission, less source sound range and higher surface brightness ( surface brightness) (here it is defined as the total brightness introduced into the source sound range). In some embodiments, the sealing compound formed by air can reduce the source sound range, but thus increases the normal direction of the upper surface 110 that enters at a given collection angle and is centered.
In some embodiments, when the light generated by the light generating area 130 is emitted from the LED 100 through the upper surface 110, the parallelism of the light distribution is better than the Lambertian distribution. For example, when the light generated by the light generating area 130 is emitted from the LED 100 through the upper surface 110, of the light emitted from the surface of the dielectric layer, it is at least about 40% (for example: at least about 50%, at least about 70%, at least about 90%) is emitted within a range of at most about 30° (for example: at most about 25°, at most about 20°, at most about 15°), and this angle is Orthogonal to the upper surface 110.
It can be seen that, in terms of the ability to draw out a high proportion of light at a specified angle (desired angle), or the ability to draw a relatively high amount of light at the same time, the ability to produce a relatively high density LEDs, so as to provide use as a given wafer (given wafer). For example, there are at least 5 LEDs (for example, at least 25 LEDs and at least 50 LEDs) per square centimeter (per square centimeter) wafer.
In addition, with respect to the wavelength of the light generated by the light generating area 130, in some embodiments, the wavelength of the light emitted by the packaged LED 100 can be corrected. In the example shown in FIG. 25, an LED 300 has a layer containing a phosphor material 180. The layer containing a phosphor material 180 is disposed on the upper surface 110. The phosphorous material can interact with light The light having a predetermined wavelength generated by the generating area 130 interacts with each other, so as to generate the required specified wavelength. In some embodiments, the light emitted by the packaged LED 100 may be white light in nature. In addition, in a specific embodiment, the phosphorous material in the phosphorous material layer 180 may be (Y, Gd) (Al, Ga) G: Ce<sup>3+</sup>Or yttrium aluminum garnet phosphor ("YAG" (yttrium, aluminum, garent)). When excited by the blue light emitted by the light generating area 130, the phosphorous material in the phosphorous material layer 180 can be activated, and at the same time, the phosphorous material system can emit a broad spectrum, centered alignment Light at yellow wavelengths (e.g. isotropic). Through the viewer of the total light spectrum emitted by the packaged LED 100, it can be seen that the yellow phosphor broad emission spectrum, the blue InGaN narrow emission spectrum, and the blue InGaN narrow emission spectrum can be seen. spectrum), which is usually a mixture of two spectra and perceive white.
In some embodiments, the phosphorous material layer 180 can be substantially uniformly disposed on the upper surface 110. For example, the distance between the top 151 of the pattern 150 and the top 181 of the phosphorous material layer 180 can pass through the upper surface 110 and is slightly less than 20% (for example, slightly less than 10%, slightly less than 5%, slightly less than 2%).
Compared with the cross-sectional size of the surface 110 of the LED 100, the phosphorous material layer 180 generally has a smaller thickness, and its size is about 1 mm×1 mm. In addition, the phosphorous material layer 180 is substantially uniformly deposited on the surface 110, and the phosphorous material in the phosphorous material layer 180 can be substantially uniformly pumped by the light emitted from the surface 110. Compared with the cross-sectional size of the surface 110 of the LED 100, it can be seen that since the thickness of the phosphorous material layer 180 is relatively thin, the light emitted by the light generating area 130 can be almost uniform on the entire surface 110 of the LED 100 It is converted into lower wavelength light in the phosphorous material layer 180 by means of ground. Therefore, with the relatively thin and uniform phosphorous material layer 180, white light with a uniform spectrum can be emitted through the LED 100 as a function of the position on the surface 110.
Generally speaking, the LED 100 series can be manufactured according to different requirements. The fabrication of the LED 100 usually includes various steps such as deposition, laser processing, lithography, and etching.
Taking Figure 26 as an example, an LED wafer 500 is shown. The LED wafer 500 includes an LED layer stack of material. The LED layer stack of material is deposited on a substrate. (substrate) (for example: made of sapphire, compound semiconductor, zinc oxide, silicon carbide, silicon) 502, this wafer has been commercially available use. For example, suppliers include Epistar Corporation, Arima Optoelectronics Corporation and South Epitaxy Corporation. A buffer layer 504 (e.g., GaN layer, AlN layer, AlGaN layer, n-doped layer) is sequentially arranged on the substrate 502. Semiconductor layer (n-doped semiconductor layer) 506 (for example: n-doped Si: GaN layer), current spreading layer (current spreading layer) 508 (e.g., AlGaN/GaN heterojunction or superlattcie), a light-emitting region 510 (e.g., indium nitride) Gallium/GaN multi-quantum well region (InGaN/GaN multi-quantum well region), a semiconductor layer 512 (for example: p-doped Mg: GaN layer) )). Generally speaking, the diameter of the LED wafer 500 is at least about 2 inches (for example: from about 2 inches to about 12 inches, from about 2 inches to about 6 inches, from about 2 inches to about 4 inches, from about 2 inches). To about 3 inches).
Figure 27 shows a multi-layer stack 550, which includes multiple layer structures 502, 504, 506, 508, 510, 512 and 520, 522, 524, 526. Generally speaking, the materials of these layer structures 502, 504, 506, 508, 510, 512, 520, 522, 524, and 526 can be combined by press and/or heating as described below. For example, the layer structure 520 may be a nickel layer (e.g., electron-beam evaporation), and the layer structure 522 may be a silver layer (e.g., electron-beam evaporation), The layer structure 524 may be a nickel layer (for example, electron beam evaporation), and the layer structure 526 may be a gold layer (for example, electron beam evaporation). In some embodiments, the layer structure 520 may be a relatively thin layer structure, and the layer structure 524 may be a relatively thick layer structure. The layer structure 524 can be used as a diffusion barrier layer (diffusion barrier), so as to reduce the diffusion of contaminants (such as gold) into the layer structure 520, 522 and/or itself 524. After the deposition of the layer structures 520, 522, 524, and 526 is completed, the multiple stacked layers 550 can be processed to achieve ohmic contact. For example, the multiple stacking layer 550 can be annealed in a suitable nitrogen environment (for example: nitrogen, oxygen, air or forming gas) for a predetermined time (for example, about 30 to 300 seconds) (For example, the temperature is between 400-600°C (Celsius)), so that ohmic contact is achieved.
Figure 28 shows a multi-push stack 600, including a submount (for example: germanium (for example: polycrystalline germanium), silicon (for example: polycrystalline silicon) silicon)), silicon-carbide, copper, copper-tungsten, diamond, nickel-cobalt) 602, the carrier 602 is composed of a layer structure 604 , 606, 608, 610. For example, the carrier 602 can be formed by sputtering or electroforming. The layer structure 604 is a contact, which is made of aluminum (for example, electron beam evaporation). The layer structure 606 is a diffusion barrier layer, which is made of nickel (for example, electron beam evaporation) . The layer structure 608 is a gold layer (for example, formed by electron beam evaporation). The layer structure 610 can be a AuSn bonding layer (AuSn bonding layer). The layer 610 is deposited (for example, using electron beam evaporation) on the gold layer 608. After the deposition of the layer structures 604, 606, 608, and 610 is completed, the multi-push stack 600 can be processed to achieve ohmic contact. For example, the multiple stacking layer 600 can be annealed (e.g. at a temperature of about Between 350-500°C), so as to achieve ohmic contact.
Figure 29 shows a multi-layer stack 650, which includes mutually bonded layer structures 526, 610 (for example: solder bond, eutectic bond), peritectic bond ) Method formed). For example, the layer structures 526 and 610 can be combined with each other by thermal-mechanical pressing. For example, the multiple stacked layers 650 can be combined by pressing and hot pressing (for example, the pressure is at most about 5 MPa and at most about 2 MPa) (for example, the temperature is between about 200-400° C.). Subsequently, the multi-push stack 650 is removed from the press and cooled (for example, at room temperature).
Subsequently, part of the substrate 502 and the buffer layer 504 are partially removed from the multi-push laminate 650, and the removal can be achieved by any method. For example, in the embodiment shown in FIG. 30, when exposure is performed under electromagnetic radiation and an appropriate wavelength, this can be used for multiple stacking layers 650 (for example, through the surface 501 of the substrate 502) The substrate 502 is removed, and the buffer layer 504 is partially decomposed. It is believed that under the action of the above method, the local heating of the buffer layer 504 will be caused, and the buffer layer 504 at the position adjacent to the interface between the buffer layer 504 and the substrate 502 will be locally decomposed. The substrate 502 on the multi-push laminate 650 is removed (as described below). Taking the buffer layer 504 made of a gallium nitride layer as an example, it can be confirmed that the constituent includes gallium and gaseous nitrogen. In some embodiments, when the surface 501 of the substrate 502 is exposed to electromagnetic radiation, the multiple stacking layer 650 can be heated. In addition, the multi-push stack 650 can also be placed on a hot plate and/or use another laser source (for example: CO<sub>2</sub>Laser CO<sub>2</sub>(CO<sub>2</sub> laser)) for heating. For example, when the surface 501 of the substrate 502 is exposed to electromagnetic radiation and the multiple stacking layer 650 is heated, in addition to reducing (for example, preventing) the curing of liquid gallium (liquid gallium), the gallium During the re-solidification process, the strain in the multi-push laminate 650 can be reduced.
In a specific embodiment, after the electromagnetic radiation exposure process is completed, the substrate 502 can be incorporated into the multi-layer stack 650 by residual gallium. In some embodiments, the multi-push stack 650 can be heated to above the melting temperature of gallium, so that the substrate 502 can be removed. In a specific embodiment, the multiple push-up layer 650 can be exposed to an etchant (such as a chemical etchant of HCI), so that the residual gallium can be etched and the substrate 502 can be removed. remove. In addition, any other method that can remove residual gallium can be used.
In a specific embodiment, the surface 501 of the substrate 502 is exposed to laser radiation having an absorption wavelength of the laser 504 (eg, about 248 nanometers, about 355 nanometers). For example, US Patent Nos. 6,420,242 and 6,071,795 respectively disclose related laser radiation processes, which are also incorporated herein for description. Subsequently, when the multi-push laminate 650 is heated above the melting point temperature of gallium, the substrate 502 and the buffer layer 504 in the multi-push laminate 650 can be removed by lateral force ( For example: using cotton swab (cotton swab)).
In some embodiments, multiple portions of the surface 501 of the substrate 502 are simultaneously exposed to electromagnetic radiation. In a specific embodiment, the plural parts of the surface 501 of the substrate 502 are sequentially exposed to electromagnetic radiation. The plural parts of the surface 501 of the substrate 502 can also be exposed to electromagnetic radiation in a simultaneous and sequential manner. In addition, electromagnetic radiation can also adopt patterns (for example: serpentine patterns, circular patterns, spiral patterns, grids, gratings, triangles). Patterns (triangular patterns), (elementary patterns), arbitrary patterns (random patterns), complex patterns (complex patterns), periodic patterns (periodic patterns), non-periodic patterns (nonperiodic patterns) methods are used for the surface 501 of the substrate 502 Make an exposure. In some embodiments, electromagnetic radiation may also pass through one or more parts of the surface 501 in a grid manner. In a specific embodiment, the surface 501 is exposed to multiple overlapping areas of electromagnetic radiation (overlapping fields).
In some embodiments, before exposing the surface 501 of the substrate 502 to electromagnetic radiation, it further includes a mask that allows the electromagnetic radiation to pass through. For example, before the electromagnetic radiation reaches the surface 501 of the substrate 502, the electromagnetic radiation can pass through an optical system, a photomask (e.g., molybdenum mask, beryllium copper mask ( The high thermal conductivity mask (copper-beryllium mask)) is designed in this optical system. In some embodiments, the photomask is an aperture (for example, used for truncating or shaping the electron beam). For example, the optical system includes at least two lenses, and the mask is disposed between the two lenses. In another example, the photomask can be formed by a pattern of a material on the surface 501, and a specific part of the surface 501 is exposed and a part of the surface 501 is not exposed by the photomask. For example, the photomask is formed by a lithography process. In some embodiments, the electromagnetic radiation passes through one or more parts of the mask in a rasterized manner.
In order not to wish to be limited by theory, by reducing at least one size of a given area in the surface 501 exposed to electromagnetic radiation, it can limit the access to the buffer layer 504 and the layer structure of the multi-push stack 650 The propagation of cracks in the 506 or other layer structures can be restricted, but it can still allow the cracks on the interface between the substrate 502 and the buffer layer 504 to propagate. It can be confirmed that if the size of the electromagnetic radiation feature on the surface 501 is too large, gaseous bubbles (for example: nitrogen bubbles) will be formed, and localized will be generated under the action of the bubbles. The phenomenon of localized pressure and improper cracks occurs. For example, in some embodiments, spot and line cracks are formed on the surface 501 exposed under laser radiation. The maximum size of the spot or line crack may be about 1 Millimeters (for example: at most about 500 microns (microns), at most about 100 microns, at most about 25 microns, at most about 10 microns). In some embodiments, the size of the dots can be approximately from 5 microns to 1 mm (for example, approximately from 5 microns to 100 microns, approximately from 5 microns to 25 microns, approximately from 5 microns to 10 microns).
In a specific embodiment, when the surface 501 of the substrate 502 is exposed to electromagnetic radiation, the multiple stacked layers 650 will vibrate. In order not to wish to be limited by theory, when the surface 501 of the substrate 502 is exposed to electromagnetic radiation, the multiple push-up layer 650 of vibration will cause cracks to propagate along the interface between the substrate 502 and the buffer layer 504 The increase in phenomena. Generally speaking, the selection of conditions can limit the propagation of cracks entering the buffer layer 504 (for example, there will be no cracks entering the buffer layer 504, the layer structure 506, and the multi-ply stack 650 substantially. Other layer structure).
After the substrate 502 is removed, a portion of the buffer layer 504 will remain on a portion of the surface of the layer structure 506. In addition, the remaining part of the substrate 502 (for example, containing aluminum and/or oxygen) may also appear on the remaining part of the buffer layer 504 and/or the surface of the layer structure 506. As for the electrical contact to be formed later, since the layer structure 506 (generally formed of n-doped semiconductor material) has quite good electrical properties (for example, the required contact Electrical resistance is generally to completely remove the remaining part of the buffer layer 504 and any remaining part of the substrate 502, so that the surface of the layer structure 506 can be exposed, and the exposed surface of the n-doped semiconductor layer 506 Perform cleaning. In addition, the method for removing any residual part and/or the residual part of the buffer layer 504, and the cleaning method for the surface of the layer structure 506 (for example: removing organics and/or particles impurity) ), it is achieved by one or several steps. These manufacturing processes can be completed using various technologies and/or combinations thereof. For example, chemical-mechanical polishing process (chemical-mechanical polishing process, mechanical polishing, reactive-ion etching (for example, essentially using chemical components), physical physical and wet etching. For example, in Ghandhi, S., VLSI Fabrication Principles: Silicon & Gallium Arsenide (1994), the related technology is disclosed, which is also included in the related description. In certain embodiments, the buffer layer 504 is not completely removed. Instead, the method is to remove only a part of the buffer layer 504 at the positions corresponding to the electrical leads formed subsequently (for example, :Using self-aligned process (self-aligned process)).
Generally, after the substrate 502 is removed, the amount of strain in the multiple stacking layer 650 (for example, due to the mismatch and/or thermal mismatch in the multiple stacking layer 650) It can be changed. For example, if the amount of strain in the multiple stacking layer 650 decreases, the peak output wavelength will change (for example, increase) accordingly. In another example, if the amount of strain in the multiple stacking layer 650 increases, the peak output wavelength will change (for example, decrease) accordingly.
In order to avoid improper cracks during the removal of the substrate 502, the thermal expansion coefficient of the substrate 502, the thermal expansion coefficient of the carrier 602, the combined thickness of the multiple layer structures 502/504/506/508/510/512, and/or The coefficient of thermal expansion of one or several of the multiple layer structures 502/504/506/508/510/512 must be properly considered. For example, under appropriate selection of the substrate 502 and the carrier 602, the thermal expansion coefficient of the carrier 602 in some embodiments is at least about 15% (at least about 10%, at least about 5%) It is smaller than the thermal expansion coefficient of the substrate 502. In addition, under appropriate selection of the substrate 502 and the carrier 602, the thickness of the substrate 502 in a specific embodiment is substantially greater than the thickness of the carrier 602. In another example, under appropriate selection of the semiconductor layers 504, 506, 508, 510, 512 and the carrier 602, the thermal expansion coefficient of the carrier 602 is at least about 15% (at least about 10%, at least About 5%) and smaller than the thermal expansion coefficient of one or more of the semiconductor layers 504, 506, 508, 510, 512.
Generally speaking, the thickness of the substrate 502 and the carrier 602 can be adjusted according to actual requirements. In some embodiments, the thickness of the substrate 502 is at most about 5 mm (for example, at most about 3 mm, at most about 1 mm, at most about 0.5 mm). In some embodiments, the thickness of the carrier 602 is at most about 10 mm (for example, at most about 5 mm, at most about 1 mm, and at most about 0.5 mm). In some embodiments, the thickness of the carrier 602 is greater than the thickness of the base 502; in certain embodiments, the thickness of the base 502 is greater than the thickness of the carrier 602.
After the removal of the buffer layer 504 and the exposure/cleaning of the surface of the layer structure 506 are completed, the thickness of the layer structure 506 can be reduced to the desired final thickness of the light-emitting device. . For example, the thickness of the layer structure 506 can be reduced only by a mechanical etching process (mechanical etching process) or simultaneously with an etching process. In some embodiments, after the etching/cleaning of the exposed surface of the layer structure 506 is completed, the surface of the layer structure 506 has a relatively high degree of flatness (for example, with a lithography mark). Relatively high flatness can be used at the ratio of reticle). For example, after the etching/cleaning of the exposed surface of the layer structure 506 is completed, the surface of the layer structure 506 in some embodiments has a flatness of at most about 10 microns per 6.25 square centimeters (for example: Every 6.25 square centimeters, up to about 5 microns, and every 6.25 square centimeters, up to about 1 micron). For another example, after the etching/cleaning of the exposed surface of the layer structure 506 is completed, the surface of the layer structure 506 in a specific embodiment has a flatness of at most about 10 microns per square centimeter (for example: per square centimeter). Cm, up to about 5 microns, and per square centimeter, up to about 1 micron). In a specific embodiment, after the etching/cleaning of the exposed surface of the layer structure 506 is completed, the surface of the layer structure 506 has a root mean square roughness (RMS roughness) of at most about 50 nanometers (for example: at most about 25 nanometers). Meters, up to about 10 nanometers, up to about 5 nanometers, and up to about 1 nanometers).
Before the dielectric function (which is spatially changed according to the pattern of the surface of the layer structure 506) is formed, the layer structure 506 in some embodiments has a relatively rough and/or insufficiently flat exposed surface. Nanolithography is used to form a pattern with considerable accuracy and/or reproducibility. In order to form a relatively accurate and/or highly reproducible pattern on the surface of the layer structure 506, the nanolithography process may include: depositing a planarization layer on the surface of the layer structure 506 , A lithography layer is deposited on the surface of the planarization layer. Taking the example shown in FIG. 31 as an example, a planarization layer 702 is deposited and formed on the surface of the layer structure 506, and a lithographic layer 704 is deposited and formed on the planarization layer 702. After the etching/cleaning of the layer structure 506 is completed, the exposed surface 505 of the layer structure 506 is relatively rough (for example, a root mean square roughness of about 10 or at most 10 nm). In some embodiments, the planarization layer 702 is formed by sequentially depositing a plurality of layers (for example, the same material).
For example, the planarization layer 702 may be selected from polymers including DUV-30J proposed by Brewer Sciences, anti-reflection coatings, high viscosity formable polymers polymers)). The lithographic layer 704 can be selected from UV-curable polymers (for example, the low-viscosity MonoMat provided by Molecular Imprints, Inc.).<sup>TM</sup>(low viscosity MonoMat<sup>TM</sup>)). The planarization layer 702 and the lithographic layer 704 can be formed according to any specified technique, such as spin-coating, vapor deposition and other similar methods.
For example, the thickness of the planarization layer 702 is at least about 100 nanometers (e.g., at least about 500 nanometers) and/or at most about 5 microns (e.g., at most about 1 micron). The thickness of the lithographic layer 704 is The thickness is at least about 1 nanometer (e.g., at least about 10 nanometers) and/or at most about 1 micrometer (e.g., at most about 0.5 microns).
Subsequently, a mold is pressed into the lithography layer. This model is used to define a portion of the desired pattern (usually through a heating process, or ultraviolet light curing of the mold and/or layer structure 704). ), and stepwise (portion-by-portion) in the layer structure 704 (Figure 32) formed a plurality of recesses (indentions), these recesses are relative to the surface of the layer structure 506 formed pattern. In some embodiments, the entire wafer can be covered by a single step (for example, full wafer nanolithography techniques). Subsequently, the layer structure 704 is etched (for example, using reactive ion etching, wet etching), so that the surface of the planarization layer 702 relative to the depression of the layer structure 704 can be Expose the plural parts (Figure 33). For example, U.S. Patent No. 5,722,905, Zhang et al., Applied Physics Letters, Vol.83, No.8, pp.1632-34, etc. disclose the imprint/etch process (impirnt/etch processes), which are incorporated into this department for reference. Generally speaking, the n-contact pads in the subsequent process are deposited on some areas of the pattern of the lithographic layer 704. In another embodiment, other techniques (for example: x-ray lithography, deep ultraviolet lithography, extreme ultraviolet lithography, immersion lithography) ), interference lithography, electron beam lithography, photolithography, microcontact printing, and self-assembly techniques can be used for micro The production of shadow layer 704.
As shown in FIG. 34, the patterned lithography layer 704 is used as a mask, so that the pattern can be transferred to the planarization layer 702 (for example, dry etching, wet etching). An example of dry etching is reactive ion etching. Referring to FIG. 36, the layer structures 702 and 704 are used as photomasks in sequence, so that the pattern can be transferred to the surface of the layer structure 506 (for example, dry etching, wet etching). As shown in Fig. 36, the layer structures 702 and 704 can be removed under the effect of etching the layer structure 506 (for example: oxygen-based reactive-ion etching), wet solvent etching ( wet solvent etching)).
As shown in Figure 37, the process of some embodiments includes depositing a material 708 (for example: aluminum, nickel, titanium, tungsten, etc.) In the layer structure 702/704 (for example: among the etched parts of evaporation, on the surface of the layer structure 704. As shown in Figure 38, the layer structures 702 and 704 are then etched (for example: using reactive ion Etching, wet etching), and leaving the etching stop material 708 on the surface of the layer structure 506, whereby a photomask is formed to etch the pattern on the surface of the layer structure 506 (Figure 39). Please refer to page 39 Figure 40, the etching stop material 708 can then be removed (for example, dry etching, wet etching).
In some embodiments, after the formation of the indents on the surface of the layer structure 704 is completed, an etching stop material (for example, Si-doped polymer) can be applied. 710 is arranged on the surface of the layer structure 704 (for example: spin coating) and in the plurality of recesses of the layer structure 704; subsequently, the etching stop material 710 is back-etched (for example, dry etching), so that the layer The surface of the structure 704 is exposed, but the etching stop material remains in the plurality of recesses of the layer structure 704 (FIG. 41). As shown in Fig. 42, part of the layer structure 702, 704 is subsequently etched (for example: using reactive ion etching, dry etching, wet etching) to leave part of the layer structure 702, 704 behind the etching stop material 708, A mask formed by this can etch the pattern on the surface of the layer structure 506 (FIG. 43). Please refer to FIG. 34, and then the remaining part of the layer structure 702/704 and the etching stop material 708 can be removed (for example, using reactive ion etching, dry etching, wet etching). In some embodiments, the etching stop material 708 can also be removed by a plasma process (for example, a fluorine plasma process).
After the pattern is completely transferred to the n-doped semiconductor layer 506, a layer of phosphor material is selectively disposed (for example, spin-coated) on the pattern surface of the n-doped semiconductor layer 506 Above. In some embodiments, the phosphorous material can be coated on the surface of the pattern in a fairly uniform manner (in the surface of the pattern, the coating layer along the bottom/side wall of the opening is substantially free of voids. (the existence of voids)). On the other hand, the encapsulant material can be disposed on the surface of the patterned n-doped semiconductor layer 506 (for example, chemical vapor deposition (CVD), sputtering), liquid bonding by subsequent evaporation Suspension formed by liquid binder). In some embodiments, the molding material may include one or more phosphorous materials. In some embodiments, the phosphorous material can have a uniform thickness by pressing, and its thickness under pressure is about 20%, 15%, 10%, 5%, or 2% less than the average thickness. . In some embodiments, the phosphorus-containing encapsulant material can be coated on the patterned surface in a fairly consistent manner.
After the dielectric function has been established on the n-doped semiconductor layer 506, the individual LED die of the wafer can be cut. After the wafer manufacturing process and wafer testing are completed, the separated individual LED dies can be packaged and tested. In the wafer dicing process, the sidewall passivation step and/or the pre-separation deep mesa etching step can reduce the electrical charge for the patterned LED and/or the pre-separation deep mesa etching step. Or the potential damage that may be caused by the nature of light. Individual LEDs can be made into any size according to the size of the wafer, but generally they use a square or rectangular structure with a side length of about 0.5mm~5mm. When making LED dies, standard photolithography is used to define the positions of multiple contact pads on the wafer. These contact pads are used to energize the device, and the ohmic contact system uses evaporation Method (for example: electron beam evaporation) and formed on a predetermined position.
As shown in some of the embodiments shown in Figure 45A, one contact layout of an LED 1802 includes two conductive pad structures (conductive pads) 1804a, 1804b and a conductive bar structure (or finger) (conductive bars (or fingers)). fingers)) 1806, wherein the conductive rod structure 1806 extends toward the central area of the LED 1802 from the conductive pad structures 1804a, 1804b. Wire bonds (not shown) connected between the conductive pad structures 1804a and 1804b are used to provide current and voltage to the LED 1802. The current from the conductive pad structures 1804a and 1804b is spread to the top surface 1808 of the LED 1802 via the conductive rod structure 1806. Under the action of the conductive rod structure 1806, although the current can sufficiently diffuse to the top surface 1808 of the LED 1802, it will limit the number of the top surface 1808 covered by the contact pads (contacts).
FIG. 45B shows a top view of an LED 1802 including conductive pad structures 1804a, 1804b and conductive rod structure 1806. In some embodiments, the width of the conductive pad structure 1804a, 1804b may be greater than the width of the conductive rod structure 1806. Under the action of the conductive pad structures 1804a, 1804b with larger widths, the conductive pad structures 1804a, 1804b can be used as power busses, and a relatively large amount of power can be transferred through The port structure diffuses to the conductive rod structure 1806. The width of the conductive pad structures 1804a, 1804b and the conductive rod structure 1806 can be relative to the size of the LED 1802 and/or the width of the conductive pad structures 1804a, 1804b and the conductive rod structure 1806 can be based on lithography technology and processing parameters, etc. Factors are determined.
For example, the size of a side of an LED can be approximately between 0.5 mm and 1 cm. According to the above description, the width to depth ratio of LED 1802 can also be changed. For example, the width of the conductive pad structures 1804a and 1804b may be approximately 50 um to 500 um, and the width of the conductive rod structure 1806 may be approximately 1 um to 50 um. For another example, the widths of the conductive pad structures 1804a, 1804b and the conductive rod structure 1806 can be determined according to the current and power delivered to the LED, or the widths of the conductive pad structures 1804a, 1804b and the conductive rod structure 1806 can be determined according to deposition and Factors such as process parameters are determined. For example, the height of the conductive pad structures 1804a, 1804b and the conductive rod structure 1806 can be approximately 0.1um to 10um.
Generally speaking, the length and shape of the conductive rod structure 1806 can be changed according to requirements. As shown in FIG. 45B, the conductive rod structure 1806 may be rectangular, and the conductive rod structure 1806 is extended toward a central area of the LED 1802 from the conductive pad structures 1804a and 1804b. On the other hand, the conductive rod structure 1806 can have different shapes, such as a square, a triangle, or a trapezoid.
Figures 46A-46C show another embodiment of a contact structure, in which multiple bars 1812 extend through the entire length of the LED 1810, thereby connecting the conductive pad structure 1804a to Conductive pad structure 1804b. The multi-rod structure 1812 has an associated resistance (resistivity) r<sub>m</sub>, Thickness (thickness) t<sub>b</sub>And length (length) l. As shown in Figure 46C, based on the conductive pad structures 1804a, 1804b and the multi-rod structure 1812, by simplifying the structure into an equivalent circuit model, the current distribution characteristics of the LED 1810 can be improved. (current distribution properties) to estimate.
The width to depth ratio of the LED 1810 will affect the current dissipation of the system. According to the following equation, the width to depth ratio '1' of LED 1810 can be calculated:<maths><img file="TW200529116A_D0009.tif" /></maths>
A represents the surface area of the crystal grain (for example: length x width), and a and b represent the width to depth ratio of the crystal grain. Take a crystal grain with a width-to-depth ratio of 16x9 as an example, where a=16 and b=9.
According to the above description, in order to allow the light generated by the LED to pass through this surface, the multi-rod structure 1812 cannot cover the entire surface of the LED 1810. Since the contact pad only covers part of the surface of the LED 1810, the contact resistance can be determined by the surface coverage ratio.<i>f</i>The divided, related equations are as follows:<i>ρ</i><sub><i>n</i>-<i>c</i></sub> → <i>ρ</i><sub><i>n</i>-<i>c</i></sub>/<i>f</i>
The current density through the junction can be estimated according to the following equation:<maths><img file="TW200529116A_D0010.tif" /></maths><i>J</i><sub><i>0</i></sub>Represents the junction saturation current,<i>T</i>Represents absolute temperature. In the estimation method of the above formula, the contribution of the n-type material in the lateral current spreading is ignored. However, since the conductivity of the contact pad is much greater than that of the n-type material, the current spreading generally mainly occurs in the metal contact. For example, the ratio of the conductivity of the contact pad to the conductivity of the n-type material is approximately in the range of 100-500.
In a similar system (but with infinite separation between the contact pads), if the relevant calculation is a forward bias (for example:<i>V</i><sub><i>j</i></sub>>><i>kT</i>/<i>e</i>) And if the voltage drop through the series resistance is much greater than kT/e (for example:<img file="TW200529116A_D0011.tif" />>><i>kT</i>/<i>e</i>), the linear approximation of the current density distribution can be estimated according to the following equation:<maths><img file="TW200529116A_D0012.tif" /></maths>
<i>J</i><sub>1</sub>Represents the current density under the pad structure (beneath a pad), x represents a distance from the pad structure,<i>L</i><sub><i>s</i></sub>Represents the current spreading length. Current dispersion length<i>L</i><sub><i>s</i></sub>It can be expressed as the following equation:<maths><img file="TW200529116A_D0013.tif" /></maths>
The above estimation method assumes an infinite separation between the two pad structures. However, since a linear approximation has non-infinite separation, the solutions of individual pad structures can be added together. In the above procedure, an error occurs near the die center of the cushion structure, but this error does not cause physical trends.
The minimum current density may appear in the center of the electronic device (<i>x</i>=<i>L/</i>2), and the minimum current density can be estimated according to the following equation:<maths><img file="TW200529116A_D0014.tif" /></maths>
The uniformity factor can be estimated according to the following equation:<maths><img file="TW200529116A_D0015.tif" /></maths>
For the crystal grains with the same surface area, when the surface with the width-to-depth ratio a, b and the contact bars along the small side, the shape changes from a square to a rectangle , The minimum current density can be increased, and the uniformity factor can be corrected according to the following equation:<maths><img file="TW200529116A_D0016.tif" /></maths>
Therefore, the estimation method of uniformity increase factor can be expressed as the following equation:<maths><img file="TW200529116A_D0017.tif" /></maths>
For example, for a square example (for example: a=b), the uniformity increase factor'S' has a minimum value of S=1. For the 16x9 rectangle example, the assumed value is as follows: ρ<sub>m</sub>=2.2.10<sup>-6</sup> Ω cm (gold), ρ<sub>pc</sub>=1.0.10<sup>-3</sup> Ω cm<sup>2</sup>, Ρ<sub>p</sub>=5.0 Ω cm, ρ<sub>nc</sub>=1.0.10<sup>-4</sup> Ω cm<sup>2</sup>, Ρ<sub>n</sub>=5.0.10<sup>-3</sup> Ω cm, n-contact surface coverage is 10%, p-/n-/metal thickness is 0.3μm/3.0μm/2μm (at a 10% convergence (at a 10% coverage) )). If the surface area of the crystal grain is A=25mm<sup>2</sup>Hour,<i>L</i><sub><i>s</i></sub>Equal to 1.4mm. In the square example<i>U</i>=0.325, and the case in the 16×9 rectangular example <i>U'</i>=0.5, or the uniformity increase factor is<i>S</i>=1.54, that is, the current uniformity (current uniformity) increased by 54%.
Therefore, without being limited by theory, it is confirmed that a better current spreading effect can be obtained by the rectangular LED. When there is an insulating layer 1820 (for example: the oxide layer in Figure 47A) at the bottom of part of the contact structure, the contact resistivity can be changed in a selective way or additionally The effect of current spreading can be increased by changing the contact resistance. As shown in FIGS. 47A and 47B, the insulating layer 1820 (shown in dashed lines) is included at the bottom of a part of the multi-rod structure 1812. The insulating layer 1820 located on the top of the multi-rod structure (for example, close to the conductive pad structure 1804) has a larger width, and the thickness of the insulating layer 1820 is smaller toward the center area of the die. Figure 47B shows an equivalent circuit diagram.
Generally speaking, the contact resistance is proportional to the contact area. For example, when the contact area decreases, the contact resistance increases. The relationship can be expressed by the following equation:<maths><img file="TW200529116A_D0018.tif" /></maths>
<i>W</i>Represents the repetition rate of a multi-bar structure (for example, the number of multi-bar structures per unit area). Due to the relationship of the bottom insulating layer 1820, the edge of the contact pad closest to the conductive pad structure 1804a, 1804b has a smaller contact area, and the contact area will increase with the distance between the edge of the contact pad and the conductive pad structure 1804a, 1804b. The distance increases increases. Due to the different contact areas, the positions close to the conductive pad structures 1804a and 1804b have a higher contact resistance, and the contact resistance decreases as it approaches the center of the LED. Different contact resistances can further cause the current to move, thereby reducing current crowding, increasing the uniformity of light emitted through the surface, and reducing performance degradation. The current spreading length can be estimated according to the following equation:<maths><img file="TW200529116A_D0019.tif" /></maths>
The junction current density along the die can be estimated according to the following equation:<maths><img file="TW200529116A_D0020.tif" /></maths>
At the center of the device (e.g. at<i>x</i>=<i>L/</i>2) The minimum current can be estimated according to the following equation:<maths><img file="TW200529116A_D0021.tif" /></maths>
The current uniformity factor of the structure shown in Figure 47B can be estimated according to the following equation:<maths><img file="TW200529116A_D0022.tif" /></maths>
According to the above description, the oxide layer 1820 can force the current to move toward the end of the contact pad (for example, toward the center area of the die), so as to increase the degree of current spreading. In addition, since the light generation at the bottom of the light absorbing contacts is reduced by the oxide layer 1820, the percentage of light emitted through the surface of the LED can be increased.
Figures 48A and 48B show another configuration of the conductive pad structure 1804a/1804b, the contact pad 1830, and the oxide layer 1820 (shown in dashed lines and located at the bottom of a part of the contact pad 1830), where the contact pad 1830 also has a tapered structure . Although the structure of the contact pad 1830 in FIG. 48A is linearly tapered, it is not intended to limit the present invention, and any other linear tapered may also be used. As shown in Figure 47A, linear tapering can keep the contact area of the multi-rod structure 1812 at a similar total contact area, and the contact width at the center of the die is approximately It is half the width of the multi-rod structure 1812 (FIG. 47A), and the contact width in the pad structure is three times larger than the width shown in FIG. 47A. The oxide layer can be tapered with a larger angle, so that the largest contact resistance is located above the crystal grains, and the smallest contact resistance is located in the center of the crystal grains. The contact resistance decreases toward the center of the die, and the contact resistance of the contact rod structure is reduced close to the contact resistance of the pad structure. The tapering of the contact pad and the insulating layer forces the current to flow toward the center of the die. Local spreading length length) can be estimated by the following equation:<maths><img file="TW200529116A_D0023.tif" /></maths>
Regarding the integration formulas for the current distributions proposed above, it can also be estimated for the current distributions in Figures 48A and 48B.
FIG. 49A shows a top view of an LED, and FIGS. 49B and 49C show cross-sectional views of another contact structure 1801, respectively. The plurality of conductive contacts 1836 extend toward the center of the die, but these conductive contact pads 1836 do not cover the top surface of the LED between the conductive pad structures 1804a and 1804b in a continuous manner. An insulating layer 1834 is located in an interior portion of the contact pad between the top surface of the LED and the conductive contact pad 1836. Both the conductive contact pad 1836 and the insulating layer 1834 have a tapered structure. The arrow 1837 represents the current spreading into the surface of the die via the conductive contact pad 1836.
Figure 50 shows a graph 1850 of estimated normalized junction current density. This graph 1850 is the conductive pad structure 1804a/1804b of various contact pads, and the die configuration based on the above equation A function of the normalized distance between (die configuration). Line 1856 represents the current density of a square die with rectangular bars and no oxide, and line 1858 represents a rectangular die with rectangular bars and no oxide. The current density of the crystal grains, line 1860 represents the current density of rectangular grains with a rectangular rod structure and cone-shaped oxide, and line 1862 represents the current density of rectangular crystal grains with a cone-shaped rod structure and cone-shaped oxide Current density. Graph 1850 represents an improvement of the current density distribution of a rectangular die and an oxide layer at the bottom of a part of a contact pad.
FIG. 51A shows a top view of a multi-push stack, and FIG. 51B shows a cross-sectional view of another contact structure 1803. The insulating layers 1805a and 1805b are respectively disposed between the top surface of the LED and the metal conductive pad structure 1804a/1804b. The insulating layers 1805a, 1805b are respectively located at the bottom of a part of the metal conductive pad structure 1804a/1804b and facing the edge of the die, so that a part of the metal conductive pad structure 1804a, 1804b can be supported by the insulating layer 1805a, 1805b, respectively. And a part of the metal conductive pad structure 1804a, 1804b can be supported by the top surface of the light emitting diode. Under the action of the insulating layers 1805a, 1805b, the light generation at the bottom of the metal conductive pad structure 1804a, 1804b is reduced, so that the percentage of light emitted through the surface of the LED can be increased.
The single set of contacts in the above embodiment extends from the metal conductive pad structures 1804a, 1804b, and most other contact pad sets can still be used. For example, a second set of contacts (second set of contacts) extends from the set of contact pads connected to the metal conductive pad structure 1804, and so on. In addition, besides the above-mentioned oxide layer can be used to make the contact structure, this one-layer structure can also be formed by using other suitable electronically insulating materials (such as nitrogen).
FIG. 52 shows a dimensional view of a contact 1899 according to an embodiment, by which the electrical transport inside the n-contact can be estimated. In the contact period D 1870, the contact pad 1899 is assumed to have a uniform current density (uniform current density)<i>J</i><sub><i>0</i></sub>Distribute. The total current carried by the contact pad can be estimated by the following equation:<i>I</i><sub>max</sub>=<i>J</i><sub>0</sub><i>DL</i>。
The maximum current (maximum current) flows on the top of the contact pad (in the pad structure), and its relative current density can be estimated by the following equation:<maths><img file="TW200529116A_D0024.tif" /></maths>
At any distance x extended by the end of the pad structure, the current density can be estimated by the following equation:<maths><img file="TW200529116A_D0025.tif" /></maths>
The voltage drop per unit length can be estimated by the following equation:<maths><img file="TW200529116A_D0026.tif" /></maths>
The heat value per unit length (heat) can be estimated by the following equation:<maths><img file="TW200529116A_D0027.tif" /></maths>
By integrating the above equations, the total voltage drop can be expressed as the following equation:<maths><img file="TW200529116A_D0028.tif" /></maths>
The total heat generated in the contact rod structure can be estimated by the following equation:<maths><img file="TW200529116A_D0029.tif" /></maths>
When the generated total heating value is of great significance, the uniform current assumption that breaks down can be used as the performance of the electronic device (for example, the electronic device is overheated). Therefore, under the action of the above method, the maximum current density (current density is usually linearly proportional to the length), and the voltage drop (the voltage drop is usually linearly proportional to the square length) And/or the generated calorific value (the generated calorific value is usually linearly proportional to the cube of the length) can be minimized according to demand. Based on the above relationship, it can be seen that a rectangular 9X16 crystal grain composed of more and shorter rod structures has a, b, and c, where a, b, and c pass through 3/4, 9/16, and 27/64, respectively. The factor is reduced. Since the number of the rod structure is increased by a factor of 3/4, it can be assured that the total calorific value can be reduced by a factor of 9/16.
Figure 53 shows a schematic diagram of a packaged LED 1890. Generally speaking, the acceleration of light collection through the package structure not only provides mechanical and environmental protection, but also dissipates the heat generated in the die. As described above, the LED 1890 includes conductive pad structures 1804a, 1804b, and the current can be spread to the surface of the multi-rod structure 1812 and the LED through the conductive pad structures 1804a, 1804b. Multiple wire bonds 1892 can provide an electrical current path between the LED and the package structure. The plurality of bonding wires 1892 can be made of various conductive materials, such as gold, aluminum, silver, platinum, copper, and other metals or alloys. The package structure also includes multiple castellations 1894. The multiple castellations 1894 are used to transmit current through the bottom surface of the package structure to the top surface of the package structure, thereby adding a circuit board (circuit board). board) of surface mounting (surface mounting) speed. The plurality of bolt and groove structures 1894 includes a central region and a plating layer. The central area can be made of a refractory metal, such as tungsten, and it can have a relative thickness (e.g., about 100um to 1mm). In addition, a conductive material, such as gold, can be plated on the central area. The thickness of the plating structure can be about 0.5um to 10um, and a current path provided by the plating structure can carry a relatively high power level. In addition, the packaging structure includes a transparent cover 1896, and the transparent cover 1896 is the packaging structure on the LED die. When the sealing material is not used, the layer structure 506 (FIG. 36) can be protected by the transparent cover 1896. The cover 1896 is attached to the packaging structure. For example, glassy frit can be used in a furnace for melting. On the other hand, the cap 1896 can be connected by cap weld or epoxy. In addition, the cover 1896 can be coated with one or more anti-reflective coatings to increase light transmission. transmission). In order not to be limited by theory, it can be determined that when the encapsulant material layer does not exist, tolerable power loads are allowed per unit area in the patterned surface LED 100. In addition, for standard LEDs, degradation of the encapsulation layer is usually regarded as a failure mechanism, so that the use of the encapsulation layer can be avoided. The packaged LED 1890 can be mounted on a circuit board, another device or directly on a heat sink.
Figure 54 shows a model of heat dissipation applied to a packaged LED 1890, which is mounted on a heat sink. The packaged LED 1890 is supported by a core board 1900. The core board 1900 includes insulating and electrically conductive regions (for example, a conductive region using aluminum or copper metal), and the insulating and conductive regions are attached to the heat sink. For example, the packaged LED 1890 can be soldered (for example, the types of soldering include: AuSn solder, PbSn solder, NiSn solder, InSn solder) solder, InAgSn solder, PbSnAg solder, or electrically conductive epoxy (e.g. silver filled epoxy) for attachment On the core board 1900. The core board 1900 is composed of a heat sink metal 1902 and a plurality of heat sink metal fins (heat sink metal) 1902. sink fins) 1904. For example, the core plate 1900 can be welded (e.g., the types of welding include: gold-soldier, lead-sold, nickel-sold, indium-sold, indium-sold-magnesium, lead-sold-magnesium, or epoxy resin (for example, : Epoxy resin filled with silver) and attached to the metal layer 1902 for the heat sink. In the above model, when the heat is transferred toward the heat sink, this heat is assumed to come from the packaged LED 1890. Spread angle The (spreading angle) 1906 is the angle of heat dissipated by the packaged LED 1890. Generally speaking, the spreading angle 1906 is determined by the material properties and the vertical layout of the system, and is set in the heat sink The different layer structures have different spreading angles 1906. The thickness of the sheet is d<sub>x</sub>The thermal resistance can be estimated according to the following equation:<maths><img file="TW200529116A_D0030.tif" /></maths>
K<sub>0</sub>Means thermal conductivity,<i>S'</i>Indicates the size of the heat front at the top of the component. After integration, resistance (resistivity) can be expressed as the following equation:<maths><img file="TW200529116A_D0031.tif" /></maths>
In the above rectangular structure example, the resistance value is calculated, and the result can be shown in Figure 55. Figure 55 shows the calculated width to depth ratio R for a system with a large thickness and a spreading angle of 45°<sub>th_rectangle</sub>/R<sub>th_square</sub>(Rth is thermal resistance). The thermal resistance will decrease as the width to depth ratio increases. For example, if a square die system has a thermal resistance of 20°C/W and the required heat dissipation power is 3W, the junction temperature (assuming ambient temperature of 25°C) )) can be 25+20*3=85°C. However, the rectangular die has a lower bonding temperature than the rectangular die with the same area and required heat dissipation. Figure 56 shows a graph of bonding temperature, which is a function of width to depth ratio. It is certain that a lower bonding temperature is suitable for obtaining reduced wavelength shift and higher device efficiency.
It can be seen from the above description that rectangular LEDs (for example, compared to square LEDs) can provide one or more of the advantages listed below. The rectangular LED can have a larger number of bonding wires per unit area, thereby increasing the power that can be input to the LED. Since the rectangular structure can be adapted to a specific width-to-depth ratio of a pixel or a miniature display through a selection method, the need for complex beam shaping optics can be reduced. In addition, in addition to increasing the heat dissipation speed of the rectangular LED, the likelihood of failure due to overheating of the device can also be reduced.
In addition, since the cross-section of one of the individual LEDs cut by the wafer is slightly larger than the light-emitting surface area of the LED, the other individual LEDs and separable addressable LEDs can be arrayed Way and closely overlap each other. If the LEDs cannot work (for example, due to a large defect), the individual LEDs are closely stacked with each other, so that the performance of the array-shaped LEDs cannot be greatly reduced.
It can be seen from the above-mentioned embodiments that other embodiments may also have the same features.
For example, in addition to the specific thickness proposed by the above-mentioned light-emitting device and its related layer structure, other thickness values can still be used. Generally speaking, the light-emitting device can have any desired thickness, and the individual layer structures in the light-emitting device can also have any desired thickness. As far as the light generating area 130 is concerned, the thickness of the layer structure selected in the multiple stacked layers 122 is designed to increase the spatial overlap of optical modes (optical modes). overlap), thereby increasing the output value of the light generated in the light generating area 130. In the following, relevant descriptions are provided for the thickness of the specific layer structure in the light-emitting device. In some embodiments, the thickness of the layer structure 134 may be at least about 100 nm (for example: at least about 200 nm, at least about 300 nm, at least about 400 nm, at least about 500 nm) and/or at most about 10 microns (microns ) (E.g. at most about 5 microns, at most about 3 microns, and at most about 1 micron). In some embodiments, the thickness of the layer structure 128 may be at least about 10 nm (for example: at least about 25 nm, at least about 40 nm) and/or at most about 1 micron (for example: at most about 500 nm, at most about 100 nm) ). In some embodiments, the thickness of the layer structure 126 may be at least about 10 nm (for example: at least about 50 nm, at least about 100 nm) and/or at most about 1 micron (for example: at most about 500 nm, at most about 250 nm) ). In some embodiments, the thickness of the light generating region 130 may be at least about 10 nm (for example: at least about 25 nm, at least about 50 nm, at least about 100 nm) and/or at most about 500 nm (for example: at most about 250 nm) , Up to about 150nm).
For example, although various features related to light-emitting diodes are disclosed in the above description, they are not intended as a limitation, and other light-emitting diodes can also have the same features ( For example: pattern, manufacturing process), similar devices include laser and optical amplifiers.
It can be seen from other examples that the current spreading layer 132 proposed above can be used as a separate layer of the silicon doped (n-doped) gallium nitride layer 134; in some embodiments, a current spreading layer The layer system can be integrally formed on (for example, a part of) the silicon doped (n-doped) gallium nitride layer 134. In some embodiments, the current spreading layer can be a relatively high silicon doped (n-doped) gallium nitride layer 134 or a heterojunction between adjacent layers, thereby forming a two-dimensional electron Gas (2D electron gas).
As another example, although the use of semiconductor materials is disclosed in the above description, it is not intended as a limitation, and other semiconductor materials can also be applied in each embodiment. Generally speaking, any semiconductor material (for example: III-V semiconductor materials, organic semiconductor materials, silicon) can be used in light-emitting devices, and other Light-generating materials include: indium gallium arsenide phosphor (InGaAsP), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenic (AlGaAs), and indium gallium aluminum nitride (InGaAlP). Organic light-emitting materials (organic light-emitting materials) include aluminum tri-8-hydroxyquinosulfide (electron transfer material (Alq3)) (aluminum Tris-8-hydroxyquinoline(Alq3)) is a small molecule, poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-para-phenylethylene][poly[2-methoxy -5-(2-ethylhexyloxy)-1,4-vinylenephenylene]] or conjugated polymers of p-phenylene acetylene (MEH-PPV).
As another example, although LEDs with a large area are disclosed in the above description, they are not used as a limitation. Small-area LEDs can also achieve the same characteristics (for example, the edge of the LEDs is less than 300 microns Standard value (standard)).
As another example, although it is disclosed in the above description that the dielectric function can be spatially changed according to the pattern with holes, it is not used as a limitation. The pattern can also be achieved in other styles, such as: In an appropriate layer structure, the pattern system can be formed by continuous veins and/or discontinuous veins. In addition, the dielectric function can also be changed without using holes or veins. For example, materials with different dielectric functions can be patterned in an appropriate layer structure. In addition, by combining this type of pattern, the dielectric function can also be changed.
As another example, it can be seen that although the above description discloses the use of silver to form the layer structure 126, it is not used as a limitation, and the layer structure 126 can also be formed by other materials. In some embodiments, the layer structure 126 is made of a material that can reflect light. The layer structure 126 reflects 50% of the light generated by the light generating area, and then the reflected light impacts a On a layer of a reflective material, the reflective material layer is located between the supporting member and a multi-layer stack of material. Materials of this type include: distributed Bragg reflector stacks, various metals and alloys, such as aluminum and aluminum alloys.
As another example, the carrier 120 can be made of various materials, including copper, copper-tungsten, aluminum nitride, silicon carbide, Beryllium-oxide, diamonds, TEC, aluminum.
As another example, although the layer structure 126 in the above description is made of heat sink material, the light-emitting device in other embodiments may include a separation layer (for example, disposed on the layer structure 126, carrier It is made of the material between 120), which can be used as a heat sink. It is worth noting that the layer structure 126 in this embodiment may or may not be made of the material used for the heat sink.
As another example, in addition to the method of using the entire light generating area to change the pattern in the dielectric function as mentioned in the above description, it is only extended to silicon doped (n-doped) gallium nitride The method in the layer 134 is to change the pattern in the dielectric function (in essence, it has the possibility of reducing surface recombination carrier losses). In some embodiments, the pattern in the dielectric function can also be changed by extending beyond the silicon doped (n-doped) gallium nitride layer 134 (for example, extending into the aluminum gallium nitride layer 132, light A region 130 and/or a magnesium-doped (p-doped) gallium nitride layer 128) is generated.
As another example, although it is proposed in the above embodiment that air can be provided between the upper surface 110 and the cover glass 140, in other embodiments, other materials and/or air can be provided on the upper surface 110. , Between the cover glass 140. Generally speaking, the refractive index of this type of material must be at least about 1, at least less than 1.5 (for example: at least about less than 1.4, at least about less than 1.3, at least about less than 1.2, at least about less than 1.1), and its materials include Nitrogen, air, or other gases with high thermal conductivity. In this embodiment, the upper surface 110 may or does not need to be patterned. For example, the upper surface 110 may be a non-patterned surface with roughening treatment (for example, it may have any distribution and various sizes). And the shape and appearance, its wavelength is less than λ/5).
As another example, it can be seen that although the above-mentioned embodiments include the deposition and etching of the planarization layer and the lithography layer, a pre-patterned etch mask can be set on the n-doped layer. Above the surface of the semiconductor layer.
As can be seen in another example embodiment, an etch mask layer can be disposed between the n-doped semiconductor layer and the planarization layer. In this embodiment, the method includes removing at least a part of the etching mask layer (for example, in a manner relative to the pattern in the n-doped semiconductor layer, in the etch stop layer) A pattern is formed in it).
As another example, it can be seen that although the smooth patterned surface 110 is proposed in the above embodiment, the surface 110 in other embodiments may be a rough patterned surface (for example, it may have any distribution, each The size and shape of the formula, its wavelength is less than λ/5, λ/2, λ). In addition, in certain embodiments, the plurality of sidewalls of the opening 150 may be rough (for example: it may have any distribution, various sizes and shapes, and its wavelength is less than λ/5, λ/2, λ) , The surface 110 may or may not be a rough surface. Furthermore, the bottom surface of the opening 150 in some embodiments may be rough (for example: it may have any distribution, various sizes and shapes, and its wavelength is less than λ/5, λ/2 , Λ). For example, the surface 110, the sidewall of the opening 150, and/or the bottom surface of the opening 150 can be roughened by etching (for example, wet etching, dry etching, reactive ion etching). In order not to be limited by theory, it can be determined that, compared with the automatic smoothing surface, a ray will eventually hit the surface structure 700 at an angle smaller than the critical angle of Snell's law, and The rough surface 110 and/or the sidewall of the opening 150 greatly increases the probability of this occurrence.
In other examples, after proper processing, the carrier system of some embodiments may include a spring-like structure. In order not to be limited by theory, it can be determined that during the removal of the substrate, the spring-like structure can reduce the cracks of the substrate.
In other examples, it can be seen that the carrier of some embodiments can be supported by an acoustically absorbing platform (for example, polymers, metallic foams). In order not to be limited by theory, it can be determined that during the removal of the substrate, the sound-absorbing platform can reduce the cracks of the substrate.
In other examples, it can be known that before the substrate is removed, some embodiments process the substrate (for example, etching, ground, sandblasted). In certain embodiments, before the substrate is removed, the substrate can be patterned. In some embodiments, before the substrate and the buffer layer are removed, since the substrate and the buffer layer have appropriate thicknesses, one of the multiple-push laminates has a neutral mechanical axis that is substantially close to (for example, : At least about 500 microns, at least about 100 microns, at least about 10 microns, at least about 5 microns) p-doped semiconductor layer, an interface between a bonding layer. In certain embodiments, each part of the substrate can be removed individually (for example, to reduce the possibility of cracks).
In other examples, it can be seen that although in the above-mentioned embodiments, it is proposed that a buffer layer is separated from an n-doped semiconductor layer (for example, the buffer layer is grown on the substrate, and an n-doped semiconductor layer is formed in a separate manner. Growing on the buffer layer), but in other embodiments, a single-layer structure can be used instead. For example, the formation of this single-layer structure includes: first depositing a relatively low doped (for example: undoped) semiconductor material on the substrate, and then (in a single process) (one process)) A relatively highly doped (n-doped) semiconductor material is deposited.
In another example, it can be seen that although the above-mentioned embodiment proposes to remove the substrate by exposing a surface of the substrate to electromagnetic radiation (for example: laser light), In some embodiments, other methods can be used to remove the substrate. For example, the method of removing the substrate may include etching and/or polishing, followed by exposure to electromagnetic radiation (for example, laser light).
In another example, it can be seen that after the deposition process of the planarization layer is completed, but before the deposition process of the lithographic layer, the upper surface of the planarization layer in some embodiments can be planarized. For example, when the heating process of the planarization layer is performed (for example, a heating plate is used), a flat object (for example, an optical flat) can be disposed on the upper surface of the planarization layer. In some embodiments, the application of a pressure (for example, physical weight or pressure) can assist the planarization process.
In another example, it can be seen that before the substrate is removed, the substrate in some embodiments can be processed in several ways. For example, the processing of the substrate can be performed by one or more of etching, polishing, grinding, and sandblasting. In certain embodiments, the processing method may include patterning. In some embodiments, the processing method may include depositing an antireflective coating on the substrate. For example, when a substrate removal process is performed, since this process involves exposing the substrate to electromagnetic radiation, and because the coating system can reduce the reflection of electromagnetic radiation, The anti-reflective coating can allow a relatively large area of the substrate to be removed. In certain embodiments, the pattern on the surface of the substrate can also achieve the anti-reflection effect.
In some embodiments, the surface 110, the cover glass 140 and the supporting member 142 of the light-emitting device may be coated with a phosphorous material layer.
In certain embodiments, the light-emitting device may include a cover glass 140, and a phosphor material layer is provided in the cover glass 140, and the surface 110 may or may not be patterned.
Above.
In another embodiment, the light emitted by the light generating region 130 may be UV (or violet or blue), and the phosphorous material layer 180 includes a red phosphorous material (red phosphor). phosphor material) (for example: L<sub>2</sub>O<sub>2</sub>S: Eu<sup>3+</sup>), green phosphor material (for example: ZnS: Cu, Al, Mn), blue phosphor material (for example: (Sr, Ca, Ba, Mg)<sub>10</sub>(PO<sub>4</sub>)<sub>6</sub>Cl: Eu<sup>2+</sup>)。
Other embodiments are included in the scope of the patent application.
<p>100LEDs</p><p>110Upper surface</p><p>1100Optical Display System</p><p>1102Optical Display System</p><p>1104Optical Display System</p><p>1106Optical Display System</p><p>1110LED</p><p>1115Wire</p><p>1120Lens</p><p>1130Micro display</p><p>1131Image plane</p><p>120vehicle</p><p>1200Optical Display System</p><p>1202Dark Spot</p><p>122Multiple push stacks</p><p>124Combination layer</p><p>126Silver layer</p><p>130Light generating area</p><p>132Aluminum Gallium Nitride layer</p><p>136n edge contact pad</p><p>138p side contact pad</p><p>140Cover glass</p><p>1410Blue LED</p><p>142Supporting member</p><p>1420Green LED</p><p>1430Red LED</p><p>144Sealant material layer</p><p>146depth</p><p>150Opening</p><p>1500Optical Display System</p><p>151Top</p><p>1510Cooling System</p><p>1520Sensor</p><p>1600Optical Display System</p><p>1700Optical Display System</p><p>1702Equalizer</p><p>1710Optical Display System</p><p>1712Lens</p><p>1720Optical Display System</p><p>1722, 1724, 1726lens</p><p>1734device</p><p>1728, 1730, 1732LCD panel</p><p>1735Projection lens</p><p>1736Beam</p><p>1750Optical Display System</p><p>1752TIR </p><p>1754Mirror</p><p>1755Projection lens</p><p>1756DLP Panel</p><p>1760Light</p><p>1770Optical Display System</p><p>1772, 1776, 1780LCOS panel</p><p>1790Beam</p><p>1795Projection lens</p><p>180Phosphorus-containing material layer</p><p>1801Contact structure</p><p>1802LED</p><p>1803Contact structure</p><p>1806Conductive rod structure</p><p>1804a, 1804bConductive pad structure</p><p>1808Top surface</p><p>181Top</p><p>1810LED</p><p>1812Multi-pole structure</p><p>1820Insulation layer</p><p>1834Insulation layer</p><p>1836Conductive contact pad</p><p>1837Arrow</p><p>1850Graph</p><p>1856Line</p><p>1858Line</p><p>1860Line</p><p>1862Line</p><p>1890LED</p><p>1892Welding wire</p><p>1894Slot structure</p><p>1896Transparent lid</p><p>1899Contact pad</p><p>1900Core Board</p><p>1902Metal layer for radiator</p><p>1904Fin for radiator</p><p>1906Dispersion angle</p><p>230Hexagonal monomer</p><p>300Optical Display System</p><p>50Lighting System</p><p>500LED Wafer</p><p>501surface</p><p>550Multiple push stacks</p><p>60Array</p><p>600Multiple push stacks</p><p>602vehicle</p><p>604, 606, 608, 610 layer structure</p><p>650Multiple push stacks</p><p>702Planarization layer</p><p>704Lithography layer</p><p>708Etching stop material</p><p>710Etching stop material</p><p>aLattice constant</p><p>D,1870Contact cycle</p><p>dropening</p><p>L1, L2Distance</p><p>xDistance</p><p>aScale</p><p>520, 522, 524, 526 storey structure</p><p>128Mg-doped (p-doped) gallium nitride layer</p><p>134Silicon doped (n-doped) gallium nitride layer</p><p>1774, 1778, 1782Polarized beam splitter</p><p>502, 504, 506, 508, 510, 512 layer structure</p>
Figure 1 shows a schematic diagram of a light emitting system.
Figures 2A-2D show schematic diagrams of an optical display system.
Figure 3 shows a schematic diagram of an optical display system.
Figure 4A shows a schematic diagram of a top view of a light emitting diode (LED).
Figure 4B shows a schematic diagram of an optical display system.
Figure 5 shows a schematic diagram of an optical display system.
Figure 6 shows a schematic diagram of an optical display system.
Figure 7 shows a schematic diagram of an optical display system.
Figures 8A and 8B show schematic diagrams of an optical display system.
Figure 9 shows a schematic diagram of an optical display system.
Figure 10 shows a schematic diagram of an optical display system.
Figure 11 shows a schematic diagram of an optical display system.
Figure 12 shows a cross-sectional view of a light emitting diode (LED) having a patterned surface.
Figure 13 shows a top view of the patterned surface of the light emitting diode (LED) of Figure 2.
Figure 14 shows a graph of a light emitting diode (LED) with a patterned surface, which is a function of a detuning patterned.
Figure 15 shows a schematic diagram of the Fourier transform of a pattern surface of a light emitting diode (LED).
Figure 16 shows a graph of the extraction efficiency of a light emitting diode (LED) with a patterned surface. This graph is a function of a nearest neighbor distance.
Figure 17 shows a graph of the extraction efficiency of a light emitting diode (LED) with a patterned surface, and this graph is a function of a filling factor.
Figure 18 shows a top view of a patterned surface of a light emitting diode (LED).
Figure 19 shows a graph of the extraction efficiency of one of the light-emitting diodes (LEDs) with different surface patterns.
Figure 20 shows a graph of the extraction efficiency of one of the light-emitting diodes (LEDs) with different patterned surfaces.
Figure 21 shows a graph of the extraction efficiency of one of the light-emitting diodes (LEDs) with different patterned surfaces.
Figure 22 shows a graph of the extraction efficiency of one of the light-emitting diodes (LEDs) with different patterned surfaces.
Figure 23 shows a schematic diagram of the Fourier transform of two LEDs with different patterned surfaces compared to the radiation emission spectrum of LEDs.
Figure 24 shows a graph of the extraction efficiency of one of the light-emitting diodes (LEDs) with different patterned surfaces. This graph is a function of angle.
Figure 25 shows a side view of a light emitting diode (LED) with a patterned surface and a phosphor layer on the patterned surface
Figure 26 shows a cross-sectional view with a multi-layer stack.
Figure 27 shows a cross-sectional view with a multi-layer stack.
Figure 28 shows a cross-sectional view with a multi-layer stack.
Figure 29 shows a cross-sectional view with a multi-layer stack.
Figure 30 shows a side view of a substrate removal process.
Figure 31 shows a partial cross-sectional view with a multi-layer stack.
Figure 32 shows a partial cross-sectional view with a multi-layer stack.
Figure 33 shows a partial cross-sectional view with a multi-layer stack.
Figure 34 shows a partial cross-sectional view with a multi-layer stack.
Figure 35 shows a partial cross-sectional view with a multi-layer stack.
Figure 36 shows a partial cross-sectional view with a multi-layer stack.
Figure 37 shows a partial cross-sectional view with a multi-layer stack.
Figure 38 shows a partial cross-sectional view with a multi-layer stack.
Figure 39 shows a partial cross-sectional view with a multi-layer stack.
Figure 40 shows a partial cross-sectional view with a multi-layer stack.
Figure 41 shows a partial cross-sectional view with a multi-layer stack.
Figure 42 shows a partial cross-sectional view with a multi-layer stack.
Figure 43 shows a partial cross-sectional view with a multi-layer stack.
Figure 44 shows a partial cross-sectional view with a multi-layer stack.
Figure 45A shows a perspective view of a light emitting diode (LED).
Figure 45B shows a top view of a light emitting diode (LED).
Figure 46A shows a top view of a light emitting diode (LED).
Figure 46B shows a partial cross-sectional view with a light emitting diode (LED).
Figure 46C shows an equivalent circuit diagram.
Figure 47A shows a top view of a light emitting diode (LED).
Figure 47B shows an equivalent circuit diagram.
Figure 48A shows a top view of a light emitting diode (LED).
Figure 48B shows an equivalent circuit diagram.
Figure 49A shows a top view of a light emitting diode (LED).
Figure 49B shows a partial cross-sectional view with a light emitting diode (LED).
Figure 49C shows a partial cross-sectional view with a light emitting diode (LED).
Figure 50 shows a graph of junction current density.
Figure 51A shows a top view of a multi-layer stack.
Figure 51B shows a partial cross-sectional view with a light emitting diode (LED).
Figure 52 shows a view of a contact.
Figure 53 shows a schematic diagram of a packaged LED.
Figure 54 shows a schematic diagram of a packaged light emitting diode and a heat sink.
Figure 55 shows the graph of resistance.
Figure 56 shows the junction temperature graph.
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Numbers
- Publication
- 200529116
- Application
- 93137376
Titles4
- Chinese
- 光學顯示系統及方法
- English
- OPTICAL DISPLAY SYSTEMS AND METHODS
- Unlabeled
- 光學顯示系統及方法
- Unlabeled
- Optical display system and method
Classification
- CPC, 7
- H10H20/814
- G03B21/204
- H04N9/3129
- H04N9/315
- Y10S362/80
- H10H20/819
- H10H20/872
- IPC, 4
- H01L33 00
- H01L27 15
- H01L33 10
- H01L33 20