Feedback line power adjustment in orthogonal system

This patent application claims priority to the filing date of Provisional Application number 60/589823, entitled "FH-OFDMA Reverse-Link Power Control", filed July 20, 2004, assigned to the assignee of this application and hereby expressly contained herein by reference .

TECHNICAL FIELD OF THE INVENTION

The present invention relates generally to communication, and more specifically to techniques for determining a power control the reverse link in an orthogonal communication system.

BACKGROUND

In multiple access orthogonal frequency division multiplexing and frequency hopping (FH-OFDMA) bandwidth is evenly divided into a number of orthogonal subcarriers. Each user is allocated a certain number of subcarriers OFDM. The FH-OFDMA users also abruptly change the frequency (ie, a subset of carrier OFDM, assigned to the user, changing over time) across the passband. All users within the same sector or cell are orthogonal to each other and hence cause no interference to each other.

FH-OFDMA - is an effective method of multiplexing for high-speed data transmission over wireless channels. However, due to substantial variation of the received ratio "signal to noise ratio" (SNR) in the FH-OFDMA system, it is very inefficient resource to ensure a small packet error rate for each transmission. Packet retransmission mechanism (e.g., H-ARQ) is often used to help eliminate this inefficiency.

In addition, the power control closed loop is often used to ensure that sufficient SNR (i.e. SNR required to close the communication link) is received at the base station. There is an inner relationship between the number of allowed retransmissions and the transmission power required for successful transmission. For example, by increasing the transmit power level number of transmissions required for a successful transmission can be decreased, which directly results in a higher data rate. Alternatively, the transmission power required for successful transmission can be reduced if the number of allowed retransmissions increases. This internal relationship between speed and capacity makes development loop power control in a system with retransmissions a nontrivial task.

Consequently, in the art there is a need for techniques that integrates the speed and power efficient manner, taking into account retransmissions.

SUMMARY OF THE INVENTION

In one aspect, the disclosed method of power control in the reverse link, that contains a data packet, determining received whether the packet without errors, reducing the current setpoint power ratio of carrier to interference (C / I), if a packet is received without error, and increasing the current a predetermined value C / I, if the packet is not received without error.

In another aspect, discloses a method of power control in the reverse link, which also comprises determining whether the ratio is less than the received power to thermal noise (RpOT) maximum ratio of the received power to thermal noise (RpOTmax). In an aspect, a method of power control feedback line further comprises issuing commands decrease if RpOT exceed RpOTmax.

In another aspect, a method for power control in the reverse link, which also comprises determining whether the smaller valid ratio of carrier to interference (C / I) active power ratio for a carrier to interference setpoint (C / Isp). In an aspect, a method of power control in the reverse link further comprises determining whether the ratio is less than the received power to thermal noise (RpOT) the minimum ratio of the received power to thermal noise (RpOTmin).

In another aspect, a method for power control in the reverse link, which further comprises issuing commands lowering if current power ratio of the carrier to interference (C / I) is not less than the current power ratio of the carrier to interference to a predetermined value (C / Isp) or the ratio of the received thermal noise power (RpOT) is not less than the minimum ratio of the received power to thermal noise (RpOTmin).

In another aspect, a method for power control in the reverse link, which further comprises issuing commands increase if the current power ratio of the carrier to interference (C / I) is less than the existing ratio of carrier power to interference to a predetermined value (C / Isp) and the ratio of the received power thermal noise (RpOT) less than the minimum ratio of the received power to thermal noise (RpOTmin).

In another aspect, the disclosed steps of determining whether received whether the packet without errors, slow setpoint current power ratio of the carrier to interference (C / I), if a packet is received without error, and increasing setpoint current C / I, if the packet is not received without error, It contains the power control in the external circuit.

In another aspect, a method for power control in the reverse link, further comprising disabling the power control outer loop, if the ratio of received power to thermal noise (RpOT) is less than or equal to the minimum ratio of the received power to thermal noise (RpOTmin) or if the ratio of the received power thermal noise (RpOT) greater or equal to the maximum ratio of the received power to thermal noise (RpOTmax).

In another aspect, a method for power control in the reverse link, which also comprises the inclusion of a power control outer loop, if the ratio of received power to thermal noise (RpOT) greater than the minimum ratio of the received power to thermal noise (RpOTmin) and the ratio of the received power to thermal noise (RpOT) less than the maximum ratio of the received power to thermal noise (RpOTmax).

In another aspect, an a wireless communication device which comprises means for transmitting a packet, means for determining received whether the packet without error, means for reducing the current preset value of the ratio of carrier power to interference (C / I), if a packet is received without error, and means for increasing the current setpoint value C / I, if the packet is not received without error.

In another aspect, a processor which is programmed to carry into effect a method of estimating interference in a wireless communication system, the method comprising the transmission of a packet, determining received whether the packet without errors, reducing the current setpoint power ratio of carrier to interference (C / I), if a packet is received without error, and increasing the current set value C / I, if the packet is not received without error.

In another aspect, a computer readable medium that implements the method of power control in the reverse link, the method comprising the transmission of a packet, determining received whether the packet without errors, reducing the current setpoint power ratio of carrier to interference (C / I), if the package received without error, and increasing the current set value C / I, if the packet is not received without error.

Further details are described various aspects and embodiments of the invention.

BRIEF DESCRIPTION OF DRAWINGS

The features and nature of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout this specification and of which:

1 shows a wireless communication system 100 with multiple access in accordance with an embodiment;

2 illustrates a block diagram of a method of power control in the outer loop in accordance with an embodiment;

3 illustrates a flowchart of a method for power control in an internal circuit in accordance with an embodiment; and

4 illustrates a block diagram of a terminal and a base station.

DETAILED DESCRIPTION OF THE INVENTION

The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or design disclosed herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

The methods disclosed herein for predicting the ranking based on performance, can be used in various communication systems, such as Multiple Access CDMA (CDMA), wideband CDMA (WCDMA), CDMA system with direct spreading (DS- CDMA), multiple access with time division multiplexing (TDMA), multiple access, frequency division multiplexing (FDMA), High-Speed ​​Packet Access downlink (HSDPA), multiplexing system, an orthogonal frequency division multiplexing (OFDM), a system of multiple access orthogonal frequency division multiplexing (OFDMA), a single-input single-output (SISO), multiple input multiple output (MIMO), etc.

OFDM - modulation method is a multi-carrier, which effectively partitions the overall system bandwidth into multiple (NF) orthogonal subbands. These subbands are also called tones, subcarriers, bins, and frequency channels. With OFDM, each subband is associated with a respective subcarrier that may be modulated with data. Up to NF modulation symbols may be transmitted on the NF subbands sent in OFDM symbol period. Prior to transmission, these modulation symbols are transformed to the time domain via NF-point inverse fast Fourier transform (IFFT), to obtain a "transformed" symbol that contains NF chips.

-OFDMA system utilizes OFDM and can support multiple users simultaneously. The OFDMA-hopping system frequency data for each user is transmitted using a specific frequency hopping sequence (FH), assigned to the user. -FH sequence indicates the specific subband to use for transmission in each hop period frequency. Multiple data transmissions for multiple users may be sent simultaneously using different FH-sequences. These FH sequences are defined-to be orthogonal with respect to each other so that only one data transmission to use each subband in the frequency hop period. By using orthogonal FH sequences-eliminated intra-cell interference, and multiple data transmissions do not interfere with each other, thus taking advantage of frequency diversity.

Typically, the power control loop can be broken into two parts: an inner loop and outer loop. The base station provides power control commands UP / DOWN, as dictated by the internal circuit to regulate the transmission power of the user so that the desired quantity (such as received signal power, the relationship "the signal-to-interference-and-noise" (SINR), and so on. d.) given by the outer loop power control is maintained. The outer loop dynamically adjusts the predetermined value, so as to satisfy a predetermined quality of service (QoS), regardless of changes in the channel.

IS-95 and CDMA2000 use a packet error rate (PER) as a QoS indicator selected. In fact, the power control loop regulates the transmit power such that the PER was close to the target predetermined value (e.g., 1%). However, this algorithm has several drawbacks when applied to systems with retransmissions.

For example, consider the case of application of non-guaranteed bit rate, wherein the packet error is declared only when a packet is not received correctly after the maximum number of allowed transmissions. The power control algorithm based on packet error rate (PER) attempts to minimize the transmit power while trying to maintain the target packet error rate. As the maximum number of transmissions allowed increases, the required transmit power decreases (assuming the packet size remains the same). While the transmit power for the user down, the capacity also decreased.

Interestingly, the CDMA-system, although the bandwidth of each user is reduced, the capacity of the sector may remain the same (or even may increase), as more users are added to the system (recall that in the CDMA-system, less interference leads to more supportable users). Unfortunately, the systems which employ orthogonal multiple access techniques (e.g., TDMA, FDMA, and OFDMA) on the reverse link, the overall loss experienced sector capacity at this power control scheme.

In orthogonal systems, when all measurements are used, additional users can not be added without abandoning the orthogonality between users. Thus, adding more users does not necessarily help to compensate for the sector throughput loss caused by the reduction in the capacity of each user in an orthogonal system.

1 shows a wireless communication system 100 with multiple access in accordance with an embodiment. System 100 includes a certain number of base stations 110 that support communication for a number of wireless terminals 120. A base station - is a fixed station used for communicating with the terminals and may also be referred to as an access point, Node B, or kakim- other terminology. Terminals 120 are typically dispersed throughout the system, and each terminal may be stationary or mobile. The terminal may also be referred to as a mobile station, user equipment (UE), a wireless communication device, or some other terminology. Each terminal may communicate with one or more base stations on the forward and reverse links at any given time. This depends on whether the terminal is active, whether soft handoff is supported, and whether the service terminal is in soft handover. For simplicity, Figure 1 only shows transmissions on the reverse link. A system controller 130 couples to base stations 110, provides coordination and control of base stations, and further controls the routing of data for the terminals served by these base stations.

Driving power control of a closed loop for FH-OFDMA system with hybrid ARQ (H-ARQ) is described below in accordance with an embodiment. Those skilled in the art will appreciate that the below-described algorithm can be easily modified to work with any orthogonal systems (e.g., TDMA, FDMA), are used retransmissions.

This algorithm is designed to optimally fit for traffic with non-guaranteed transmission rate (e.g., ftp, download, etc.) and latency-sensitive traffic with constant bit rate (CBR) (e.g., voice, multimedia and so on. d.). For traffic with non-guaranteed transmission rate proposed algorithm reduces the problem of loss of speed due to the relationship between power control and H-ARQ. For latency-sensitive CBR traffic, the proposed power control algorithm attempts to minimize transmission power of the user, while still satisfying the constraint on the packet error rate and delay. A basic algorithm for power control and interface can be used for traffic with non-guaranteed transmission rate and delay sensitive CBR-traffic.

2 illustrates a flowchart 200 of a method for power control in the outer loop in accordance with an embodiment. Assigning an external circuit - the current set target power ratio of the carrier to interference (C / I), to monitor for the inner loop. Effective C / I is used instead of, for example, an average C / I. Effective C / I - this is a more optimal rate channel state than the average C / I, in the FH-OFDMA. "Effective SNR" (approximately) proportional to the geometric mean SNR, averaged over all tones.

The outer loop is updated, when (i) there is an error packet or (ii) the packet is decoded correctly. As a result of retransmission outer loop can not be updated every interval of packet arrival.

Packet is considered in error, if it has not been successfully decoded after reached a predetermined maximum number of transmissions, or if its latency exceeds a specified latency limit. The delay includes a delay line and space in the transmission delay.

By Ad packages zade rzhkoy exceeding the maximum allowable delay as packets with errors, limiting the delay transparently embedded in the power control loop. The logical explanation for this is that in most real-time applications expired packets are simply discarded, as in relation to the perception by a damaged package or received late packet is in one degree or another undesirable. In addition, packets can be dropped at the transmitter to further help regulate packet delay (because it does not make sense to send packets, the delay which has already exceeded the limit, because in any case they will be rejected by the receiver).

The receiver may detect that some packets discarded in the transmitter, through the recognition that the packets received out of order. These packages are missing (after detection) are treated as packets with errors. The lack of packets can be detected only after the next packet in the sequence is decoded correctly at the receiver. In fact, bad packets, dropped packets and packets with excessive delay announced packets with errors, and the outer loop dynamically adjusts the current predetermined value C / I, to maintain the target packet error rate. By selecting the proper size adjustment steps of the steps set the C / I target PER may be adjusted to the desired value.

In step 202 a check is performed to determine whether the setpoint is to be updated. If not, the control logic returns to step 202 in the next iteration. If the setpoint is to be updated, then the control logic proceeds to step 204.

In step 204 a check is performed to determine if a packet is in error. If no packets with errors, the control logic proceeds to step 206. Otherwise, control logic passes to block 208.

In step 206 a check is performed to determine whether the packet is omitted. If the packet is omitted, the control logic proceeds to step 208 and the steps set value C / I increases. Otherwise, the control logic proceeds to step 210 and the steps set value C / I decrease.

The base station then instructs the power control UP / DOWN (e.g., +/- 1 dB) using an internal circuit as shown in Figure 3. 3 shows a flowchart 300 of a method for power control in an internal circuit in accordance with an embodiment.

The outer loop can be disabled when data is absent. Thus, only the inner loop control is enabled when data is not available.

The inner loop is updated periodically (e.g., every few or frequency hopping slots). The base station measures the received signal power and the current C / I in the range of measurement. The inner loop tries to maintain an effective target C / I, is defined by the outer loop, while satisfying the restriction RpOT (ie working RpOT should be between RpOTmin and RpOTmax). The ratio of received power to thermal noise (RpOT) is defined as the ratio between the received signal power (P) and thermal noise (No). The inner loop of the proposed algorithm tries to meet the goal of both the C / I, and in RpOT.

The given values ​​(C / Isp, RpOTmin, RpOTmax) depends on the user. Users with different quality of service (QoS) can have different restrictions on RpOTmin, RpOTmax. Updates are also dependent on the user.

RpOTmin RpOTmax and may be determined according to the QoS. RpOTmin RpOTmax and can also be set equal to each other.

Although not reflected in the figures, when the RpOT limit (i.e. RpOTmin or RpOTmax) is reached, the outer loop update is disabled in accordance with an embodiment. This prevents infinite increase or decrease the current value of a given C / I.

There are two benefits of implementing RpOT the structure of the power control. Firstly, since the RpOT is not depend on interference power from other users by controlling transmission power based on the power control circuit RpOT essentially stable (i.e., no endless power surges between the users). Secondly, by imposing restrictions on working RpOT transmit power can be linked to the data rate.

Without further limitation of the operating range RpOT loop power control may set the transmit power at a very low level, as it may be the only thing that is required to satisfy a predetermined requirement packet error rate. This leads to a lower throughput, as discussed above. By setting the operating range RpOT users can significantly affect the relationship between the data rate and transmit power (for example, users can set a higher transfer rate of early termination by transmitting at a higher power). In fact, RpOTmin to protect from excessive loss of speed, while RpOTmax helps to ensure stable operation.

By setting RpOTmin = RpOTmax outer contour essentially disabled. In fact, the base station adjusts the transmit power of the user so as to satisfy the target RpOT. This adjustment may be used to support the best-effort traffic with a transmission rate, the user can always benefit from higher data rates.

In step 302 a check is performed to determine whether the inner loop to be updated. If not, the control logic returns to step 302 in the next iteration. If the internal circuit must be updated, then the control logic proceeds to step 304.

In step 304 a check is performed to determine if RpOT is greater than RpOTmax. If yes, then the control logic proceeds to step 306 and a DOWN command is issued by the base station. If not, then the control logic proceeds to step 308.

In step 308 a check is performed to determine whether the lower acting C / I operating C / Isp, or RpOT <RpOTmin. The current C / Isp - is a working C / I for a given value. If yes, then the control logic proceeds to step 310, and the base station issues a command UP. If not, then the control logic proceeds to step 306, and the base station issues a DOWN command.

In an embodiment, a hysteresis function is added to update the function of the external and internal circuit 200, 300 of Figure 2 and 3, respectively. Hysteresis function helps prevent occurrence of a limit cycle.

In an embodiment, a packet error automatically lead to the UP command, to speed up the recovery (assuming, of course, that the restriction is not violated RpOT).

In an embodiment, when only the control channel, the outer loop is disabled while continuing to execute the inner loop. When a data channel comes back, the outer contour of the work can be transparently resumed. Thus, one base loop power control used for control channels and data.

4 illustrates a block diagram of an embodiment of a base station 110x and a terminal 120x. In the reverse link, at terminal 120x, a TX data processor 510 (TX) receives and processes (e.g., formats, encodes, interleaves, and modulates) the traffic data reverse link (RL) and provides modulation symbols for the traffic data. TX processor 510 and data-processes control data (e.g., CQI) from a controller 520 and provides modulation symbols for control data. A modulator (MOD) 512 processes the modulation symbols for traffic data, control data and pilot symbols and provides a sequence of complex-valued chips. Processing in processor 510 and TX data-modulator 512 depends on the system. For example, modulator 512 may perform OFDM-modulation if the system utilizes OFDM. The transmitter (TMTR) 514 leads to conditions (e.g., converts to analog, amplifies, filters, and upconverts) the sequence of chips and generates a reverse link signal, which is routed through a duplexer (D) 516 and transmitted via antenna 518.

At base station 110x, the reverse link signal from terminal 120x is received by antenna 552, routed through duplexer 554, and provided to a receiver unit (RCVR) 556. Receiver unit 556 leads to conditions (e.g., filters, amplifies, and frequency downconverts, and digitizes) the received signal and further digitizes the signal is parameterized to obtain a stream of data samples. A demodulator (DEMOD) 558 processes the data samples to obtain symbol estimates. Then, the data processor 560 receiving (RX) processes (e.g., deinterleaves and decodes) the symbol estimates to obtain decoded data for terminal 120x. Processor 560 RX-data also performs erasure detection and provides the controller 570 the status of each received codeword used for power control. The processing by demodulator 558 and RX processor 560 is complementary to the data-processing performed by modulator 512 and TX processor 510-data, respectively.

Processing of transmission on the forward link can be performed similarly to that described above for the reverse link. Processing transmission on the reverse link and forward link are typically specified by the system.

For power control the reverse link SNR estimate unit 574 estimates the received SNR for terminal 120x and provides the received SNR to a TPC generator 576. TPC--generator 576 also receives the target SNR and generates TPC-commands for terminal 120x. TPC-commands are processed by processor 582 TX-data are further processed by a modulator 584, parameterized by the transmitting device 586, routed through duplexer 554 and transmitted via antenna 552 to terminal 120x.

At terminal 120x, the forward link signal from base station 110x is received by antenna 518, routed through duplexer 516, and digitized parametrized receiver 540, processed by a demodulator 542 and further processed by processor 544 for RX-data-obtain received TPC commands. After-TPC processor 524 detects the received TPC-commands for obtaining TPC decisions, which are used to adjust the transmit power. Modulator 512 receives the control from TPC-processor 524 and adjusts the transmit power on the reverse link. Power control hotline can be carried out in a similar manner.

Controllers 520 and 570 direct the operations of various processing units within terminal 120x and base station 110x, respectively. Controller 520 and 570 may also perform various functions for erasure detection and power control for the forward and reverse links. For example, each controller may implement the SNR estimation unit, TPC-generator unit and adjusting the target SNR for its link. Controller 570 and processor 560 RX-data may also implement processes 200 and 300 in Figures 2 and 3. Memory units 522 and 572 store data and program code for controllers 520 and 570, respectively.

The herein described methodology erasure detection and power control may be implemented by various means. For example, these techniques may be implemented in hardware, software, or a combination thereof. For a hardware implementation, the processing units used to perform erasure detection and power control may be implemented within one or more application specific integrated circuits (ASIC), digital signal processors (DSP), digital signal processing devices (DSPD), programmable logic devices ( PLD), programmable gate array LSI (FPGA), processors, controllers, microcontrollers, microprocessors, other electronic units designed to perform the herein described functions, or a combination thereof.

When implemented in software described herein may be implemented with modules (e.g., procedures, functions, and so on) that perform the herein described functions. The software codes may be stored in a memory (e.g., memory 572 in Figure 5) and executed by a processor (e.g., controller 570). The memory unit may be implemented within the processor or external to the processor, in which case it can be communicatively coupled to the processor via various means known in the art.

The foregoing description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, as disclosed in the generic principles herein may be applied to other embodiments without departing from the spirit and substance of the invention. Thus, the present invention is not intended to be limited to the disclosed embodiments herein, and should satisfy the widest scope consistent with the principles and novel features disclosed herein.