Low-voltage power-efficient envelope tracker

Technical Field The invention relates generally to electronics, and more specifically to methods for generating power for an amplifier and / or other circuits.

II. State of the art [0002] In a communication system, a transmitter may process (e.g., code and modulate) data to generate output samples. The transmitter may further change (e.g., convert to analog, filter, increase frequency and amplify) output samples to generate the RF output signal. The transmitter may then transmit the output RF signal via the communication channel to the receiver. The receiver may receive the transmitted RF signal and perform complementary processing of the received RF signal to recover the transmitted data.

[0003] The transmitter typically includes a power amplifier (PA) to provide high transmit power for the output RF signal. The power amplifier should be able to provide high output power and have a high power output (PAE). In addition, it may be required that the power amplifier has good performance and a high PAE level even at low battery voltages.

[0004] Composite switched / line envelope tracking power supplies for IEEE RF power amplifiers are well known in the IEEE "Optimum Bias Calculation for Parallel Hybrid Switching-Linear Regulators", Stauth and Sanders, 22 Applied Power Electronics Conference, APEC 2007; and from US2005 / 215209.

SUMMARY OF THE INVENTION [0005] Methods for efficiently generating power for a power amplifier and / or other circuits are described. In one embodiment, the device (e.g., integrated circuit, wireless device, circuit module, etc.) may include an envelope amplifier and a voltage boost converter. The boost converter may receive the first supply voltage (e.g., battery voltage) and generate an increased voltage supply with a higher voltage than the first supply voltage. The envelope amplifier can receive an envelope signal and an increased supply voltage and can generate a second supply voltage based on the envelope signal and the elevated supply voltage. The apparatus may further include a power amplifier that can operate based on a second power supply voltage from the envelope amplifier. In one embodiment, the envelope amplifier can receive the first power supply voltage and can generate a second power supply voltage based on the first power supply voltage or the increased supply voltage. For example, the envelope amplifier can generate a second power supply voltage (i) based on an increased supply voltage if the envelope signal exceeds the first threshold and / or if the first voltage supply is below the second threshold or (ii) otherwise based on the first power supply voltage.

[0006] According to the invention, the device comprises a switch, an envelope amplifier and a voltage boosting converter. The switch receives the first power supply voltage (e.g., battery voltage) and supplies the first power supply. The envelope amplifier receives the envelope signal and provides a second supply current based on the envelope signal. The power amplifier can receive a total power supply current comprising a first power supply current and a second power supply current. The first power supply current may contain direct current (DC) and low frequency components. The second supply current may include higher frequency components. The voltage boost converter receives the first supply voltage and provides

An increased power supply voltage. The envelope amplifier operates on the basis of the first supply voltage or an increased supply voltage.

[0007] The switch detects the input current and generates a switching signal for charging and discharging the coil supplying the supply current. The switch adds an offset to the input current for generating a larger supply current than without an offset. An appropriate method is also provided.

[0008] Various aspects and features of the invention are described in more detail below.

DESCRIPTION OF THE DRAWINGS [0009] FIG.

FIG. 1 is a block diagram of a wireless communication device.

FIG. 2A, 2B and 2C are diagrams for operating a power amplifier based on battery voltage, average power tracking device, and envelope tracking device, respectively.

FIG. 3 shows the diagram of the envelope switch and amplifier.

FIG. 4A, 4B and 4C show graphs of the PA supply current and the coil current as a function of time for different supply voltages of the switch and the envelope amplifier.

FIG. 5 is a schematic diagram of a switch with an offset in the current detection path.

FIG. 6 is a schematic diagram of a voltage boost converter.

DETAILED DESCRIPTION [0010] The word "exemplary" means "serving as an example, case or illustration." Each embodiment described herein as "exemplary" does not necessarily have to be interpreted as being advantageous or having advantages over other designs.

[0011] Described herein are methods for generating power for an amplifier and / or other circuits. These techniques can be used for various types of amplifiers, such as power amplifiers, driver amplifiers, etc. These methods can also be used for various electronic devices, such as wireless communication devices, mobile phones, personal digital assistants (PDAs), portable devices, wireless devices modems, portable computers, cordless phones, Bluetooth devices, consumer electronic devices, etc. For clarity, the following describes the use of power generation methods for a power amplifier in a wireless communication device.

[0012] FIG. 1 is a block diagram of a structure of a wireless communication device 100. For clarity, in FIG. 10 only a part of the transmitter of the wireless device 100 is shown, and part of the receiver is not shown. In the wireless device 100, the data processor 110 may receive data, process (e.g., code, interleave, and map symbols) data and provide data symbols. The data processor 110 may also process the pilot signal and provide the pilot symbols. The data processor 110 may also process data symbols and pilot symbols for code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), single-carrier FDMA (SC-FDMA) ), and / or some other multiplexing scheme and may provide output symbols.

[0013] The modulator 112 may receive output symbols from the data processor 110, perform quadrature modulation, polar modulation or some other type of modulation, and provide output samples. The modulator 112 may also determine the envelope of the output samples, e.g. by calculating the size of each output sample and averaging the size on the output samples. The modulator 112 may provide an envelope signal indicating the envelope of the output samples.

[0014] The RF transmitter 120 may process (e.g., convert to analog, amplify, filter and increase frequency) output samples from the modulator 112 and provide an input RF signal (RFin). The power amplifier (PA) 130 may amplify the input RF signal to obtain the desired output power level and provide an output RF signal (RFout) that can be transmitted via an antenna (not shown in FIGURE 1). The RF transmitter 120 may also include circuits for generating the envelope signal instead of the modulator 112 to generate the envelope signal.

[0015] The power generator PA 150 may receive the envelope signal from the modulator 112 and may generate a power supply voltage (Vpa) for the power amplifier 130. The power generator PA 150 may also be referred to as envelope tracking devices. In the embodiment shown in FIG. 1, the power generator PA 150 includes a switch 160, an envelope amplifier (Env Amp) 170, a voltage boost converter 180 and a coil 162. The switch 160 may also be referred to as a switched mode power supply (SMPS). The switch 160 receives battery voltage (Vbat) and provides a first current (Iind) comprising DC and low frequency components at node A. Coil 162 stores current from switch 160 and delivers stored current to node A in alternating cycles. The voltage boost converter 180 receives the voltage Vbat and produces an increased supply voltage (Vboost), which is higher than the voltage Vbat. Envelope amplifier 170 receives the envelope signal at the signal input, receives Vbat voltage and Vboost voltage at two power inputs and provides a second power supply (Ienv) containing high frequency components at node A. PA power supply (Ipa) supplied to power amplifier 130 contains Iind current from selector 160 and Ienv current from envelope amplifier 170. Envelope amplifier 170 also provides a corresponding power supply voltage PA (Vpa) at node A for power amplifier 130. Various arrangements in the power generator PA 150 are described in more detail below.

[0016] Controller 140 may control the operation of different entities within wireless device 100. Memory 142 may store program codes and data for controller 140 and / or other devices in wireless device 100. Data processor 110, modulator 112, controller 140, and memory 142 may be implemented on one or several application-specific integrated circuits (ASICs) and / or other integrated circuits.

[0017] FIG. 1 depicts an exemplary design of the wireless device 100. The wireless device 100 may also be used in a different manner and may include different circuits than that shown in FIG. 1. All or part of RF transmitter 120, power amplifier 130 and power generator PA 150 may be implemented on one or more analog integrated circuits (IC), RF IC (RFIC), IC for mixed signals, etc.

[0018] It may be desirable to operate the wireless device 100 with a low battery voltage to reduce energy consumption, extend battery life, and / or obtain other benefits. New battery technology can deliver up to 2.5 V (V) and below in the near future. However, the power amplifier may need to work with the PA power supply voltage (eg, 3.2V), which is higher than the battery voltage. To increase the battery voltage, you can use a voltage booster to create a higher PA power supply. However, using a voltage booster to directly connect the PA power supply can result in increased costs and energy consumption that are not desirable.

[0019] The PA 150 power generator can efficiently generate the PA power supply with envelope tracking to avoid disadvantages of using the boost converter to provide directly

The supply voltage PA. The switch 160 can supply most of the power of the power amplifier 130 and can be connected directly to the battery voltage. A voltage boost converter 180 may supply power only to the envelope amplifier 170. The PA 150 power generator may generate a PA power supply to track the RFin envelope to be supplied to the power amplifier 130 so that the PA power is supplied to the proper power amplifier 130.

[0020] FIG. 2A illustrates a scheme for using battery voltage for a power amplifier 210. The RFout signal (which follows an RFin signal) has an envelope that changes over time and is shown in graph 250. The battery voltage is shown in graph 260 and is higher than the largest envelope amplitude to avoid cutting out The RFout signal from the power amplifier 210. The difference between the battery voltage and the RFout signal envelope means wasted power that is dissipated by the power amplifier 210 instead of being supplied to the output load.

[0021] FIG. 2B shows a flow diagram of the power supply PA (Vpa) for the power amplifier 210 from the average power tracking device (APT) 220. The APT 220 receives a power control signal indicating the largest amplitude of the RFout envelope in each time slot. APT 220 generates the power supply PA (shown in graph 270) for the power amplifier 210 based on the power control signal. The difference between the PA supply voltage and the RFout signal envelope means wasted power. APT 220 can reduce energy losses because it can generate PA power to track the largest envelope amplitude in each time period.

[0022] FIG. 2C illustrates a diagram of generating the power supply PA for the power amplifier 210 using the envelope tracking device 230. The envelope tracking unit 230 receives a boundary signal indicative of the RFout signal envelope and generates a power supply voltage PA (as shown in graph 280) for the power amplifier 210 based on the signal envelope. The power supply PA closely follows the envelope of the RFout signal over time. Therefore, the difference between the PA supply voltage and the RFout signal envelope is small, resulting in less losses. The power amplifier is supported in saturation for all envelope amplitudes to maximize PA performance.

[0023] Power generator PA 150 in FIG. 1 may use envelope tracking devices 230 in FIG. 2C with high efficiency. This is accomplished by combining (i) an efficient switch 160 to generate a first power supply (Iind) with power in the switching mode and (ii) a linear envelope amplifier 170 to generate a second power supply (Ienv).

[0024] FIG. 3 is a schematic diagram of a switch 160a and envelope amplifier 170a that are respectively an embodiment of switch 160 and envelope amplifier 170, in FIG. 1. In the case of the envelope amplifier 170a, the op-amp 310 has its own non-inverting input receiving the envelope signal, the inverting input connected to the output of the envelope amplifier 170a (which is the node E), and the output connected to the input of the AB 312 controller The controller 312 has its first output (R1) connected to the gate of the P-channel MOS transistor (PMOS) 314 and the second output (R2) connected to the gate of the NOS MOS transistor (NMOS) 316. The NMOS 316 transistor has a drain connected to the node E and source connected to circuit ground. The PMOS 314 transistor has a drain connected to node E and a source connected to the tubes of PMOS 318 and 320 transistors. The PMOS 318 transistor has a gate receiving the control signal C1 and the source receiving the voltage Vboost. The PMOS transistor 320 has a gate receiving a C2 control signal and a source receiving the Vbat voltage.

[0025] A current sensor 164 is connected between node E and node A and detects the current Ienv provided by the envelope amplifier 170a. Sensor 164 transmits most of the Ienv current to node A and delivers

The lower part of the detected current (Isen) to the switch 160a. The Isen current is a small part of the Ienv current from the envelope amplifier 170a.

In the switch 160a, the current detection amplifier 330 has an input connected to the current sensor 164 and its output is connected to the input of the switch controller 332. The controller 332 has its first output (S1) connected to the gate of transistor 334 PMOS and its second output (S2) ) connected to the gate of the NMOS 336 transistor. The NMOS transistor 336 has its drain connected to the output of the switch 160a (which is the node B) and the source connected to the circuit ground. The PMOS 334 transistor has its own drain connected to the B-tube and the source receiving the Vbat voltage. The coil 162 is connected between the nodes A and B.

[0027] Switch 160a operates as follows. The switch 160a is in the ON state when the current sensor 164 detects a high output current from the envelope amplifier 170a and supplies a low voltage to the controller 332. The controller 332 then supplies a low voltage to the gate of the PMOS transistor 334 and a low voltage to the gate of the NMOS transistor 336. Transistor PMOS 334 is switched on and couples the voltage Vbat with the coil 162, which stores energy from the voltage Vbat. The current flowing through the coil 162 increases during the on state, the rate of increase depends on (i) the difference between the voltage Vbat and the voltage Vpa in the node A and (ii) the inductance of the coil 162. Conversely, the switch 160a is in the off state when the sensor The current 164 detects a low output current from the envelope amplifier 170a and provides a high voltage for the controller 332. The controller 332 then supplies a high voltage to the gate of the PMOS transistor 334 and a high voltage to the gate of the NMOS 336 transistor. The NMOS 336 transistor is turned on and the coil 162 is connected between the node A and the circuit ground. The current flowing through the coil 162 decreases in the off state, the velocity of the voltage depends on the voltage Vpa at the node A and the inductance of the coil 162. The voltage Vbat thus provides power to the power amplifier 130 via the coil 162 during the ON condition and coil 162 supplies its stored energy to the power amplifier 130 during the off state.

[0028] In one embodiment, the envelope amplifier 170a operates based on the Vboost voltage only when required, and based on the Vbat voltage for the remaining time to increase the efficiency. For example, envelope amplifier 170a can provide about 85% power based on Vbat voltage and only about 15% power based on Vboost voltage. When a high voltage Vpa is required for the power amplifier 130 due to the large envelope on the RFout signal, the control signal C1 is at a low logic level and the control signal C2 is at a high logic level. In this case, the amplifier 180 is turned on and the Vboost voltage is generated, the PMOS 318 transistor is turned on and supplies the Vboost voltage to the source of the PMOS 314 transistor and the PMOS 320 transistor is turned off. Vice versa, when the amplifier voltage 130 is not needed for the power amplifier 130, the control signal C1 is at a high logic level, and the control signal C2 is at a low logic level. In this case, the voltage converter 180 is turned off, the PMOS 318 transistor is turned off and the PMOS 320 transistor is turned on and supplies the voltage Vbat to the source of transistor 314 PMOS.

[0029] The envelope amplifier 170a operates as follows. As the envelope signal increases, the op amp signal 310 increases, the output signal R1 of the controller 312 weakens and the output signal R2 of the controller 312 weakens until the NMOS 316 is nearly turned off and the output signal of the envelope amplifier 170a increases. The reverse is true when the envelope signal is weakening. A negative feedback from the envelope amplifier output 170a to the op-amp 310 reversing input causes a unitary amplification of the envelope amplifier 170a. Consequently, the output signal of the envelope amplifier 170a follows the envelope signal, and the voltage Vpa is approximately equal to the signal

EP 2 724 461 envelopes. The driver 312 can be implemented with an AB class amplifier to increase efficiency, so that it is possible to provide large output currents even when the bias current in transistors 314 and 316 is very small.

[0030] The control signal generator 190 receives the envelope signal and the voltage Vbat and generates control signals C1 and C2. The control signal C1 is complementary to the control signal C2. In one embodiment, the generator 190 generates control signals C1 and C2 to select the voltage Vboost for the envelope amplifier 170 when the envelope signal size exceeds the first threshold. The first threshold can be fixed at a fixed threshold or can be determined based on the Vbat voltage. In another embodiment, the generator 190 generates control signals C1 and C2 to select the voltage Vboost for the envelope amplifier 170 when the envelope signal size exceeds the first threshold and the voltage Vbat is below the second threshold. The generator 190 may also generate signals C1 and C2 based on other signals, other voltages and / or other criteria.

[0031] FIG. 3 shows an exemplary design of the switch 160 and envelope amplifier 170 in FIG. 1. Switch 160 and envelope amplifier 170 may also be implemented in other ways. For example, the envelope amplifier 170 may be implemented as described in U.S. Patent No. 6,300,826, entitled & quot; Apparatus and Method for Efficiently Amplifying Wideband Envelope Signals, October 9, 2001.

[0032] The switch 160a has a high efficiency and supplies a greater part of the power supply current of the power amplifier 130. The envelope amplifier 170a functions as a linear step and has a relatively large bandwidth (e.g., in the MHz range). The switch 160a operates to reduce the output current from the envelope amplifier 170a, which improves the overall performance.

[0033] It may be desirable to support the operation of the wireless device 100 with a low battery voltage (e.g., below 2.5 V). This can be achieved by the operation of the switch 160 based on the voltage Vbat and the envelope amplifier 170 based on the higher voltage Vboost. However, the efficiency can be improved by the operation of the envelope amplifier 170 based on the Vboost voltage only when it is needed for a large envelope amplitude and based on the Vbat voltage for the remaining time, as shown in FIG. 3 and described above.

[0034] FIG. 4A is a graph of an example of the power supply PA (Ipa) and the current of the coil (Iind) from the coil 162 as a function of time for the case where the switch 160a has a power supply voltage (Vsw) of 3.7 V and the envelope amplifier 170a has a power supply voltage ( Venv) of 3.7 V. Iind current is the current flowing through coil 162 and is shown in graph 410. Ipa current is the current supplied to power amplifier 130 and is shown in graph 420. Ipa current contains Iind current as well as Ienv current with envelope amplifier 170a. The envelope amplifier 170a provides an output current when the Ipa current is greater than the Iind current. The efficiency of the switch 160a and the envelope amplifier 170a is about 80% in one embodiment.

[0035] FIG. FIG. 4B is a diagram of the PA supply current (Ipa) and the coil current (Iind) with respect to time in the case where the switch 160a has a supply voltage of 2.3V and the envelope amplifier 170a has a supply voltage of 3.7V. The Iind current is shown in graph 412 and the Ipa current is shown in graph 420. When the power supply voltage of the switch 160a weakens to 2.3 V, the coil 162 charges slower, which leads to a lower average current Iind compared to the case where voltage The power supply for the switch 160a is 3.7V in FIG. 4A. The lower current Iind causes the envelope amplifier 170a to provide more Ipa current. This reduces the overall performance to about 65% in one embodiment because

The envelope amplifier 170a is less efficient than the switch 160a. The performance drop can be improved by increasing the Iind current from the switch.

[0036] FIG. 5 is a diagram of a switch 160b, which is another design of the switch 160 in FIG. 1. Switch 160b includes a current detector 330 detected, a controller 332 and MOS transistors 334 and 336 that are connected as described above for the switch 160a in FIG. 3. The switch 160b further comprises a current totalizer 328 having a first input connected to the current sensor 164, a second input receiving an offset (e.g., zero current) and an output connected to the input of the amplifier 330 of the detected current. The adder 328 may be implemented by means of a summation circuit (e.g. an amplifier), a summing node, etc.

[0037] Switch 160b operates as follows. The adder 328 receives the Isen current from the current sensor 164, adds the shift current, and provides the total current that is lower than the Isen current by the unbalance current value. The remaining circuits in the switch 160b function as described above for the switch 160a in FIG. 3. The adder 328 deliberately reduces the current Isen supplied to the amplifier 330 of the detected current so that the switch 160 is switched for a longer period of time and can provide a larger current Iind, which is part of the current Ipa supplied to the power amplifier 130. The offset provided to the adder 328 determines the amount by which the current Iind is increased by the switch 160b relative to the current Iind provided by the switch 160a in FIG. 3.

[0038] In general, the offset can be gradually increased to generate a gradually larger coil current than without shifting. In one embodiment, the offset can be a predetermined value selected to provide good performance, e.g. good efficiency. In another embodiment, the offset can be determined based on the battery voltage. For example, a gradually higher voltage can be gradually increased. The correction may also be determined based on the envelope signal and / or other information.

[0039] By means of adder 328, an offset can be added to increase the coil current as shown in FIG. 5. The offset can also be added by increasing the pulse width of the output signal from the read amplifier using any suitable mechanism.

[0040] FIG. 4C shows graphs of the PA power supply (Ipa) and coil current (Iind) versus time for the case where the switch 160b in FIG. 5 has a supply voltage of 2.3 V and the envelope amplifier 170a has a supply voltage of 3.7 V. The current Iind is shown in diagram 414 and the current Ipa is shown in diagram 420. When the supply voltage of switch 160b is reduced to 2.3 V the coil 162 charges slower, resulting in a lower current Iind, as shown in FIG. 4B. The offset added by the adder 328 in FIG. 5 reduces the detected current supplied to the amplifier 330 of the detected current and results in switching the switch 160b on longer. Thus, the switch 160b with the offset in FIG. 5 can provide a higher current Iind than switch 160a without an offset in FIG. 3.

[0041] FIG. 6 is a schematic diagram of the voltage boost converter 180 of FIG. 1, 3 and 5. Within the up converter 180, the coil 612 has one end receiving the voltage Vbat, and the other end connected to the node D. The NMOS 614 transistor has its source connected to the circuit ground, the gate receiving the control signal Cb, and the drain is connected to the node D. The diode 616 has an anode connected to the node D and a cathode connected to the output of the voltage boost converter 180. Capacitor 618 has one end connected to the circuit ground and the other end connected to the output of the boost converter 180.

[0042] The voltage boosting converter 180 operates in the following manner. In the ON state, the NMOS 614 transistor is closed, the coil 612 is connected between the Vbat voltage and the circuit ground, and the coil current 612 is increasing. In the off state, the NMOS 614 transistor is open and the current from the coil 612 flows through the diode 616 to the capacitor 618 and the load on the output of the boost converter 180 (not shown in FIG. 6). The Vboost voltage can be expressed as:

Vboost = Vbat -! -, Rq (1)

1-l) uty_Cycle where Duty_Cycle is the work cycle in which the NMOS 614 transistor is on. The duty cycle can be selected to obtain the desired Vboost voltage and ensure correct operation of the 180 voltage boost converter.

[0043] The methods described in this document allow the envelope tracing device to operate at a lower battery voltage (e.g., 2.5 V or lower). The envelope tracking device includes a switch 160 and envelope amplifier 170 for the design shown in FIG. 1. In one embodiment of the assistance operation at a lower battery voltage, as shown in FIG. The switch 160 is connected to the voltage Vbat and the envelope amplifier 170 is connected to the voltage Vbat or Vboost. The switch 160 provides energy most of the time, and the envelope amplifier 170 provides power during peaks in the RFout signal envelope. The overall efficiency of the envelope tracking device decreases due to the efficiency of the converter increasing the voltage of 180 (and is about 85%) only in time,

[0044] In another embodiment of the assistance operation at lower battery voltage, the entire envelope tracking device is based on the voltage Vboost from the boost converter 180. In this embodiment, the voltage boost converter 180 provides the high current required by the power amplifier 130 (which can amount to more than one Ampere), and the efficiency is reduced by the efficiency of the converter increasing the voltage of 180 (and can be about 85%).

[0045] In yet another embodiment of the boost operation at a lower battery voltage, the field effect transistor (FET) is used to connect the envelope tracking device to (i) Vbat voltage when the voltage Vbat is greater than the voltage Vthresh or to (ii) the voltage Vboost when Vbat voltage is lower than Vthresh voltage. The efficiency would then be reduced by losses in the FET switch. However, for the voltage boost converter 170, a higher efficiency can be obtained due to the low input voltage.

[0046] In one embodiment, the device (e.g., integrated circuit, wireless device, circuit module, etc.) may include an envelope amplifier and a voltage boost converter, e.g., as shown in FIG. 1 and 3. The boost converter may receive the first supply voltage and generate an elevated voltage with a higher voltage than the first supply voltage. The first voltage may be battery voltage, input voltage or other voltage available to the device. The envelope amplifier can receive an envelope signal and an elevated supply voltage and can generate a second power supply voltage (e.g., Vpa voltage in FIG. 3) based on envelope signal and elevated supply voltage. The device may further comprise a power amplifier, which can operate based on the second supply voltage from the envelope amplifier. The power amplifier can receive and amplify the RF input signal and provide an RF output signal.

[0047] In one embodiment, the envelope amplifier can receive a first power supply voltage and can generate a second power supply voltage based on the first supply voltage or an increased supply voltage. For example, the envelope amplifier may generate a second power supply voltage (i) based on an increased supply voltage if the envelope signal exceeds the first threshold or if the first supply voltage is below the second threshold or both or (ii) based on the first power supply voltage.

In one embodiment, the envelope amplifier can include an op-amp, a controller, a PMOS transistor, and a NMOS transistor, e.g. op-amp 310, controller 312, transistor 314 PMOS, and transistor 316 NMOS in FIG. 3. Op-amp can receive the envelope signal and provide a reinforced signal. The controller can receive the amplified signal and provide the first control signal (R1) and the second control signal (R2). The PMOS transistor may have a gate receiving a first control signal, a source receiving elevated supply voltage, or a first power supply voltage and a drain providing a second power supply voltage. The NMOS transistor can have a gate receiving a second control signal, a drain providing a second power supply voltage, and a source connected to the circuit ground. The envelope amplifier may further comprise second and third PMOS transistors (e.g. PMOS 318 and 320 transistors). The second PMOS transistor may have a gate receiving a third control signal (C1), a source receiving elevated supply voltage and a drain connected to the source of the PMOS transistor. The third PMOS transistor may have a gate receiving a fourth control signal (C2), a source receiving the first power supply voltage, and a drain connected to the source of the PMOS transistor.

[0049] In another embodiment, the device (e.g., integrated circuit, wireless device, circuit module, etc.) may include a switch, envelope amplifier, and power amplifier, e.g., as shown in FIG. 1 and 3. The switch may receive a first power supply voltage (e.g., battery voltage) and provide a first power supply current (e.g., the current Iind in FIG. 3). The envelope amplifier can receive an envelope signal and provide a second supply current (e.g., Ienv current) based on the envelope signal. The power amplifier can receive a total supply current (e.g., Ipa current) including the first power supply current and the second power supply current. The first supply current may include DC and low frequency components. The second supply current may contain higher frequency components. The device may further include a voltage booster, which can receive the first supply voltage and provide an elevated supply voltage with a higher voltage than the first supply voltage. The envelope amplifier can operate based on the first supply voltage or an increased supply voltage.

[0050] In one embodiment, the switch may include a detected current amplifier, controller, PMOS transistor, and NMOS transistor, e.g., a detected current detector 330, a controller 332, a PMOS transistor 334, and a NMOS transistor 336 in FIG. 3. The current detection amplifier may detect a first power supply current or a second power supply current (e.g., as shown in FIG. 3), or a total supply current and may provide the detected signal. The controller may receive the detected signal and provide the first control signal (S1) and the second control signal (S2). The PMOS transistor may have a gate receiving a first control signal, a source receiving the first power supply voltage, and a drain providing a switching signal for the coil supplying the first supply current. The NMOS transistor can have a gate receiving a second control signal, a drain providing a switching signal and a source connected to the circuit ground. The coil (e.g., coil 162) can be connected to the drains of the PMOS transistor and the NMOS transistor, can receive a switching signal at one end and can provide a first supply current at the other end.

[0051] In yet another embodiment, the device (e.g., integrated circuit, wireless device, circuit module, etc.) may include a switch, e.g. switch 160b in FIG. 5. The switch can detect the input current (e.g., the Ienv current of FIG. 5) and generate a switching signal for charging and discharging the coil supplying the power supply (e.g., current Iind). The switch can add an offset to the input current to generate a higher supply current than without an offset. The switch can operate based on the first power supply voltage (eg battery voltage). In one embodiment, the offset can be determined based on the first supply voltage. For example, a larger offset can be used for the smaller first supply voltage and vice versa.

[0052] In one embodiment, the switch may include an adder, a current detection amplifier and a controller, e.g., adder 328, amplifier 330 of detected current, and controller 332 in FIG. 5. The totalizer can sum up the input current and the unbalance current and give the total current. The current detection amplifier can receive the total current and provide the detected signal. The controller may receive the detected signal and provide at least one control signal used to generate the switching signal. In one embodiment, the at least one control signal may include a first control signal (S1) and a second control signal (S2), and the switch may further include a PMOS transistor and a NMOS transistor, e.g., PMOS transistor 334 and NMOS transistor 336 in FIG. 5. The PMOS transistor can have a gate receiving the first control signal, the source receiving the first supply voltage and the drain providing the switching signal. The NMOS transistor may have a gate receiving a second control signal, a drain providing a switching signal, and a source connected to the circuit ground.

[0053] In one embodiment, the apparatus may further comprise an envelope amplifier, a voltage boost converter, and a power amplifier. The envelope amplifier can receive an envelope signal and provide a second supply current (e.g., Ienv current in FIG. 5) based on the envelope signal. The boost converter may receive the first supply voltage and increase the supply voltage. The envelope amplifier can operate based on the first supply voltage or an increased supply voltage. The power amplifier can receive a total power supply current (e.g., Ipa current) including the power supply from the switch and a second supply current from the envelope amplifier.

The circuits (e.g. envelope amplifier, switch, voltage boost converter, etc.) may be implemented in integrated circuits, analog integrated circuits, RF integrated circuits (RFICs), mixed signal integrated circuits, special purpose integrated circuits (ASICs), printed circuit boards (PCBs), electronic devices, etc. Circuits can be produced using various technologies for the production of integrated circuits, such as CMOS, NMOS, PMOS, bipolar transistors (BJT), bipolar CMOS (BiCMOS), silicon germanium, (SiGe), gallium arsenide (GaAs), etc.

[0055] The device implementing any of the circuits described in this document may be a stand-alone device or may be part of a larger device. The device may be: (i) an independent integrated circuit, (ii) a set of one or more integrated circuits that may include memory devices for storing data and / or instructions, (iii) RFIC, e.g. an RF receiver (RFR) or a transmitter / a radio receiver (RTR), (iv) an ASIC such as a mobile modem (MSM), (v) a module that may be embedded in other devices, (vi) a receiver, a cellular telephone, a wireless device, or a mobile unit, (vii) e.t.c.

[0056] The foregoing description of the invention is provided to enable any person skilled in the art to make or to use the invention. Various modifications of the invention will be apparent to

Those skilled in the art and the general principles defined in this document may be used for other variations, without departing from the scope of the disclosure. The invention is defined by the claims.