Low-voltage power-efficient envelope tracker

[0001] The present disclosure relates generally to electronics, and more specifically to techniques for generating a power source for an amplifier and / or other circuits.

II. Background [0002] In a communication system, a transmitter can process (for example, encode and modulate) data to generate output samples. The transmitter can also condition (for example, convert to analog, filter, increase the frequency and amplify) the output samples to generate an output radio frequency (RF) signal. The transmitter can then transmit the output RF signal through a communication channel to a receiver. The receiver can receive the transmitted RF signal and perform the complementary processing on the received RF signal to recover the transmitted data.

[0003] The transmitter typically includes a power amplifier (PA) to provide high transmit power for the output RF signal. The power amplifier must be able to provide high output power and have high added power efficiency (PAE). In addition, the power amplifier may be required to have good performance and high PAE even with a low battery voltage.

[0004] The prior art envelope tracking energy sources are known from the IEEE documents Optimal Diversion Calculation for Parallel Hybrid Switching Linear Regulators ["Optimum Bias Calculation for Parallel Hybrid Switching-Linear Regulators], of J Stauth et al., Conference of Applied Energy Electronics, APEC 2007, pages 569-574, ISBN 978-1-4244-0713-2, XP031085267; and “Basic Considerations and Topologies of Switched-Mode Assisted Linear Power Amplifiers, of Ertl et al., IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 1997, pages 116 -122, ISSN 0278-0046, XP011023224.

ABSTRACT [0005] This document describes techniques for efficiently generating a power source for a power amplifier and / or other circuits.

[0006] The present invention includes a switch that detects an input current and generates a switching signal for loading and unloading an inductor that provides a supply current. The switch adds a lag to the input current to generate a higher feed current than without the lag. The apparatus also includes an envelope amplifier comprising NMOS and PMOS transistors and a Boost converter for the envelope amplifier.

[0007] Several aspects and features of this disclosure are described in more detail below.

BRIEF DESCRIPTION OF THE DRAWINGS [0008]

FIG. 1 shows a block diagram of a wireless communication device.

FIG. 2A, 2B and 2C show operation diagrams of a power amplifier based on a battery voltage, a medium power tracker and an envelope tracker, respectively.

FIG. 3 shows a schematic diagram of a switch and an envelope amplifier.

FIG. 4A, 4B and 4C show graphs of PA supply current and inductor current as a function of time for different supply voltages for the switch and the envelope amplifier.

FIG. 5 shows a schematic diagram of a switch with offset in a current detection path.

FIG. 6 shows a schematic diagram of a Boost converter.

DETAILED DESCRIPTION [0009] The expression by way of example is used herein to mean that it serves as an example or as an illustration. Any design described herein as an example should not necessarily be construed as preferred or advantageous over other designs.

EN 2 736 156 T3 [0010] The techniques for generating a power supply for an amplifier and / or other circuits are described herein. The techniques can also be used for various types of amplifiers such as power amplifiers, drive amplifiers, etc. The techniques can also be used for various electronic devices such as wireless communication devices, cell phones, personal digital assistants (PDAs), portable devices, wireless modems, laptops, wireless phones, Bluetooth devices, consumer electronic devices, etc. For clarity, the use of techniques for generating a power source for a power amplifier in a wireless communication device is described below.

[0011] FIG. 1 shows a block diagram of a design of a wireless communication device 100. For clarity, only a portion of wireless device transmitter 100 is shown in FIG. 1, and a receiver portion is not shown. Within the wireless device 100, a data processor 110 can receive data to be transmitted, processed (for example, encoded, interleaved, and assigned symbols) the data and provided data symbols. The data processor 110 can also process the pilot and provide pilot symbols. The data processor 110 can also process the data symbols and pilot symbols for multiple code division access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA ), Single carrier FDMA (SC-FDMA), and / or some other multiplexing scheme and can provide output symbols.

[0012] A modulator 112 can receive the output symbols of the data processor 110, perform quadrature modulation, polar modulation or some other type of modulation, and provide output samples. Modulator 112 can also determine the envelope of the output samples, for example, by calculating the magnitude of each output sample and averaging the magnitude between the output samples. The modulator 112 may provide an envelope signal indicative of the envelope of the output samples.

[0013] An RF transmitter 120 can process (for example, convert to analog, amplify, filter and increase the frequency) the output samples of modulator 112 and provide an input RF signal (RFin). A power amplifier (PA) 130 can amplify the input RF signal to obtain the desired output power level and provide an output RF (RFout) signal, which can be transmitted through an antenna (not shown in the FIG. 1). The RF transmitter 120 may also include circuits to generate the envelope signal, instead of using modulator 112 to generate the envelope signal.

[0014] A PA 150 power generator can receive the envelope signal from modulator 112 and can generate a power supply voltage (Vpa) for power amplifier 130. The PA 150 power generator can also be called a tracker. envelope In the design shown in FIG. 1, the PA power generator 150 includes a switch 160, an envelope amplifier (Amp. Env) 170, a Boost 180 converter and an inductor 162. Switch 160 may also be referred to as switching mode power supply (SMPS). The switch 160 receives a battery voltage (Vbat) and provides a first supply current (Iind) comprising DC and low frequency components in node A. The inductor 162 stores current from the switch 160 and provides the stored current to the node A in alternate cycles. The Boost 180 converter receives the Vbat voltage and generates a high supply voltage (Vboost) that is higher than the Vbat voltage. The envelope amplifier 170 receives the envelope signal at its signal input, receives the Vbat voltage and the Vboost voltage at its two power supply inputs, and provides a second supply current (Ienv) comprising high frequency components in node A. The PA supply current (lpa) provided to the power amplifier 130 includes the Iind current from the switch 160 and the Ienv current of the envelope amplifier 170. The envelope amplifier 170 also provides the appropriate PA supply voltage (Vpa) in Node A for power amplifier 130. The different circuits of the PA 150 power generator are described in more detail below.

[0015] A controller 140 can control the operation of several units within the wireless device 100. A memory 142 can store program codes and data for the controller 140 and / or other units within the wireless device 100. The data processor 110, modulator 112, controller 140 and memory 142 may be implemented in one or more application specific integrated circuits (ASICs) and / or other ICs.

[0016] FIG. 1 shows an example of the design of the wireless device 100. The wireless device 100 can also be implemented in other ways and may include circuits other than those shown in FIG. 1. All or part of the RF transmitter 120, the power amplifier 130 and the PA power generator 150 can be implemented in one or more analog integrated circuits (IC), RF IC (RFIC), mixed signal IC , etc.

[0017] It may be desirable to operate the wireless device 100 with a low battery voltage to reduce power consumption, prolong battery life and / or obtain other advantages. The new battery technology can provide power up to 2.5 volts (V) and below in the near future. However, it is possible that a power amplifier may have to operate with a PA supply voltage (for example, 3.2V) that is greater than the battery voltage. A Boost type converter can be used to raise the battery voltage to generate the highest PA supply voltage. However, the use of the Boost converter to supply

ES 2 736 156 T3 directly the PA supply voltage can increase the cost and energy consumption, both undesirable.

[0018] The PA 150 power generator can efficiently generate the PA supply voltage with an envelope trace to avoid the disadvantages of using a Boost converter to directly provide the PA supply voltage. The switch 160 can provide most of the power for the power amplifier 130 and can be connected directly to the battery voltage. The Boost 180 converter can supply power only to the envelope amplifier 170. The PA power generator 150 can generate the PA supply voltage to track the envelope of the RFin signal provided to the power amplifier 130, so that only the appropriate amount of PA supply voltage is supplied to power amplifier 130.

[0019] FIG. 2A shows a diagram of utilization of a battery voltage for a power amplifier 210. The RFout signal (which follows the RFin signal) has an envelope that varies over time and is shown by a graph 250. The voltage of The battery is shown by a graph 260 and is larger than the larger amplitude of the envelope to prevent clipping of the RFout signal of the power amplifier 210. The difference between the battery voltage and the RFout signal envelope represents the wasted energy that is dissipated by the power amplifier 210 instead of being supplied to an output load.

[0020] FIG. 2B shows a diagram of generating a PA supply voltage (Vpa) for power amplifier 210 with a medium power tracker (APT) 220. The APT 220 receives a power control signal indicating the greatest amplitude of the envelope of the RFout signal at each time interval. The APT 220 generates the PA supply voltage (shown by graph 270) for the power amplifier 210 based on the power control signal. The difference between the supply voltage PA and the envelope of the RFout signal represents the loss of power. The APT 220 can reduce wasted power, since it can generate the supply voltage of the PA to track the largest amplitude of the envelope in each time interval.

[0021] FIG. 2C shows a diagram of generating a PA supply voltage for the power amplifier 210 with an envelope tracker 230. The envelope tracker 230 receives an envelope signal indicative of the envelope of the RFout signal and generates the voltage of PA power (shown by graphic 280) for power amplifier 210 based on the envelope signal. The supply voltage of the PA closely tracks the envelope of the RFout signal over time. Therefore, the difference between the PA supply voltage and the RFout signal envelope is small, which results in a lower power loss. The power amplifier is operated in saturation for all amplitudes of the envelope in order to maximize the efficiency of the PA.

[0022] PA 150 power generator in FIG. 1 can implement envelope tracker 230 in FIG. 2C with high efficiency. This is achieved by a combination of (i) an efficient switch 160 to generate a first supply current (Iind) with a switching mode power supply and (ii) a linear envelope amplifier 170 to generate a second supply current ( Ienv).

[0023] FIG. 3 shows a schematic diagram of a switch 160a and an envelope amplifier 170a, which are a design of the switch 160 and envelope amplifier 170, respectively, in FIG. one. Within the envelope amplifier 170a, an operational amplifier (op-amp) 310 has its non-inverting input that receives the envelope signal, its inverting input coupled to an output of the envelope amplifier 170a (which is node E) and its output coupled to an input of a class 312 AB controller. Controller 312 has its first output (R1) coupled to the door of a P-channel metal oxide semiconductor transistor (PMOS) 314 and its second output (R2) coupled to the door of an N-channel MOS 316 transistor (NMOS) ). The NMOS 316 transistor has its drain coupled to node E and its source coupled to circuit ground. The PMOS transistor 314 has its drain coupled to node E and its source coupled to the drains of the PMOS transistors 318 and 320. The PMOS 318 transistor has its gate that receives an IC control signal and its source that receives the Vboost voltage. The PMOS 320 transistor has its gate that receives a control signal C2 and its source that receives the voltage Vbat.

[0024] A current sensor 164 is coupled between node E and node A and detects the Ienv current provided by the envelope amplifier 170a. Sensor 164 passes most of the Ienv current to node A and provides a small detected current (Isen) to switch 160a. The Isen current is a small fraction of the Ienv current of the envelope amplifier 170a.

[0025] Within switch 160a, a current detection amplifier 330 has its input coupled to current sensor 164 and its output coupled to an input of a switching controller 332. Controller 332 has its first output (S1) coupled to the door of a PMOS 334 transistor and its second output (S2) coupled to the door of an NMOS 336 transistor. The NMOS transistor 336 has its drain coupled to an output of switch 160a (which is node B) and its source coupled to circuit ground. The PMOS transistor 334 has its drain coupled to node B and its source that receives the Vbat voltage. The inductor 162 is coupled between nodes A and B.

[0026] Switch 160a operates as follows. Switch 160a is in a state of on

ES 2 736 156 T3 when the current sensor 164 detects a high output current of the envelope amplifier 170a and provides a low detection voltage to the controller 332. The controller 332 then provides a low voltage to the door of the PMOS transistor 334 and a Low voltage to the NMOS 336 transistor door. The PMOS transistor 334 is switched on and couples the Vbat voltage to the inductor 162, which stores energy from the Vbat voltage. The current inductor 162 rises during the On state, the speed of the increase dependent on (i) the difference between the voltage Vbat and the voltage Vpa on node A and (ii) the inductance of the inductor 162. On the contrary, the Switch 160a is in the off state when current sensor 164 detects a low output current from envelope amplifier 170a and provides a high sensitivity voltage to controller 332. The controller 332 then provides a high voltage to the door of the PMOS transistor 334 and a high voltage to the door of the NMOS transistor 336. The NMOS transistor 336 is activated, and the inductor 162 is coupled between node A and the circuit ground. The current inductor 162 falls during the Off state, the speed of the fall dependent on the voltage Vpa at node A and the inductance of the inductor 162. The voltage Vbat thus provides current to the power amplifier 130 through the inductor 162 during the On state, and the inductor 120 provides its stored energy to the power amplifier 130 during the Off state.

[0027] In one design, envelope amplifier 170a operates based on Vboost voltage only when necessary and based on Vbat voltage the remaining time in order to improve efficiency. For example, envelope amplifier 170a can provide approximately 85% of the power based on the Vbat voltage and only about 15% of the power based on the Vboost voltage. When a high voltage Vpa is required for the power amplifier 130 due to a large envelope in the RFout signal, the control signal C1 is in low logic, and the control signal C2 is in high logic. In this case, the Boost 180 converter is enabled and generates the Vboost voltage, the PMOS transistor 318 is activated and provides the Vboost voltage to the source of the PMOS transistor 314 and the PMOS transistor 320 is turned off. Conversely, when a high Vpa voltage is not required for power amplifier 130, control signal C1 is in high logic and control signal C2 is in low logic. In this case, the Boost 180 converter is deactivated, the PMOS transistor 318 is turned off and the PMOS transistor 320 is turned on and provides the Vbat voltage to the source of the PMOS transistor 314.

[0028] Envelope amplifier 170a operates as follows. When the envelope signal increases, the output of the op 310 amplifier increases, the output R1 of the controller 312 is reduced and the output R2 of the controller 312 is reduced until the NMOS transistor 316 is almost off, and the output of the envelope amplifier 170a increases The inverse is true when the envelope signal is reduced. Negative feedback from the output of the envelope amplifier 170a to the inverting input of the operational amplifier 310 results in the envelope amplifier 170a having unit gain. Therefore, the output of the envelope amplifier 170a follows the envelope signal, and the voltage of Vpa is approximately equal to the envelope signal. The controller 312 can be implemented with a class AB amplifier to improve efficiency, so that large output currents can be supplied although the bias current in transistors 314 and 316 is very low.

[0029] A control signal generator 190 receives the envelope signal and the voltage Vbat and generates the control signals C1 and C2. The control signal C1 is complementary to the control signal C2. In one design, the generator 190 generates the control signals C1 and C2 to select the Vboost voltage for the envelope amplifier 170 when the magnitude of the envelope signal exceeds a first threshold. The first threshold can be a fixed threshold or can be determined based on the voltage Vbat. In another design, the generator 190 generates the control signals C1 and C2 to select the Vboost voltage for the envelope amplifier 170 when the magnitude of the envelope signal exceeds the first threshold and the Vbat voltage is below one second. threshold. The generator 190 can also generate signals C1 and C2 based on other signals, other voltages and / or other criteria.

[0030] FIG. 3 shows an example of design of switch 160 and envelope amplifier 170 in FIG. 1. Switch 160 and envelope amplifier 170 can also be implemented in other ways. For example, envelope amplifier 170 may be implemented as described in US Patent No. 6 300 826, entitled Apparatus and Procedure for Efficiently Extending Broadband Envelope Signals ["Apparatus and Method for Efficiently Amplifying Wideband Envelope Signals ”], published on October 9, 2001.

[0031] Switch 160a has a high efficiency and provides most of the supply current for the power amplifier 130. The envelope amplifier 170a functions as a linear stage and has a relatively high bandwidth (for example, in the MHz interval). Switch 160a works to reduce the output current of envelope amplifier 170a, which improves overall efficiency.

[0032] It may be desirable to support the operation of the wireless device 100 with a low battery voltage (for example, below 2.5 V). This can be achieved by operating the switch 160 based on the Vbat voltage and the operating envelope amplifier 170 based on the higher Vboost voltage. However, the efficiency can be improved by operating the envelope amplifier 170 based on the Vboost voltage only when necessary for a large amplitude envelope and based on the Vbat voltage the remaining time, as shown in the FlG. 3 and described above.

ES 2 736 156 T3 [0033] FIG. 4A shows graphs of an example of the supply current PA (Ipa) and the inductor current (Iind) of the inductor 162 versus time for a case in which the switch 160a has a supply voltage (Vsw) of 3.7 V and the envelope amplifier 170a has a supply voltage (Venv) of 3.7 V. The current Iind is the current passing through the inductor 162 and is represented by a frame 410. The current Ipa is the current supplied to the power amplifier 130 and is represented by a graph 420. The current Ipa includes the current Iind as well as the current Ienv of the envelope amplifier 170a. The envelope amplifier 170a provides output current as long as the Ipa current is greater than the Iind current. The efficiency of switch 160a and envelope amplifier 170a is approximately 80% in an exemplary design.

[0034] FIG. 4B shows graphs of the supply current PA (Ipa) and the inductor current (Iind) versus time for a case in which the switch 160a has a supply voltage of 2.3 V and the envelope amplifier 170a has a 3.7 V supply voltage. The Iind current is shown by a frame 412, and the Ipa current is shown by the frame 420. When the supply voltage of the switch 160a is reduced to 2.3 V, the inductor 162 is charged more slowly, which results in a lower average lind current compared to the case in which the supply voltage of the switch 160a is at 3.7V in FIG. 4A. The lind current causes the envelope amplifier 170a to provide more of the current Ipa. This reduces the total throughput to approximately 65% ​​in an exemplary design because the envelope amplifier 170a is less efficient than the switch 160a. The efficiency reduction can be improved by increasing the lind current from the switch.

[0035] FIG. 5 shows a schematic diagram of a switch 160b, which is another design of the switch 160 in FIG. 1. Switch 160b includes current sensing amplifier 330, controller 332 and MOS transistors 334 and 336, which are coupled as described above for switch 160a in FIG. 3. Switch 160b further includes a current adder 328 having a first input coupled to current sensor 164, a second input that receives a offset (eg, a compensating current) and an output coupled to the input of the current sensing amplifier 330. Adder 328 can be implemented with an adder circuit (eg, an amplifier), a sum node, etc.

[0036] Switch 160b operates as follows. Adder 328 receives the Isen current from current sensor 164, adds a compensating current and provides a summed current that is less than the Isen current in the compensating current. The remaining circuits within switch 160b function as described above for switch 160a in FIG. 3. Adder 328 intentionally reduces the Isen current provided to the current detection amplifier 330, so that switch 160 is turned on for a longer period of time and can provide a larger Iind current, which is part of the Ipa current provided to the power amplifier 130. The offset provided to adder 328 determines the amount by which the current Iind is increased by the switch 160b with respect to the current Iind provided by the switch 160a in FIG. 3.

[0037] In general, a progressively larger offset can be used to generate a progressively larger inductor current than without the offset. In a design, the offset may be a fixed value selected to provide good performance, for example, good efficiency. In another design, the offset can be determined based on the battery voltage. For example, a progressively larger offset can be used for a progressively lower battery voltage. The offset can also be determined based on the envelope signal and / or other information.

[0038] A lag can be added to increase the inductor current through adder 328, as shown in FIG. 5. A lag can also be added by increasing the pulse width of an output signal from the current sensing amplifier through any suitable mechanism.

[0039] FIG. 4C shows graphs of the supply current PA (Ipa) and inductor current (Iind) as a function of time for a case in which the switch 160b in FIG. 5 has a supply voltage of 2.3 V and the envelope amplifier 170a has a supply voltage of 3.7 V. The current Iind is shown by a frame 414, and the current Ipa is shown by the frame 420. When the supply voltage of the switch 160b is reduced to 2.3 V, the inductor 162 charges more slowly, which results in a lower lind current as shown in FIG. 4B. The offset added by adder 328 in FIG. 5 reduces the detected current provided to the current detection amplifier 330 and results in the switch 160b being turned on for a longer time. Therefore, the switch 160b with offset in FIG. 5 it can provide a higher Iind current than switch 160a without offset in FIG. 3. The overall efficiency for switch 160b and envelope amplifier 170a is improved to approximately 78% in an exemplary design.

[0040] FIG. 6 shows a schematic diagram of a design of the Boost 180 converter in FIG. 1, 3 and 5. Within the Boost 180 converter, an inductor 612 has one end that receives the Vbat voltage and the other end coupled to the node D. An NMOS 614 transistor has its source coupled to circuit ground, its gate receiving a control signal Cb and its drain coupled to node D. A diode 616 has its anode coupled to node D and its cathode coupled to the output of the Boost 180 converter. A capacitor 618 has an end coupled to circuit ground.

ES 2 736 156 T3 and the other end coupled to the output of the Boost 180 converter.

[0041] The Boost 180 type converter works as follows. In an On state, the NMOS transistor 614 is closed, the inductor 612 is coupled between the voltage Vbat and the circuit ground, and the current through the inductor 612 increases. In an Off state, the NMOS transistor 614 is opened and the current from the inductor 612 flows through the diode 616 to the capacitor 618 and a load at the output of the Boost 180 converter (not shown in FIG. 6). Vboost tension can be expressed as:

Vboost = Vbat--

- Duty_Cycle

Ec (1) where Duty_Cycle is the duty cycle in which the NMOS 614 transistor is activated. The duty cycle can be selected to obtain the desired Vboost voltage and to ensure proper operation of the Boost 180 type converter.

[0042] The techniques described herein allow an envelope tracker to operate at a lower battery voltage (for example, 2.5 V or less). The envelope tracker includes switch 160 and envelope amplifier 170 for the design shown in FIG. 1. In a support operating design with a lower battery voltage, as shown in FIG. 3, the switch 160 is connected to the Vbat voltage and the envelope amplifier 170 is connected to the Vbat voltage or the Vboost voltage. The switch 160 provides power most of the time, and the envelope amplifier 170 provides power during the peaks in the envelope of the RFout signal. The overall efficiency of the envelope tracker is reduced by the efficiency of the Boost 180 converter (which can be approximately 85%) only during the time that the envelope amplifier 170 provides power.

[0043] In another support operating design with a lower battery voltage, the entire envelope tracker is operated based on the Vboost voltage of the Boost 180 converter. In this design, the Boost 180 converter provides a high required current. by the power amplifier 130 (which can be more than one Ampere), and the efficiency is reduced by the performance of the Boost 180 converter (which can be approximately 85%).

[0044] In another support operation design with a lower battery voltage, a field effect transistor switch (FET) is used to connect the envelope tracker to (i) the Vbat voltage when the Vbat voltage it is greater than a voltage of Vthresh or (ii) the voltage Vboost when the voltage Vbat is less than the voltage Vthresh. The efficiency would then be reduced by losses in the FET switch. However, better efficiency can be obtained for envelope amplifier 170 due to a lower input voltage.

[0045] In a design example, an apparatus (for example, an integrated circuit, a wireless device, a circuit module, etc.) can comprise an envelope amplifier and a Boost converter, for example, as shown in FIG. 1 and 3. The Boost converter can receive a first supply voltage and generate a high supply voltage that has a higher voltage than the first supply voltage. The first supply voltage may be a battery voltage, a line input voltage or some other voltage available to the device. The envelope amplifier can receive an envelope signal and the high supply voltage and can generate a second supply voltage (for example, the voltage Vpa of FIG. 3) based on the envelope signal and the high supply voltage. The apparatus may further comprise a power amplifier, which can operate based on the second supply voltage of the envelope amplifier. The power amplifier can receive and amplify an input RF signal and provide an output RF signal.

[0046] In one design, the envelope amplifier can additionally receive the first supply voltage and can generate the second supply voltage based on the first supply voltage or the high supply voltage. For example, the envelope amplifier may generate the second supply voltage (i) based on the high supply voltage if the envelope signal exceeds a first threshold or if the first supply voltage is below a second threshold or both or (ii) based on the first supply voltage in another way.

[0047] In one design, the envelope amplifier may include an operational amplifier, a controller, a PMOS transistor and an NMOS transistor, for example, the op amp. 310, controller 312, PMOS transistor 314 and NMOS transistor 316 in FIG. 3. The operational amplifier can receive the envelope signal and provide an amplified signal. The controller can receive the amplified signal and provide a first control signal (R1) and a second control signal (R2). The PMOS transistor can have a gate that receives the first control signal, a source that receives the high supply voltage or the first supply voltage and a drain that provides the second supply voltage. The NMOS transistor can have a gate that receives the second control signal, a drain that provides the second supply voltage and a source coupled to

ES 2 736 156 T3 the mass of the circuit. The envelope amplifier may further comprise the second and third PMOS transistors (for example, PMOS transistors 318 and 320). The second PMOS transistor may have a gate that receives a third control signal (C1), a source that receives the high supply voltage and a drain coupled to the source of the PMOS transistor. The third PMOS transistor can have a gate that receives a fourth control signal (C2), a source that receives the first supply voltage and a drain coupled to the PMOS transistor source.

[0048] In another design example, an apparatus (for example, an integrated circuit, a wireless device, a circuit module, etc.) may comprise a switch, an envelope amplifier and a power amplifier, for example, such as It is shown in FIG. 1 and 3. The switch can receive a first supply voltage (for example, a battery voltage) and provide a first supply current (for example, the current Iind in FIG. 3). The envelope amplifier can receive an envelope signal and provide a second supply current (for example, the Ienv current) based on the envelope signal. The power amplifier can receive a total supply current (for example, the Ipa current) comprising the first supply current and the second supply current. The first supply current may comprise DC and low frequency components. The second supply current may comprise higher frequency components. The apparatus may further comprise a Boost converter, which can receive the first supply voltage and provide a high supply voltage that has a higher voltage than the first supply voltage. The envelope amplifier can operate based on the first supply voltage or the high supply voltage.

[0049] In one design, the switch may comprise a current detection amplifier, a controller, a PMOS transistor and an NMOS transistor, for example, a current detection amplifier 330, a controller 332, a PMOS transistor 334 and a NMOS transistor 336 in FIG. 3. The current sensing amplifier can detect the first supply current, or the second supply current (for example, as shown in FIG. 3), or the total supply current and can provide a detected signal. The controller can receive the detected signal and provide a first control signal (S1) and a second control signal (S2). The PMOS transistor can have a gate that receives the first control signal, a source that receives the first supply voltage and a drain that provides a switching signal for an inductor that provides the first supply current. The NMOS transistor can have a gate that receives the second control signal, a drain that provides the switching signal and a source coupled to the circuit ground. The inductor (for example, inductor 162) can be coupled to the drains of the PMOS transistor and the NMOS transistor can receive the switching signal at one end and can provide the first supply current at the other end.

[0050] In another, more exemplary design, an apparatus (for example, an integrated circuit, a wireless device, a circuit module, etc.) may comprise a switch, for example, switch 160b in FIG. 5. The switch can detect an input current (for example, the Ienv current in FIG. 5) and generate a switching signal to load and unload an inductor that provides a supply current (for example, the Iind current). The switch can add a lag to the input current to generate a supply current greater than without the lag. The switch can operate based on a first supply voltage (for example, a battery voltage). In a design, the offset can be determined based on the first supply voltage. For example, a larger offset may be used for a smaller first supply voltage, and vice versa.

[0051] In one design, the switch may comprise an adder, a current sensing amplifier and a controller, for example, adder 328, current sensing amplifier 330 and controller 332 in FIG. 5. The adder can sum the input current and a compensating current and provide a summed current. The current sensing amplifier can receive the summed current and provide a detected signal. The driver can receive the detected signal and provide at least one control signal used to generate the switching signal. In one design, the at least one control signal may comprise a first control signal (S1) and a second control signal (S2), and the switch may further comprise a PMOS transistor and an NMOS transistor, for example, a transistor PMOS 334 and an NMOS 336 transistor in FIG. 5. The PMOS transistor can have a gate that receives the first control signal, a source that receives the first supply voltage and a drain that provides the switching signal. The NMOS transistor can have a gate that receives the second control signal, a drain that provides the switching signal and a source coupled to the circuit ground.

[0052] In one design, the apparatus may further comprise an envelope amplifier, a Boost converter and a power amplifier. The envelope amplifier can receive an envelope signal and provide a second supply current (for example, the Ienv current in FIG. 5) based on the envelope signal. The Boost converter can receive the first supply voltage and provide a high supply voltage. The envelope amplifier can operate based on the first supply voltage or the high supply voltage. The power amplifier can receive a total supply current (for example, the Ipa current) comprising the power supply of the switch and the second power supply of the envelope amplifier.

[0053] The circuits (for example, the envelope amplifier, the switch, the Boost converter, etc.)

ES 2 736 156 T3 described herein may be implemented in an IC, an analog IC, an RF IC (RFIC), a mixed signal IC, an ASIC, a printed circuit board (PCB), an electronic device, etc. The circuits can be manufactured with various IC process technologies such as complementary metal oxide semiconductor (CMOS), NMOS, PMOS, bipolar junction transistor (BJT), bipolar CMOS (BiCMOS), germanium silicon (SiGe), gallium arsenide ( GaAs), etc.

[0054] An apparatus that implements any of the circuits described herein may be a stand-alone device or may be part of a larger device. A device may be (i) an autonomous IC, (ii) a set of one or more ICs that may include integrated memory circuits for storing data and / or instructions, (iii) an RFIC such as an RF receiver (RFR) or an RF transmitter / receiver (RTR), (iv) an ASIC such as a mobile station modem (MSM), (v) a module that may be embedded within other devices, (vi) a receiver, cell phone, wireless device, or mobile unit, (vii), etc.

[0055] The above disclosure description is provided to allow any person skilled in the art to make or use the present disclosure. Various modifications of the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein but must be agreed upon with the broadest scope consistent with the novel principles and characteristics described herein.

ES 2 736 156 T3