Method of and apparatus for clearing away the modification increasing degree of protecting a video signal against copying

The present invention relates to a method and apparatus for removing a modification increasing the degree of protection of a video signal against copying.

The processes of protecting video cassettes against copying cause an additional deterioration of the image quality in the case of losing a copy of a protected recording and also reduce the readability of the image played from an unauthorized copy.

Methods of copy protection for video cassettes are known. An example is the solution described in US Pat. No. 4,631,603. In this known solution, the video signal is modified in such a way that the television receiver reproduces a normal color image from the modified video signal, whereas recording on the video cassette of the modified video signal results in substantially unacceptable images. This solution is based on the fact that typical video ARW automatic gain control systems cannot distinguish between normal synchronization pulses of conventional video signal and added pseudosynchronization pulses. Pseudosyn174 901 protection pulses are treated here as any other signals below the normal synchronization level and which last at least 0.5 gs. A set of pseudo-synchronization pulses is added to a conventional video signal during the vertical blanking period, and each of these pseudo-synchronizing pulses is followed by a positive pulse in the appropriate amplitude and duration. As a result, the ARW system in the VCR makes erroneous measurements of the video signal level, which causes this video signal to be recorded incorrectly. The result is an unacceptable image.

US 4631, 03, stated that added pulse pairs, each pair consisting of a negative pseudo-sync pulse followed by a positive ARW pulse, cause the ARW automatic gain control system in the VCR to incorrectly detect the video signal level and cause gain correction which causes incorrect recording on the video cassette.

Thus, a substituted copy protection method in accordance with the state of the art results in the recording of a video signal with abnormally low amplitude during a copy attempt. Some of these effects, observed during the reproduction of an illegal copy, are manifested by horizontal stripes (local displacements) and vertical image displacement. The appearance of these symptoms depends largely on the content of the image, i.e. from the presence of white (light) and black (dark) fields in the image. Hence, using this known method, which essentially provides excellent copy protection, with certain combinations of different video recorders such as e.g. VCR and television sets, an image is obtained that can be acceptable to those who tolerate low image quality.

Also, when using certain VCRs and TVs, various security methods cause a slight deterioration in image quality. Certain markets for recorded video cassettes are at high risk of piracy, i.e. illegal copying of video cassettes, despite the security features. Then viewers are generally insensitive to the poor image quality of illegal copies due to the use of known methods. Therefore, there is a need to improve the copy protection method that reduces the image quality more than known methods.

U.S. Pat. No. 5,1330O8 describes a system for removing some of the effects of the copy protection signal in U.S. Pat. No. 4,631,603. The addition of pseudo-synchronization pulses according to the method of the solution known from U.S. Pat. No. 4,611,603 causes that certain information systems on the screen of television receivers and reproduction apparatus falls out in the wrong part of the picture. US 5133008 describes a method and apparatus for correcting these defects caused by copy protection pulses. US 5133008 does not disclose how to modify a copy protected signal to make it recordable.

US 5,115767 describes a solution in which a signal similar to the horizontal synchronization signal is added at a point up to eight lines before the beginning of the vertical blanking area of ​​normal vertical synchronization pulses. A pulse is added that goes from the blanking level down to the synchronization level, like a synchronization-like pulse.

Furthermore, US Patent No. 5,194,965 describes a method of level shifting to remove or disable a copy protection system described in US Patent 4,611,603. This description does not disclose any method of level shifting or a device for removing or neutralizing systems with increased copy protection.

The method of removing the modification increasing the degree of protection of the video signal against copying, consisting in shortening the duration of at least some line synchronization pulses in the video signal, so that during registration erroneous field synchronization pulses in the video signal are created, according to the invention characterized by that the location of at least some line sync pulses with a reduced duration is determined, and line sync pulses are modified to extend their duration.

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It is preferred that the extended duration is shorter than the standard duration of the line synchronization pulse. In the modification stage, a line synchronization pulse is generated, the shortened line synchronization pulse is extinguished, and the generated line synchronization pulse is introduced in place of the blanked line synchronization pulse. The generated line synchronization pulses have such a duration that the video active part of the neighboring line extends.

An apparatus for removing a modification increasing the degree of protection of a video signal against copying, the security modification comprising reducing the duration of at least some horizontal sync pulses in the video signal such that this time is shorter than the standard duration, according to the invention characterized by that it is equipped with a logic system for determining the position of horizontal blanking intervals in at least some video signal lines and generating control signals in response, a pulse generator for generating a horizontal synchronization pulse of a specified duration, and a switching system for adding a generated horizontal synchronization pulse removing the modification increasing the degree of protection before copying, to the video signal in response to the control signal.

It is beneficial that the generator is a horizontal sync pulse generation system with a shorter duration than the standard one. In addition, the pulse generator also includes a system that generates a color synchronization signal and a switching system that adds the generated color synchronization signal to the video signal.

Embodiments of the invention are described in the context of the NTSC television standard, but modifications to PAL or SECAM systems can easily be applied.

The subject of the invention is shown in the embodiments in the drawing, in which Figs. 1a and 1b show a normal image and a modified image with a horizontal checkerboard pattern and vertical modification placement, Figs. 2a and 2b - an image arising from a video signal with normal amplitude, with and without pattern chessboard, fig. 3a, 3b and 3c, the same images displayed on a television with a reduced signal amplitude, without and with a checkerboard pattern and vertical modification, Fig. 4 shows a part of a video signal with a checkerboard pattern, Figs. 5a and 5b - a part of a video signal with vertical a modification not extending in the vertical and horizontal blanking interval, and a vertical modification extending in the vertical blanking interval, Fig. 5c shows an additional vertical modification extending in the horizontal blanking range, Figs. 6a, 6b, 6c show a system providing video modifications according to the invention, Figs. 7a, 7b - wave shapes illustrating the operation of the system of Figs. 6a, 6b and 6c, Fig. 8 - detail of the flicker generator of Fig. 6b, Fig. 9 - another embodiment of the system for providing video modification, Fig. 10 - known synchronization signal separator system, Fig. 11a to 11o - video waveforms illustrating narrowing of the horizontal synchronization signal, Fig. 12a - block diagram of the horizontal synchronization signal narrowing system, Fig. 12b - waveform illustrating the operation of the system Fig. 12a, Figures 13a, 13b - detailed diagram of the signal narrowing system horizontal synchronization, Fig. 14a, 14b - block diagrams of devices connecting synchronization signal narrowing with horizontal and vertical modifications, Fig. 15 block diagram of the device for removing various video signal modifications, Figs. 16, 17 and 18 - the system for removing the improved copy protection by level shift and exchanging horizontal synchronization, Fig. 19 - the second system for removing the improved copy protection by imposing a new synchronization and signal position color synchronization, Fig. 20 - third system for removing improved copy protection by multiplication, fig. 2122, 23 - three additional systems for removing the improved copy protection by the switching unit, Figs. 24a, 24b, 24c - a system for invalidating improved signals by broadening the synchronization, Figs. 25a to 25h, waveform shapes of the system of Figs. 24a and 24b, FIG. 26 - another system for neutralizing improved signals by averaging and attenuating the DC component, FIG. 27 - an additional system for neutralizing improved signals by clipping, FIG. 28 - another system for neutralizing improved signals, Figures 29a, 29b - waveforms illustrating the neutralization of improved signals by increasing the synchronization amplitude,

174 901 Fig. 30 - a system for neutralizing improved signals by increasing the synchronization amplitude, Fig. 31 - another system for neutralizing improved signals by tracking and maintaining systems, Figs. 32a and 32b - waveforms illustrating the neutralization of improved signals by adding a specific AC component, Figure 33 is a system for connecting circuits for neutralizing improved signals. 34a, 34b and 34c - waveforms illustrating synchronization clipping, Fig. 35a, 35b - waveforms illustrating the effect of broadening synchronization, Figures 36a, 36b - successive synchronization clipping points, Fig. 37 - a system for improving the checkerboard pattern due to pseudo-synchronization pulses occurring after sync pulses, Figures 38a to 38e - waveforms illustrating the operation of the system of Fig. 37, Fig. 39a - a system for neutralizing pseudo-synchronization pulses occurring after synchronization pulses, Figs. 39b to 39d - waveforms illustrating the operation of the system of Figs. 39a, Figs. 40a, 49d, 40g - systems for neutralizing pseudo-synchronization pulses occurring after synchronization pulses, Fig. 40b , 40c, 40e, 40f and 40g - wave shapes illustrating the operation of the systems of Figures 40a, 40d and 40g, Fig. 41a - a system for neutralizing pseudo-synchronization pulses occurring after synchronization pulses by narrowing these pulses, Fig. 41b - a corresponding waveform illustrating the operation of the system of Fig. 41 a, Figs. 42a, 42b - a system for neutralizing basic protections in accordance with the prior art, Fig. from 43a to 43g - waveforms illustrating the operation of the system of Figs. 42a, 42b.

The modification of the horizontal frequency signal (checkerboard) will now be discussed. Figure la shows a normal television image 10, without showing any current video information, i.e. comprising left and right obscured portions 14, 16, and top and bottom obscured portions 7.9. Part of the image inside the dashed line 13 is the visible area 11.

The obstructed part of the television picture is the part of the television picture that is not visible in a standard television set. Due to design constraints and aesthetic considerations, standard TV sets show slightly less than 100% of the transmitted image area. Those parts of the television image that are not normally visible are called the obstructed area. These areas can be seen in professional monitors with the ability to view obstructed areas. However, all standard televisions work in partial screening mode, so the addition of a checkerboard pattern and modified lines at the end of each field is not visible in standard televisions that are sold in the US or anywhere else.

Figure 1b shows the modified television image 12 after the modifications according to the invention have been made, also comprising obscured parts 14, 16. In the right part of obstructed part 16, there is a checkerboard pattern 20 with alternating black rectangles 26 and gray rectangles 24. Information on checkerboard pattern 20 provides improved copy protection. When displaying image 12 on a standard television set, the checker pattern 20 will not be visible as long as it is in the obscured area 16. The vertical signal modification is introduced in the upper obstructed area 9 and thus is not visible.

Figure 2a shows a video field 30 comprising a left screened part 32 and a right screened part 34, including in the visible area 36 a drawing 38 composed of a vertical and horizontal element, for example a cross. This field 30 is in accordance with the state of the art, and the checkerboard pattern and vertical modification signal are not included. There is also no reduction in signal amplitude, i.e. no known protection method is used.

Figure 2b shows a field 30 with an added checkerboard pattern 42 in the obstructed area 34 of outer boundary 13 and with an added vertical modification pattern 87 in the bottom obstructed part 9. If a signal with normal amplitude is present, checkerboard pattern 42 and / or vertical pattern 87 do not have no effect on the appearance of the cross 38, which is normally shown. The image shown in fig. 2b is the one that would appear on the monitor showing the whole area, not what would be seen on a normal television set.

It is not possible to graphically present the effect of this signal on the VCR. The TV will show interference due to abnormally low amplitude

174 901 signal. VCRs for recording and playback of copies may also be subject to interference. In this case, the VCR servo mechanism will be exposed to interference, resulting in a locally unstable image.

Figure 3a shows a picture 50 arising from a signal with a reduced amplitude, i.e. according to a protection method according to the known state of the art, arising from a relatively insensitive VCR, but without adding a checkerboard pattern. This figure only shows the visible part (inside the restriction 13 of Figures 2a and 2b) of the image on a standard television set. As can be seen, cross 38 is displayed normally because in this case the image content is such that there is no horizontal movement. This is the case when copy protection according to the state of the art gives insufficient protection because the image is clearly visible.

Figure 3b shows the effect of the checkerboard pattern 42 of Figure 2b with a reduced signal amplitude, i.e. using prior art protection in conjunction with the checkerboard pattern. Again, the screening portion is not shown in Fig. 3b. It can be seen here that the cross 38 undergoes a number of horizontal displacements 43 that occur at the transition points from gray area 46 to black area 44, and vice versa, checkerboard area 42 in Fig. 2b. As shown in the enlargement in Fig. 3c, the parts 43 of the vertical part of the cross 38 are horizontally shifted by the amount depending on the distance between the left edge of the black parts 44 of the checker pattern and the position of the true horizontal synchronization signal on each line. Simply put, the image 50 in Fig. 3b is significantly distorted. This effect is further enhanced by the movement of checkerboard pattern 42 slowly from top to bottom in a vertical direction, whereby the horizontal displacements move, i.e. flickering. This ensures that the image is actually illegible, i.e. the protection is sufficient.

According to the invention, the checker pattern 42 of Fig. 2b typically comprises five black rectangles 44 alternating with medium gray rectangles 46, with fewer rectangles shown in Fig. 2b for greater clarity. It was found that the maximum blur of the image occurs at about five transitions from gray to black and five from black to gray, counting on the height of the image.

The signal level of the black rectangles is set to be between the blanking level and the black level for the NTSC system (the black level and the blanking level are the same for PAL and SECAM systems), and at the black level for PAL and SEC AM, and the medium gray amplitude rectangles 46 are approximately equal to 30% of the white limiter level. Checkerboard pattern 42 introduces a zigzag pattern as shown in Fig. 3b. In other embodiments, there can be only one black rectangle 44, or two, three, four or more black rectangles per box 30 of Fig. 2b. Also, the sizes (heights and widths) of black rectangles 44 do not have to be uniform.

Such a process causes an early horizontal return in the low amplitude signal by making negative transitions, i.e. from the instantaneous image level at the beginning of the black rectangles 44 to the black level before the horizontal synchronization signals on at least some of the image lines. The checkerboard pattern 42 shown in Fig. 2b is such a pattern that produces the desired effect.

The typical duration, i.e. the width of the checkerboard pattern 42 is approximately 1.0 to 2.5 ps, which is determined by the requirement that the checkerboard pattern should not normally be entered into the displayed area of ​​a standard television image, i.e. it is limited to covered part and did not violate the normal horizontal blanking range.

In other embodiments, the horizontal sync pulse is narrowed, which allows the introduction of a wider checkerboard pattern. This ensures greater horizontal displacement when displaying a video signal with reduced amplitude, and the result is a non-standard original video signal, which is however acceptable in applications not related to broadcasting. Furthermore, the exact amplitudes of medium gray 46 and / or black 44 rectangles need not be described in detail here. All effects arising from the changed position of the rising edge of the synchronization pulse

174 901 horizontal and color synchronization signal can be corrected by corresponding displacement and / or widening of the color synchronization signal.

Figure 4 shows the horizontal blanking interval 60 of a single video line with the current part of the checkerboard pattern. The horizontal sync pulse 62 correctly starts 1.5 ps after the horizontal blanking interval 60 has started. The video active area 66, 68 appears before and after the horizontal blanking interval 60. According to the invention, part 70 of the video active area 66, just before the horizontal blanking interval 60, has been replaced by either a medium gray 74 level signal or a black level signal. Gray level 74 and black level 76 are shown in Figure 4 for illustrative purposes only. The loss of part 70 of the video active area 66 is not problematic because, as already described, in a standard television set this part is never visible because it is a obstructed part of the picture.

The transition 80 from video activity level 66 to black level 76 occurs in the television set as a horizontal synchronization signal. This effect only occurs when the displayed video signal has a reduced amplitude caused by copy protection.

The presence of medium gray 74 also ensures that the entire image is not shifted to the right. This would be the case if, for example, there was a thick black bar at the bottom right of the image. Alternating gray and black levels provide the zig-zag effect shown in Fig. 3b, which is not tolerable by the viewer. In fig. 4 it has been shown that only the modification of the video signal is the removal of a small portion of the video activity area 70 and its replacement with either gray level 74 or black level 76.

The flickering improvement already described causes the checkerboard pattern to move slowly from bottom to top of the image, and vice versa. It was found that if it takes about one second for a given transition to move from the bottom to the top of the image, and vice versa, then there will be a maximum reduction in image readability. This shifting flickering effect is provided by using a square wave frequency that generates a checkerboard pattern that is slightly shifted from the fifth harmonic field frequency, i.e. between 295 Hz and 305 Hz, for NTSC television. The corresponding frequency for PAL and SECAM systems is 245 to 255 Hz. This asynchronity ensures the desired slow motion in the checkerboard pattern. As described above, even if such asynchronism is not present and the checkerboard pattern is static, this is already a significant improvement on the prior art method. The frequency of the signal generating the checkerboard pattern can be set to maximize the deterioration of image readability during playback. Frequencies between 180 and 360 Hz for NTSC and 150 to 300 Hz for PAL (3-5 field frequency) usually provide an optimal effect.

In another embodiment, the checkerboard pattern is placed on the front threshold of the horizontal blanking interval, i.e. it does not replace any video active part. This somewhat reduces the amount of horizontal displacement. However, there is still at least some desirable effect that results in a signal that retains all image information but does not meet all NTSC standards. A checkerboard pattern does not have to be present in every field.

A modification of the vertical signal frequency will be presented. The detailed description refers to the horizontal image information. The modification of the video signal and the resulting effect relate to the horizontal direction of the image. The vertical frequency modification described in the description of the present invention will now be described in more detail.

Vertical modification takes several forms. In one embodiment, groups of 1 to 4 lines in the lower obstructed part of the video field have their active vision area replaced by either white or black. In another embodiment, the last few video lines just before the vertical sync pulse are blanked, and the original video image and the vertical sync it contains are replaced by either a high level (such as average gray, which is about 30% of the white stop, or current

174 901 whiteness limiter), or by a low level (in the range from black to white) of the signal, as indicated by 87 in FIGS. 1b, 2b.

These vertical modifications are normally invisible to the viewer because the modified video active lines are limited to those lines that are in the obstructed area 9 at the bottom of the image in Fig. 1b. Also, the modified lines will have a similar position as the switching point of the head when considering the image from the VCR, the image from these lines is not usable due to interference at and after the switching point of the head.

In the standard NTSC video signal, or in other standards, each of the first three lines of the vertical blanking interval includes two correction pulses, and each of the next three lines contains two broad vertical synchronization pulses. By default, vertical recovery begins just after the first of these pulses.

The first variant of the vertical modification is shown in Fig. 5a. The line numbers refer to the second field of the NTSC video frame. Lines 517, 518, 519 have the video active parts replaced by a white limiter signal, nominally 1.0 V. The same is done on lines 523, 524, 525. On lines 520, 521, 522 the video active part is replaced by the black signal, nominally 0 V. Instead of three-line groups, there can be groups of 0 to five lines, and the black and white signals can be modulated or have switched amplitude. In the last few lines of each field, the pattern of black and white signals dynamically changes between fields.

The second modification example, shown in Fig. 5b, blankes the last two video lines, e.g. lines 524 and 525, in the video field and the first three lines, e.g. 1, 2 and 3, from immediately following vertical blanking pulses. These two active lines are located in the lower obscured part 9 (Fig. 16) of the television image. Then a medium gray video signal (30% white limiter) 87 is generated and inserted in these five blank lines with a periodic base. When the medium gray signal is not turned on, as the arrows on lines 524, ..., 3 show, these blanked lines cheat vertical synchronization on most televisions by causing a vertical return at the beginning of the first of three lines instead of the usual five lines earlier before the start of the vertical sync pulse. The vertical return is therefore shifted by 'five lines. When these five lines have medium gray levels, the vertical return is initiated in the correct place by a normal vertical sync pulse. The number of such blank lines and the amplitude of the introduced waveforms may differ in various embodiments.

As shown in Fig. 5b, lines 1-6, of which only 1-4 are shown, are as in the standard signal, such as lines 517-523. The modification occurs only on lines 524, 525.12 and 3. The vision active parts of line 524,525 and the corresponding parts of lines 1-3 are blank at the black level, or have an inserted medium gray signal of approximately 0.3 V. This means that it is the nominal value of the amplitude, without considering the effect of amplitude reduction associated with the use of the known protection method. Fig. 5b shows part of the field with a medium gray level. As already mentioned, the gray signal is turned on and off, i.e. the signal oscillates, with a typical frequency of 1 Hz to 10 Hz. In the 1 Hz oscillation version, there are 30 coherent video fields of five lines having a video active part at blanking level, followed by 30 coherent video fields of five lines at 30% gray, as shown in Figure 5b. As shown in Fig. 5b, the color synchronization signal on lines 524 to 3 may be blanked or not.

These oscillations cause the image to jump up and down about 5 lines per second, which is very annoying to the viewer, as indicated by x in Fig. 3b. In the fields where the vertical modification of Fig. 5b is present, the vertical return occurs too early by five lines followed by five lines where the vertical return occurs normally. Early vertical recovery occurs because the entire amplitude has been reduced, for example, by a maximum, by a white limiter to the top of the synchronization signal, to 0.4 V from a value of 1 V in the NTSC standard, which is due to the presence of a known protection signal. The vertical separator in the television receiver then perceives the first five blank lines as the first vertical, wide synchronization pulses, which immediately makes them return vertically.

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In another embodiment not shown of the vertical modification, instead of the last two lines of one field and the first three lines of the next field, modified as in Fig. 5b, the modification applies to all five last lines 521, 522, 523, 524, 525 of the video active part of one field. This avoids creating a nonstandard video signal. A variation of this vertical modification may be the relocation of about 3 or more lines, such as 524,525 nafig. 5b to the line after the vertical synchronization area (i.e. lines 22-24). On some televisions, this causes a significant jump in the image, since the televisor responds to two vertical sync pulses as one at the same time, i.e. line 4 and e.g. 23.

The vertical modification does not extend over the entire video active part of the horizontal line. It has been found that providing modification for about 1/2 of the duration of video activity in the line is sufficient to generate premature vertical recovery.

In another embodiment of the vertical modification, similar in most aspects to that of Fig. 5a, as shown in Fig. 5c, the horizontal blanking interval is removed, i.e. blanked, from lines 517, 518, 519, 523, 524, 525, where white pulses are added. As a result (as in Fig. 5b), a non-standard video signal is also created, but it can be accepted for many applications not related to broadcasting. The elimination of horizontal blanking on these lines increases the ARW reduction gain (on the ARW circuits of VCRs). White pulses on lines 517, 518, 519 and 523, 524, 525 can be present in any field or modulated or switched on in amplitude. In addition, lines with white pulses can change positions a few lines from field to field, or by a constant field frequency multiplier to introduce a vertical blur effect when making or reproducing an illegal copy. Groups of white pulses can extend from zero to five lines.

Vertical modifications do not have the desired effect when viewed on a television set when playing an original authorized signal. However, if the signal amplitude has been significantly reduced, for example by a copy protection process, the TV monitor will tend to incorrectly play vertical sync information, resulting in vertical instability.

In addition, if a VCR signal is used in a VCR with copy protection that reduces the video signal amplitude in the recording, the servo drum will be disturbed during recording. This is because the VCR usually requires the correct vertical sync signal to maintain the correct phase, and the presence of tremors in the vertical sync signal causes the VCR to close. When the recording is played, the visible effect of vertical instability is intertwined with the band noise that occurs when the servo drum closes closing. This is similar to the variable tracking error.

Thus, vertical waveform modifications work similar to horizontal waveform modifications already described, except that vertical interference instead of horizontal is introduced. These two techniques combined together are more effective at reducing the readability of the image than any of them taken separately. Changing the frequency of the vertical waveform pulses increases the efficiency on most TV sets, i.e. the frequency ranges, for example, from 2 Hz to 10 Hz for a period of 20 seconds. Changing the chessboard frequency also causes horizontal shifting from top to bottom, resulting in a very annoying image when reproducing copies.

The system for introducing the described vertical and horizontal modifications is shown in block diagram form in Fig. 6a.

The main video path includes the Al leveling amplifier, synchronization pulse narrowing system 96 connected in series to it, connected to the mixing node 98, in which waveform components of the horizontal chessboard and vertical modification (introducing tremors) are added, to which the A2 control amplifier is connected output line. In this case, the video input signal can also have 9 lines from each field blanked to the reference level. The switching circuit for blanking is known.

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The process control and signal generation path includes a synchronization separator 100 connected to the control system 102, circuits (see Fig. 6b) to generate the required signal voltage that will be added to the main video signal, a selection switch system 104 (Fig. 6a) that provide the desired signal under the supervision of the control system 102.

In the input signal, the DC component is reproduced by the input leveling amplifier Al. The Al leveling amplifier ensures that the video signal has a DC component during the blanking period, before adding additional waveforms to this signal.

A fixed level video signal is provided to the mixing node 98 via a source RO impedance, usually greater than 1000 ohms. The added pulse signals are input to the mixing node 98 through a source impedance of less than 50 ohms. When it is required to modify the input signal, for example by the checkerboard component, the corresponding signal is selected and fed to the mixing node by a low source impedance, this signal replacing the input video signal from the leveling amplifier A1. When the input signal is to be unchanged, the elements of the selector switch 104 are all in the open positions, so that the video signal passes unchanged to the output line of the control amplifier A2. The resulting video signal at the mixing node 98 is fed to the line controlling amplifier A2 to provide a standard output signal and output impedance. The output of the leveling amplifier Al is connected to a synchronization separator 100. The synchronization separator 100 provides the synchronization pulses and frame identification signal required by process control system 102.

Process control circuit 102 generates control signals to activate the selection switches 104 at a particular point in time and for a given period of time so that different signals are introduced into the video input signal. All of these numerous signals that are intended to replace the original video input signal, consisting of high and low stable DC signal states. For example, a high chessboard pattern signal means a medium gray level, typically around 30% white delimiter, a low black level or blanking level. These different levels occur at the potentiometer terminals VR1, VR2, VR3, VR4 (see fig. 6b), which provide adjustable signal levels, or alternatively on a voltage resistor divider for pre-set signal levels, connected by appropriate selection switches 104 -1, 104 -2, 104 -3, 104 - 4, respectively, through A5 operational amplifiers, to ensure sufficiently low output impedance at mixing node 98.

The control system 102 generates appropriate pulses for selecting switches for checkerboard pattern signals and vertical modifications (see Fig. 6a). Checkerboard pulses are only used on some lines. One example is the start of a checkerboard pattern on the 10th line before the last line containing image information, i.e. 10 lines before the start of the next vertical blanking interval. Similarly, modifications through vertical tremor signals are only applied to selected lines, e.g., the last nine lines before the vertical blanking interval. Hence, both checkerboard pattern and vertical modification signals require control signals for both vertical and horizontal frequency components.

The video input signal (see Fig. 6c) is buffered by the amplifier A3 and coupled to the frequency separator by the coupling capacitor C1 and the low-pass filter containing the resistor R1 and the capacitor C2. The synchronization separator 100 provides component synchronization pulses and rectangular signals for frame identification. The synchronization pulses are fed into the closed phase loop of the PLL 110 phase controller. The PLL 110 phase controller using the VR6 potentiometer is set so that the output horizontal frequency pulse starts at the desired point in the checkerboard pattern, typically 2 μs before blanking (Fig. 7a). The output signal of the PLL 110 phase controller is used to differentiate the horizontal component with frequency fH in both signals, checkerboard and vertical modification. The output of the color synchronization gate of the synchronization separator 100 is negated by the inverter U5, which provides a leveling pulse

174 901 for leveling the A1 amplifier. The rectangular identification waveform output from the sync separator 100 is supplied to the OS1 system to provide a frame identification pulse with an approximate duration of 1 ps. The output signal with the fv frequency is used to differentiate the vertical frequency component of both the checkered pattern signal and the vertical modification signal. The horizontal frequency component of the closed phase loop system of the PLL 110 phase controller is used as the clock terminal of the memory address counter 114. The output frame frequency is used to reset the input terminal RS of the counter 114. The output signals of the memory address counter 114 are fed to memory 116, typically EPROM, which is programmed such that one of its output data lines provides a enable pulse for the CPE checker pattern, which is high during that portion of the image interval, where the pattern signal chessboard is to be present. The second output line of EPROM data provides the end-of-field identification signal ·, EFI, which is high during the line duration at the end of each field, all of which must contain vertical modification signals.

The horizontal frequency component fH from the closed phase loop system is also connected to the OS2 system, which generates an ELP line end pulse with the desired duration of approximately 13 ps. The output from the OS3 system triggers another OS4 system, so that a VJP output pulse with a duration of approximately 52 ps is produced. The moment of appearance and duration of the VJP pulse determine the position at the time the vertical modification signal is introduced, i.e. the VJP pulse is active during the desired portion of the active horizontal line period.

The four ELP, VJP, CPE and EFI signals are the desired control signals for the selector switches 104 -1, 104 -2, 104 -3, 104-4 (see Fig. 6). The end of the ELP line pulse is applied to the divider system 122 to differentiate the desired frequency to determine the frequency of the checker pattern. The higher the frequency, the greater the number of transitions from light to dark in the chessboard, counting on the height of the image. This frequency can be selected from a wide range of possibilities. A divider factor of 52 (n = 52) ensures good results. The output signal from the divider 122 is fed directly to one end of the three-input gate type IU4. The negated output signal from the divider 122 is fed to the corresponding input of the second three-input gate type IU5. The output part of the divider 122 is preferably a deflection circuit consisting of a pair of NE566 integrated circuits. One NE566 chip is nominally set to 300 Hz and the other to 1 Hz. The output of one-hertz system is supplied to the frequency control input of the three-hertz system. Both IU4, U5 gates also have CPE and ELP signal as input. The result is a high HVJ checker pattern control signal at the end of the U4 gate · output, and a low LVJ control signal at the U5 gate output.

A similar system generates signals for vertical modification control signals. The oscillator 126, preferably the NE555 or NE566 element, is configured to operate at low frequencies, typically between DC and 10 Hz. Oscillator 126 can be set to a high logic output state. Similarly, the frequency within the DC constant component level of 10 Hz may be deflected to disrupt the operation of as many television sets as possible during the reproduction of an illegal copy. This can be done by the NE555 pair of circuits described above. The output from oscillator 126 is provided to one input of the three-input gate type I U2. The negated output signal from oscillator 126 is fed to the corresponding input of the three-input gate type I U3. Of course, every television set can resonate or show vibrations for more than one frequency, resulting from changing the frequency of the oscillator 126, which provides the appropriate effect on a large number of receivers. The vertical jitter position signals VJP and the end of the EFI identification field, where the EFI signal is modified by the flicker generator 130 and will be labeled EFI ', are fed to the other two gate inputs U2, U3. The result is a high EFC H vertical shake control signal at the U2 gate output and a low EFC ​​L vertical shake control signal at the U3 gate output.

174 901

It should be noted that for appropriate modifications, the above device will produce added vertical- and horizontal modifications after the normal horizontal and vertical synchronization signals, for example vertical modifications added to the TV signal line 22-24 of the NTSC system so as to cause video return.

The system of Fig. 6b, in combination with the flicker generator system, via EFI ', produces a plurality of vertical modification signal patterns. Figure 6b shows a frame flicker generator 130 used in various embodiments of the invention to modify horizontal and vertical modifications. The generator has the following properties: It introduces a polarity change, i.e. inverting gray to black rectangles in a checkerboard pattern at certain specific multiple field frequencies, which suppresses vision from an unauthorized copy by interleaving the movement of the checkerboard pattern, which further reduces the readability of the copy. In addition, it changes, from field to field, the position of the end of field impulse (vertical modification) and causes that the reproduced image from the illegal copy strongly flows, because each field has a pseudo-critical synchronization signal at a different place in time. This is achieved, for example, if the EFl pulse is high on lines 255-257, the EFI1 pulse is high on lines 258-260, the EFI2 pulse is high on lines 261-262 and 1, the EFI3 pulse is high on lines 21-23.

Figure 8 shows the flicker generator circuit 130 of Figure 6b, and shows that these four pulses are multiplexed by the U10 multiplexer (e.g., element CD4052) when controlled from EPROM U8 (element 27C16 or 2716). As a result, vertical pseudo-synchronization pulses occur in different positions depending on the field. In a simple example, EFI, EFl1, EFI2, EFI3 pulses are passed once per field. As a result, during playback of an illegal copy, vertical pseudo-synchronization signals will occur on lines 256 or 259, or 262, or 22, in subsequent fields or frames. As a result, the image flickers due to the displacement of the vertical field synchronization signal on the TV or VCR. The EPROM U8 memory provides flexibility for placing different end-of-field pulses over time.

Figure 8 also shows how in the checkerboard pattern black rectangles change to gray at certain specific multiple field frequencies. Vertical sync pulses clock the 8-bit U7 counter (divisor by 256, element 74HC393). The output from the meter controls the EPROM U8 address lines. The output DO data signal from the EPROM U8 memory in a high state causes the inverting checkerboard pattern by passing through switches SW1K, SW2K. The flexibility of the DO signal from the EPROM U8 memory allows the appearance of the checker reversal command in a pseudo-random or periodic manner, also enabling different flickering frequencies, e.g. every 2 fields or every 5 fields. The data lines D1 and D2 of the EPROM U8 memory control the switching of the U10 multiplexer (element CD4052), similarly improving the flexibility of generating the EFI 'output signal.

A second system for generating vertical and horizontal modifications will be explained. As shown in Fig. 6b, the end of field and end of line pulses are switched by passing through a control resistor Ro. If the switches have a sufficiently low switch-on resistance, the video signal from the input source will always overlap the pulses of the upper end of the field or line. For example, a typical analog switching resistance is about 100 ohms. Typical resistance of control resistor Ro is around 1000 ohms. At these values, 10% of the video signal is superimposed on the end of line and end of field pulses. If the video signal is approaching the white limiter, the end of line or end of field pulses will be a maximum of about 10% of the white limiter (100 IRE), i.e. about 10 IRE, making the added pulses useless.

In order to overcome these possible problems, in another embodiment, the pulses are added and then switched through multi-position switches that at the same time disconnect the video source.

As shown in Fig. 9, high states and low states of the end of line are generated by the gate type I U23, to which input the oscillator output U22 is connected, and VJP and EFI signals are supplied. The SW103 switch switches between high and low status and is

174 901 controlled by resistors with variable resistance, RB and RA, respectively. A10A, A10B amplifiers are single amplifying separators. To avoid crosstalk at low EOF states and checkerboard pulses, the SW103A switch is on between the SW103 switch and the A100 amplifier, and the SW102A switch is on between the SW102 switch and the A101 amplifier. The U23A gate controls the SW103A switch, zeroing all lines other than the EOF line. Similarly, the U21A gate controls the SW102A switch causing zeroing at all times, except when the checker pulse is on. Otherwise, switches SW103A and SW102A are transparent for EOF and checker pulses from switches SW103 and SW102, respectively. The output signal from the SW103 switch is buffered by the unit amplifying separator and is added in the adder A102. Similarly, SW102 receives a high end of line condition, low states generated by the eLp signal, U20 counter (divider by n) and CPE signal.

Variable Rc and Rd resistors ensure high and low line end levels are set appropriately. The A101 amplifier buffers the SW102 switch in the A102 adder through the R2 resistor. Adder A102 provides a signal to adder A103. The PPS pseudo-synchronization pulse that occurs after the actual synchronization pulse is also added to adder A103. At the output of adder A103 there are: end of line pulses, end of field pulses and PPS pulses. The SW101 switch turns on all of these pulses through the LUB U10 gateway and the U11 inverter when they occur in time, and turns on the video signal at other times. The A104 amplifier buffers the SW101 output switch and provides a video output signal containing a video signal with added pulses. The SW104A switch initially blankes the video signal from the sync pulse narrowing system to the VBLNK voltage level (i.e. 0 IRE) for the last 9 lines in each field through the gate type IU1 04B. The IU104B gate has an EFO input from the EPROM, which ^ turns on high during the last 9 field lines and the pulse input of the active horizontal line VJP. The position modulation source for PPS pseudo-synchronization pulses is controlled by the Vgen voltage source. The Vgen source supplies the R20 resistor with a negated color synchronization pulse through the R10 resistor and C2 capacitor, creating a variable delay on the U20 multi-vibrator system. The signal from the U20 multivibrator has a variable position in time in the range of about 1.5 gs after the color synchronization signal from the video signal, and is turned off during the vertical blanking interval by the CPE signal and the NIE-IU21B gate. Resistor R6 is chosen so as to determine from -10 to -20 IRE. The other input U22A of the NIE-I U21 gate is normally high so that all PPS pulses are synchronization pulses with a fixed amplitude position. If U22A is flashing (i.e. 300 Hz), the signal containing the PPS pseudo synchronization pulses turns on and off at a frequency of 300 Hz. Thanks to this, the PPS pulse is a pulse with a modulated position.

The modification of the horizontal sync pulse narrowing will be explained on the basis of the sync pulse narrowing system explaining how to improve the copy protection of video signals, alone or in combination, as shown in Fig. 6b in block 96, with any other described method of signal modification. The need for narrowing of video signal synchronization pulses, mainly horizontal synchronization, results from the fact that when an illegal copy is made, suppressed video signal with a narrowed synchronization pulse causes problems with video reproduction and viewing on a television. This is because the receiver's synchronization separators contain systems for reproducing the constant component of the synchronization pulse peaks. Because these separators are usually controlled by medium impedances, synchronization pulses are partially cut out. By narrowing the sync pulses, the entire sync pulses are cut out. When making an illegal copy of a video signal, especially with the above-described checker signal and end-of-field modification signal, the copy has a reduced amplitude and shortened synchronization pulses. As a result, the synchronization separator perceives a serious loss of synchronization due to cutting out of narrowed synchronization pulses and through reduced amplitude. As a result, the TV synchronization separator does not properly emit the synchronization signal, which makes the TV image illegible because the effects of horizontal and / or vertical modifications are more intense.

174 901

Figure 10 shows a typical synchronization separator known from the prior art. This system works when the negated video signal is fed to the base of the transistor Q1 via the coupling capacitor C. The video synchronization tops charge the capacitor C, only so that only the very high peaks of the synchronization pulses switch the transistor. The resistor Ro loads the transistor so that the peaks of the synchronization pulses are cut off. The voltage Vc on the capacitor C depends on the resistance of the Ro resistor, which controls the video resistance. The greater the resistance of the Ro resistor, the more sync cut is visible at Vb. If the resistance of the Rb resistor is too high, the transistor Q1 will start trimming the synchronization (blanking level) in the video area, because the capacitor C is not charged to a medium level that allows the transistor to be cut just before the peak level of the negated video signal synchronization pulse.

Insufficient charge of capacitor C allows transistor Q1 to remain on even during blanking level interval. The base-emitter impedance is lower when the transistor Q1 is on (this suppresses the positive sync pulses). Because capacitor charging is a function of the sync pulse width, narrowing these pulses causes the sync separator to cut out a portion of the constricted sync signal larger than normal. This is equivalent to trimming the synchronization at a point close to the video signal, i.e. blanking level. At normal video levels, the narrowed sync pulse creates no problems in the readability of the video reproduced by the VCR and TV. But if the narrowed sync pulse is recorded to an illegal copy from a secured cassette, the video signal is suppressed. This attenuation together with the said narrowing causes the receiver to not properly emit synchronization pulses during reproduction, thus unsynchronizing parts of the video signal, i.e. blanking level.

Selectively narrowing certain horizontal sync pulses to a pulse width close to zero, for a duration of less than 600 ns, so that the filter in the VCR and TV receiver synchronization separator does not respond, or so that the coupling capacitor of the synchronization separator does not charge enough, is equivalent to a lack of synchronization pulse in this area. These selected narrowed horizontal sync pulses near the end of the field can create the situation that the sync separator will trim the blank video line as a new, incorrect sync pulse during playback. With a video signal from an illegal copy, with suppressed vision delivered to the television set, this situation will cause the perception of two vertical pulses in one field, which may cause vertical shaking.

In a preferred embodiment, the pulsation (modulation) frequencies of the end of the video field lines, those end of field lines having an amplitude from 0 IRE to at least 10IRE, containing narrowed synchronization pulses, range from 1 Hz to 15 Hz. This creates the desired effect on many types of TV sets.

Figure 11a shows the waveform of the video signal Vin. This is the negated signal in the TV synchronization separator system of Fig. 10 and is coupled to the resistor Ro (where Ro ~ 0) of Fig. 10. Fig. 11b shows the effect of the coupling effect of the capacitor C and the resistor Rb. Note that at Vb, the video signal gradually increases toward the top of the synchronization level. This is due to the RC time constant of the resistor Rb and the capacitor C, if Rb »Ro.

Figure 11c shows narrowed horizontal synchronization pulses. Operation of the Ro resistor, where the resistance of the Ro resistor is the average resistance, i.e. from 200 to 1500 ohms, of the C capacitor, resistor Rb and transistor Q1 causes the clipping of the narrowed peak of the synchronization pulse. Because the sync pulse widths are smaller, the capacitor C is not sufficiently charged, which results in a larger cropping of the sync pulses. Given that the charge of capacitor C depends on both the amplitude of the synchronization pulse and its width, i.e. the voltage Vc is proportional to the width of the synchronization pulse multiplied by the synchronization amplitude. The lower the Vc voltage, the greater the clipping effect. Fig. 11d shows this effect at Vb in Fig. 10.

174 901

Figure 11e shows a suppressed video source signal from an illegal copy with narrowed sync pulses, where level A indicates the presence of checkerboard pattern pulses. The sync separator responds by completely cutting off the sync pulses and as a result, video portions from the end of the line are interpreted as new sync pulses, as shown in FIG. 11 f. The Q1 inverting sync separator turns on during the cut portion of the vision.

Figure 11g shows that by cutting off some of the vision, the rising edge of the synchronization pulse becomes unstable, resulting in an unstable image, i.e. shaking sideways. As shown by the arrows, the resulting unstable horizontal sync pulses are caused by the narrowing of the sync pulses or by the checkerboard pattern pulses.

Figure 11h shows what output pulses from the synchronization separator should be in the television receiver for the signal shown in Figure 11d, which is a full-level television signal with narrowed synchronization pulses. Then the signal of Fig. 11 d does not create problems when playing it on a television set. Only if the signal from fig. 11d is added to a copy-protected signal, problems playing an illegal copy become apparent because the copy has a muffled signal.

Figure 11i shows for a full undamped video signal that if the selected lines near the end of the video field or after vertical synchronization pulses, i.e. for the NTSC system lines 256-259, 10-12, are tapered with a variable amplitude, i.e. switching from around the level blanking to about 10-100 IRE, then the sync separator Q1 transistor will start raising the notch in the image area, i.e. the ZZ area in Fig. 11j. This causes a wider pulse in the ZZ area, but not wide enough to cause a vertical sync pulse.

Figure 11k shows the waveform of Figure 11j at the output of the synchronization separator. If this waveform is accompanied by copy protection signals, the illegal copy will provide the suppressed signal to the television synchronization separator, as in Fig. 11l. Fig. 11l shows suppressed video resulting from copy protection, with narrowed sync pulses attached at the end of each field line.

The figure 1.1m shows the action of voltage rise at Vb through the resistor Rb and capacitor C. The output from the synchronization separator reveals at point y a new, erroneous wide vertical synchronization pulse. This new vertical pseudo sync pulse was created when the narrowed horizontal sync pulses are with the ends of the field lines at the blanking level. When narrowed horizontal sync pulses are accompanied by an amplitude of 10 to 100 IRE, the sync signal separator outputs narrow horizontal frequency sync pulses without any new wide pulses. This is because levels 10 to 100 IRE are completely ignored by the sync separator. By enabling and disabling blanking and signals larger than 10 IRE units, the synchronization separator notices normal horizontal synchronization, sometimes followed by erroneous pulses of earlier or later vertical synchronization (see Fig. 11n). Erroneous earlier and / or later pulses cause the image to shake from top to bottom when playing an illegal copy.

In some cases, to achieve the above effect, you can narrow selected sync pulses to about 0, i.e. eliminate horizontal sync pulses, so that the synchronization separator in the receiver produces an incorrect vertical sync pulse, or move several sync pulses with periods greater than 63.5 ps , causing the sync separator to malfunction and creating new erroneous vertical sync pulses.

Figure 11o shows a video signal that is free of erroneous vertical sync pulses due to the fact that the video signal is above blanking level, i.e. over about 10 IRE, in the area of ​​narrowed pulses. Hence, if the video signal level is

174 901 sufficiently high relative to blanking level, the presence of narrowed horizontal sync pulses does not generate erroneous vertical sync pulses.

As shown in the sync narrowing system in Fig. 12a, an input video signal, which may already carry copy protection pulses, is input Oo of input 160, from where the synchronization separator Oo is brought 162 and also to video adder 164. The sync separator 162 discharges the separated horizontal sync and vertical sync signals into the gate of the line selector 166, which selects current lines from 10 to 250 'from each of the video fields. Separated H synchr pulses are also connected to the OS10 multivibrator, which in response generates a signal with a duration of about 2 μs to the IU12 gate, with a line selection signal indicating selected lines from 10 to 250 being fed to the second input of this gate, and a gate at the output is scaled by amplifier 174. The output from the scaling amplifier 174 is added to the original video signal in combiner 164, the output of which is connected to the end of the video output 180.

Figure 12b shows the waveform representation at point Q of Figure 12a, i.e. the traditional H synchr signal with color synchronization signal, and the signal at R at the output from the scaling amplifier 174. The sum of the signal at point R and Q, i.e. the signal at the lower part of Fig. 12b, is visible at the output terminal 180, which is a shortened H synchr pulse, with a color synchronization signal.

Another system for making sync pulse narrowing with an extending envelope of the color sync signal (an extending color sync signal is necessary to block color in TV sets, if narrowed horizontal sync signals cause problems with this blocking) will be described in connection with Figs. 13a, 13b, where the system for introducing narrowed horizontal synchronization pulses to a visually active field is presented. In this field, the data output from the EPROM memory makes it possible to determine which lines should be narrowed. For example, this EPROM EPD1 memory output can allow lines 20-250 to have 3.7 μs wide sync pulses, and lines 251-262 to 2.0 μs wide. Other combinations are possible depending on the programming of the EPROM U9. Also other EPROM U9 memory output can cause line sync cancellation (i.e. on lines 255 and / or 257) or similar operation, before placing EOF pulses, and this is done by gate I U10 and EPD2 from EPROM U9. The displacement of narrowed horizontal sync signals is also possible after performing sync suppression on a normal HBI signal.

The video input signal, carrying any combination: base protection, end of field pulses, checker signals or a normal RS170 video signal, is a DC component synchronization signal, reproduced by the Al amplifier at 0 V, which corresponds to the blanking level. The Al amplifier provides an output signal to the U2 synchronization separator system, which in turn discharges horizontal synchronization signals and vertical pulses of 1 μs and 20 μs. In order to generate a color sync signal gate to close the video color sync input signal in 2015, you must be careful not to generate a color sync signal gate pulse when pscudosyaahronisation pulses are present, i.e. if the video input signal has basic copy protection. Hence, the U3 multivibrator takes the synchronization and pseudosynchronization components and produces aniergrdgerable pulse with a duration of about 45 μs, long enough to ignore attenuation and vertical 2H pulses in the vertical blanking interval, as well as pseudosynchronization pulses that may be present, usually in the first 32 ms on line 10-20. The U10 multivibrator delays the rising edge of the sync input signal by 5 ps and triggers the U11 multivibrator, with a 2 ps pulse duration, so that it coincides with the color sync input signal.

The A1 amplifier controls the A91 mid-pass filter, whose output reaches the 2105 closed phase loop color synchronization signal. The output of the PLL 2105 is a continuous subcarrier wave closed in phase with the color synchronization input. The PLl 2011 system sets the phase of the regenerated subcarrier to be suitable at the output of the A5 amplifier. Frame sync pulse from the U2 synchronization separator

174 901 resets the U8 counter addresses for the U9 EPROM. The U8 counter is incremented by horizontal frequency pulses from the A3 amplifier. The EPROM data line outputs specify the states of each line in the active field as high or low.

One of the advantages of the system of Figures 13a and 13b is that the regenerated narrowed synchronization signal can be inserted at any time within the horizontal blanking interval HBI. This becomes especially advantageous when a new regenerated synchronization pulse can start 1 ps before the horizontal sync input pulse. With this shift between pulses, horizontal image instability from an illegal copy-protected copy results in 1 ps longer shaking. By accelerating the narrowed horizontal sync pulse, a larger time interval will be created between the narrowed horizontal sync pulse and the PPS pseudo-sync pulse, resulting in proportionally greater image instability when played from an illegal copy.

To generate acceleration of the narrowed horizontal sync pulse, the output from the U2 multivibrator, with a trigger time of 45 ps, coinciding with the rising edge of the input signal, is converted into a rectangular waveform by the U4 multivibrator with a trigger time of 32 ps. The filter containing elements R1, L1, C1 filters the output from the U4 multivibrator in a mid-pass manner producing a sine wave with a frequency of 15.734 kHz.

By setting the inductance L1, a sine wave is generated before or after the horizontal synchronization signal. The comparator A3 converts a sine wave into pulses whose edges accelerate or delay the rising edge of synchronization. The tracking of the ability of a filter consisting of R1, L1, C1 to generate synchronous waveforms for an input video signal is substantially greater than that of most PLL phase loop systems when the video signal is from a VCR. The output from the amplifier A3 passes to the U5 multivibrator with a trigger time of 14 ps, generating an HBI gate signal replacing the original input synchronization signal and the color synchronization signal, a new synchronization signal and a new color synchronization signal.

The U6 multivibrator sets the nominal delay of the narrowed signal to 0.5 ps from the beginning of the HBI video input signal, from the rising edge of the U5 multivibrator, and the U7 multivibrator triggers a new narrowed sync pulse. Elements R2, R3 and Q1 form a switch for narrowing the pulse by additional shorting the emitter to the collector of the transistor Q1, and by the EPD1 command, i.e. for lines 251 -262 of each field, the EPD1 command is low, otherwise high. The output signal from the U7 multivibrator is then pulses of 3.7 ps duration for lines 20 to 250, and pulses of 2 ps duration for lines 251 to 262. The falling edge of the U7 multivibrator triggers the U12 multivibrator, whose output is a stretched gate a color synchronization signal with a duration of about 5.5 ps.

The U12 multivibrator output signal gates the 2011 color sync signal through the SW22 switch, with the A4 (f-3.58 MHz) wide-pass filter shaping the way the color sync signal envelope from the SW22 switch extends and feeds its output to the adder A5 through the setter extent of amplitude of the R10 color synchronization signal. The narrowed horizontal synchronization signal from the U7 multivibrator is subjected to a logical product operation in the IU13 gate with the EPD2 signal, which is generally high, except for a few lines from which the narrowed synchronization pulses are to be lifted, which enhances the end-field pulses. The U13 gate output signal is summed up in the A5 amplifier through the R8 resistor regulating the amplitude of the narrowed synchronization signal. The output of the A5 amplifier therefore has a narrowed synchronization signal added to the extended color synchronization signal. The SW25 switch switches the output from the A5 amplifier based on the signal from the gate I U14, which output is connected to the gate OR U20, which turns on the output of the amplifier A5, during the HBI signal, through the U5 multivibrator and the EPD3 signal, which are impulses of the active field position , i.e. for lines 20-262.

The A22 separator gives an output signal which is a transformed input signal with new narrowed horizontal sync pulses and an extended color synchronization signal. The U16 multivibrator with an excitation time of 1.0 to 40 ps, ​​activated by the rising edge of the input signal, contributes to the generation of the gate-shifting signal of the EOFRSP synchronization pulse at the end of the field. Gate U16 is

174 901 coupled with a U17 gate that generates pulses with a duration of 2 to 4 μs that are delayed by 10 to 40 μ8 from the rising edge of the input signal. The output of the U17 gate is passed depending on the state on the second input of the IU18 gate, which depends on the EPD4 signal from the EPROM U9. The EPD4 signal is high for certain lines at the end of the field after the synchronization cancellation is activated by the EPD2 signal. The U16 gate will drive the A5 adder through the E85RSP adjusting resistor R85. The U16 gate also turns on the SW25 switch for the duration of the active EOFRSP signal through the OR U20 gate to issue a shifted EOFRSP synchronization pulse. Thanks to this, an input signal, a narrowed synchronization signal and possibly one or two lines of abrogated synchronization and / or several lines with displaced narrowed horizontal synchronization signals appear at the input of the A2 amplifier.

Narrowing the sync pulse is effective when not all horizontal sync pulses are tapered. It has been found that even a relatively small number of narrowed sync pulses cause erroneous vertical recovery. For example, three to six consecutive video lines with narrowed horizontal sync pulses are suitable for this purpose. It is advantageous to group narrowed sync pulses in successive, or at least relatively close to, lines to generate an erroneous vertical return.

Figures 14a and 14b show block diagrams of two devices for combining the sync pulse narrowing described above with the known protection method used and with horizontal and vertical signal modifications.

Figure 14a shows a first such device, where the video signal of the program is fed to the prior art block 204 of systems adding security signals containing added ARW pulses and pseudosychronization pulses. The next block 206, shown in detail in Fig. 6a, adds a checkerboard pattern and vertical frequency modifications at the end of each selected field. Next, block 208 of the sync pulse narrowing system, shown in detail in Fig. 13a and 13b, modify the video signal that is fed to output 209, e.g., to the main VCR duplicator in a video cassette copying device. It has been found that the known protection method has only been improved by adding sync pulse narrowing to it. Alternatively, in fig. 14b is the input video signal is first fed to block 208 of the sync pulse narrowing system, then to blocks 204, 206 of copy protection systems and vertical frequency modification, and adding a checkerboard pattern, from where it is led to output 210.

Another device may also introduce the described modifications of the video signal, i.e. checkerboard pattern, vertical pattern at the end of the field, narrowing of sync pulses and their equivalents.

The method and device for removing copy protection signal will now be described, including pseudo-sync pulses and / or narrowing of sync pulses, and / or checkerboard pulses at the end of the line, and / or vertical pseudo-sync pulses of the field end.

Known methods for introducing ARW pulses and adding pseudo-synchronization pulses correspond to known methods and devices for neutralizing and thus removing or suppressing these added pulses. Until now, removal of pulse narrowing or vertical pseudo-synchronization pulses or end-of-line (checker) pulses has not been described. Processing amplifiers, as is known, can remove the narrowing of sync pulses by regenerating sync signals, but they cannot remove checker line end pulses or vertical field end pseudosync pulses.

Methods to remove these protections have not yet been known. Only blanking them may result in residual improved copy protection when making illegal copies. The reason is that the level of blanking alone with the presence of pseudo-synchronization pulses and ARW will cause that the suppressed video signal will be fed into the television when playing an illegal copy. This attenuated signal has, for example, field end lines at blanking level and

174 901 may in this situation cause vertical pseudosynchronization pulses. This is especially so if narrowed horizontal sync pulses are still present.

At the same time, if only the narrowed sync pulses are restored to their normal width, the other two pre-copy improvements present in the signal will still be effective.

Thus, the presented methods remove the various described copy protection improvements.

First, end-of-line safety signals (checkerboard modification) are replaced by a signal at least 20% of the white limiter or a level shift signal of at least 20% of the white limiter is added to the end-of-line signal. Signal replacement or addition may involve part of the video signal. Part is understood to be the part of the end-of-line pulse to be neutralized, or part of all video lines that have end-of-line pulses. _

Second, the end of field (vertical) copy protection pulses are replaced by a signal of at least 20% whiteness limiter for a period of at least about 32 ps per line. Alternatively, a level shifting signal of at least 20% whiteness limiter is added to the vertical pulses at approximately 32 ps on a sufficient number of lines (i.e., 7 out of 9.5 out of 7.2 out of 3) to remove protection. It should be emphasized that the 20% White Limiter level mentioned here for vertical and checkerboard pulses has been set as the typical minimum value needed to achieve the measured neutralization effect of the video security enhancement and a higher signal level (such as 30% or more) will meet its task completely.

Thirdly, most (50% or more) of narrowed sync pulses are expanded to remove the effects of the narrowing process, i.e. if the sync pulse is narrowed to 3.0 ps, ​​the pulse extended to 4 ps may be appropriate so that this protection stops functioning , without the need to replace narrowed sync pulses by horizontal sync pulses according to the RS 170 standard. The value of 4.7 ps is specified as the width of the horizontal sync pulse in this standard.

Fourth, extended synchronization pulses entering the end of line (checkerboard) pulses can be used to neutralize both of these protections. Care must be taken to ensure that the TV's return loop pulse continues to trigger a color synchronization signal, since such a widening of the synchronization pulse, which will include some of the checkerboard pulses, may cause the receiver's reverse loop pulse to trigger prematurely.

. Fifthly, the horizontal synchronization signal and the color synchronization signal of appropriate widths shifted to the checker pulse area can neutralize both the narrowing of the synchronization signals and the checker pulse, without causing the return passage signal in the receiver to cause inappropriate triggering of the color synchronization signal.

Vertical pulses will act as vertical sync pulses on the receiver if the video signal amplitude is reduced. Most VCR receivers and VCRs need about 30 ps to trigger a vertical sync filter that discharges a vertical pulse. Hence, by modifying the vertical pulses so that even if there are any vertical pseudo sync pulses with a duration less than, for example, 20 ps, ​​the desired vertical pseudo sync pulses do not pass to the vertical sync filter output.

Sufficient neutralization of checkerboard pulses arises if the low level of checkerboard pulses is reduced so as to cause that the narrowed horizontal sync pulse is not detected by the synchronization separator of the receiver and the VCR. This removes the effect of a checkerboard pattern when losing an illegal copy.

Figure 15 shows a two-stage system for removing all described protections. The video signal containing ARW pulses, pseudo sync pulses, vertical pulses and narrowed horizontal sync pulses is first fed to input 228

174 901 of known system 230 for removing the effects of ARW pulses and pseudosynchronization pulses. Then, the output signal of this circuit is fed to an upgrade removal system 234 that neutralizes checkerboard impulses and vertical pulses, and neutralizes constriction of sync pulses and any remaining ARW pulse or pseudosync pulses in the horizontal blanking range. The video signal at output 236 is free from any copy protection.

In this embodiment, the checker pulses and vertical pulses are accurately neutralized by replacing these pulses with pulses having an amplitude of about 20% whiteness limiter or by adding a level shifting signal with an amplitude of about 20% whiteness limiter. Checkerboard pulses can also be neutralized by replacing them with wide vertical sync pulses. Then the checkerboard impulses are removed and the vertical synchronization impulses are expanded in order to neutralize the narrowing of the impulses. Finally, if the horizontal blanking interval HBI is replaced by a new horizontal synchronization signal and a new color synchronization signal, then all sync pulse constrictions and all ARW pulses and / or pseudosync pulses in the active field are removed.

Also in this embodiment, narrowing the duration of the black level of checkerboard pulses and vertical pulses results in a readable copy. Also, any ARW pulses following a normal horizontal sync pulse can be removed by adding a negative level shift pulse to make the color sync signal valid, or by replacing it with a sync signal or a color sync signal. The system for performing this operation will be described with reference to Fig. 16, which shows a detailed diagram of block 234 in Fig. 15. The signal protected by an improved method is input to amplifier A10 with K gain (i.e. K = 2). The output from the A10 amplifier is connected to the Cl capacitor, diode Dl and resistor R1, which together form a constant component synchronization renewal system. The resistor R2, capacitor C2 and capacitor Cl form a relay filter so that comparator A11 can properly separate the synchronization signal. The reference voltage Vbl sets the cutting point so that the comparator A11 works as a synchronization separator. The output from the comparator A11 is then connected to a low-pass filter consisting of a resistor R3, inductance L1 and capacitor C3, for reproducing the vertical frequency pulse. The A12 comparator with the Vb2 reference level is a vertical synchronization separator.

Because this video signal can come from a VCR, some synchronization separators, i.e. LM 1881, produce abnormal frame pulses at the output of the VCR. To generate a frame pulse, the Ul multivibrator discharges a pulse that ends just six lines from the beginning of the first vertical sync pulse. The U2 multivibrator discharges a pulse about 25 gs wide.

In addition, the inverter U6 output signal and the U2 multivibrator output signal are fed to the I U7 gate input, which generates an impulse appearing every two fields or every frame. Only in one field are the outputs of the U6 inverter and the U2 multi-vibrator high. There is a FID gate signal at the U7 gate output that triggers (fig. 17) the U8 multivibrator with a 1.5 field pulse duration. The U9 flip-flop has a vertical synchronization signal connected to the clock input, and the U8 multivibrator output is connected to the D input, which generates a rectangular wave whose rising and falling edges coincide with the first (wide) synchronization pulse of the incoming video signal. The U10 multivibrator together with the U11 counter and with the horizontal frequency pulse from the horizontal PLL U4 generates 10-bit address signals on the B10 address bus, which can take 525 states. EPROM U12 memory is addressed by the 10-bit B10 bus, however, depending on programming, the outputs contain the following signals: position of the active AF field - high state for lines 22-262; end of field position EOFL - high level for lines 254 to 262.

In Figure 16, the PLL U4 system and the U5 multivibrator are a horizontal frequency PLL system such that the output signal of the PLL U4 system appears earlier in relation to the increasing

174 901 edges of vertical sync video signal by about 3 μs. This is obtained by the U5 multivibrator, which delays the U4 output by about 3 μs. The U5 multivibrator output signal is again fed to the phase detection input of PLL U4. Since the slopes of both detector inputs in the PLL U4 system must match, the output of the PLL U4 system must be before the rising edge of the synchronization signal from the amplifier 101. The PLL U4 system ignores all pulses other than horizontal frequency pulses. Hence vertical and other pulses are ignored by this system.

In addition, the U3 multivibrator processes the sync pulse of the video input color synchronization signal by timing the falling edge of the synchronization signal from the A11 comparator.

Figure 18 shows a level shifting system for disposing of vertical pulses and a checkerboard pattern. The A20, A21 amplifiers form an adder. The signals are supplied to this adder through the resistor R100 for the video signal and through the resistor R101 for field pulses. By applying the horizontal acceleration of the AHP pulse, which occurs at the same time as each checker pulse, the pulse with a duration of about 1.5 s is shifted by the AHP pulse using the AF field signal from the EPROM U12 memory. The IU13 gate generates a high EOLD pulse at the end of each line during the active field. This pulse from the U13 gate is then added to the video signal, which means that the checker pulse now has a minimum level of 20% whiteness limiter. This prevents checkerboard end-of-field pulses because in the conditions of suppressed video signal, checkerboard pulses do not go below a level that would cause accidental triggering of the synchronization separator.

Similar results are achieved for vertical pulses, where the U16 multivibrator generates an active horizontal line pulse with a duration of approximately 49 | s (minimum 39 | s) by the AHP pulse supplied to the U15 multivibrator. The U16 system triggers the U15 multivibrator, with a pulse duration of 14 ps. This active horizontal line pulse is fed to the IU150 gate input along with the EOFL field end position pulse from the U12 EPROM. EOFL pulses send a high logic level at the end of the field during a horizontal active line through the U150 gate. This logic level from the U150 gate is added to the video signal by a resistor R102 to ensure that the vertical pulses are at a minimum level of 20% of the white limiter. At vertical pulses having a level of at least 20% whiteness limiter, in the case of suppressed video signal, these new pulses field end lines will not cause pseudosynchronization. The output of the A21 amplifier therefore includes a mechanism for removing both checkerboard and end-of-field impulses. To remove pulse narrowing, the output amplifier is connected to capacitors C12, C13, diodes D10, D11 and resistor R12, which form an amplifier of the constant component of synchronization peaks. VD2 voltage is set to 0 V, with blanking level in A22 amplifier. By reusing the AHP pulse, the U17 and U18 multi-vibrators generate a new extended synchronization pulse. The components R17, C18, C3, C19, R18 and R19 constitute a low-pass filter for synchronization with a finite rise time. The Vb3 voltage is set to establish a blanking level for the high state of the new extended synchronization pulses. Multivibrators U19 and U20 together with gate I U21 constitute a control logic unit for reinserting a new extended horizontal synchronization pulse during active field. The outputs of the U19 and U20 multi-vibrators are slightly delayed compared to the U17 and U18 multi-vibrators to accept the delay in the low-pass filter containing elements R17, C18, L3, etc. The SW1 electronic switch switches the extended synchronization pulses and video output signal to the A23 amplifier. The right part of the drawing of Fig. 18 inside the dashed line is the synchronization pulse replacement system and the S50 output system.

Figure 19 shows a system that is used in conjunction with the system of Figure 16 and which replaces the checkerboard impulses with new extended horizontal synchronization pulses followed by a color synchronization signal. Also, the vertical modification pulses are canceled by shifting the source signal level EOFd (Fig. 18) in resistors R412 and R411.

174 901

The video input signal is fed into the mid-pass filter containing elements R29, C400, L400 and C401 and to the color synchronizer signal regenerator (element CA1398), for regeneration of the color synchronization signal on a continuous subcarrier wave (3.58 MHz), the Y40 quartz generator has 3.58 MHz frequency. The U40 regenerator output signal is filtered through a 3.58 MHz low-pass filter that includes R300, L401 and C402 components, buffered by the A40 amplifier. The SW40 electronic switch gates a new color synchronization signal through the U43 multivibrator output. The U43 multivibrator is triggered by the falling edge of the regenerated extended signal from the U41 multivibrator. The U40 multivibrator is delayed by 0.5 ps to establish the front horizontal sync signal threshold. The reconstructed synchronization signal from the U41 multi-vibrator is filtered and subjected to level shifting by elements R307, L403, C404, R305, R306 and voltage V400. The A42 amplifier buffers this shifted level of the extended sync signal to add with the color sync signal through the R304 resistor and the A43 amplifier. The electronic switch SW41 gates during the active field, through the gate and U44, on which input the AF signal from EPROM U12 memory is given, a new extended synchronization signal and a new color synchronization signal during the HBI horizontal blanking interval. The new extended synchronization signal and the new color synchronization signal also remove ARW pulses of the active field during horizontal blanking from the protected video signal. The A44 amplifier buffers and outputs a new signal with neutralized signal protections, which include synchro-pulse constrictions, checkerboard pulses, vertical pulses.

Figure 20 shows the level shifting system by multiplying by a non-zero voltage value to obtain a higher voltage. EOLD and EOFD signals are used to shift the level in the circuits in Fig. 16, generating a control voltage to increase the gain of the voltage-controlled VCA U50 amplifier (MC1494 element) during the presence of checkerboard modification pulses and vertical modification pulses in the protected signal. The video signal is reproduced such that the peak of the synchronization signal is at 0 V, which means that low states of checkerboard impulses and vertical modification are above 0 (typically from 0.3 to 0.5 V). Elements C201, R201, D10, D20, C200, R200 and A49 form this renewed video signal with DC constant. The U50 amplifier output contains a shifted level or amplified copy protection signal well above the blanking level to remove protection enhancement, respectively. The A50 amplifier buffers the output signals from VCA U49 in the sync pulse reduction system of Figure 16.

Figures 2122 and 23 show examples of systems for removing checkerboard and vertical signal protections using switching systems.

Figure 21 shows that for the renewed video signal of Figure 16, during checkerboard and vertical pulses, the control voltage together with these pulses, under the control of EOLD and EOFD signals, connects the level signal 20% of the white limiter V10, resetting the protective pulses, by SW199 and SW198 switches. This enables the finite impedance of the video signal control, with the resistor R200 providing an impedance of around 2000 ohms. The video signal is then amplified by the A501 amplifier and processed by the sync and lead replacement system S50 of Fig. 18, before being led through terminal 506.

Figures 22 and 23 show different switching arrangements than those shown in Fig. 21 for removing checkerboard and vertical pulses. An output and synchronization override system as in Fig. 21 also occurs, but is not shown. In fig. 22, the renewed video signal is again supplied by the R201 resistor to the A54 amplifier, whereby the switch SW198, SW199, under the control of the EOLD and EOFd signals switching on the voltages V1, V2, respectively, is applied to it a constant component signal or a larger constant component signal or equal to 20% whiteness limiter. The arrangement in Fig. 23 is similar to the arrangement in Fig. 22, except that the switches SW198, SW199 are placed in series directly in the video path, and use classic replacement methods to remove checkerboard and end of field pulses. In some of them

174 In 901 cases, quenching checkerboard pulses and EOF pulses alone may be sufficient to obtain a readable copy, without the effects caused by the checkerboard pattern and EOF pulses.

A device for removing horizontal and vertical signal protection enhancements by broadening the synchronization signals will now be described, with reference to Fig. 24a, which shows an input at which a copy-protected video signal with vertical and horizontal enhancements is fed into the A60 buffering amplifier, and so EOF pulses, EOL, to remove these improvements by extending the synchronization pulse. The output from the A60 amplifier is connected to the synchronization separator. The output synchronization component from the U61 separator is fed to the U64 multivibrator to remove 2H pulses in the synchronization component. The U64 output is connected to the PLL U65 oscillator input. The frequency of the PLL U65 oscillator for N = 910 is 14.31818 MHz and is equal to N times the frequency of the horizontal line. By using this frequency to clock the U68 counter, and the frequency fH to reset it, the EPROM U69 memory receives an 11 bit address from the U68 counter. EPROM U69 memory can now output the horizontal positions of the image pixel as programmed in EPROM U69. EPROM U69 output outputs include horizontal timings for: pseudo synchronization signal position, synchronization broadening signal position, gate position of new color synchronization signal, pseudo synchronization pulse position for EOF signal.

The U61 separator output signal also includes an ID field pulse that resets the 525 state counter U63. The U63 counter is clocked by the horizontal frequency pulse by the PLL U65 system and divided by the counting counter Oo N U607. The EP66 U66 memory therefore gets horizontal line positions in the active TV field. For example: in EPROM U66 memory, DO = lines 22-253 and D1 = lines 254-262, vertical modification pulse position.

Referring to Fig. 24b, logic gates U610 to U614 use the EPROM memory data outputs U69 and U66 for various purposes.

First, the positions of the pseudosyaahroaizaani signals and the extension of the synchronization signals are gated by the DO signal for the oseudosynchronization signals and the extension of the synchronization pulse synchronization on lines 22-253. The gate output of U613 accomplishes this gating.

Secondly, extending the synchronization signals only on lines 254-262, which is provided by the gate U612. The OR U614 gate connects the U612 and U613 gate outputs and performs logical summation of the D3H signal with the new color synchronization signal. The U614 gate output signal controls the SW600 switch to insert a pseudosdnahronizaaji signal (lines 22-253); extended synchronization signal and new color synchronization signal (lines 22-262).

Third, the new gated D3H color synchronization signal and the D3 pulse of the active field gates the FSC signal, given by the A65 amplifier, via the U615 gate. There is a color subcarrier at the gate output that is only enabled if the D3 and D3H signals are high. The variable resistor R607 sets a new level of color synchronization signal, and the capacitor C607, coil L607 and resistor R604 filter the new envelope of the color synchronization signal. The U616 gate only combines pre-pseudo-synchronization signals, pseudo-synchronization signals, extended synchronization pulses and sums them up in an inverting amplifier through amplitude regulating resistors R602 and R603. Therefore, the A67 adder has an input of the combined signal pcd-syncronization, extended horizontal synchronization, color synchronization and pseudo-synchronization, and the SW205 switch connects the output from the A67 amplifier at appropriate times.

Figures 25a to 25h show waveforms at various points in the system of Figures 24a, 24b.

Figure 24c shows a typical PLL system for the U65 oscillator in Fig. 24, causing the tuning of the LC 252 diode oscillator with the U70 phase reset detector and a low-pass filter (less than 1 KHz) containing a resistor R700 and a C700 capacitor, with an amplifier circuit DC 250 'containing the A70 amplifier and components R702, C703, R703, R704 and the reference voltage Vbb.

174 901

A second system for neutralizing checkerboard and vertical pulses is shown in Fig. 26. Because the SW100 switch has low resistance, especially vertical modification pulses and checkerboard pulses are suppressed and / or their level shifts, or are replaced by medium voltage, thanks to the averaging switching system 260 . For example, if the checker and vertical modification pulses have high states of 30 IRE and low states of 0 IRE, the capacitor Cl will charge to a voltage of approximately (30 IRE -0 IRE) / 2 = 15 IRE.

Because the SW100 switch is turned on during the checkerboard compartment at the end of the line and during the end of field pulses thanks to the U304 gateway, at this time the voltage at the capacitor C1 covers the video input signal with a level of about 15 IRE, sufficient to remove improved copy protection.

In Figure 26, the copy improvement signals are input to the input of the amplifier A1, whose input enters the sync separator 258, which outputs a short frame pulse (i.e. about 10 μs) to reset the memory address counters in the 260 system. In the meantime, the synchronization component , which may contain pseudo-synchronization pulses in accordance with the basic protection method according to the state of the art, is fed to the horizontal PLL U303 phase loop system. The output signal of the PLL U303 system is then a horizontal frequency pulse, which starts about 2 μ $ before the front video input threshold. The 260 EPROM memory outputs outputs corresponding to the positions of the checker line and field end pulses. The U100 multivibrator outputs a signal coincident with the position of the checkerboard signal in a horizontal line, while the U200 and U300 multivibrators create a pulse such that the U300 output coincides with the end of field impulses in a horizontal line. The positions of checkerboard pulses and end-of-field pulses are gated by the U202 and U203 gates, and logically summed by the U304 gate, outputting time-convergent output pulses with checker EOL pulses and video field input pulses. The SW103 switch is turned on at these convergent moments to suppress through the Rs resistor and averaging (through the capacitor Cl) the signals of the improved protection, in order to provide a more readable signal to the A2 amplifier.

Another removal method is to enable one or both of the positive or negative vertex clipping systems when EOL checker pulses or EOF vertical pulses are present, as shown in Fig. 27. Copy-protected input signal is clipped by the buffering amplifier A6. Positions of EOF and EOL pulses are identified by the system and entered at the gate entrance OR U305. The Dl diode cuts the positive part of the checkerboard pattern (gray - high impulse and high gray vertical modification pulse in order to obtain a more readable copy. The D2 diode cuts the negative part (low - black) of EOL pulses and EOF pulses to gray level, by SW101 switches, SW102 for recording a more readable copy The A7 amplifier buffers the operation of the SW101, SW102 switches to provide an easy-to-copy video signal.

The third way to remove improved security is to detect checkerboard pulses and vertical modification pulses, and to add inverted pulses. If the checkerboard pattern moves up and / or down, and the vertical modification pulses move up and down, the system of Fig. 28 detects and removes OEF and EOL pulses.

Although zeroing pulses may be less effective because it reduces checkerboard and end of field pulses to a level close to blanking (0 Ire), in some cases, zeroing may result in a clear image. We would like to remind you that in the ideal case, checkerboard and end of field impulses should be over 20 IRE for complete neutralization. Zeroing causes high and low states to be reduced to the same level (0 IRE). Fig. 28 shows the zeroing system. The video signal from the Al amplifier of Fig. 26 is a renewed video signal, whose blanking level is about 0 V, fed through elements C15, D15, Vbl5, R15 and A246 to the SW124 switch, which passes checkerboard and end-of-field impulses through the gate OR U247 . The U247 gate has identified positions

174 901 checker pulses and field end thanks to gates U202 and U203 in Fig. 26. Inverter A82 inverts the signal from switch SW124 and sums it through resistor R2 back with the video input signal (through - resistor R1) to reset the checker pulses and field end. Resistor R1 and R2 have the same resistance value. The A209 amplifier buffers this video signal with zero checkerboard and end of field pulses. Resistor R6 maintains polarization of the constant component against mass for the A82 inverter.

Another removal method used to remove EOL and EOF pulses is to suppress the peaks of an active video signal from 100% to about 80% (by about 20%), as shown in the form of waveforms in Figures 29a and 29b. This requires an increase in the synchronization component from 40 IRE to about 60 IRE. In this way, you can also delete pseudo-synchronization pulses introduced in a known manner, since these pseudo-synchronization pulses are 40 IRE. With prolonged synchronization pulses, the synchronization separation systems tend to separate only large synchronization pulses, and ignore those with a smaller amplitude. Hence, pulse pairs, pseudo-synchronization and ARW will not be detected. Fig. 29a shows the original waveform of one video line. Fig. 29b shows the waveform of a video line modified by checkerboard and vertical modification pulses.

Figure 29b shows the resulting waveform with modified synchronization amplitudes to be 50% more than a standard video signal with checkerboard and end-of-field pulses. Because the components of the synchronization signals are larger, suppression by illegal copying will generally not be enough to cause checkerboard and end of field pulses to have any effect on the readability of the image played from the illegal copy. Since the vertical and horizontal synchronization signals are modified to be much larger, the synchronization separator of the TV set or VCR will not cause a false trigger.

Figure 30 shows the waveform delivery system of Figure 29b. Signal with improved copy protection is input to amplifier A84 with 0.8 gain. These input signals are also trimmed and have a blanking level of 0 V. The 302 synchronization separator system discharges the CS synchronization component to the analog SW210 switch and 300 averaging device. The 300 averaging device averages the typical logical synchronization component level, i.e. 5 V peak-to-peak value by shifting the voltage by -V. The averaging system 300 discharges the renewed synchronization component from 60 IRE (where 0 IRE equals 0 V) ​​to -60 IRE levels. The SW210 switch then turns on this new regenerated synchronization signal so that it is output by the A505 amplifier in the form of a wave as in Fig. 29b.

Another method of removal is described using the example of the system shown in Fig. 31 and consists in tracking and maintaining an active video line to replace the checker pulse with the last value of the active video area before the start of EOL pulses.

By using the output signals of the circuit of Fig. 26, namely the output from the Al amplifier and the U202 gate, it is possible to remove checkerboard pulses by tracking and keeping. This method is similar to introducing known voltage during checkerboard impulses. Since most of the program record is above 0 IRE (especially for NTSC, where the black level is 7.5 IRE), tracking and maintaining the vision results in a level substantially higher than 7.5 IRE, which is sufficient to remove checkerboard impulses when this the level is reinserted into the position of these pulses.

The A90 amplifier receives the output of the A1 amplifier from Fig. 26 at the input. The A90 amplifier has a delay of 100 ns to 200 ns (through delay lines or low-pass filters), so that the pulse from the U202 gate tracks and maintains the vision from 100 to 200 ns against checkerboard impulses. Switch 310 is always on, except for the period when the checkerboard pulses come. Hence, the output from the A92 amplifier is essentially transparent as long as the switch does not turn off and the C107 capacitor charges for 2 ps with the last pixel of the program (approximately greater than 7.75 IRE) during the checkerboard pulse.

174 901

Another method of removal is shown in the form of waveforms in Figures 32a, 32b and consists in adding a high frequency signal to the EOF and EOL pulses so as to effectively shift the level by the average level of the DC component of the high frequency signal. Fig. 32a in the upper waveform shows the video input signal containing the EOF pulse, and in the lower waveform a high frequency signal from 0.1 to 5 MHz for level shifting. The lower course of Fig. 32a can also be applied to checkerboard pulses, having a frequency of e.g. about 3 MHz. The resulting recorded video signal is shown in Fig. 32b, where the wavy portion has a frequency of 3 MHz. The added high frequency signal causes the VCR to respond only to medium DC levels, which causes the low and high level level shifts to make EOL and / or EOF signals inefficient.

Since the improvements described also depend on the television set arrangement, as shown in Fig. 33, the systems 322 removing the improved protection can be included between the VCR 320 and the receiver 324 to provide a clearer picture when playing an illegal copy, using, if necessary, RF 326 modulator.

The removal of the modification consisting in the addition of pulses before the horizontal and vertical synchronization pulses will be explained in the description below, which shows how to insert wider than normal synchronization pulses (i.e. the normal duration is about 4.7 ps, extended - from 6 to 10 ps) removes vertical modification (field end) and checkerboard impulses (end of line).

In the synchronization separators used in television sets, as shown in Fig. 10, according to the state of the art, the component synchronization pulses load the input coupling capacitor C of the synchronization separator. The cutting threshold depends on the average loading time per video line. The greater the loading time, the further the cut-off point is offset from the blanking level. In addition, because the clipping point rises towards the blanking level due to the resistor Rb and capacitor C, the synchronization pulse preceding the end pulses causes the ramp to temporarily slow down so as to avoid cutting during the end of line pulses or end of field pulses.

Figure 34a shows the response of the sync separator to a video signal containing basic known copy protection with checkerboard protection added. The sync separator cut point drops clearly into areas A, which are the areas of checkerboard impulses, and thus turns on / off premature synchronization pulses, which gives the effect of a checkerboard pattern in the image.

The waveform of Fig. 34b shows the effect of wider than normal synchronization pulses. The resulting cutting point of the receiver synchronization separator 330 clearly does not fall into areas A, so the receiver will not have the effect of a checkerboard pattern. It may happen that the color synchronization signal waveform must be added in the CBX area through the horizontal synchronization area to ensure color blockage on the TV and VCR.

Figures 35a, 35b show the normal horizontal video sync pulse and the extended horizontal sync pulse with the CB color sync signal added in the second half of the extended sync pulse, wherein the color sync signal is added on the falling edge of this extended horizontal sync pulse. The added color synchronization signal is intended to ensure that the TV set has to keep the locked color synchronization signal irrespective of whether it triggers color synchronization behind the rising or falling edge of the synchronization pulse.

A renewed color synchronization signal is not necessary for modified vertical synchronization pulses. They happen at the bottom of the image field, which is usually not visible.

It will now be explained how adding sync pulses and premature sync pulses suppresses the effect of end of field or end of line pulses. By adding synchronization pulses or premature synchronization, the coupling capacitor C of the TV synchronization separator charges more. Because of this, the system's cut-off point

174 901 sync separator moves away from the blanking level, avoiding end of line and field end pulses.

The waveform of Fig. 34c shows a video signal with premature sync pulses added. The sync separator cut-off point of the VCR 331 receiver or VCR does not go to the end of line position. Similar effects are shown in Fig. 36c for vertical modification pulses with gating by pseudosync pulses. Fig. 36a shows a vertical modification pulse B with a normal horizontal synchronization pulse width and cut point 336 of the receiver synchronization separator. It can be seen that the cut point 336 of the receiver synchronization separator cuts the vertical modification pulse B. Fig. 36b shows the corresponding waveform with the extended width of the horizontal synchronization pulse, where the cut point of the synchronization separator avoids cutting in the area B of the vertical modification pulse.

Horizontal modifications by adding pulses after synchronization pulses are explained with reference to Fig. 37, which shows the system for adding pulses after synchronization pulses in order to increase the efficiency of copy protection, i.e. further increasing the illegibility of the image when copying is performed by applying the known basic protection.

The video signal with the known copy protection substituted with the above described improvements is fed to the resistor R9. The Al amplifier buffers the input video signal and delivers it through the Cl capacitor to the U6 synchronization separator system. The vertical sync signal from the sync separator U6 resets the 12-bit U1 counter. The Ul counter is clocked by a horizontal synchronization signal from the PLL U22 circuit which is closed by^;synchronization component. The EPROM U3 memory selects on which lines a pulse after a PPS pseudosynchronization pulse may appear. Pseudo-random distribution of PPS pulses can be applied using the selection made by EP3 UROM. The DO signal at the EPROM U3 output controls the OS3 multivibrator accordingly. The synchronization signal gate from the synchronization separator is inverted and passed through a low-pass filter composed of a capacitor C2 and a resistor R2. The Vgen voltage is added to the signal, i.e. a 300 Hz square wave, in a C2 capacitor. This causes the threshold difference in the OS3 multivibrator to change over time, which causes the position to change. The output signal of the OS3 multivibrator is a constant pulse (i.e. 1.5 s duration) with pulse position modulation, e.g. ± ps. The output signal of the OS3 multivibrator suppresses any signal state to the level of the signal blanking by the SW1 switch and adds a pulse through the variable resistor R7 to generate a pseudo-synchronization pulse after the synchronization pulse. The combiner A3 inverts the output pulse of the OS3 multivibrator to maintain the appropriate shape of the added pseudo-synchronization pulse. Figures 38a and 38e show waveforms at various points in the arrangement of Figure 37. The amplitude of the pseudo-synchronization signal can be modulated by VGen2 and the voltage controlled amplifier A41, which is a multiplier amplifier. The output of the A41 amplifier changes depending on VGen2, amounting to 0 V, when the pseudo-synchronization pulse after the synchronization pulse is turned off.

The method and apparatus for removing security enhancements in that, after synchronization pulses, PPS pseudosync pulses are added, will be explained with reference to Fig. 39a, which shows another system for removing the security contained in the input signal in the form of PPS pulses, which is fed to the synchronization separator Ul via a capacitor Cl. This means that the system of Fig. 39a reduces or removes the PPS pulse effect, making the signal recordable. The Ul synchronization separator provides the synchronization component to the horizontal closed loop phase U2 system. The PPL U2 system has a phase set to start in the PPS pulse area after the color synchronization signal. The U5 multivibrator triggered by the U2 PLL system generates a signal that contains a PPS pulse. The vertical synchronization signal from the Ul synchronization separator triggers the U4 multivibrator so that it generates a pulse that lasts for lines 4 to 21, which in turn triggers the U5 multivibrator that generates an active field pulse for lines 22-262. Exit from multiwi28

174 901 bratoraUS is fed to the IU10 gate input so that the U10 gate output is high only during the active field.

Thus, the U10 gate output indicates the positions of the PPS pulses during the active field. Figures 39b, 39c and 39d show waveforms at various points in the system of Figure 39a.

Figure 40 shows a fragment of the system of Fig. 39a generating a PPSD signal coincident in time with the PPS signal and shifting the level through the analog U6 multiplier. The U6 multiplier increases or decreases gain when an active PPS delete pulse occurs at the output of the U10. When the VID1 signal is supplied to the U6 multiplier. the peak of the synchronization signal is 0 V for the VID1 signal. By increasing the gain in a timely manner, the waveform Z of FIG. 40b. By using the VID2 signal in the U6 multiplier instead of the VID1 and using the output from the U10 gate, the U6 multiplier is reconfigured to suppress with a positive pulse from the U10 output, the gain being reduced in time to produce the Y wave of Fig. 40c, which removes the PPS signal.

By using the VID2 signal in the analog Sw229 switch in the circuit of Fig. 40d, the output from the gate U10 'controls this switch to enter the reference voltage. If the VR value is 0 V, waveform X of Fig. 40e results in blanking of PPS pulses. If the VR value equals the peak value of the synchronization signal (i.e. -40 IRE), a waveform U of Fig. 40f is created, which creates an additional horizontal synchronization pulse with constant amplitude and position. This means that most receivers have a fixed horizontal image shift and no waviness due to PPS pseudosync pulses will occur.

When adding the output signal of the gate U10 in the amplifier A6 in the circuit of Fig. 40g, a level shift occurs to remove the PPS pulse from the waveform shown in Fig. 40b. Fig. 40h shows the position of the PPS pulse and the level shift.

In addition, the narrowing of the PPS pulse to remove its effect is done by cutting the synchronization signal. As shown in Fig. 41a, Amplifier A7 receives a VID2 signal with the color sync signal cut out thanks to a notch filter consisting of a resistor R100, coil L100 and capacitor C100. The output A7 amplifier outputs truncated both normal synchronization signals and PPS pseudo synchronization pulses by setting the Vbb2 signal to approximately -10 IRE. By using the IU7 gate and the PPSD signal from the U10 gate (Fig. 39a), the U7 gate outputs a pulse that is inverted but identical to the original PPS pulse at logical levels. The U8 multivibrator is triggered for more than 90% of the PPS pulse period and controls the SW224 switch to cut the rising edge of the PPS pulse by more than 90%. The result is the waveform shown in Fig. 41b, which is a video output signal, which has a very narrow PPS pseudo synchronization pulse that does not cause any reaction in television receivers and VCRs. Adding the output signal from the U7 gate (Fig. 41a) in the amplifier A6 of Fig. 40g through the resistor R6 results in an output signal, which is a shifted level PPS synchronization signal, as shown in Fig. 40h. This method can also partially or completely remove the amplitude of the pseudosynchronization pulses, which causes them to be suppressed.

Next, there will be presented a method and device that reduce the effectiveness of basic copy protection, which includes added pseudo-synchronization pulses, as already described, and ARW pulses, without changing these added pulses. Unlike the previously described methods of changing the added pulses by suppressing the amplitude, shifting the level or narrowing the pulses to suppress the effect of the added pulses, this method reduces the effects of the added pulses by additionally adding other pulses that will counteract the reduction of gain caused by ARW pulses and pseudosynchronization pulses.

A known solution is the measurement of the incoming video signal by the ARW system in the VCR, by using a synchronization signal sample and rear threshold samples. By adding new synchronization pulses at a very high level of the rear threshold, gain reduction is created. Because the ARW system in the VCR continuously samples the synchronization amplitude by sampling the synchronization signal and the rear threshold, this method removes some of the security signals by moving all levels of the rear thresholds from the blanking level to a level below the blanking level (i.e. about -20 IRE units for NTSC). It is also possible in the present method to add new pseudosync pulses in the lower area of ​​the image field at its end, where the security signals containing ARW pulses and pseudosync pulses do not occur. These additional synchronization pulses are followed by pulses below the blanking level.

Referring to Fig. 42a, a basic secured video signal is input to the synchronization separator U2. The frequency component from the U2 separator triggers the rising edge of the U3 multivibrator for about 3 ps.

The vertical synchronization signal from the U2 synchronization separator triggers the U4 and U5 multi-vibrators, which form the active field pulse supplied to the gate input U1, the second input that is connected to the U3 multi-vibrator. The gate output signal Ul is therefore a 3ps pulse of the back threshold that is active during the active field. Alternatively, the U4 and U5 multivibrators are not necessary and the U3 output is directly connected to the R6 resistor, eliminating the Ul, U4 and U5 gates. Resistor R6 is a subtraction resistor that subtracts a certain level from the rear video threshold. The input amplifier A0 buffers the video signal and delivers it to the capacitor C3, diode D1, resistor R3 and voltage Vb, which form the DC system of reproducing the peak of the synchronization signal. The output from the operational amplifier A3 is connected to the resistor R7. This output has a lowered rear threshold as shown in Figs. 43a to 43g showing waveforms at various points in the system of Fig. 42a.

The circuit of Fig. 42b receives the output signal from the resistor R7 of the circuit of Fig. 42a and replaces the last 10 or 11 lines of each image field by lines containing pseudo-synchronization pulses in pairs with successive ARW pulses below the blanking level, i.e. from -10 to -30 IRE. The video signal from the anode of the diode Dl of Fig. 42a is a renewed video signal with a constant level, where 0 V equals 0 IRE the blanking level. The A2 amplifier from Fig. 42b amplifies this video signal and delivers it to the U11 horizontal closing oscillator. The oscillator output is a 32H phase closing loop with a frequency of about 503 KHz. This output signal is amplified for logic levels of the A2 amplifier and fed to the binary divider U10.

The summing amplifier A4 outputs a square wave signal for 2 ps on and 2 ps off with an amplitude of -20 IRE to -40 IRE. The Vbb voltage and resistor R9 set the appropriate DC offset level, while resistors R10 and R11 set the appropriate amplitude. In fig. 42a, the U6 multivibrator generates an active line pulse of 32 gs starting from the beginning of the active horizontal line, the U7 and U8 multivibrators are triggered by a vertical sync pulse, including a high state for the last 11 lines of the image field. The IU9 gate of Fig. 42b gates a 4 ps square wave and -20 IRE and -40 IRE levels during the last 11 horizontal active field lines, where ARW pulses and pseudosync pulses are essentially absent. The A5 amplifier and R12 resistor carry the modified protected signal with reduced rear threshold pulses, new pseudosync pulses and reduced negative ARW pulses.

The modified video signal provided by the circuits of Figures 42a and 42b causes the ARW amplifier in the VCR to make incorrect measurements. As a result of these measurements of the pseudo-synchronization pulses with a reduced rear threshold, which are in pairs with the reduced ARW pulses, the VCR finds that a low-level video signal is present and then increases the amplification of the ARW amplifier. This shifts the gain reduction in the VCR's ARW amplifier caused by the basic protection method. The added each of the pseudo-synchronization pulses in the EOF positions lasts in the preferred embodiment at least about 2 gs at the blanking level (0 IRE) following the falling edge of each added pseudo-synchronization pulse to remove the vertical EOF modification. This is achieved thanks to the switching system or waveform replacement, as already described in various variants. It is beneficial

174 901 if the high EOF pulse modification state has an amplitude greater than 10-20 IRE. Due to the lack of blanking in these conditions, the effect of modifying EOF pulses can be reduced, and the effect of the basic known protection method is enhanced, which strengthens the modification of EOL pulses to prevent all copy protection from being removed.

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UP Department of Publications. Circulation of 90 copies Price PLN 6.00