Process for manufacturing a thermoelectric cooler for the Chip substrate

Description:

The invention relates to fabricated processes of the thermoelectric cooler for the substrate of the integrated circuit and can be applied in different fields of microelectronics, computing technology, medicine and in other fields, which require heat removal.

A fabricated process of a thermoelectric coolant for the substrate of the integrated circuit is known, which consists in the epitaxial growth of the intermediate double layer of fluorides, on a substrate composed of a heat conducting material, a thermoelectric converter, a radiator and a convective fan [ 1].

The disadvantage of this fabricated process is that the thermal contact with the integrated circuit is achieved through a special paste with high thermal conductivity, which leads to the decrease of the efficiency of the cooling of the substrate of the integrated circuit.

The problem solved by the invention is to increase the efficiency of heat evacuation from the integrated circuit.

The fabricated process of the thermoelectric cooler for the substrate of the integrated circuit removes the disadvantage mentioned above in that the substrate of the integrated circuit made of silicon is chemically treated, annealed at a temperature of 1073K for 3 ... 5 min in a super vacuum chamber, then on it is deposited a double intermediate layer based on fluorine at a temperature of 973K, composed of a layer of CaF₂ with a thickness of 2 ... 3 nm and a layer of BaF₂ with a thickness of approximately 150 nm, with a о velocity of 0.1 nm / s, on the double intermediate layer a thermoelectric conversion layer is deposited, made of type A semiconductor material.₄B₆, on which a fan radiator is located.

The result of the invention consists in excluding the Special paste with high thermal conductivity.

The invention is explained by the drawing in the figure, which represents the block diagram of the thermoelectric cooler for the substrate of the integrated circuit.

The process of manufacturing the thermoelectric cooler for the substrate of the integrated circuit consists in the fact that on the silicon substrate 2 with the integrated circuit the epitaxial growth of a double intermediate layer 3 based on fluorine, composed of a layer of CaF is carried out.₂with a thickness of 2 ... 3 nm and a layer of BaF₂ with a thickness of approximately 150 nm, on the double intermediate layer 3 is deposited a thermoelectric layer of conversion 4, made of semiconductor material of type A₄B₆, on which a radiator 5 with a fan is placed 6. The double intermediate layer 3 is intended to match the parameters of the crystalline network and the coefficients of thermal expansion of silica and of type A semiconductors.₄B₆, which are the best materials for the manufacture of the high efficiency thermoelectric converter. The thermoelectric layer of conversion 4 is made of semiconductor material of type А₄Вб (for example, PbTe-SnTe). The choice of material for thermoelectric conversion layer 4 depends on the possibilities of type A materials₄B₆ to relax the tensions in the PbTeSnTe / BaF layers₂-Coffee₂/ Yes, which appear in the heating / cooling processes due to the difference of the thermal coefficients. The heat from the hot side of the thermoelectric conversion layer 4 by means of the radiator 5 and the fan 6 are removed by the traditional methods.

Example of the manufacturing process of the thermoelectric cooler for the substrate of the integrated circuit

On a silicon substrate 2 with integrated electronic circuits 1, the double intermediate layer 3 of fluorides, thermoelectric conversion layer 4, the radiator 5 and the fan are deposited 6. The part of the silicon substrate (crystalline lattice parameter - 0.543 nm) confines the integrated elements 1 , and the second part is used for the epitaxial deposition of the intermediate layer based on fluoride. Surcharge based on type A semiconductors₄B₆(PbTe-SnTe) has the crystal lattice parameters respectively 0.646 nm and 0.637 nm.

Obtaining the intermediate layers on Si was performed in the molecular beam epitaxy (MBE) plant of type УСУ-4. Immediately after the chemical treatment, the substrate is introduced into the deposit chamber of the molecular epitaxy plant and at a vacuum of 210 '¹ Bye. The thin layer deposition chamber is endowed with a fast electron diffraction device, which allows to perform the control on the structure and morphology of the surface, and with a growth rate control device built on the basis of a quartz resonator. The temperature of the substrate in the growth process is 400 ° C, the rate of deposition - 0,01 nm / s, the thickness of the fluorine layers - 2 ... 3 nm (CaF₂) and ~ 150 nm (BaF₂).

MD 249 Z 2010.07.31

The intermediate fluorine layer provides conditions for the growth of semiconductor materials of the type АдВб - the discordance according to the constant of the crystalline network between Si and fluorides constitutes 0.6%. It has the ability to relax the stresses that appear after the thermocycles the coefficients of thermal expansion for fluorides are also comparable (CaF₂ - 19, 10 '⁶K 'BaF₂ - 18,1-10¾⁴ and PbTe - 19.8-10¾¹). Also, the middle layer! it has low thermal resistance and it is effective to capture the thermal energy from the source (the substrate of the integral circuit).

For the manufacture of the thermoelectric converter on the intermediate substrate! from fluorine a thermoelectric conversion layer is deposited on the basis of PbTe-SnTe materials. For depositing type A materials₄B₆ the hot wall method was used in a 10 'vacuum⁵Bye. In the quartz reactor used for depositing the PbTe layer, an additional tank with Те was intended for changing the concentration and the conductivity type. The deposition velocity was 0.4 ... 0.5 nm / s, and the substrate temperature - 400 ° C. Epitaxial growth on the surface of the fluoride begins with the deposition of a PbTe damping layer with a thickness of 500 ... 2000 nm. PbTe-SnTe surface deposition is performed using PbTe and SnTe sources. at the surface, regions with n and p conductivity are formed in this way for the subsequent manufacture of the thermoelectric converter. The thermoelectric converter made on the basis of the semiconductor surcharge! PbTe-SnTe has the advantageous thermoelectric efficiency, it can be increased epitaxially through the intermediate layer! of fluorine directly on the surface of the silicon and can relax the stresses that appear in the thermocycling processes.

Due to the essential increase of the cooling efficiency of the substrate of the Integrated circuit, it is possible to use the thermoelectric cooler for the substrate of the integrated circuit for the purpose of cooling the electronic elements and the sensors, as well as for the electronic cooling !! functional based on silicon, which gives the possibility to increase essentially, for example, the power of computers.

(56) Bibliographic references cited in the description:

1. Chowdhury I., Ravi Prasher R., Lofgreen K., Chrysler G., Narasimhan S., Mahajan

R., Koester D., Alley R., Venkatasubramanian R. Pn-chip cooling by superlatticebased thin-film thermoelectrics. Nature Nanotechnology. 2009, Vol. 4, Issure 4, pp. 235-238