Photosensitive imaging devices and associated methods
Abstract
The present invention provides photosensitive devices and methods related thereto. In one aspect, for example, a photosensitive imager device comprises a semiconductor substrate having a plurality of doped regions forming at least one junction, the textured substrate being coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation. a region and an electrical transmission element coupled to the semiconductor substrate and operative to transmit an electrical signal from the at least one junction. In one aspect, the textured region functions to facilitate generation of an electrical signal from detection of infrared electromagnetic radiation. In another aspect, interacting with electromagnetic radiation comprises increasing the effective absorption length of the semiconductor substrate as compared to the semiconductor substrate without the textured region.

Term
4 yearsto projected expiry
Projected expiry 17 September 2030, counted from filing; an application has no term until it is granted.
- Priority
- Filed
- Published
- Today
- Projected expiry
28 claims: 3 independent, 25 dependent
- 1감광성 이미저 장치에 있어서, 상기 장치는 적어도 하나의 접합(junction)을 형성하는 복수의 도핑된 영역을 갖는 반도체 기판과, 상기 반도체 기판으로 연결되고, 전자기 복사와 상호작용하도록 위치하는 텍스처링된 영역(textured region)과, 상기 반도체 기판으로 연결되고, 적어도 하나의 접합으로부터의 전기 신호를 전달하는 전기 전달 요소(electrical transfer element) 를 포함하는 것을 특징으로 하는 감광성 이미저 장치.
- 2제 1 항에 있어서, 상기 텍스처링된 영역은 적외선 전자기 복사의 검출로부터 전기 신호의 발생을 촉진시키는 것을 특징으로 하는 감광성 이미저 장치.
- 3제 1 항에 있어서, 전자기 복사와의 상호작용은, 텍스처링된 영역이 없는 반도체 기판에 비교할 때 반도체 기판의 유효 흡수 길이를 증가시키는 것을 특징으로 하는 감광성 이미저 장치.
- 4제 1 항에 있어서, 전기 전달 요소는 트랜지스터, 감지 노드(sensing node), 전달 게이트(transfer gate), 및 이들의 조합 중에서 선택되는 것을 특징으로 하는 감광성 이미저 장치.
- 5제 1 항에 있어서, 반도체 기판에 연결되어 있고, 상기 반도체 기판에 전자기 복사를 유지하도록 위치하는 반사성 층을 더 포함하는 것을 특징으로 하는 감광성 이미저 장치.
- 6제 1 항에 있어서, 텍스처링된 영역이, 상기 복수의 도핑된 영역과 반대쪽의 반도체 기판 표면에 위치하는 것을 특징으로 하는 감광성 이미저 장치.
- 7제 6 항에 있어서, 텍스처링된 영역은, 전자기 복사를 반도체 기판 내로, 또는 반도체 기판을 벗어나도록 지향시키도록 기능하는 표면 형상을 갖는 것을 특징으로 하는 감광성 이미저 장치.
- 8제 7 항에 있어서, 반도체 기판에 대한 텍스처링된 영역의 표면 형상은 경사진 형태, 피라미드 형태, 역-피라미드 형태, 구 형태, 포물선 형태, 비대칭 형태, 대칭 형태, 및 이들의 조합 중에서 선택된 것임을 특징으로 하는 감광성 이미저 장치.
- 9제 1 항에 있어서, 텍스처링된 영역은, 복수의 도핑된 영역에 인접한 반도체 기판의 표면에 위치하는 것을 특징으로 하는 감광성 이미저 장치.
- 10제 9 항에 있어서, 복수의 도핑된 영역 반대쪽의 반도체 기판 표면 상에 위치하는 추가 텍스처링된 영역을 더 포함하는 것을 특징으로 하는 감광성 이미저 장치.
- 11제 1 항에 있어서, 상기 텍스처링된 영역은 복수의 도핑된 영역 중 적어도 하나와 직접 연결되는 것을 특징으로 하는 감광성 이미저 장치.
- 12제 1 항에 있어서, 텍스처링된 영역은, 마이크론(micron) 크기, 나노(nano) 크기, 및 이들의 조합 중에서 선택된 크기를 갖는 표면 특징부를 포함하는 것을 특징으로 하는 감광성 이미저 장치.
- 13제 12 항에 있어서, 표면 특징부는, 원뿔, 기둥, 피라미드, 마이크로렌즈, 양자점(quantum dot), 뒤집힌 특징부(inverted feature) 및 이들의 조합 중에서 선택된 것을 포함하는 것을 특징으로 하는 감광성 이미저 장치.
- 14제 1 항에 있어서, 텍스처링된 영역은, 레이저 처리, 화학적 에칭, 나노각인(nanoimprinting), 물질 증착, 및 이들의 조합 중에서 선택된 공정에 의해 형성되는 것을 특징으로 하는 감광성 이미저 장치.
- 15제 1 항에 있어서, 반도체 기판에 광결합되어 있고, 반도체 기판 내로 입사 전자기 복사를 집속(focus)하도록 배치된 렌즈를 더 포함하는 것을 특징으로 하는 감광성 이미저 장치.
- 16청구항 제1항에 따르는 감광성 이미저 장치를 적어도 2개 포함하는 것을 특징으로 하는 감광성 이미저 어레이.
- 17제 16 항에 있어서, 적어도 2개의 감광성 이미저 장치들 사이에 배치되는 적어도 하나의 트렌치 고립부(trench isolation)를 더 포함하는 것을 특징으로 하는 감광성 이미저 어레이.
- 18감광성 이미저 장치를 제작하기 위한 방법에 있어서, 상기 방법은 반도체 기판 상에 텍스처링된 영역(textured region)을 형성하는 단계로서, 반도체 기판은 적어도 하나의 접합(junction)을 형성하는 복수의 도핑된 영역을 가지며, 텍스처링된 영역은 전자기 복사와 상호작용하기 위한 위치에서 형성되는 특징의, 상기 텍스처링된 영역을 형성하는 단계, 및 전기 전달 요소가 상기 적어도 하나의 접합으로부터의 전기를 전달하도록 전기 전달 요소를 반도체 기판으로 연결하는 단계 를 포함하는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 19제 18 항에 있어서, 텍스처링된 영역을 형성하는 단계는 레이저 처리, 화학적 에칭, 나노각인(nanoimprinting), 물질 증착, 및 이들의 조합 중에서 선택된 공정에 의해 이뤄지는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 20제 18 항에 있어서, 텍스처링된 영역을 형성하는 단계는, 마이크론(micron) 크기, 나노(nano) 크기, 및 이들의 조합 중에서 선택된 크기를 갖는 표면 특징부를 형성하기 위해, 레이저 복사로 표적 영역을 조사(irradiating)하는 단계를 포함하는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 21제 20 항에 있어서, 표적 영역을 조사하는 단계는, 조사에 의해 도펀트가 텍스처링된 영역에 혼입되도록 레이저 복사를 도펀트에 노출시키는 단계를 포함하는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 22제 20 항에 있어서, 조사는, 펨토초 레이저(femtosecond laser), 피코초 레이저(picosecond laser), 나노초 레이저(nanosecond laser), 및 이들의 조합 중에서 선택된 것을 포함하는 펄스형 레이저(pulsed laser)를 이용해 수행되는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 23제 18 항에 있어서, 감광성 이미저 장치의 전기적 반응(electrical response)을 조율하는 단계를 더 포함하는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 24제 23 항에 있어서, 조율하는 단계는 전자기 복사의 특정 파장을 선택적으로 확산시키거나 선택적으로 흡수하기 위한 치수를 갖도록 표면 특징부를 형성하는 단계를 포함하는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 25제 23 항에 있어서, 조율하는 단계는, 텍스처링된 영역의 배치, 텍스처링된 영역의 물질 유형, 텍스처링된 영역의 두께, 텍스처링된 영역의 도펀트 유형, 텍스처링된 영역의 도핑 프로파일, 반도체 기판의 도핑 프로파일, 기판의 두께, 및 이들의 조합 중에서 선택된 인자를 통해 이뤄지는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 26제 18 항에 있어서, 전기 전달 요소는 트랜지스터, 감지 노드, 전달 게이트, 및 이들의 조합 중에서 선택되는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 27제 18 항에 있어서, 300℃ 내지 1100℃의 온도까지로 반도체 기판을 어닐링하는 단계를 더 포함하는 것을 특징으로 하는 감광성 이미저 장치를 제작하기 위한 방법.
- 28감광성 이미저 장치에 있어서, 상기 장치는 적어도 하나의 접합(junction)을 형성하는 복수의 도핑된 영역을 갖는 반도체 기판, 상기 반도체 기판에 연결되어 있고, 전자기 복사와 상호작용하도록 위치하는 텍스처링된 영역(textured region), 반도체 기판으로 연결된 적어도 4개의 트랜지스터 를 포함하며, 상기 트랜지스터 중 적어도 하나는 상기 적어도 하나의 접합과 전기 결합되어 있는 것을 특징으로 하는 감광성 이미저 장치.
Independent claims28
80 paragraphs in 1 section, as filed
PHOTOSENSITIVE IMAGING DEVICES AND ASSOCIATED METHODS
<b><u>Prior art information</u></b>
This application was filed on September 17, 2009 in U.S. Provisional Patent Application No. 61/243,434, filed on March 05, 2010 in U.S. Provisional Patent Application No. 61/311,004, and filed on March 05, 2010 Priority is claimed on the basis of U.S. Provisional Patent Application No. 61/31 1,107, which is incorporated herein by reference.
The interaction of light (light) with semiconductor materials has been a significant innovation. Silicon imaging devices are used in a variety of technologies, such as digital cameras, optical mice, video cameras, cell phones, and the like. Charge-coupled devices (CCDs) are widely used in digital imaging and have been subsequently improved by complementary metal-oxide-semiconductor (CMOS) imagers with increased performance. CMOS sensors are manufactured from silicon and are typically capable of converting visible incident light into photocurrent, which in turn converts it to a digital image. However, since silicon is an indirect bandgap semiconductor with a bandgap of about 1.1 eV, silicon-based techniques for detecting infrared particle electromagnetic radiation have problems. Therefore, the absorption of electromagnetic radiation having a wavelength of about 1100 nm or more in silicon is very low.
<p>The present invention provides photosensitive devices and methods related thereto. In one aspect, for example, a photosensitive imager device comprises a semiconductor substrate having a plurality of doped regions forming at least one junction, the textured substrate being coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation. a region and an electrical transmission element coupled to the semiconductor substrate and operative to transmit an electrical signal from the at least one junction. In one aspect, the textured region functions to facilitate generation of an electrical signal from detection of infrared electromagnetic radiation. In another aspect, interacting with electromagnetic radiation comprises increasing the effective absorption length of the semiconductor substrate as compared to the semiconductor substrate without the textured region. In one particular aspect, the transfer element is selected from a transistor, a sense node, a transfer gate, and combinations thereof.</p><p>The textured region may be positioned at various locations relative to the doped region. In one aspect, for example, the textured region is located on the surface of the semiconductor substrate opposite the plurality of doped regions. In one specific aspect, the textured region has a surface shape for directing electromagnetic radiation into or out of the semiconductor substrate. The surface formation of the textured region for the semiconductor substrate may include a variety of configurations, for example, an inclined shape, a pyramidal shape, an inverted-pyramidal shape, a spherical shape, a parabolic shape, an asymmetrical shape, a symmetrical shape, etc., and these There is a combination of</p><p>In another aspect, the textured region may be located on a semiconductor substrate surface adjacent to the plurality of doped regions. In a more specific aspect, additional textured regions may be located on the semiconductor substrate surface opposite the plurality of doped regions. In this way, the textured region may thus be located adjacent to the plurality of doped regions and opposite the plurality of doped regions.</p><p>Various aspects of the textured region may vary depending on the desired configuration of the device. However, in one aspect, the textured region comprises surface features having a size selected from micron size, nano size, and combinations thereof. A variety of surface feature shapes are contemplated, including, but not limited to, cones, columns, pyramids, microlenses, quantum dots, inverted features, and combinations thereof, by way of example and not limitation. In addition, the textured regions may be formed by various processes. Non-limiting examples of such texturing processes include laser processing, chemical etching (eg, anisotropic etching, isotropic etching), nanoengraving, material deposition, and combinations thereof.</p><p>Additional layers and/or structures may be included in various devices in accordance with aspects of the present invention. In one aspect, for example, the reflective layer is coupled to the semiconductor substrate and can be positioned to retain electromagnetic radiation in the semiconductor substrate. In another aspect, a lens may be optically coupled to the semiconductor substrate and positioned to focus incident electromagnetic radiation onto the semiconductor substrate.</p><p>In another aspect of the present invention, a method for fabricating a photosensitive imager device is provided. The method comprises the steps of forming a textured region on a semiconductor substrate, the semiconductor substrate having a plurality of doped regions forming at least one junction, the textured region being formed at a location for interacting with electromagnetic radiation; connecting the electrical transmission element to a semiconductor substrate such that the electrical transmission element conducts electricity from the at least one junction.</p><p>In one aspect, the photosensitive imager device may be tuned so that certain wavelengths of electromagnetic radiation are selected to be filtered out. In one particular aspect, tuning includes forming the surface features to be dimensioned to selectively diffuse or selectively absorb a desired wavelength of electromagnetic radiation. In another aspect, the arrangement of the textured region, the material type and/or thickness of the textured region, the dopant type of the textured region, the doping profile of the textured region, the dopant profile of the semiconductor substrate, the material type and/or the semiconductor substrate Tuning is made according to a factor selected from thickness, and combinations thereof.</p><p>In another aspect of the present invention, a photosensitive imager device is provided. Such a device comprises a semiconductor substrate having a plurality of doped regions forming at least one junction, a textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation, and at least coupled to the semiconductor substrate. four transistors, wherein at least one of the transistors is electrically coupled to the at least one junction.</p>
1 is a schematic diagram of a photosensitive device according to one aspect of the present invention. 2 is a schematic diagram of a photosensitive device according to another aspect of the present invention. 3 is a schematic diagram of a photosensitive device according to another aspect of the present invention. 4 is a schematic diagram of a photosensitive device according to another aspect of the present invention. 5 is a schematic diagram of a photosensitive device according to another aspect of the present invention. 6 is a schematic diagram of a photosensitive device according to another aspect of the present invention. 7 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 8 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 9 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 10 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 11 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 12 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 13 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 14 is a schematic diagram of a photosensitive imager device according to another aspect of the present invention. 15 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 16 is a schematic diagram of a photosensitive pixel device according to another aspect of the present invention. 17 illustrates a method for fabricating a photosensitive imager device according to another aspect of the present invention.
Before the present invention is described herein, it is to be understood that the invention is not limited to the specific structures, process steps, or materials described herein, but may be extended to equivalents known to those skilled in the art. The terminology used herein is only used to describe specific embodiments, and is not used for limitation.
<b>Justice</b>
The following terms will be used in accordance with the definitions provided below.
As used herein, the singular includes the plural referents unless explicitly stated otherwise. Thus, for example, a "dopant" is one comprising one or more such dopants, and a "layer" is one comprising one or more such layers.
As used herein, the term low oxygen content refers to any material having an interstitial oxygen content of about 60 ppm atomic or less.
As used herein, the terms "disordered surface" and "textured surface" may be used interchangeably, and are formed by irradiation of laser pulses from nano-to-micron sizes. It refers to a surface with a topology with surface deformation. The properties of such a surface may vary depending on the material and technique used, but in one embodiment such a surface may be several hundred nanometers thick, with nanocrystals and nanopores (eg, from about 10 to about 50 nanometers) and nanopores. (nanopore). In another aspect, such a surface may include micron-sized structures (eg, about 2 μm to about 60 μm). In another aspect, the surface may include nano- and/or micron-sized structures from about 5 nm to about 500 μm.
As used herein, the term fluence refers to the amount of energy from one pulse of laser radiation passing through a unit area. In other words, "light quantity" can be described as the energy density of one laser pulse.
The terms surface modifying and surface modification as used herein refer to the modification of the surface of a semiconductor material using laser radiation. In one specific embodiment, the surface modification may include a process using primarily laser radiation or using laser radiation in conjunction with a dopant to facilitate incorporation of the dopant into the surface of the semiconductor material by the laser radiation. Thus, in one aspect, the surface modification comprises doping of the semiconductor material.
As used herein, the term target region refers to a region of semiconductor material to be doped or surface modified by laser radiation. The target area of the semiconductor material may vary as the surface modification process proceeds. For example, after a first target region is doped or surface modified, a second target region may be selected from the same semiconductor material.
As used herein, the term detection refers to the sensing, absorption, and/or collection of electromagnetic radiation.
As used herein, the term substantially refers to the complete or near-complete extent or extent of an action, characteristic, attribute, state, structure, item, or result. For example, an substantially included object will mean that the object is completely included, or nearly completely included. In some cases, the exact acceptable degree of departure from absolute perfection may depend on the particular context. But generally speaking, the near-complete state will have the same overall result as the absolute and perfect state of completion. The use of substantially is equally applicable when used in the negative sense to refer to the complete or near complete absence of an action, characteristic, attribute, state, structure, item, or result. For example, "substantially" absence of a particle would refer to the complete absence of the particle, or an almost complete absence of the particle having the same effect as the complete absence of the particle. In other words, a composition that is "substantially free" of a material or element may actually include such an item so long as no effect of such item is measurable.
As used herein, the term about is used to give flexibility to the endpoint of a numerical range by assuming that a particular value may be slightly above or slightly below the endpoint of the numerical range.
As used herein, a plurality of items, structural elements, composition elements, and/or materials may be provided in a common list for convenience.
However, these lists are understood to be such that each element of the list has been individually identified as an individual unique element. Accordingly, unless otherwise indicated, on the basis of being presented as a common group, any individual element of this list should be construed as a de facto equivalent of any other element of the same list.
Concentrations, amounts, and other numerical data herein may be expressed or provided in a range format. This range format is used for convenience and brevity only, and should therefore be interpreted flexibly to include not only the numerical values explicitly recited as the limits of the range, but also all individual numerical values, or subranges falling within the range, as if expressly recited. . For example, a numerical range of from about 1 to about 5 includes not only the explicitly recited values of about 1 and about 5, but also individual values and subranges within the stated range. Accordingly, this numerical range includes individual values such as 2, 3 and 4, subranges such as 1-3, 2-4 and 3-5, etc. and individual 1, 2, 3, 4, and 5. do.
This same principle applies to ranges in which only one numerical value is referred to as the minimum or maximum. In addition, these interpretations should apply regardless of the breadth of the scope or features described.
<b>the present invention </b>
Electromagnetic radiation can be provided over a wide wavelength range, such as visible range wavelengths (approximately 350 nm to 800 nm) and non-visible wavelengths (about 800 nm or greater, or 350 nm or less). Often the infrared spectrum includes a near-infrared portion of the spectrum comprising a wavelength between about 800 and 1300 nm, a short-wave infrared portion of the spectrum comprising a wavelength between about 1300 nm and 3 micrometers, a wavelength between about 3 micrometers and about 30 micrometers. It is described as comprising the mid- to long-wave infrared (or thermal infrared) portion of the spectrum. As used herein, unless otherwise specified, these are collectively referred to as the infrared portion of the electromagnetic spectrum.
Conventional silicon photodetection imagers have limited light absorption/detection properties. For example, infrared light passes most of these silicon-based detectors. While other materials (eg, InGaAs) can be used to detect infrared electromagnetic radiation with wavelengths greater than about 1000 nm, silicon is relatively inexpensive to manufacture and has wavelengths in the visible spectrum (ie, 350 nm-800 nm for visible light). Silicon is still commonly used because it can be used to detect Conventional silicon materials require an absorption depth sufficient to detect photons with wavelengths greater than about 700 nm. Visible light can be absorbed at relatively shallow depths in silicon, but absorption at longer wavelengths (eg, 900 nm) in silicon at standard wafer depths (eg, about 750 μm) is, at least, poor. The device of the present disclosure increases the absorption rate of semiconductor materials by reducing the effective absorption length to longer wavelengths when compared to conventional materials. For example, the absorption depth of silicon can be reduced so that these longer wavelengths can be absorbed at depths of about 850 μm or less. In other words, by reducing the effective absorption length, these devices can absorb longer wavelengths (eg, >1000 nm for silicon) in thin semiconductor materials. In addition to increasing the effective absorption length, the rate or rate of reaction can also be increased using thinner semiconductor materials.
The present invention further provides a broadband photosensitive diode, pixel, imager capable of detecting visible and infrared electromagnetic radiation and includes an associated method of fabricating such a device. A photosensitive diode comprising a semiconductor substrate having a plurality of doped regions forming at least one junction and one or more textured regions coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation. can In one aspect, the plurality of doped regions may include at least one cathode region and at least one anode region. In some aspects, as described below, the doped region may include an n-type dopant and/or a p-type dopant, thereby creating a pn junction. In another aspect, the photosensitive device can include an i-type region to form a pin junction.
The photosensitive pixel includes a plurality of doped regions forming at least one junction, at least one textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation, and an electrical signal coupled to the semiconductor substrate and from the at least one junction. and a semiconductor substrate having an electrical transfer element that functions to transfer The photosensitive imager may include a plurality of photosensitive pixels. Additionally, electrical transfer elements may include various devices such as, but not limited to, transistors, sense nodes, transfer gates, transfer electrodes, and the like.
A photosensitive or photodetecting imager includes a photodiode or pixel capable of absorbing electromagnetic radiation within a specific wavelength range. Such an imager may be a passive pixel sensor (PPS), an active pixel sensor (APS), a digital pixel sensor imager (DPS), etc., with one difference being the image sensor readout structure. For example, the semiconductor photosensitive imager may be a 3 or 4 transistor active pixel sensor (3T APS or 4T APS). Various additional components are also contemplated and will vary depending on the specific configuration and intended results. For example, the 4T configuration may further include a transfer gate, a reset, a source follower, and a row select transistor, and the like. Incidentally, devices having five or more transistors are also within the scope of the present invention.
The photosensitive imager may be a front side illumination (FSI) or back side illumination (BSI) device, both structure types have advantages and disadvantages. In a typical FSI imager, incident light enters the semiconductor device by first passing through a transistor and metal circuitry. However, light can be scattered off transistors and circuitry before entering the light-sensing portion of the imager, resulting in optical losses and noise. A lens may be placed on the top surface of the FSI pixel so that incident light is directed and focused into the light-sensing active area of the device, thus partially avoiding circuitry. In one aspect, the lens may be an ulens. On the other hand, the BSI imager is configured to have a depletion region of the junction extending to the opposite side of the device. In one aspect, for example, incident light enters through the light sensing portion and is mostly absorbed before reaching the circuit. The BSI design allows for a smaller pixel structure and a higher fill factor of the imager. As mentioned, the present invention may be suitable for any configuration. In addition, devices according to aspects of the present invention may be incorporated into complementary metal-oxide-semiconductor (CMOS) imager structures or charge coupled device (CCD) imager structures.
In one aspect, as shown in FIG. 1 , a photosensitive diode 10 includes a plurality of doped regions 14 , 16 forming at least one junction, coupled to a semiconductor substrate and configured to interact with electromagnetic radiation. and a semiconductor substrate (12) having at least one textured region (18) positioned thereon. Different doped regions may have the same doping profile or different doping profiles, depending on the device. This structure is an FSI design where light enters the semiconductor substrate from the side of the plurality of doped regions. Although the device shown in Figure 1 includes three doped regions, embodiments having more than one doped region may be considered within the scope of the present invention. Additionally, in some aspects, the semiconductor substrate may be doped and, thus, considered one doped region. The photosensitive diode may be configured to have a BSI structure, and electromagnetic radiation will enter the semiconductor substrate from the textured area side.
Various devices in accordance with aspects of the present invention may exhibit increased quantum efficiency compared to traditional photosensitive devices. The increase in quantum efficiency makes a significant difference in the signal-to-noise ratio. More complex configurations can provide not only increased quantum efficiency, but also desirable uniformity between pixels. In addition, the device of the present invention exhibits increased reactivity when compared to conventional photosensitive devices. For example, in one embodiment, the reactivity may be 0.8 A/W or greater for a wavelength of 1000 nm or greater for a semiconductor substrate having a thickness of 100 μm or less.
The photosensitive imager can be held at a constant state (either a fixed voltage or current) to provide improved linearity and uniformity. Vias made of a refractory metal (eg, tungsten, or tantalum) may provide a connection between the imager and the underlying device layer. By placing a storage element under the imager, various optical advantages can be provided. For example, the entire pixel array may be dedicated to signal processing. This may allow access to low level pixel signals, thereby enabling higher performance. In addition, massively parallel operations can be performed by the pixel processor. For example, analog to digital conversion, noise reduction (i.e. true correlated double sampling), power conditioning, nearest neighbor pixel processing, compression, fusion, and a color multiplexing operation may be performed.
A variety of semiconductor materials are contemplated for use with the apparatus and method according to the present invention. Non-limiting examples of such semiconductor materials may include compounds and alloys comprising Group IV materials, Group II and VI materials, compounds and alloys comprising Group III and V materials, and combinations thereof. . More specifically, exemplary Group IV materials may include silicon, carbon (eg, diamond), germanium, and combinations thereof. Various exemplary combinations of Group IV materials may include silicon carbide (SiC) and silicon germanium (SiGe). In one specific embodiment, the semiconductor material is or may include silicon. Exemplary silicon materials may include amorphous silicon (a-Si), microcrystalline silicon, polycrystalline silicon, monocrystalline silicon, and other crystalline types. In another aspect, the semiconductor material can include at least one of silicon, carbon, germanium, aluminum nitride, gallium nitride, indium gallium arsenide, aluminum arsenide, and combinations thereof.
Exemplary combinations of Group II-VI materials include cadmium selenide (CdSe), cadmium sulfide (CdS), cadmium telluride (CdTe), zinc oxide (ZnO), zinc selenide (ZnSe), zinc sulfide (ZnS), zinc telluride (ZnTe), cadmium zinc telluride (CdZnTe, CZT), mercury cadmium telluride (HgCdTe), mercury zinc telluride (HgZnTe), mercury zinc selenide (HgZnSe), and combinations thereof.
Exemplary combinations of Group III-V materials are aluminum antimonide (AlSb), aluminum arsenide (AlAs), aluminum nitride (AlN), aluminum phosphide (AlP), boron nitride (BN), boron phosphide. Phide (BP), Boron Arsenide (BAs), Gallium Antimonide (GaSb), Gallium Arsenide (GaAs), Gallium Nitride (GaN), Gallium Phosphide (GaP), Indium Antimonide (InSb) , Indium Arsenide (InAs), Indium Nitride (InN), Indium Phosphide (InP), Aluminum Gallium Arsenide (AlGaAs, Al<sub>x</sub>Ga<sub>1</sub><sub>-</sub><sub>x</sub>As), Indium Gallium Arsenide (InGaAs, In<sub>x</sub>Ga<sub>1</sub><sub>-</sub><sub>x</sub>As), Indium Gallium Phosphide (InGaP), Aluminum Indium Arsenide (AlInAs), Aluminum Indium Antimonide (AllnSb), Gallium Arsenide Nitride (GaAsN), Gallium Arsenide Phosphide (GaAsP), Aluminum Gallium Nitride (AlGaN), Aluminum Gallium Phosphide (AlGaP), Indium Gallium Nitride (InGaN), Indium Arsenide Antimonide (InAsSb), Indium Gallium Antimonide (InGaSb), Aluminum Gallium Indium Phosphide (AlGalnP) ), aluminum gallium arsenide phosphide (AlGaAsP), indium gallium arsenide phosphide (InGaAsP), aluminum indium arsenide phosphide (AlInAsP), aluminum gallium arsenide nitride (AlGaAsN), indium gallium arsenide Nide Nitride (InGaAsN), Indium Aluminum Arsenide Nitride (InAlAsN), Gallium Arsenide Antimonide Nitride (GaAsSbN), gallium indium nitride arsenide antimonide (GalnNAsSb), gallium indium arsenide antimonide phosphide (GalnAsSbP), and combinations thereof.
The semiconductor material may have any thickness that enables electromagnetic radiation detection and conversion functionality, and thus, any such thickness of semiconductor material may be considered within the scope of the present invention. In some aspects, the laser treated regions of the semiconductor increase the efficiency of the device, so that the semiconductor material can be thinner than previously possible. Reducing semiconductor thickness reduces the amount of semiconductor material needed to make such devices. In one embodiment, for example, the semiconductor material has a thickness of from about 500 nm to about 50 μm. In another aspect, the semiconductor material has a thickness of about 500 μm or less. In yet another aspect, the semiconductor material has a thickness of about 1 μm to 10 μm. In another aspect, the semiconductor material can have a thickness of from 5 μm to about 750 μm. In another aspect, the semiconductor material can have a thickness of from about 5 μm to about 100 μm.
In addition, various types of semiconductor materials are contemplated, and any such material that may be included in an electromagnetic radiation detection device is considered to be within the scope of the present invention. In one embodiment, for example, the semiconductor material is monocrystalline. In another aspect, the semiconductor material is polycrystalline. In another aspect, the semiconductor material is microcrystalline. It is also contemplated that the semiconductor material may be amorphous. Specific, but non-limiting examples include amorphous silicon, or amorphous selenium.
The semiconductor material of the present invention may be made using a variety of manufacturing processes. In some cases, the manufacturing procedure may affect the efficiency of the device and may be considered to achieve the desired result. Exemplary manufacturing processes may include a Czochralski (Cz) process, a magnetic Czochralski (mCz) process, a float zone (FZ) process, an epitaxial growth or deposition process, and the like. Whether a low oxygen content is desired in the device can influence the choice of the semiconductor material fabrication process. Different processes produce semiconductor materials containing varying amounts of oxygen, and therefore some applications that have tighter tolerances with respect to oxygen levels when compared to other applications may benefit from certain manufacturing procedures. For example, during CZ crystal growth, oxygen from a containment vessel (usually a quartz crucible) can be drawn in and incorporated into the crystals. In addition, another source of oxygen contamination is possible in the CZ process. However, through the use of oxygen-free crucible materials, and through the development of other crucible-free crystal growth methods, such contamination can be reduced. One such process is the FZ process.
A material grown using the CZ method can be made to have a lowered oxygen concentration through improvement of the crystal growth process (eg, growing crystals in the presence of a magnetic field (ie, mCz process)). Also, gettering techniques may be employed to reduce the effect of oxygen or other impurities on the finished device. These gettering techniques may include thermal cycling to liberate or generate rows of impurities, or selective ion implantation of species to serve as gettering sites for impurities. For example, oxygen concentrated in the semiconductor may be removed by performing a furnace cycle to form a denuded zone. During heating with an inert gas, oxygen near the semiconductor surface diffuses out of the material. During the furnace cycle, but after the denudding step, the nucleation and growth steps may be performed. During the nucleation phase a nucleation site for a precipitate is formed, and during the growth phase a precipitate grows from the nucleation site. The precipitate is formed from interstitial oxygen in the bulk of the semiconductor material below the denuded zone. Precipitation of oxygen in the bulk of the semiconductor material may be desirable because these deposits may act as gettering cycles. This precipitate formation can be done to contain interstitial oxygen in the precipitate and reduce the likelihood that such oxygen migrates from the bulk of the semiconducting material into the denuded zone.
In such embodiments where low oxygen content devices are desired, further processing of the semiconductor material may be performed to minimize the introduction of oxygen. Depending on the thermal treatment the semiconductor has undergone, oxygen may exist in different states or at different sites within the semiconductor (eg, silicon). When the semiconductor is under a temperature of, for example, about 1000° C. or higher, oxygen can form colonies or clusters that function as defect sites in the crystal lattice. These sites cause trap states, and carrier lifetimes in semiconductor materials and devices can be reduced. At lower temperatures (eg, about 400° C. to 700° C.), oxygen can act as an electrically active thermal donor. Therefore, oxygen may have a negative effect on carrier lifetime and carrier mobility. In devices fabricated with photoconductive gain, the presence of oxygen, which results in a reduction in carrier lifetime, can lower the level of photoconductive gain.
Thus, it may be advantageous to produce semiconductor devices such that low oxygen content is obtained or maintained. This can be done in a variety of ways, for example, by using low oxygen level containing semiconductor materials to start with, treating these materials in a way that minimizes the absorption of oxygen into the semiconductor lattice, and oxygen that may be present in the semiconductor. There are techniques to eliminate or reduce Such processes and techniques may include, for example, annealing the semiconductor material and any laser treated regions to a lower temperature as compared to previous annealing procedures. The annealing process is described in more detail below.
Additionally, texturing and/or annealing of the semiconductor material may be performed in a substantially oxygen-depleted environment to minimize introduction of oxygen into the semiconductor. An oxygen-depleted, or substantially oxygen-depleted environment may include a variety of environments. For example, in one aspect, an oxygen-depleted environment may be an environment in which oxygen from air or other source has been replaced with a gas or other fluid containing little or no oxygen. In another aspect, the process may occur in a vacuum environment and thus contain little or no oxygen. In addition, an oxygen-containing material, or a material for introducing oxygen into the semiconductor, such as a quartz crucible, may be omitted. As a practice, the term oxygen-depleted environment may be used to describe an environment with low oxygen levels, assuming that semiconductor materials can be processed within desirable tolerances in that environment. Thus, an environment with little or no oxygen is an environment in which the semiconductor can be treated as a low oxygen content semiconductor while maintaining the oxygen level within the tolerances of the present invention. In one aspect, the oxygen-depleted environment may be an oxygen-free environment. Additional details on low oxygen content semiconductor materials can be found in US Patent Application Serial No. 12/771848, filed on Apr. 30, 2010, which US patent application is incorporated herein by reference.
The semiconductor material may have levels of intervening oxygen that vary depending on the desired efficiency of the device. In some embodiments, the oxygen content may be irrelevant, so any oxygen level in the lattice is acceptable. In another aspect, a low oxygen content is desirable. In one aspect, the semiconductor material can have an oxygen content of about 50 ppm atomic (ppm) or less. In yet another aspect, the semiconductor material may have an oxygen content of about 30 ppm atomic (ppm) or less. In yet another aspect, the semiconductor material may have an oxygen content of less than about 10 ppm atomic (ppm). In another aspect, the semiconductor may have an oxygen content of about 5 ppm atomic (ppm) or less. In another aspect, the semiconductor may have an oxygen content of less than or equal to about 1 ppm atomic (ppm).
As described herein, textured regions function to diffuse electromagnetic radiation, redirecting the electromagnetic radiation, and absorbing electromagnetic radiation, thereby increasing the quantum efficiency of the device. The textured region may include surface features to increase the effective absorption length of the photosensitive pixel. The surface features may be cones, pyramids, pillars, protrusions, microlenses, quantum dots, inverted features, and the like. By factors such as manipulating feature size, dimension, material type, dopant profile, texture location, and the like, the diffusion region can be tuned for a particular wavelength. In one aspect, by tuning the device, a specific wavelength, or range of wavelengths, can be absorbed. In another aspect, certain wavelengths, or ranges of wavelengths, may be reduced or eliminated by filtering by tuning the device.
In addition, tuning may be performed by modifying the location of the texture region in the device, the dopant profile of the region in the device, selecting a dopant, and the like. In addition, the composition of the material near the textured area can make a wavelength specific photosensitive pixel device. A wavelength specific photosensitive pixel may be different from an adjacent pixel and may be included in an imaging array. For example, a 4x4 array may include a blue pixel, a green pixel, a red pixel, and an infrared light absorbing pixel, or may include a blue pixel, two green pixels, a red pixel.
A textured region according to an aspect of the present invention allows a photosensitive device to undergo multiple passages of electromagnetic radiation (especially of long wavelengths (ie, infrared)) incident into the device. This internal reflection increases the effective absorption length longer than the thickness of the semiconductor substrate. This increase in absorption length can increase the quantum efficiency of the device, thereby improving the signal-to-noise ratio.
The textured regions may be formed by various techniques, such as chemical etching (eg, anisotropic etching, isotropic etching), nanoimprinting, deposition of additional material, and the like. Pillar features can be incorporated into pixels by thinning or removing material from the backside of the FSI semiconductor substrate, for example, using deep trench isolation and etching techniques. In one embodiment, the material can be removed to a thickness of about 20 μm. Anisotropic etching can be used to create beveled back pyramid structures, spherical structures, parabolic structures, lens structures with reflectors, and the like. These features on the backside of the pillar will function to diffuse and reflect electromagnetic radiation.
In one aspect, the texturing process may be performed during manufacture of the photosensitive device. In another aspect, the texturing process may be performed on an already made photosensitive device. For example, CMOS, CCD, or other photosensitive elements may be textured after fabrication. In this case, a layer of material may be removed from the photosensitive element to expose the bulk material or semiconductor substrate on which the textured area will be made.
One effective way to create textured regions is to use a laser process. With this laser process, individual locations of the semiconductor substrate can be textured. A variety of laser processing techniques for forming textured regions are contemplated, and any technique capable of forming such regions should be considered within the scope of the present invention. By laser treatment or processing, the absorption properties are improved and thus the focusing and detection of electromagnetic radiation is improved. The laser-treated area may be associated with a surface closest to the impinging electromagnetic radiation, or the laser-treated surface may be associated with an opposing surface with respect to the impinging electromagnetic radiation, so that before the radiation impinges on the laser-treated area It can pass through the semiconductor material.
In one aspect, for example, a target area of a semiconductor material may be irradiated with laser radiation to form a textured area. Examples of such processes are described in greater detail in US Pat. Nos. 7,057,256, 7,354,792 and 7,442,629, which are incorporated herein by reference. Briefly, a surface of a semiconductor material may be irradiated with laser radiation to form textured or surface-modified regions. This laser process can be done with or without a dopant material. In these embodiments where a dopant is used, a laser may be directed through the dopant carrier onto the semiconductor surface. In this way, the dopant from the dopant carrier is introduced into the target region of the semiconductor material. Such regions included in the semiconductor material may have various advantages in accordance with aspects of the present invention. For example, the target area has a textured surface that increases the surface area of the area to be treated by the laser and increases the probability of radiation absorption through the means described herein. In one aspect, this target area is a substantially textured surface comprising micron-sized and/or nano-sized surface features created by laser texturing. In another aspect, irradiating the surface of the semiconductor material comprises exposing the laser radiation to the dopant to incorporate the dopant into the semiconductor. Various dopant materials are known in the prior art and are more specifically described herein.
Thus, the surface of the semiconductor material is chemically and/or structurally modified by laser treatment, resulting in the formation of surface features that appear as microstructures or patterned regions on the surface in some embodiments, and when dopants are used, such dopants of incorporation into the semiconductor material. In some aspects, the features or microstructures may have a size on the order of 50 nm to 20 μm and may assist in absorption of electromagnetic radiation. In other words, a textured surface can increase the probability that incident radiation is absorbed by the semiconductor material.
The type of laser radiation used to surface modify a semiconductor material may depend on the material and on the desired modification. Any laser radiation known in the art may be used with the apparatus and method of the present invention. There are multiple laser properties that can affect the surface modification process and/or the final product, including, but not limited to, wavelength, pulse width, pulse fluence, pulse frequency, polarization of the laser radiation. ), the direction of laser propagation to the semiconductor material, and the like. In one aspect, a laser may be configured to provide pulsatile lasing of a semiconductor material. Short-pulsed lasers are capable of generating femtosecond, picosecond and/or nanosecond pulse durations. The laser pulse may have a central wavelength of about 10 nm to 8 μm, and more specifically, a central wavelength of about 200 nm to about 1200 nm. The pulse width of the laser radiation may be from about tens of femtoseconds to about hundreds of nanoseconds. In one aspect, the laser pulse width may be from about 50 femtoseconds to about 50 picoseconds. In another aspect, the laser pulse width may be between about 50 picoseconds and 100 nanoseconds. In another aspect, the laser pulse width is between about 50 and 500 femtoseconds.
The number of laser pulses irradiating the target area may be about 1 to about 2000. In one aspect, the number of laser pulses irradiating the semiconductor target area may be from about 2 to about 1000. In addition, the repetition rate or frequency of the pulses may be selected to be from about 10 Hz to about 10 μHz, or from about 1 kHz to about 1 MHz, or from about 10 Hz to about 1 kHz. In addition, the amount of light of each laser pulse may be from about 1 kJ/m 2 to about 20 kJ/m 2 , or from about 3 kJ/m 2 to about 8 kJ/m 2 .
A variety of dopant materials are contemplated, and any such material that may be used in a laser processing process for surface modification of a semiconductor material in accordance with aspects of the present invention is considered within the scope of the present invention. The specific dopant used may depend on the semiconductor material being laser processed and on the intended use of the final semiconductor material. For example, depending on whether tuning of the photosensitive device is desired or not, the selection of possible dopants may be different.
The dopant may be an electron donating dopant or a hole donating dopant. In one aspect, non-limiting examples of dopant materials can include S, F, B, P, N, As, Se, Te, Ge, Ar, Ga, In, Sb, and combinations thereof. The scope of the dopant material should include not only the dopant material itself, but also the material in the form that carries the dopant (ie, the dopant carrier). For example, the S dopant material may include S as well as any material that can be used to dope S into a target region (eg, H<sub>2</sub>S, SF<sub>6</sub>, SO<sub>2</sub> etc., including combinations thereof). In one specific aspect, the dopant may be S. Sulfur is about 5×10<sup>14</sup> to about 1×10<sup>16</sup> It may be provided at an ion dosage level of ion water/cm 2 . Non-limiting examples of fluorine-containing compounds include CIF<sub>3</sub>, PF<sub>5</sub>, F<sub>2</sub>, SF<sub>6</sub>, b.f.<sub>3</sub>, GeF<sub>4</sub>, WF<sub>6</sub>, SiF<sub>4</sub>, HF, CF<sub>4</sub>, CHF<sub>3</sub>, CH<sub>2</sub>F<sub>2</sub>, CH<sub>3</sub>F, C<sub>2</sub>F<sub>6</sub>, C<sub>2</sub>HF<sub>5</sub>, C<sub>3</sub>F<sub>8</sub>, C<sub>4</sub>F<sub>8</sub>, NF<sub>3</sub> and the like (including combinations thereof). Non-limiting examples of boron-containing compounds include B(CH<sub>3</sub>)<sub>3</sub>, b.f.<sub>3</sub>, BC1<sub>3</sub>, BN, C<sub>2</sub>B<sub>10</sub>H<sub>12</sub>, borosilica, B<sub>2</sub>H<sub>6</sub> and the like (including combinations thereof). Non-limiting examples of phosphorus containing compounds include PF<sub>5</sub>, PH<sub>3</sub> and the like (including combinations thereof). Non-limiting examples of chlorine-containing compounds include Cl<sub>2</sub>, SiH<sub>2</sub>Cl<sub>2</sub>, HCl, SiCl<sub>4</sub> and the like (including combinations thereof). The dopant may also be an arsenic-containing compound (eg, AsH<sub>3</sub><sub></sub>etc.), as well as antimony-containing compounds. Additionally, the dopant material may include a mixture or combination between dopant groups (ie, a mixture of a sulfur-containing compound and a chlorine-containing compound). In one aspect, the dopant material may have a density greater than air. In one specific embodiment, the dopant material is Se, H<sub>2</sub>S, SF<sub>6</sub> or mixtures thereof. In another specific embodiment, the dopant is SF<sub>6</sub>can be about 5.0×10<sup>-</sup><sup>8</sup> mol/cm 3 to about 5.0×10<sup>-</sup><sup>4</sup> It may have a specified concentration range of mol/cm 3 . sci-fi<sub>6</sub> Gases are excellent carriers for incorporation of sulfur into semiconductor materials via laser processing without significant adverse effects on the semiconductor material. Additionally, the dopant may be a solution of an n-type or p-type dopant material dissolved in a solvent (eg, water, alcohol, or an acidic or basic solvent). The dopant may also be a powder or a solid material provided as a dried suspension onto a wafer.
Semiconductor substrates may be annealed for a variety of reasons (eg, dopant activation, semiconductor material damage repair, etc.). In such aspects comprising laser textured regions, the semiconductor material may be annealed before or after laser processing, or during laser processing, or both before and after laser processing. Annealing may enhance the semiconductor properties of the device, such as the photoresponse properties of the semiconductor material. In addition, annealing can reduce damage caused by laser processing. Any known annealing may be desirable and, although within the scope of the present invention, annealing at lower temperatures may be particularly useful. Such "low temperature" annealing can significantly improve the photoconductive gain and external quantum efficiency of devices using these materials. In one aspect, for example, the semiconductor material may be annealed to a temperature of from about 300°C to about 1100°C. In another aspect, the semiconductor material may be annealed to a temperature of from about 500 °C to about 900 °C. In another aspect, the semiconductor material may be annealed to a temperature of from about 700°C to about 800°C. In another aspect, the semiconductor material may be annealed to a temperature of about 850° C. or less.
Depending on the particular type of annealing performed, and depending on the materials used, the duration of the annealing procedure may vary. For example, a high-speed annealing process may be used, and thus the duration of the annealing may be shorter than other techniques. A variety of high-speed thermal annealing techniques are known, all of which are considered to be within the scope of the present invention. In one aspect, the semiconductor material may be annealed by high-speed annealing for a duration of at least about 1 microsecond. In another aspect, the duration of the high-speed annealing process may be from about 1 ms to about 1 ms. As another example, a bake or furnace annealing process may be used which may be longer than a high speed annealing. In one aspect, the semiconductor material may be annealed, for example, by a bake annealing process for a duration of from about 1 ms to several hours or more. As noted, when low oxygen content semiconductor materials are used, it may be desirable to anneal such materials in a substantially oxygen-depleted environment.
As described, annealing can help reduce intrinsic defects in semiconductor substrates or, in other ways, reduce electron/hole recombination. In other words, annealing can help create an electron state that effectively reduces the undesirable recombination process. Annealing the semiconductor material can also improve the device's responsiveness or photoconductivity gain. The photoconductive device can have dopants, impurities, or defects that can provide energy levels that can trap carriers. By trapping carriers and reducing the recombination of photocarriers, the photoconductive gain of the device can be increased. The relationship between the photoconductive gain and the trapping time can be expressed by the equation (I):
gain = τ<sub>L</sub>/τ<sub>t</sub> (I)
where "τ<sub>L</sub>" is the lifetime of excess carriers, and "τ<sub>t</sub>" is the transit time of carriers across the device. The lifetime of excess carriers can be increased by trapping carrier species and reducing the rate of recombination. At room temperature, the capture time of milliseconds and thinned An increase in gain can be obtained by trapping centers of semiconductors with short transit times in lightly doped wafers. By allowing more electrons to traverse different regions without recombination, these trapping sites prevent the recombination of carriers. and thus improving or increasing the photoconductive gain of the device.
Referring again to FIG. 2 , a reflecting layer 20 may be coupled to the semiconductor substrate 12 . The reflective layer can be coupled to any side or portion of the semiconductor substrate to reflect electromagnetic radiation back to the device. Accordingly, in one aspect the reflective layer may be positioned on the semiconductor substrate opposite to incoming electromagnetic radiation. Thus, as shown in FIG. 2 , electromagnetic radiation passing through the semiconductor substrate and the textured region 16 may be reflected back to the semiconductor substrate. In addition, the passivation layer 22 may be connected to the semiconductor substrate. Although the passivation layer appears to be connected to the side of the semiconductor substrate facing the incoming electromagnetic radiation, the passivation layer may be located anywhere in the device and is also within the scope of the present invention.
As described, the location of the textured region may be used to provide for intensification and/or filtering of incoming electromagnetic radiation. For example, textured regions located at the point where electromagnetic radiation enters the photosensitive device tend to bend electromagnetic radiation (especially blue wavelengths). Thus, one level of tuning can be achieved by placing the textured region on a surface adjacent to the incident electromagnetic radiation to deliberately trigger filtration of blue wavelengths. In addition, absorption of certain wavelengths of electromagnetic radiation occurs at different depths of the semiconductor layer and/or textured region. By increasing the absorption up to the green wavelength, for example, the electrical signal as a result of the green wavelength can be increased in a diode or pixel. A particular traditional four-pixel imager has one red pixel, one blue pixel, and two green pixels, since the larger the number of green pixels, the higher the human eye's sensitivity to green. Thus, in one aspect, a four pixel imager may have one blue pixel, one red pixel, and one green pixel with increased green wavelength absorption. The fourth pixel may be used for IR, or other wavelength selective pixels depending on the desired application of the imager.
3 shows a photosensitive device having a textured region 30 located on the face of a semiconductor substrate 12 . With this configuration, electromagnetic radiation that normally escapes through the face of the device is further attenuated and can be absorbed into the semiconductor substrate. The textured regions may be located on one or more sides to promote improved absorption.
4 shows a photosensitive device having a textured region 40 having a non-parallel surface (non-parallel surface) to the semiconductor substrate 12 . The overall configuration of the textured area can thus be designed to further enhance absorption and/or to selectively tune the device. As described, non-parallel surfaces can have a variety of configurations, eg, non-parallel inclined shapes, pyramidal shapes, inverted-pyramidal shapes, concave shapes, convex shapes, and the like. In some cases, the configuration of the textured region may function to direct or focus electromagnetic radiation into the semiconductor substrate, and in other cases, the configuration of the textured region may function to direct or focus electromagnetic radiation away from the semiconductor substrate. can
As shown in FIG. 5 , a lens 50 may be coupled to the side of the semiconductor substrate 12 facing the incoming electromagnetic radiation. The lens can thus focus electromagnetic radiation into the semiconductor substrate. placed on the incoming electromagnetic radiation surface.<u>Circuit</u>or other structures, the lens may further focus light around such structures, thus reducing light scattering and noise.
As shown in FIG. 6 , a textured region 60 is located adjacent a plurality of doped regions 14 , 16 in the semiconductor substrate 12 . As shown, the textured region may be associated with at least one of the doped regions, or the textured region may be separate from the doped region (not shown in the figure). The electromagnetic radiation may enter the photosensitive device from the side adjacent to the doped region, or may enter the doped region from the opposite side.
7-11 illustrate various steps in manufacturing a photosensitive pixel in accordance with aspects of the present invention. 7 shows a cross-sectional view of a front side illumination (FSI) photosensitive pixel device. The photosensitive pixel device may include a semiconductor substrate 72 and may be referred to as bulk semiconductor material. The semiconductor substrate includes one or more doped regions 74, which are electron donating or hole donating regions that render region 74 more anode or more cathode than a semiconductor substrate. donating) species can be doped. In one aspect, for example, the doped region may be p-doped. In another aspect, the doped region may be n-doped. A heavily doped region 76 may be formed on or near the doped region to create a pinned diode. As one example, the semiconductor structure may be a cathode, and the doped region and the heavily doped region may be doped with p+ and n- dopants, respectively. In some aspects, n(--), n(-), n(+), n(++), p(--), p(-), p(+), or p(++) of regions Variations of type doping may be used. In one aspect, the heavily doped region may be a textured region. That is, textured surface features may be formed on or within the heavily doped region.
The device of FIG. 7 may further include various metal regions 87 , one or more vias 80 , a passivation layer 82 , trench isolation 84 , and electrical conduction elements 86 . The trench isolation element can maintain pixel-to-pixel uniformity by reducing optical and electrical crosstalk. The trench isolation may be shallow trench isolation (FIG. 7) or deep trench isolation (FIG. 12). The trench isolation may include a variety of materials, including, but not limited to, dielectric materials, reflective materials, conductive materials, light diffusing features, and the like. These trench isolation regions can be configured to reflect incident light until absorbed, thereby increasing the effective absorption length of the device.
8, a carrier structure or carrier wafer 88 may be coupled to the photosensitive pixel. In one aspect, a carrier substrate may be disposed on the passivation layer 82 , although the carrier substrate may be disposed on any surface of the device. In one aspect, for example, a carrier substrate may be disposed on a semiconductor substrate (not shown in the figure). The carrier substrate may be connected to the photosensitive pixel by a variety of techniques, and any such connection means is within the scope of the present invention. In one aspect, the connection may be made using, for example, a bonding layer or an adhesive layer disposed on the device, such as on a passivation layer. Depending on whether the support is removed, the support substrate may support the semiconductor device during or after fabrication. The carrier substrate may be made of a semiconductor material that is the same or similar to the bulk semiconductor material, or it may be made of a different material.
As shown in FIG. 9 , the textured region 90 is connected to the semiconductor substrate 72 , opposite the doped regions 74 and 76 . Thus, light coming from the doped region side passes through the semiconductor substrate before contacting the textured region. The textured regions may be disposed over the entire surface of the semiconductor substrate (shown in FIG. 9 ), or may be disposed in one or more separate regions (not shown in the figure).
As shown in FIG. 10 , an additional carrier support substrate 100 may be coupled to the device, on the side opposite to the carrier support substrate 88 . Additional carrier support substrates may be used for various purposes (eg, to further support the device, to facilitate removal of the first carrier support substrate, etc.). A reflective layer 102 may be disposed between the textured area 90 and the carrier support substrate. The reflective layer can thus reflect electromagnetic radiation passing through the textured area back toward the semiconductor substrate 72 , thus reducing optical loss and backscattering. Thus, in some aspects, the reflective layer may increase the quantum efficiency of the device. The reflective layer material can be any reflective material that can be incorporated into such a device. Non-limiting examples may include materials such as silver, aluminum, and the like.
11 , the carrier support substrate may be removed to expose the passivation layer 82 , or any other layer of material covered by the carrier support substrate. Depending on the intended use of the device, the additional carrier substrate 100 may be retained in the device, removed from the device, or thinned to reduce the thickness of the substrate. Removal of material (eg, carrier substrate and additional carrier substrate) from the device may be accomplished by a variety of methods (including, but not limited to, etching, chemical mechanical polishing, ion implantation (ie, smart cut, etc.)). have.
Various types of trench isolation are contemplated, and any such isolation is considered within the scope of the present invention. As described, the trench isolation may be shallow trench isolation (84 in FIG. 7) or deep trench isolation (120 in FIG. 12). The trench isolation may also include a depth between a shallow depth and a deep depth depending on the device design. The trench isolations may include dielectric materials, reflective materials, conductive materials, and combinations thereof, including textured regions and other light diffusing features. Thus, in some cases, the trench isolation layer may be configured to reflect incident electromagnetic radiation until it is absorbed, thereby increasing the effective absorption length of the device. Additionally, in some aspects, pillar features may be incorporated into pixels by thinning or removing material from the semiconductor substrate using deep trench isolation and etching techniques. As shown in FIG. 13 , as previously described, the textured region 130 may have a surface that is not parallel to the semiconductor substrate 72 (a non-parallel surface). This non-parallel configuration, when included in the deep trench isolation 120 , can effectively focus electromagnetic radiation from multiple sides to the semiconductor substrate.
Additionally, a non-bulk material may be formed or disposed near the doped region of the device. By the addition of a non-bulk material, electromagnetic radiation diffusing features may be formed on or in the non-bulk material. A metal layer forming an aperture may be included in one aspect of the present invention. The metal layer may be formed near the doped region and may have a light entering region, forming an opening. The light entering area may also include an anti-reflective material.
14 shows a photosensitive imager comprising two photosensitive pixels 140 . Each photosensitive pixel includes a border region 142 that may contain metal circuitry and a textured region 144 . Each photosensitive pixel may include one or more transistors 146 or another electrical conducting element. Additional readout and circuit elements 148 may be used and shared by both photosensitive pixels.
Referring again to FIG. 15 , a backside illuminate (BSI) photosensitive pixel is provided in accordance with an aspect of the present invention. Following thinning and trench isolation processing, a lens 150 and an anti-reflective coating 152 are placed on the backside of the pixel. A color filter 154 may be optically coupled with a lens to enable specific wavelength filtering of electromagnetic radiation. The textured region 156, opposite the lens, can be coupled to the semiconductor substrate 72 to provide diffuse scattering and reflection of incident electromagnetic radiation passing through the front surface of the pixel. Thus, the combined operation of the textured region and the trench isolation 120 may focus electromagnetic radiation within the semiconductor substrate.
16 illustrates a front side illuminate (FSI) imager in accordance with another aspect of the present invention. On 62 the lens 160 and the anti-reflective passivation layer are connected to the front side of the pixel. The textured region 90 and the reflective layer 102, opposite the lens, can be coupled to the semiconductor substrate 72 to provide diffuse scattering and reflection of incident electromagnetic radiation passing through the semiconductor substrate. have. Openings 164 formed in the metal or other reflective material layer 166 may increase the efficiency of the optical cavity. The lens thus focuses the electromagnetic radiation through the aperture.
In another aspect of the invention, various methods for fabricating photosensitive diodes, pixels, and imagers are contemplated. In one aspect, as shown in Figure 17, a method of fabricating a photosensitive imager device comprises forming a textured region on a semiconductor substrate having a plurality of doped regions forming at least one junction. wherein a textured region is formed at a location for interacting with electromagnetic radiation (170). The method also includes connecting the electrical transmission element to the semiconductor substrate such that the electrical transmission element carries an electrical signal from the at least one junction 172 . In one aspect, a plurality of pixels may be associated together to form an imager. A passivation layer may also be disposed on the photosensitive imager device to protect and/or reduce the dark current of the device.
In another aspect of the present invention, a method for fabricating a photosensitive diode is provided. The method may include forming at least one cathode and at least one anode on a surface of a semiconductor substrate, connecting the textured region to the semiconductor substrate, and connecting the support substrate to the semiconductor substrate. . The textured region may be located adjacent to the anode and cathode, or opposite the anode and cathode, or both adjacent to and opposite the anode and cathode. An electrical conducting element may be in electrical connection with at least one of the anode and the cathode to form a photosensitive pixel. In another aspect, the semiconductor substrate may be thinned to improve the responsiveness and/or kinetics of the device. A passivation layer may also be disposed on the photosensitive diode to protect and/or reduce the dark current of the device. Additional support structures may be attached to the device to provide additional support. In one aspect, an additional support substrate may be located on the side of the photosensitive diode opposite the support substrate. Thereafter, the support substrate may be removed to enable further processing.
Of course, it should be understood that the arrangement described above is merely illustrative of the application of the principles of the present invention.
Numerous modifications and alternative arrangements may be devised within the spirit and scope of the present invention, and the appended claims are intended to cover such modifications and arrangements. Thus, while the present invention has been described above with details relating to what is believed to be the most practical embodiment of the invention, it will be appreciated by those skilled in the art that various modifications, such as variations in size, material, form, function, and mode of operation, will occur to the present invention. will be understood to be within the scope of
18 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15 Sheet 16 Sheet 17 Sheet 18
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US2007138590A1 | Cites | United States of America | Search report |
| KR20090077274A | Cites | Republic of Korea | Search report |
| US4663188A | Cites | United States of America | Search report |
38 members in 6 offices
Priority claims7
| Document | Office | Kind | Date |
|---|---|---|---|
| 61243434 | United States of America | – | |
| 24343409 | United States of America | P | |
| 61311004 | United States of America | – | |
| 61311107 | United States of America | – | |
| 31100410 | United States of America | P | |
| 31110710 | United States of America | P | |
| 2010049375 | United States of America | W |
Members38
| Document | Office | Kind | |
|---|---|---|---|
| WO2011035188A2 | World Intellectual Property Organization (WIPO) | A2 | |
| WO2011035188A3 | World Intellectual Property Organization (WIPO) | A3 | |
| US2011220971A1 | United States of America | A1 | |
| US2011227138A1 | United States of America | A1 | |
| KR20120069708A | Republic of Korea | A | |
| EP2478560A2 | European Patent Office (EPO) | A2 | |
| CN102630341A | China | A | |
| JP2013505587A | Japan | A | |
| US8476681B2 | United States of America | B2 | |
| US8680591B2 | United States of America | B2 | |
| EP2478560A4 | European Patent Office (EPO) | A4 | |
| US2014197509A1 | United States of America | A1 | |
| US2015270306A1 | United States of America | A1 | |
| JP5961332B2 | Japan | B2 | |
| JP2016197733A | Japan | A | |
| US9673243B2 | United States of America | B2 | |
| US2017271391A1 | United States of America | A1 | |
| US2017309669A9 | United States of America | A9 | |
| US9911781B2 | United States of America | B2 | |
| US2018175093A1 | United States of America | A1 | |
| JP6356181B2 | Japan | B2 | |
| KR101893331B1 | Republic of Korea | B1 | |
| KR20180098687AThis record | Republic of Korea | A | |
| JP2018201019A | Japan | A | |
| US10361232B2 | United States of America | B2 | |
| KR102095669B1 | Republic of Korea | B1 | |
| KR20200036037A | Republic of Korea | A | |
| KR102234065B1 | Republic of Korea | B1 | |
| KR20210035920A | Republic of Korea | A | |
| JP2021193737A | Japan | A | |
| US2022052102A1 | United States of America | A1 | |
| KR102443836B1 | Republic of Korea | B1 | |
| JP7386830B2 | Japan | B2 | |
| JP2024020375A | Japan | A | |
| US2024234470A1 | United States of America | A1 | |
| US12057464B2 | United States of America | B2 | |
| US12057464B2 | United States of America | B2 | |
| US2024339479A1 | United States of America | A1 |
7 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Divisional application of patentA107 | A107 | |
| Written decision to grantGRNT | GRNT | |
| Decision to grant or registration of patent rightE701 | E701 | |
| Notification of reason for final refusalE90F | E90F | |
| Notification of reason for refusalE902 | E902 | |
| Request for examinationA201 | A201 | |
| Divisional application of patentA107 | A107 |
Numbers
- Publication
- 10-2018-0098687
- Application
- 1020187024357
Titles4
- Korean
- 감광성 이미징 장치 및 이와 관련된 방법
- English
- PHOTOSENSITIVE IMAGING DEVICES AND ASSOCIATED METHODS
- Unlabeled
- 감광성 이미징 장치 및 이와 관련된 방법{PHOTOSENSITIVE IMAGING DEVICES AND ASSOCIATED METHODS}
- Unlabeled
- PHOTOSENSITIVE IMAGING DEVICES AND ASSOCIATED METHODS
Classification
- CPC, 16
- H01L27/14609
- H10F39/803
- H10F39/8067
- H01L27/1461
- H01L27/14612
- H10F39/806
- H01L27/14625
- H10F39/8063
- H01L27/14627
- H10F39/199
- H01L27/14629
- H10F39/8033
- H01L27/14636
- H01L27/1464
- H10F39/8037
- H10F39/811
- IPC, 1
- H01L27 146