Group iii nitride based light emitting diode structures with a quantum well and superlattice
Abstract
A light emitting diode having a Group III nitride-based superlattice and a Group III nitride-based active region on the superlattice is provided. The active region includes at least one quantum well structure. The quantum well structure includes a group-III nitride-based first barrier layer, a group-III nitride-based quantum well layer on the first barrier layer, and a second group-III nitride-based barrier layer. A method of manufacturing a group III nitride based semiconductor device is provided, comprising a group III nitride based semiconductor device and an active region comprising at least one quantum well structure. The quantum well structure includes a well support layer comprising a group-III nitride, a quantum well layer comprising a group-III nitride over the well support layer, and a cap layer comprising a group-III nitride over the quantum well layer. Alternate InXGa1-XLayer N and InYGa1-YThere is also provided a group III nitride-based semiconductor device including a gallium nitride-based superlattice having at least two periods of an N layer (where 0X<1, 0Y<1, and XY). The semiconductor device may be a light emitting diode having a group III nitride-based active region. The active region may be a multi-quantum well active region.

Term
Projected expiry 28 October 2028.
- Priority
- Filed
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- Today
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19 claims: 1 independent, 18 dependent
- 1교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층(여기서, 0≤X<1이고 0≤Y<1이며 X≠Y)을 적어도 두 주기 가진 갈륨 나이트라이드계 초격자를 포함하고, 상기 교호하는 층의 첫 번째 층의 두께가 상기 교호하는 층의 두 번째 층의 두께보다 작으며, 상기 교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층에서의 In X Ga 1-X N층과 In Y Ga 1-Y N층을 합한 두께는 10Å 내지 140Å인 것을 특징으로 하는 Ⅲ족 나이트라이드계 반도체 소자.
- 2제1항에 있어서, 상기 교호하는 층의 첫 번째 층의 두께는 상기 교호하는 층의 두 번째 층의 두께의 1/2인 것을 특징으로 하는 반도체 소자.
- 3제1항에 있어서, 상기 갈륨 나이트라이드계 초격자는 5 내지 50 주기를 포함하는 것을 특징으로 하는 반도체 소자.
- 4제1항에 있어서, 상기 갈륨 나이트라이드계 초격자는 25 주기를 포함하는 것을 특징으로 하는 반도체 소자.
- 5제1항에 있어서, 상기 교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층에서의 In X Ga 1-X N층과 In Y Ga 1-Y N층을 합한 두께는 70Å보다 작은 것을 특징으로 하는 반도체 소자.
- 6제1항에 있어서, X=0인 것을 특징으로 하는 반도체 소자.
- 7제6항에 있어서, 상기 교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층에서의 In Y Ga 1-Y N층들은 5 내지 40Å의 두께를 가지며, 상기 교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층에서의 In X Ga 1-X N(X=0)층들은 5 내지 100Å의 두께를 가진 것을 특징으로 하는 반도체 소자.
- 8제7항에 있어서, 상기 교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층에서의 In Y Ga 1-Y N층들은 15Å의 두께를 가지며, 상기 교호하는 In X Ga 1-X N층과 In Y Ga 1-Y N층에서의 In X Ga 1-X N(X=0)층들은 30Å의 두께를 가진 것을 특징으로 하는 반도체 소자.
- 9제1항에 있어서, 상기 갈륨 나이트라이드계 초격자는 1×10 17 cm -3 내지 5×10 19 cm -3 의 레벨로 n-형 불순물이 도핑된 것을 특징으로 하는 반도체 소자.
- 10제9항에 있어서, 상기 갈륨 나이트라이드계 초격자의 도핑 레벨은 상기 교호하는 층들 자체의 도핑 레벨인 것을 특징으로 하는 반도체 소자.
- 11제9항에 있어서, 상기 갈륨 나이트라이드계 초격자의 도핑 레벨은 상기 교호하는 층들의 평균 도핑 레벨인 것을 특징으로 하는 반도체 소자.
- 12제1항에 있어서, 상기 초격자 부근에 도핑된 Ⅲ족 나이트라이드층을 더 포함하고, 상기 도핑된 Ⅲ족 나이트라이드층은 상기 도핑된 Ⅲ족 나이트라이드층과 상기 초격자의 평균 도핑이 1×10 17 cm -3 내지 5×10 19 cm -3 이 되도록 n-형 불순물로 도핑된 것을 특징으로 하는 반도체 소자.
- 13제1항에 있어서, 상기 초격자의 밴드갭은 3.15eV인 것을 특징으로 하는 반도체 소자.
- 14제1항에 있어서, 상기 초격자의 밴드갭은 2.95 내지 3.15eV인 것을 특징으로 하는 반도체 소자.
- 15제1항에 있어서, 상기 반도체 소자는 발광 다이오드를 포함하고, 상기 발광 다이오드는 상기 초격자 상에 Ⅲ족 나이트라이드계 활성 영역을 더 포함하는 것을 특징으로 하는 반도체 소자.
- 16제15항에 있어서, 상기 활성 영역과 상기 초격자 사이에 Ⅲ족 나이트라이드계 스페이서층을 더 포함하는 것을 특징으로 하는 반도체 소자.
- 17제16항에 있어서, 상기 스페이서층은 도핑되지 않은 GaN을 포함하는 것을 특징으로 하는 반도체 소자.
- 18제16항에 있어서, 상기 활성 영역은 적어도 하나의 양자 우물을 포함하는 것을 특징으로 하는 반도체 소자.
- 19제18항에 있어서, 상기 적어도 하나의 양자 우물의 밴드갭은 상기 초격자의 밴드갭보다 작은 것을 특징으로 하는 반도체 소자.
Independent claims19
6 paragraphs, as filed
Group nitride based light emitting diode structures with a quantum well and superlattice
<p>The present invention relates to a microelectronic device and a method for manufacturing the same, and more particularly, to a structure that can be utilized in a group III nitride semiconductor device such as a light emitting diode (LED).</p><p>(Related application)</p><p>This application relates to U.S. Provisional Application Serial No. 60/294,445, entitled "Multi-quantum well light emitting diode structure," filed on May 30, 2001, and "Light emitting diode structure with U.S. Provisional Application Serial No. 60/294,308, entitled "superlattice structure," and U.S. Provisional Application Serial No. 60/294,378, entitled "Light emitting diode structure with multi-quantum well and superlattice structure," filed on May 30, 2001 Priority is claimed from, and the disclosures of these applications are incorporated herein by reference as if fully disclosed herein.</p>
<p>Light-emitting diodes are widely used in consumer and commercial fields. As is well known to those skilled in the art, light emitting diodes generally comprise a diode region on a microelectronic substrate. The microelectronic substrate includes, for example, gallium arsenide, gallium phosphide, alloys thereof, silicon carbide and/or sapphire. Continued advances in LEDs have resulted in highly efficient and mechanically robust light sources capable of covering the visible light spectrum and beyond. These advantages, combined with the potentially long service life of solid state devices, could enable a variety of novel display applications and place LEDs in a position to compete with well-established incandescent and fluorescent lamps.</p><p>A difficulty in manufacturing a III-nitride-based LED, such as a gallium nitride-based LED, lies in the production of high-quality gallium nitride. Typically, gallium nitride LEDs have been fabricated on sapphire or silicon carbide substrates. Such a substrate can result in a crystal lattice mismatch between the substrate and gallium nitride. Various techniques have been used to address potential problems associated with growing gallium nitride on sapphire and/or silicon carbide. For example, aluminum nitride (AlN) may be used as a buffer layer between the silicon carbide substrate and the group III active layer, particularly the gallium nitride active layer. In general, however, aluminum nitride is insulative, not conductive. Accordingly, structures with an aluminum nitride buffer layer typically require a shorting contact that bypasses the aluminum nitride buffer layer to connect the conductive silicon carbide substrate to the group III nitride active layer.</p><p>Alternatively, a conductive buffer layer material such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), or a combination of gallium nitride and aluminum gallium nitride may allow removal of the shorting contacts commonly used with AlN buffer layers. can In general, removing the shorting contact reduces the thickness of the epitaxial layer, reduces the number of process steps for device fabrication, reduces overall chip size, and increases device efficiency. Accordingly, a high-performance group III nitride element can be produced at low cost. However, although these conductive buffer materials provide these advantages, their crystal lattice mismatch with silicon carbide is less satisfactory than with aluminum nitride.</p><p>The aforementioned difficulties in manufacturing high-quality gallium nitride can reduce device efficiency. Attempts to improve the output of group-III nitride-based devices include altering the active region structure of the device. Such approaches include, for example, the use of single and/or double heterostructured active regions. Similarly, quantum well devices having one or more Group III nitride quantum wells have also been described. Although these attempts have improved the efficiency of group-III nitride-based devices, further improvements can still be achieved.</p>
<solutionproblem><p>An embodiment of the present invention provides a light emitting diode having a Group III nitride-based superlattice and a Group III nitride-based active region on the superlattice. The active region includes at least one quantum well structure. The quantum well structure includes a group III nitride-based first barrier layer, a group III nitride-based quantum well layer on the first barrier layer, and a second group III nitride-based barrier layer on the quantum well layer. include</p><p>Further, the light emitting diode includes the at least one quantum well structure repeated about 2 to about 10 times.</p></solutionproblem><meansproblemsolution><p>According to a further embodiment of the present invention, the superlattice comprises alternating In<sb>X</sb>Ga<sb>1-X</sb>Layer N and In<sb>Y</sb>Ga<sb>1-Y</sb>A gallium nitride-based superlattice having at least two N-layers is included. Here, 0X<1, 0Y<1, and XY. The group III nitride-based first barrier layer forms a well support layer comprising a group III nitride, and the second group III nitride barrier layer is a cap layer comprising a group III nitride on the quantum well layer; cap layer).</p><p>In such embodiments, the cap layer may have a lower crystal quality than the well support layer.</p><p>Further, the well support layer comprises a gallium nitride based layer, the quantum well layer comprises an indium gallium nitride layer and the barrier layer comprises a gallium nitride based layer. In this embodiment, the well support layer and the cap layer are In<sb>X</sb>Ga<sb>1-X</sb>It may be formed as an N layer (here, 0X<1). In addition, the indium component of the well support layer and the cap layer may be less than the indium component of the quantum well layer.</p><p>The well support layer and the cap layer are Al<sb>X</sb>In<sb>Y</sb>Ga<sb>1-XY</sb>It may also be formed as an N-layer (here, 0<X<1, 0Y<1, and X+Y1). In addition, the well support layer and the cap layer may be undoped. Instead, the well support layer and the cap layer are about 5×10<sp>19</sp>cm<sp>-3</sp>It may have a lower n-type doping level. The cap layer and the well support layer may have a larger bandgap than the quantum well layer. A combined thickness of the well support layer and the cap layer may be about 50 to about 400 Å. A thickness of the well support layer may be greater than a thickness of the cap layer. The quantum well layer may have a thickness of about 10 to about 50 Å. For example, the quantum well layer may have a thickness of about 20 Å. In addition, the percentage of indium in the quantum well layer may be about 15% to about 40%.</p><p>In a further embodiment of the present invention, a Group III nitride-based spacer layer is formed between the well support layer and the superlattice. The spacer layer may be undoped GaN.</p><p>In another embodiment of the present invention, the band gap of the quantum well is smaller than the band gap of the superlattice.</p><p>Further, the light emitting diode includes a second well support layer including a group III nitride on the cap layer, a second quantum well layer including a group III nitride on the second well support layer, and a second quantum well layer on the second quantum well layer. It further includes a second cap layer comprising a group III nitride.</p><p>In a further embodiment of the present invention, the gallium nitride based superlattice comprises from about 5 to about 50 cycles. The alternating In<sb>X</sb>Ga<sb>1-X</sb>Layer N and In<sb>Y</sb>Ga<sb>1-Y</sb>The combined thickness of the N layers may be about 10 to about 140 Å.</p><p>In a specific embodiment of the present invention, the In of the superlattice<sb>X</sb>Ga<sb>1-X</sb>X = 0 of the N layer. In such an embodiment, the InGaN layers may have a thickness of about 5 to about 40 Angstroms, and the GaN layers may have a thickness of about 5 to about 100 Angstroms.</p><p>Further, the gallium nitride-based superlattice is about 1×10<sp>17</sp>cm<sp>-3 </sp>to about 5×10<sp>19</sp>cm<sp>-3</sp>An n-type impurity is doped to a level of . The doping level of the gallium nitride based superlattice may be the actual doping level of the alternating layers. The doping level may also be an average doping level of the alternating layers . Thus, for example, the light emitting diode further includes a doped group III nitride layer in the vicinity of the superlattice, and the doped group III nitride layer has an average doping of the doped group III nitride layer and the superlattice. Approx. 1×10<sp>17</sp>cm<sp>-3 </sp>to about 5×10<sp>19</sp>cm<sp>-3</sp>It may be doped with an n-type impurity. The band gap of the superlattice may be about 2.95 eV to about 3.35 eV, and in some embodiments, about 3.15 eV.</p><p>According to another embodiment of the present invention, there is provided a group III nitride-based semiconductor device having an active region including at least one quantum well structure. The quantum well structure includes a well support layer comprising a group-III nitride, a quantum well layer comprising a group-III nitride on the well support layer, and a cap layer comprising a group-III nitride on the quantum well layer.</p><p>The cap layer may have a lower crystal quality than the well support layer. The well support layer may be formed of a gallium nitride-based layer, the quantum well layer may be formed of an indium gallium nitride layer, and the barrier layer may be formed of a gallium nitride-based layer. In such an embodiment, the well support layer and the cap layer are<sb>X</sb>Ga<sb>1-X</sb>It may be formed as an N layer (here, 0X<1). In addition, the indium component of the well support layer and the cap layer may be less than the indium component of the quantum well layer. Similarly, the well support layer and the cap layer are Al<sb>X</sb>In<sb>Y</sb>Ga<sb>1-XY</sb>It may be formed of N layers (where 0<X<1, 0Y<1, and X+Y1).</p><p>In addition, the well support layer and the cap layer may be undoped. Instead, the well support layer and the cap layer are about 5×10<sp>19</sp>cm<sp>-3</sp>It may have a lower doping level.</p><p>Further, the cap layer and the well support layer have a larger bandgap than the quantum well layer. A combined thickness of the well support layer and the cap layer may be about 50 to about 400 Å. For example, a combined thickness of the well support layer and the cap layer may be greater than about 90 Å. Similarly, the combined thickness of the well support layer and the cap layer may be about 225 Å. A thickness of the well support layer may be greater than a thickness of the cap layer.</p><p>In a further embodiment of the present invention, the quantum well layer has a thickness of about 10 to about 50 Angstroms. For example, the thickness of the quantum well layer may be about 25 Å. In addition, the percentage of indium in the quantum well layer may be about 5% to about 50%.</p><p>In another embodiment of the group III nitride based semiconductor device according to the present invention, a superlattice is provided, and the well support layer is located on the superlattice. The superlattice may have a band gap of about 3.15 eV. In addition, a group III nitride-based spacer layer may be further provided between the well support layer and the superlattice. The spacer layer may be undoped GaN. Also, a bandgap of the at least one quantum well may be smaller than a bandgap of the superlattice.</p><p>Further, a second well support layer comprising a group III nitride is formed on the cap layer. A second quantum well layer including group III nitride is formed on the second well support layer, and a second cap layer including group III nitride is formed on the second quantum well layer.</p><p>In a specific embodiment of the present invention, the group-III nitride-based semiconductor device includes the at least one quantum well structure repeated about 2 to about 10 times.</p><p>Embodiments of the present invention alternate In<sb>X</sb>Ga<sb>1-X</sb>Layer N and In<sb>Y</sb>Ga<sb>1-Y</sb>Provided is a group III nitride-based semiconductor device including a gallium nitride-based superlattice having at least two periods of an N layer (where 0X<1, 0Y<1, and XY).</p><p>Further, the gallium nitride-based superlattice includes about 5 to about 50 cycles. For example, the gallium nitride-based superlattice includes 25 cycles. Similarly, the gallium nitride-based superlattice may include 10 cycles.</p><p>In a further embodiment of the present invention, the gallium nitride based superlattice comprises from about 5 to about 50 cycles. The alternating In<sb>X</sb>Ga<sb>1-X</sb>Layer N and In<sb>Y</sb>Ga<sb>1-Y</sb>The combined thickness of the N layers may be about 10 to about 140 Å.</p><p>In a specific embodiment of the present invention, the superlattice In<sb>X</sb>Ga<sb>1-X</sb>X = 0 of the N layer. In such an embodiment, the InGaN layers may have a thickness of about 5 to about 40 Angstroms, and the GaN layers may have a thickness of about 5 to about 100 Angstroms. Furthermore, the gallium nitride-based superlattice is about 1×10<sp>17</sp>cm<sp>-3 </sp>to about 5×10<sp>19</sp>cm<sp>-3</sp>It is doped with an n-type impurity to a level of . The doping level of the gallium nitride based superlattice may be an actual doping level of the alternating layers or an average doping level of the alternating layers.</p><p>In some embodiments of the present invention, a doped group III nitride layer is formed adjacent the superlattice. The doped group III nitride layer has an average doping of the doped group III nitride layer and the superlattice of about 1×10<sp>17</sp>cm<sp>-3 </sp>to about 5×10<sp>19</sp>cm<sp>-3</sp>It is doped with an n-type impurity so that it becomes this.</p><p>In a further embodiment of the present invention, the bandgap of the superlattice is about 3.15 eV.</p><p>In the embodiment of the present invention in which the group-III nitride-based semiconductor device includes a light-emitting diode, the light-emitting diode further includes a group-III nitride-based active region on the superlattice. Additionally, a Group III nitride-based spacer layer may be further provided between the active region and the superlattice. This spacer layer may be undoped GaN.</p><p>In some embodiments of the invention, the active region comprises at least one quantum well. In such an embodiment, the bandgap of the quantum well may be smaller than the bandgap of the superlattice.</p><p>A further embodiment of the present invention provides a method of manufacturing a group-III nitride-based semiconductor device having an active region comprising at least one quantum well structure. wherein the quantum well structure forms a well support layer comprising a group III nitride, a quantum well layer comprising a group III nitride is formed on the well support layer, and a group III nitride is formed on the quantum well layer. It is manufactured by forming a cap layer.</p><p>In a particular embodiment of the present invention, forming the well support layer comprising group-III nitride includes forming the well support layer at a first temperature. The forming of the quantum well layer includes forming the quantum well layer at a second temperature lower than the first temperature. The forming of the cap layer may include forming the cap layer at a third temperature lower than the first temperature. In some embodiments of the present invention, the third temperature is substantially equal to the second temperature.</p><p>Further, the well support layer includes a gallium nitride based layer, the quantum well layer includes an indium gallium nitride layer, and the cap layer includes a gallium nitride based layer. In such an embodiment, the first temperature may be between about 700 and about 900°C. In addition, the second temperature may be about 0 to about 200 °C lower than the first temperature. The indium gallium nitride layer may be formed in a nitrogen atmosphere or another atmosphere.</p><p>Preferably, the step of forming the cap layer is<sb>X</sb>Ga<sb>1-X</sb>and forming a cap layer of N (where 0X<1), wherein the forming of the well support layer includes In<sb>X</sb>Ga<sb>1-X</sb>and forming a well support layer of N (where 0X<1). In addition, the indium component of the well support layer and the cap layer may be less than the indium component of the quantum well layer.</p><p>In a further embodiment of the present invention, the forming of the well support layer and the forming of the cap layer are Al<sb>X</sb>In<sb>Y</sb>Ga<sb>1-XY</sb>Forming a cap layer of N (where 0<X<1, 0Y<1, and X+Y1) and Al<sb>X</sb>In<sb>Y</sb>Ga<sb>1-XY</sb>and forming a well support layer of N (where 0<X<1, 0Y<1, and X+Y1).</p><p>Further, embodiments of the present invention include forming a superlattice, wherein the well support layer is located on the superlattice. A further embodiment of the present invention further includes forming a group-III nitride-based spacer layer between the well support layer and the superlattice. The spacer layer may be undoped GaN. A further embodiment of the present invention includes the steps of forming a second well support layer comprising a group-III nitride on the cap layer, forming a second quantum well layer comprising a group-III nitride on the second well support layer; and forming a second cap layer including a group III nitride on the second quantum well layer. In such an embodiment, the second well support layer may be formed substantially at the first temperature, the quantum well layer may be formed at the second temperature lower than the first temperature, and the cap layer may be formed at the first temperature. It may be formed at the third temperature lower than the first temperature.</p></meansproblemsolution><effectiveness><p>According to the present invention, it is possible to manufacture high-quality gallium nitride, thereby improving the efficiency of the III-nitride-based device.</p></effectiveness>
<p>Hereinafter, the present invention will be described in detail with reference to the accompanying drawings showing preferred embodiments of the present invention. However, the embodiments illustrated below may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. The embodiments of the present invention are provided in order to more completely explain the present invention to those of ordinary skill in the art. The dimensions of the layers or regions are exaggerated for illustrative purposes. The same symbols refer to the same elements from time to time. When an element, such as a layer, region, or substrate, is described as being "on" or extending "on" another element, the element is directly on or on the other element. It can be understood as a case in which it directly extends upward, or a third other element is interposed therebetween. On the other hand, when an element is described as being "directly on" or extending "directly on" another element, there are no other elements intervening therebetween. In addition, each embodiment disclosed herein also includes an embodiment of its opposite conductivity type.</p><p>Embodiments of the present invention will be described with reference to FIG. 1 showing a light emitting diode (LED) structure 40 . The LED structure 40 of FIG. 1 includes a substrate 10 preferably comprising 4H or 6H n-type silicon carbide. Substrate 10 may also include sapphire, bulk gallium nitride, or other suitable substrate. The LED structure 40 of FIG. 1 also includes a stacked semiconductor structure comprising gallium nitride based semiconductor layers on a substrate 10 . In other words, the illustrated LED structure 40 has the following layers: conductive buffer layer 11 , silicon doped first GaN layer 12 , silicon doped second GaN layer 14 , silicon doped GaN and/or or a superlattice structure 16 comprising alternating layers of InGaN, an active region 18 that may be formed into a multi-quantum well structure, an undoped GaN and/or AlGaN layer 22, doped with p-type impurities. an AlGaN layer 30, and a GaN contact layer 32 also doped with p-type impurities. The structure further includes an n-type ohmic contact 23 on the substrate 10 and a p-type ohmic contact 24 on the contact layer 32 .</p><p>The buffer layer 11 is preferably n-type AlGaN. Examples of buffer layers between silicon carbide and Group III nitride-based materials are described in U.S. Patent Nos. 5,393,993, 5,523,589 and U.S. Application Nos. Nos. 5,393,993, 5,523,589 and entitled "Vertical Geometry InGaN Light Emitting Diodes" assigned to the assignee of the present invention. 09/154,363, the disclosures of which are incorporated herein by reference as if fully disclosed herein. Similarly, embodiments of the present invention may also include structures such as those disclosed in U.S. Patent No. 6,201,262, entitled "Group III Nitride Photonic Devices on Silicon Carbide Substrates With Conductive Buffer Interlay Structure," the disclosure of which is disclosed herein. It is incorporated by reference as if fully disclosed in the specification.</p><p>The first GaN layer 12 is preferably about 500 to 4000 nm thick, and most preferably about 1500 nm thick. The first GaN layer 12 is about 5×10<sp>17</sp> to 5×10<sp>18</sp> cm<sp>-3</sp>Silicon may be doped to a level of . The second GaN layer 14 is preferably about 10-500 Angstroms thick, and most preferably about 80 Angstroms thick. The second GaN layer 14 is about 5×10<sp>19</sp> cm<sp>-3</sp>Silicon can be doped to a lower level.</p><p>As shown in Figure 1, a superlattice structure 16 according to an embodiment of the present invention has alternating In<sb>X</sb>Ga<sb>1-X</sb>Layer N and In<sb>Y</sb>Ga<sb>1-Y</sb>It contains N layers, where X is between 0 and 1 and XY. Preferably, X=0, wherein each of the alternating InGaN layers has a thickness of about 5-40 Angstroms, and each of the alternating GaN layers has a thickness of about 5-100 Angstroms. In some embodiments, the thickness of the GaN layer is about 30 Angstroms, and the thickness of the InGaN layer is about 15 Angstroms. The superlattice structure 16 has about 5 to about 50 cycles (one period of In constituting the superlattice<sb>X</sb>Ga<sb>1-X</sb>Layer N and In<sb>Y</sb>Ga<sb>1-Y</sb>same as that layer N is repeated once). In one embodiment, the superlattice structure 16 includes 25 periods. In another embodiment, the superlattice structure 16 includes 10 periods. However, the number of cycles can be reduced, for example, by increasing the thickness of each layer. Thus, for example, doubling the thickness of the layers can halve the number of cycles. Alternatively, the number and thickness of cycles may be independent of each other.</p><p>Preferably, the superlattice structure 16 is about 1×10<sp>17</sp>cm<sp>-3 </sp>to about 5×10<sp>19</sp>cm<sp>-3</sp>It is doped with an n-type impurity such as silicon to a level of . This doping level may be the actual or average doping of the layers of the superlattice structure 16 . If this doping level is an average doping level, it is advantageous to provide a doped layer adjacent the superlattice structure 16, which layer has a desired average doping that is an average value for the superlattice structure 16 and its adjacent layers. to provide. By forming the superlattice structure 16 between the substrate 10 and the active region 18, a better surface on which the InGaN-based active region 18 will be grown can be provided. Without wishing to be bound by any theory, the inventors believe that the effect of stress in the superlattice structure 16 provides a growth surface conducive to the growth of high-quality InGaN containing active regions. In addition, the superlattice is known to affect the operating voltage of the device. Proper superlattice thickness and compositional parameters can reduce the operating voltage and increase the optical efficiency.</p><p>The superlattice structure 16 may be grown in a nitrogen or other gas atmosphere to allow high quality InGaN layer growth within the structure. By growing a silicon-doped InGaN/GaN superlattice on a silicon-doped GaN layer in a nitrogen atmosphere, a structure with improved crystallinity and conductivity with optimized stress can be realized.</p><p>In some embodiments of the present invention, active region 18 may include single or double heterojunction active regions as well as single or multiple quantum well structures. In a particular embodiment of the present invention, active region 18 comprises a multiple quantum well structure comprising multiple InGaN quantum well layers separated by a barrier layer (not shown in Figure 1).</p><p>A layer 22 is formed over the active region 18, which is preferably about 0 to 120 angstroms thick undoped GaN or AlGaN. As used herein, undoped means not intentionally doped. The thickness of layer 22 is preferably about 35 Angstroms. When layer 22 comprises AlGaN, the aluminum percentage of the layer is preferably about 10-30% and most preferably about 24%. The aluminum level in layer 22 may also be sloped in a stepwise or continuously decreasing manner. Layer 22 may be grown at a temperature higher than the growth temperature of quantum well region 25 to improve the crystal quality of layer 22 . Additional layers of undoped GaN or AlGaN may be included near layer 22 . For example, LED structure 40 may include an additional layer of undoped AlGaN about 6-9 Angstroms thick between active region 18 and layer 22 .</p><p>An AlGaN layer 30 doped with a p-type impurity such as magnesium is formed on the layer 22 . The AlGaN layer 30 may be about 0 to 300 Angstroms thick, preferably about 130 Angstroms. A contact layer 32 of p-type GaN is formed on the AlGaN layer 30 and is preferably about 1800 Angstroms thick. Ohmic contacts 24 and 25 are formed on the p-GaN contact layer 32 and the substrate 10, respectively.</p><p>Figure 2 shows another embodiment of the present invention comprising multiple quantum well active regions. The preferred embodiment of the present invention shown in FIG. 2 includes a stacked semiconductor structure 100 comprising a gallium nitride based semiconductor layer grown on a substrate 10 . As mentioned above, the substrate 10 may be SiC, sapphire, or bulk gallium nitride. As shown in Fig. 2, an LED according to a specific embodiment of the present invention has a conductive buffer layer 11, a first silicon-doped GaN layer 12, a silicon-doped second GaN layer 14, and alternating silicon doping. A superlattice structure 16 comprising a layer of GaN and/or InGaN, active region 125 comprising a multi-quantum well structure, an undoped GaN or AlGaN layer 22, an AlGaN layer doped with a p-type impurity. (30), and a GaN contact layer 32 also doped with a p-type impurity. The LED may further include an n-type ohmic contact 23 on the substrate 10 and a p-type ohmic contact 24 on the contact layer 32 . In an embodiment of the present invention in which the substrate 10 is sapphire, the n-type ohmic contact 23 is to be formed on the n-type first GaN layer 12 and/or the n-type second GaN layer 14 . can</p><p>1, the buffer layer 11 is preferably n-type AlGaN. Likewise, the first GaN layer 12 is preferably about 500 to 4000 nm thick and most preferably about 1500 nm thick. The first GaN layer 12 is about 5×10<sp>17</sp> to about 5×10<sp>18</sp>cm<sp>-3</sp>It can be doped with silicon to a level of . The second GaN layer 14 is preferably about 10-500 Angstroms thick and most preferably about 80 Angstroms thick. The second GaN layer 14 is about 5×10<sp>19</sp>cm<sp>-3</sp>It can be doped with silicon to a lower level. Superlattice structure 16 may also be formed as described with reference to FIG. 1 .</p><p>Active region 125 includes a multi-quantum well structure comprising multiple InGaN quantum well layers 120 separated by barrier layer 118 . The barrier layer 118 is<sb>X</sb>Ga<sb>1-X</sb>contains N (0X<1). Preferably, the indium component of the barrier layer 118 is smaller than the indium component of the quantum well layer 120 so that the barrier layer 118 has a larger bandgap than the quantum well layer 120 . The barrier layer 118 and the quantum well layer 120 may be undoped (ie, not intentionally doped with an impurity atom such as silicon or magnesium). However, the barrier layer 118 is 5×10<sp>19</sp>cm<sp>-3</sp>Lower levels of doping with silicon may be necessary, especially where ultraviolet emission is desired.</p><p>Further, the barrier layer 118 is<sb>X</sb>In<sb>Y</sb>Ga<sb>1-XY</sb>N (where 0<X<1, 0Y<1, and X+Y1). By including aluminum in the crystals of the barrier layer 118 , the barrier layer 118 can be lattice matched to the quantum well layer 120 , thereby providing improved crystal quality to the quantum well layer 120 . This increases the luminous efficiency of the device.</p><p>Referring to FIG. 3, an embodiment of the present invention is shown that provides a multi-quantum well structure for a gallium nitride based device. The multiple quantum well structure shown in FIG. 3 may provide an active area for the LED shown in FIGS. 1 and/or 2 . As shown in FIG. 3 , the active region 225 includes a well support layer 218a with high crystal quality, a quantum well layer 220 , and a cap layer 218b serving as a protective cap layer for the quantum well layer 220 . a periodically repeating structure 221 comprising When structure 221 is grown, cap layer 218b and well support layer 218a together form a barrier layer between adjacent quantum well layers 220 . Preferably, the high quality well support layer 218a is grown at a temperature higher than the temperature used to grow the InGaN quantum well layer 220 . In some embodiments of the present invention, the well support layer 218a is grown at a slower growth rate than the cap layer 218b. In other embodiments, a slow growth rate may be used during a low temperature growth process and a faster growth rate may be used during a high temperature growth process. For example, in order to obtain a high quality surface for growing the InGaN quantum well layer 220 , the well support layer 218a may be grown at a growth temperature of about 700 to 900°C. Next, the temperature of the growth chamber is lowered by about 0 to about 200° C. to allow growth of the high quality InGaN quantum well layer 220 . Next, the cap layer 218b is grown while maintaining the temperature at a low InGaN growth temperature. In this way, multiple quantum well regions comprising high quality InGaN layers can be fabricated.</p><p>The active regions 125 and 225 of FIGS. 2 and 3 are preferably grown in a nitrogen atmosphere, which increases the InGaN crystal quality. The barrier layer 118 , the well support layer 218a and/or the cap layer 218b may be about 50 to 400 Angstroms thick. The combined thickness of the well support layer 218a and the cap layer 218b corresponding to each other may be about 50 to 400 Å. Preferably, barrier layer 118 , well support layer 218a and/or cap layer 218b is thicker than about 90 Angstroms and most preferably about 225 Angstroms. Also, it is preferred that the well support layer 218a is thicker than the cap layer 218b. Accordingly, it is desirable that the cap layer 218b be as thin as possible while reducing indium desorption from the quantum well layer 220 or deterioration of the quantum well layer 220 . Quantum well layers 120 and 220 may be about 10-50 Angstroms thick. Preferably, the quantum well layers 120 and 220 are thicker than 20 Angstroms and most preferably about 25 Angstroms. The indium percentage and thickness in quantum well layers 120 and 220 can be varied to produce light with a desired wavelength. Typically, the percentage of indium in quantum well layers 120 and 220 is about 25-30%. However, depending on the desired wavelength, the percentage of indium varies from about 5% to about 50%.</p><p>In a preferred embodiment of the present invention, the bandgap of the superlattice structure 16 exceeds the bandgap of the quantum well layer 120 . This can be achieved by adjusting the average percentage of indium in the superlattice structure 16 . The thickness (or period) of the superlattice layer and the average indium percentage of the layer should be selected such that the bandgap of the superlattice structure 16 is greater than the bandgap of the quantum well 120 . By making the bandgap of the superlattice structure 16 larger than the bandgap of the quantum well 120, unwanted absorption within the device can be minimized and luminescent emission can be maximized. The bandgap of the superlattice structure 16 may be about 2.95 eV to about 3.35 eV. In a preferred embodiment, the bandgap of the superlattice structure 16 is about 3.15 eV.</p><p>In a further embodiment of the present invention, the LED structure shown in FIG. 2 includes a spacer layer 17 disposed between the superlattice structure 16 and the active region 125 . The spacer layer 17 preferably comprises undoped GaN. The presence of the optional spacer layer 17 between the doped superlattice structure 16 and the active region 125 may prevent silicon impurities from entering the active region 125 . This improves the quality of the active region 125 material, which provides more sustained device performance and better uniformity. Similarly, a spacer layer may be provided between the superlattice structure 16 and the active region 18 in the LED structure shown in FIG. 1 .</p><p>Referring again to FIG. 2 , layer 22 may be provided over active region 125 and is preferably about 0-120 Angstroms thick undoped GaN or AlGaN. Layer 22 is preferably about 35 Angstroms thick. When layer 22 comprises AlGaN, the aluminum percentage of the layer is preferably about 10-30% and most preferably about 24%. The aluminum level in layer 22 may also be sloped in a stepwise or continuously decreasing manner. Layer 22 may be grown at a temperature higher than the growth temperature of active region 125 to improve the crystal quality of layer 22 . Additional layers of undoped GaN or AlGaN may be included near layer 22 . For example, the LED shown in FIG. 2 may include an additional layer of undoped AlGaN about 6-9 Angstroms thick between active region 125 and layer 22 .</p><p>An AlGaN layer 30 doped with a p-type impurity such as magnesium is formed on the layer 22 . The AlGaN layer 30 may be about 0 to 300 Angstroms thick, preferably about 130 Angstroms. A contact layer 32 of p-type GaN is formed on the AlGaN layer 30 and is preferably about 1800 Angstroms thick. Ohmic contacts 24 and 25 are formed on the p-GaN contact layer 32 and the substrate 10, respectively.</p><p>Although embodiments of the present invention have been described with respect to multiple quantum wells, the benefits from the teachings of the present invention may be achieved in single quantum well structures as well. Thus, for example, a light emitting diode in which the structure 221 of FIG. 3 appears once as an active region of the device can be provided. Thus, the number of quantum wells will generally be in the range of 1 to 10, although other numbers of quantum wells may be used in accordance with embodiments of the present invention.</p><p>Although embodiments of the present invention have been described with respect to gallium nitride based devices, the teachings and advantages of the present invention may be applied to other Group III nitride based devices. Accordingly, embodiments of the present invention provide a group-III nitride-based light emitting diode having a group-III nitride-based superlattice structure, a quantum well structure, and/or a superlattice and/or quantum well.</p><p>Preferred embodiments of the present invention have been described in the drawings and in the specification, and although specific terminology is used, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the present invention is not set forth in the appended claims.</p>
<p>According to the present invention, it is possible to manufacture high-quality gallium nitride, thereby improving the efficiency of the III-nitride-based device.</p>
4 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4
131 members in 12 offices
Priority claims8
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| 60294378 | United States of America | – | |
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| 29437801 | United States of America | P | |
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Numbers
- Publication
- 10-2008-0098693
- Application
- 107026427
Titles2
- Korean
- 양자 우물과 초격자를 가진 Ⅲ족 나이트라이드계 발광 다이오드 구조
- English
- Group III nitride light emitting diode structure with quantum well and superlattice
Classification
- CPC, 9
- H10H20/812
- B82Y20/00
- H10H20/825
- H10P14/2904
- H10P14/2901
- H10P14/3251
- H10P14/3252
- H10P14/3216
- H10P14/3416
- IPC, 4
- H01L33 00
- H10P95 00
- H01L33 06
- H01L33 32