Method for manufacturing semiconductor device

0001The present invention relates to a semiconductor device having a circuit including a semiconductor element such as a transistor as at least one element, and a method for manufacturing the same. For example, a power device mounted on a power supply circuit, a semiconductor integrated circuit including a memory, a thyristor, a converter, an image sensor, etc., an electro-optical device typified by a liquid crystal display device, and a light-emitting display device having a light-emitting element are mounted as components. Regarding electronic devices.

0002In the present specification, the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics, and the electro-optical device, the semiconductor circuit, and the electronic device are all semiconductor devices.

0003As represented by a liquid crystal display device, a transistor formed on a glass substrate or the like is made of amorphous silicon, polycrystalline silicon, or the like. Transistors using amorphous silicon have low field-effect mobility, but can cope with a large area of a glass substrate. Further, although the field-effect mobility of the transistor using polycrystalline silicon is high, it has a drawback that it is not suitable for increasing the area of the glass substrate.

0004In contrast to transistors using silicon, technologies for producing transistors using oxide semiconductors and applying them to electronic devices and optical devices are attracting attention. For example, Patent Document 1 and Patent Document 2 disclose a technique for producing a transistor using zinc oxide or an In-Ga-Zn-O oxide as an oxide semiconductor and using it as a switching element for a pixel of a display device. There is.

0005Regarding the oxide semiconductor used for such a transistor, "Oxide semiconductor is insensitive to impurities, there is no problem even if a considerable amount of metal impurities are contained in the film, and a large amount of alkali metal such as sodium is contained. The low-priced soda-lime glass contained in the above can also be used "(see Non-Patent Document 1).

<p num="0006"><patcit num="1"><text>JP-A-2007-123861</text></patcit><patcit num="2"><text>Japanese Unexamined Patent Publication No. 2007-96055</text></patcit></p>

<p num="0007"><nplcit num="1"><text>Kamiya, Nomura, Hosono, "Physical Properties of Amorphous Oxide Semiconductors and Current Status of Device Development", Solid State Physics, September 2009, Vol.44, p.621-633</text></nplcit></p>

<p num="0008">The electrical conductivity of oxide semiconductors may change when hydrogen or water, which is the source of carriers, is mixed in the device manufacturing process. Such a phenomenon causes fluctuations in electrical characteristics for transistors using oxide semiconductors.</p><p num="0009">Further, a semiconductor device using an oxide semiconductor may have its electrical characteristics changed by irradiating it with visible light or ultraviolet light.</p><p num="0010">In view of such a problem, one of the problems is to impart stable electrical characteristics to a semiconductor device using an oxide semiconductor film and to manufacture a highly reliable semiconductor device.</p><p num="0011">Another object of the present invention is to provide a manufacturing process of a semiconductor device capable of mass-producing a highly reliable semiconductor device using a large substrate such as mother glass.</p>

<p num="0012">In one aspect of the present invention, zinc having a small atomic weight is preferentially deposited on an oxide insulating film by utilizing the difference in atomic weight of a plurality of types of atoms contained in a target for an oxide semiconductor in the same sputtering step, and at least. Multiple steps are performed by forming a seed crystal having a hexagonal crystal structure containing zinc on the surface of the deposition film during film formation and depositing tin, indium, etc. with a large atomic weight on the seed crystal while growing the crystal. The gist is to form a crystalline oxide semiconductor film without passing through. The seed crystal containing zinc is not limited to the surface of the deposited film during film formation, and the seed crystal may be formed from the interface of the oxide insulating film. Furthermore, a seed crystal having a hexagonal structure crystal containing zinc is used as a nucleus, and the crystal is grown to form a crystalline oxide semiconductor film, whereby a single crystal or a crystalline oxide that is substantially a single crystal is formed. The gist is to form a semiconductor film.</p><p num="0013">Further, in one aspect of the present invention, a seed crystal having a hexagonal crystal structure containing zinc is formed on an oxide insulating film formed on a substrate by a sputtering method, and the seed crystal is used as a nucleus. The gist is to grow to form a crystalline oxide semiconductor film having crystals having a hexagonal structure, and to manufacture a transistor using the crystalline oxide semiconductor film.</p><p num="0014">The crystalline oxide semiconductor film is formed by a sputtering method while performing the first heat treatment of 250 ° C. or higher and 350 ° C. or lower in an atmosphere containing oxygen. Therefore, this first heat treatment is performed in the treatment chamber. Further, in the sputtering apparatus used for the film formation, the distance between the target and the substrate is set so that an element having a small atomic weight can preferentially arrive on the substrate. As a result, while zinc is preferentially deposited on the oxide insulating film, the deposited zinc is oxidized to form a seed crystal having a hexagonal crystal structure containing zinc, typically zinc oxide having a hexagonal structure. The seed crystal to have is formed. Therefore, a seed crystal in which crystals are grown from the surface of the oxide insulating film can be formed. Further, by continuing sputtering, a seed crystal having a hexagonal structure crystal containing zinc is used as a nucleus to grow crystals, and a bond having a hexagonal lattice is formed on the ab plane parallel to the substrate surface which is the surface to be deposited. It is possible to form a crystalline oxide semiconductor film having a hexagonal crystal structure having a c-axis substantially perpendicular to the substrate plane substantially parallel to the ab plane.</p><p num="0015">A crystalline oxide semiconductor film having a hexagonal crystal having a c-axis perpendicular to the substrate plane and having a bond having a hexagonal lattice on the ab plane has a high regularity of the crystal structure. A planar TEM photograph of this crystalline oxide semiconductor film is shown in FIG. 17, and a diagram in which atoms are surrounded by white lines is shown in FIG. 18 in order to enlarge a part of the photograph and make the hexagonal lattice easier to understand. A transistor having such a crystalline oxide semiconductor film has stable electrical characteristics and high reliability.</p><p num="0016">One of the reasons why a transistor having a crystalline oxide semiconductor film is highly reliable will be described below.</p><p num="0017">Compared with amorphous oxide semiconductors, crystalline oxide semiconductors have more regular metal-oxygen bonds (-MOM-, O is oxygen atom, M is metal atom). That is, when the oxide semiconductor has an amorphous structure, the coordination number may differ depending on the individual metal atoms, but it is almost constant in the crystalline oxide semiconductor. As a result, microscopic oxygen deficiency is reduced, and there is an effect of reducing charge transfer and instability due to desorption of hydrogen atoms (including hydrogen ions) and alkali metal atoms in the "space" as described later. ..</p><p num="0018">On the other hand, in the case of an amorphous structure, since the coordination number differs depending on each metal atom, the concentration of metal atom and oxygen atom becomes microscopically non-uniform, and the part where no atom does not exist (space) may occur depending on the location. May exist. In such a "space", for example, hydrogen atoms (including hydrogen ions) and alkali metal atoms are considered to be captured and, in some cases, combined with oxygen. It is also possible for those atoms to move through such a "space".</p><p num="0019">Since such movement of atoms causes fluctuations in the characteristics of oxide semiconductors, the presence of these atoms poses a major problem in terms of reliability. In particular, since such movement of atoms is caused by applying a high electric field or light energy, the characteristics become unstable when the oxide semiconductor is used under such conditions. That is, the reliability of the amorphous oxide semiconductor is inferior to that of the crystalline oxide semiconductor.</p><p num="0020">The results of different reliability of the actually obtained transistors (Samples 1 and 2) will be described below. However, as explained below, in the actually obtained sample 2, after forming the first material film at a film formation temperature of 200 ° C, heating is performed at 450 ° C in a nitrogen atmosphere at a film formation temperature of 200 ° C. After forming the second material film, it was heated at 450 ° C. in a dry air atmosphere to obtain a crystalline oxide semiconductor film. Sample 2 is about a crystalline semiconductor film in which the first material film and the second material film are the same, but it goes without saying that the same thing can be said even if they are different. Sample 1 used for comparison was obtained by heating a single-layer material film at 650 ° C by RTA and then heating at 450 ° C in a dry air atmosphere to obtain a crystalline oxide semiconductor film.</p><p num="0021">As an inspection method to check the reliability, the current (Id) flowing between the drain electrode and the source electrode of the transistor when the voltage (Vg) between the gate electrode and the source electrode of the transistor is changed while irradiating light. ) Is measured and the Id-Vg curve of the transistor obtained is measured. In a transistor using an oxide semiconductor film, there is a deterioration in which the threshold value of the transistor changes when a -BT test is performed while irradiating light, that is, when a minus gate bias is applied. This deterioration is also called photonegative bias deterioration.</p><p num="0022">FIG. 19 shows the photonegative bias deterioration of Samples 1 and 2.</p><p num="0023">In FIG. 19, the amount of change in Vth of sample 2 is smaller than that of sample 1.</p><p num="0024">Next, light (wavelength 400 nm, irradiation intensity 3.5 mW / cm) for 600 seconds was applied to the transistor (L / W = 3 μm / 50 μm) of sample 1.²) Was measured before and after irradiation. A graph of photoresponsiveness (photocurrent-time dependence graph) created from the results is shown in Fig. 20 (A). Vd is 0.1V.</p><p num="0025">In addition, the transistor (L / W = 3 μm / 50 μm) of sample 2 was exposed to light for 600 seconds (wavelength 400 nm, irradiation intensity 3.5 mW / cm).²) Was measured before and after irradiation. A graph of photoresponsiveness (photocurrent-time dependence graph) created from the results is shown in Fig. 20 (B).</p><p num="0026">In addition, the condition that the W width of the transistor with the same fabrication conditions as sample 2 is increased (L / W = 30 μm / 10000 μm) and the condition that the Vd is further increased under the condition that the W width of the transistor with the same fabrication conditions as sample 2 is increased. Measurement is also performed at (Vd = 15V), fitting is performed, and each of the two types of relaxation time (τ)₁And τ₂) Is calculated and the maximum current value (Imax) is shown in Table 1.</p><p num="0027"><tables num="1"><img id="000002" he="49" wi="136" file="JP6005347B2_D0001.tif" img-format="tif" img-content="drawing" /></tables></p><p num="0028">Two types of relaxation time (τ)₁And τ₂) Is a value that depends on the trap density. τ₁And τ₂Is called an optical response defect evaluation method.</p><p num="0029">From Table 1, it can be seen that the photoresponsiveness of each of Sample 2, which has a smaller negative photonegative bias deterioration than that of Sample 1, is faster. From these facts, it can be found that the smaller the photonegative bias deterioration, the faster the photoresponsiveness.</p><p num="0030">One of the reasons will be explained. If there is a deep donor level and holes are trapped in the donor level, the negative bias applied to the gate in photonegative bias degradation results in a fixed charge, resulting in the current value in the photoresponse. Relaxation time may be longer. Transistors using crystalline oxide semiconductor films have low photonegative bias deterioration and fast photoresponsiveness because the density of donor levels that trap the holes is low. It is expected to be. FIG. 21 shows a schematic diagram of the expected donor levels.</p><p num="0031">In addition, in order to investigate changes in the depth and density of donor levels, measurements were performed using low-temperature PL. FIG. 22 shows a case where the substrate temperature at the time of film formation of the oxide semiconductor film is 400 ° C and a case where the substrate temperature at the time of film formation of the oxide semiconductor film is 200 ° C.</p><p num="0032">From FIG. 22, when the substrate temperature at the time of film formation of the oxide semiconductor film is 400 ° C, the peak intensity near about 1.8 eV is significantly reduced as compared with that at the substrate temperature of 200 ° C. This measurement suggests that the depth of the donor level remains unchanged and the density is significantly reduced.</p><p num="0033">In addition, the conditions of the substrate temperature at the time of film formation of the oxide semiconductor film were changed, and each was compared and evaluated with a single film.</p><p num="0034">Sample A is a quartz substrate (thickness 0.5 mm) on which an oxide semiconductor film having a film thickness of 50 nm is formed. The conditions for forming the oxide semiconductor film are the target for oxide semiconductor (In-Ga-Zn-O-based target for oxide semiconductor (In)).₂O₃: Ga₂O₃: ZnO = 1: 1: 2 [mol number ratio]), the distance between the substrate and the target is 60 mm, the substrate temperature is 200 ° C, the pressure is 0.4 Pa, the direct current (DC) power supply is 0.5 kW, and the argon (30 sccm) is used. ) And oxygen (15 sccm) in a mixed atmosphere.</p><p num="0035">ESR (electron spin resonance) is measured at room temperature (300K), and the value of the magnetic field (H) where microwave (frequency 9.5GHz) absorption occurs.₀) From the formula g = hv / βH₀Is used to obtain a parameter called the g value. Note that h is Planck's constant and β is Bohr magneton, both of which are constants.</p><p num="0036">A graph showing the g value of sample A is shown in FIG. 23 (A).</p><p num="0037">After forming a film under the same conditions as sample A, it is heated at 450 ° C. for 1 hour in a nitrogen atmosphere to prepare sample B. A graph showing the g value of sample B is shown in FIG. 23 (B).</p><p num="0038">After forming a film under the same conditions as sample A, the film is heated at 450 ° C. for 1 hour in a mixed atmosphere of nitrogen and oxygen to prepare sample C. A graph showing the g value of sample C is shown in FIG. 23 (C).</p><p num="0039">In the graph of g value of sample B, a signal of g = 1.93 can be confirmed, and the spin density is 1.8 × 10.¹⁸[spins / cm³]. On the other hand, since the signal of g = 1.93 cannot be confirmed in the ESR result of sample C, the signal of g = 1.93 is caused by the dangling bond of the metal in the oxide semiconductor film.</p><p num="0040">Samples D, E, F, and G are formed by forming an oxide semiconductor film having a film thickness of 100 nm on a quartz substrate (thickness 0.5 mm). The conditions for forming the oxide semiconductor film are the target for oxide semiconductor (In-Ga-Zn-O-based target for oxide semiconductor (In)).₂O₃: Ga₂O₃: ZnO = 1: 1: 2 [mol number ratio])), the distance between the substrate and the target is 60 mm, pressure 0.4 Pa, direct current (DC) power supply 0.5 kW, argon (30 sccm) and oxygen (15 sccm). ) In a mixed atmosphere. In addition, samples D, E, F, and G have different substrate temperatures at the time of film formation. Sample D is at room temperature, sample E is at 200 ° C, sample F is at 300 ° C, and sample G is at 400 ° C. is there.</p><p num="0041">The ESR spectra of samples D, E, F, and G are shown in FIG.</p><p num="0042">In sample G where the substrate temperature (indicated as Tsub) at the time of film formation is 400 ° C, a signal of g = 1.93 can be confirmed, and the spin density is 1.3 × 10.¹⁸[spins / cm³]. Its spin density is comparable to the spin density of the g = 1.93 signal obtained in sample B.</p><p num="0043">In FIG. 25, which is the result of ESR measurement of sample B, when the magnetic field is applied perpendicularly to the substrate surface (spectrum shown by the solid line) and when applied parallel to the substrate surface (shown by the dotted line). Represents the difference (anisotropic) in the g value in the spectrum).</p><p num="0044">FIG. 26 shows the results of ESR measurement of sample H, which was heated at 450 ° C. for 1 hour under the same conditions as sample G and then heated in a nitrogen atmosphere. In FIG. 26, the difference in g value (anisotropic) between the case where the magnetic field is applied perpendicular to the substrate surface (spectrum shown by the solid line) and the case where the magnetic field is applied parallel to the substrate surface (spectrum shown by the dotted line). Gender).</p><p num="0045">As a result of comparing FIGS. 25 and 26, it can be seen that the change Δg of the g value due to anisotropy was 0.001 or less at the substrate temperature of 200 ° C, whereas it increased to Δg to 0.003 at the substrate temperature of 400 ° C. .. It is generally known that the better the crystallinity (the more uniform the orientation of the orbitals), the greater the anisotropy, and the film with a substrate temperature of 400 ° C is higher than the film with a substrate temperature of 200 ° C. It is concluded that the dangling bonds of the metal formed by heating at 450 ° C for 1 hour under a nitrogen atmosphere are oriented in the same direction, that is, the crystallinity is good.</p><p num="0046">In addition, ESR measurement was performed by changing the film thickness of the oxide semiconductor film. In the obtained ESR spectrum, the intensity change of the g = 1.93 signal is shown in FIG. 27, and the total spin count is shown in FIG. 28. From the results of FIGS. 27 and 28, it was confirmed that the intensity of the g = 1.93 signal increases as the film thickness of the oxide semiconductor film increases. This suggests that the dangling bond that causes the g = 1.93 signal is present in the bulk rather than at the interface between the quartz substrate and the oxide semiconductor film or on the surface of the oxide semiconductor film.</p><p num="0047">From these results, it can be seen that the metal dangling bond has anisotropy, and the anisotropy increases as the film formation temperature is higher because the crystallinity is better. It can also be seen that metal dangling bonds are present in the bulk rather than at the interface or surface.</p><p num="0048">From these results, it was confirmed that the anisotropy of the g value, which is considered to be caused by the improvement of crystallinity, increases as the substrate temperature during film formation increases. In addition, the dangling bond that causes the g = 1.93 signal has a film thickness dependence, suggesting that it is due to the dangling bond present in the bulk of IGZO.</p><p num="0049">The oxide insulating film in contact with the crystalline oxide semiconductor film is preferably formed by using an oxide insulating film in which a part of oxygen is released by heating. As the oxide insulating film in which a part of oxygen is released by heating, it is preferable to use an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric ratio. By forming a crystalline oxide semiconductor film and then performing a second heat treatment, oxygen contained in the oxide insulating film is removed from the crystalline oxide semiconductor film or between the oxide insulating film and the crystalline oxide semiconductor film. It diffuses to the interface with and can reduce the oxygen deficiency of the crystalline oxide semiconductor film. The second heat treatment is 150 ° C or more and less than the strain point of the substrate, preferably 250 ° C or more and 450 ° C or less.</p><p num="0050">Further, by setting the pressure in the processing chamber of the sputtering apparatus to 0.4 Pa or less, it is possible to reduce the mixing of impurities such as alkali metal and hydrogen on the surface to be filmed and the film to be filmed. The hydrogen contained in the film to be filmed may be contained as a hydrogen molecule, water, a hydroxyl group, or a hydride in addition to a hydrogen atom.</p><p num="0051">The distance between the targets (distance between TSs) is 40 mm or more and 300 mm or less (preferably 60 mm or more). The larger the distance between TSs, the more zinc, which has the smallest atomic weight among the metal elements contained in the sputtering target for oxide semiconductors, is deposited on the substrate side in preference to other elements with a large atomic weight, resulting in a hexagonal shape. Form a bond with a lattice. Therefore, it is preferable that the distance between TSs is large.</p><p num="0052">Further, at the time of film formation by the sputtering method, the temperature of the surface to be filmed is 250 ° C. or higher, preferably the upper limit temperature of heat treatment of the substrate. 250 ° C is the temperature at which impurities such as water and hydrogen are prevented from being mixed into the film to be deposited and the impurities are released into the gas phase in the chamber. The upper limit of the temperature of the surface to be filmed during film formation by the sputtering method is the upper limit temperature of the heat treatment of the substrate or the upper limit temperature of the film (the temperature at which the components during film formation change significantly when the temperature is exceeded). To do.</p><p num="0053">In addition, the leak rate in the processing chamber of the sputtering equipment is set to 1 x 10.^-10Pa m³By setting the value to / sec or less, it is possible to reduce the mixing of impurities such as alkali metals and hydrides into the crystalline oxide semiconductor film during the film formation by the sputtering method. Further, by using an adsorption type vacuum pump as the exhaust system, it is possible to reduce the backflow of impurities such as alkali metals, hydrogen atoms, hydrogen molecules, water, hydroxyl groups, and hydrides from the exhaust system.</p><p num="0054">Further, by setting the purity of the target to 99.99% or more, it is possible to reduce alkali metals, hydrogen atoms, hydrogen molecules, water, hydroxyl groups, hydrides and the like mixed in the crystalline oxide semiconductor film. Further, by using the target, the concentration of alkali metals such as lithium, sodium and potassium can be reduced in the crystalline oxide semiconductor film.</p><p num="0055">By forming a crystalline oxide semiconductor film under the above film formation conditions, the material is purified during the film formation, and the alkali metal concentration is 5 × 10.¹⁶atoms / cm³Below, the hydrogen concentration is 1 x 10¹⁹atoms / cm³The following crystalline oxide semiconductor film with extremely reduced impurities can be formed. By reducing the impurities of the crystalline oxide semiconductor film, the crystal growth of the seed crystal and the crystalline oxide semiconductor film is further promoted, and a single crystal or a crystalline oxide semiconductor film which is substantially a single crystal is formed. can do.</p><p num="0056">Further, as the structure of the transistor, a top gate type transistor and a bottom gate type transistor can be appropriately applied. When producing a top-gate type transistor, a seed crystal having a hexagonal structure crystal containing zinc is formed on an oxide insulating film formed on the insulating surface by a sputtering method, and the seed crystal is used as a nucleus. The crystal is grown to form a crystalline oxide semiconductor film having a hexagonal structure crystal, the crystalline oxide semiconductor film is heat-treated, and then the heat-treated crystalline oxide semiconductor film is selectively etched. A pair of electrodes are formed on the selectively etched crystalline oxide semiconductor film, a gate insulating film is formed on the selectively etched crystalline oxide semiconductor film and the pair of electrodes, and the gate insulating film is formed. One of the features is to form a gate electrode. When producing a bottom gate type transistor, a gate electrode is formed on the insulating surface, a gate insulating film containing an oxide insulating film is formed on the gate electrode, and zinc is sprinkled on the gate insulating film by a sputtering method. A seed crystal having a hexagonal structure crystal containing the seed crystal is formed, and the seed crystal is used as a nucleus for crystal growth to form a crystalline oxide semiconductor film having a hexagonal structure crystal, and the crystalline oxide semiconductor film is heated. One of the features is that after the treatment, the heat-treated crystalline oxide semiconductor film is selectively etched to form a pair of electrodes on the selectively etched crystalline oxide semiconductor film.</p>

<p num="0057">A crystalline oxide semiconductor film having a hexagonal crystal having a bond having a hexagonal lattice on the ab plane and a c-axis substantially perpendicular to the substrate plane substantially parallel to the ab plane is used as a channel region. By manufacturing a transistor that has, the transistor is irradiated with light, or the amount of change in the threshold voltage of the transistor can be reduced even before and after the bias-thermal stress (BT) test, and a transistor with stable electrical characteristics can be obtained. Can be made. Further, by setting the first heat treatment and the second heat treatment to 450 ° C. or less, it is possible to mass-produce a highly reliable semiconductor device using a large substrate such as mother glass.</p>

0058<figref num="1">It is sectional drawing explaining the manufacturing method of the semiconductor device which is one aspect of this invention.</figref><figref num="2">It is a top view explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="3">It is a schematic diagram explaining the sputtering apparatus.</figref><figref num="4">It is a schematic diagram explaining the crystal structure of a seed crystal.</figref><figref num="5">It is sectional drawing explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="6">It is a top view explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="7">It is sectional drawing explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="8">It is a top view explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="9">It is sectional drawing explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="10">It is a top view explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="11">It is sectional drawing explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="12">It is sectional drawing explaining the manufacturing process of the semiconductor device which shows one aspect of this invention.</figref><figref num="13">This is an example of a top view of a manufacturing apparatus for producing one aspect of the present invention.</figref><figref num="14">It is sectional drawing, top view and circuit diagram which show one aspect of this invention.</figref><figref num="15">It is a block diagram and a circuit diagram which show one aspect of this invention.</figref><figref num="16">It is an external view of the electronic device which shows one aspect of this invention.</figref><figref num="17">It is a plane TEM photograph.</figref><figref num="18">A part of FIG. 17 is enlarged and one of the hexagons is shown by a white line.</figref><figref num="19">It is a figure explaining the light negative bias deterioration.</figref><figref num="20">It is a figure explaining the photocurrent time dependence graph.</figref><figref num="21">It is a schematic diagram explaining the donor level.</figref><figref num="22">It is a figure explaining the measurement result of low temperature PL.</figref><figref num="23">It is a figure explaining the measurement result of ESR.</figref><figref num="24">It is a figure explaining the measurement result of ESR.</figref><figref num="25">It is a figure explaining the measurement result of ESR.</figref><figref num="26">It is a figure explaining the measurement result of ESR.</figref><figref num="27">It is a figure explaining the measurement result of ESR.</figref><figref num="28">It is a figure explaining the measurement result of ESR.</figref>

0059Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details of the present invention can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below. In the configuration of the present invention described below, the same reference numerals are commonly used in different drawings for the same parts or parts having similar functions, and the repeated description thereof will be omitted.

0060It should be noted that in each of the figures described herein, the size, layer thickness, or region of each configuration may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

0061In addition, terms such as 1, 2, and 3 used in the present specification are added to avoid confusion of components, and are not limited in number. Therefore, for example, the "first" can be appropriately replaced with the "second" or "third" for explanation.

0062(Embodiment 1) In the present embodiment, a method for producing a crystalline oxide semiconductor and a method for producing a transistor using the oxide semiconductor will be described with reference to FIGS. 1 and 2. FIG. 1 is a cross-sectional view showing a manufacturing process of a transistor, which is a form of a configuration of a semiconductor device, and the cross-sectional view of the alternate long and short dash line AB in FIG. 2 corresponds to FIG. 1 (E). In this embodiment, a transistor having a top gate structure will be used for description.

0063As shown in FIG. 1 (A), the oxide insulating film 53 is formed on the substrate 51.

0064The substrate 51 needs to have at least heat resistance enough to withstand the subsequent heat treatment. When a glass substrate is used as the substrate 51, it is preferable to use one having a distortion point of 730 ° C or higher. For the glass substrate, for example, a glass material such as aluminosilicate glass, aluminoborosilicate glass, and bariumborosilicate glass is used. In addition, B₂O₃It is preferable to use a glass substrate containing a larger amount of BaO. When the substrate 51 is mother glass, the size of the substrate is 1st generation (320mm x 400mm), 2nd generation (400mm x 500mm), 3rd generation (550mm x 650mm), 4th generation (680mm x 880mm, or 730mm x 920mm), 5th generation (1000mm x 1200mm or 1100mm x 1250mm), 6th generation (1500mm x 1800mm), 7th generation (1900mm x 2200mm), 8th generation (2160mm x 2460mm), 9th generation (2400mm) × 2800 mm or 2450 mm × 3050 mm), 10th generation (2950 mm × 3400 mm), etc. can be used. Since mother glass shrinks significantly when the processing temperature is high and the processing time is long, when mass-producing using mother glass, the heat treatment in the manufacturing process is 600 ° C or less, preferably 450 ° C or less. Is desirable.

0065Instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. In addition, crystallized glass or the like can be used. Further, a wafer having an insulating film formed on the surface of a semiconductor substrate such as a silicon wafer or the surface of a conductive substrate made of a metal material can also be used.

0066The oxide insulating film 53 is formed by using an oxide insulating film in which a part of oxygen is released by heating. As the oxide insulating film in which a part of oxygen is released by heating, it is preferable to use an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric ratio. The oxide insulating film in which a part of oxygen is released by heating can diffuse oxygen into the crystalline oxide semiconductor film by heating. The oxide insulating film 53 can be typically formed of silicon oxide, silicon oxide nitride, silicon nitride oxide, aluminum oxide, aluminum oxide nitride, gallium oxide, hafnium oxide, yttrium oxide, or the like.

0067An oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric ratio releases a part of oxygen by heating. The amount of oxygen released at this time was determined by TDS (Thermal Desorption Spectrocopy) analysis, and the amount of oxygen released in terms of oxygen atoms was 1.0 × 10.¹⁸atoms / cm³Above, preferably 1.0 × 10²⁰atoms / cm³Above, more preferably 3.0 × 10²⁰atoms / cm³That is all.

0068Here, a method of measuring the amount of oxygen released when converted into oxygen atoms by TDS analysis will be described below.

0069The amount of gas released during TDS analysis is proportional to the integral value of the spectrum. Therefore, the amount of gas released can be calculated from the integral value of the spectrum of the oxide insulating film and the ratio to the reference value of the standard sample. The reference value of a standard sample is the ratio of the density of atoms to the integrated value of the spectrum of a sample containing a predetermined atom.

0070For example, from the TDS analysis result of a silicon wafer containing hydrogen of a predetermined density, which is a standard sample, and the TDS analysis result of the oxide insulating film, the amount of oxygen molecules released from the oxide insulating film (N (O)₂)) Can be calculated by Equation 1. Here, it is assumed that all the spectra detected by the mass number 32 obtained by the TDS analysis are derived from oxygen molecules. CH as having a mass number of 32₃There is OH, but it is not considered here as it is unlikely to exist. Also, oxygen molecules containing oxygen atoms with a mass number of 17 and oxygen atoms with a mass number of 18, which are isotopes of oxygen atoms, are not considered because their abundance ratio in nature is extremely small.

0071N (O₂) = N (H)₂) / S (H)₂) × S (O₂) × α (number 1)

0072N (H₂) Is the value obtained by converting the hydrogen molecule desorbed from the standard sample by the density. S (H₂) Is the integral value of the spectrum when the standard sample is TDS analyzed. Here, the reference value of the standard sample is N (H).₂) / S (H)₂). S (O₂) Is the integral value of the spectrum when the oxide insulating film is TDS-analyzed. α is a coefficient that affects the spectral intensity in TDS analysis. For details of Formula 1, refer to Japanese Patent No. 3298974. The amount of oxygen released from the oxide insulating film was 1 × 10 as a standard sample using the EMD-WA1000S / W thermal desorption analyzer manufactured by Denshi Kagaku Co., Ltd.¹⁶atoms / cm³It is measured using a silicon wafer containing a hydrogen atom of.

0073Also, in TDS analysis, some of the oxygen is detected as oxygen atoms. The ratio of oxygen molecule to oxygen atom can be calculated from the ionization rate of oxygen molecule. Since the above-mentioned α contains the ionization rate of oxygen molecules, the amount of oxygen atoms released can also be estimated by evaluating the amount of oxygen molecules released.

0074In addition, N (O₂) Is the amount of oxygen molecules released. In the oxide insulating film, the amount of oxygen released when converted to oxygen atoms is twice the amount of oxygen molecules released.

0075The oxide insulating film 53 is 50 nm or more, preferably 200 nm or more and 500 nm or less. By thickening the oxide insulating film 53, the amount of oxygen released from the oxide insulating film 53 can be increased, and at the interface between the oxide insulating film 53 and the oxide semiconductor film formed later due to the increase. It is possible to reduce defects.

0076The oxide insulating film 53 is formed by a sputtering method, a CVD method, or the like. An oxide insulating film in which a part of oxygen is released by heating is preferable because it can be easily formed by using a sputtering method.

0077When an oxide insulating film in which a part of oxygen is released by heating is formed by a sputtering method, it is preferable that the amount of oxygen in the film-forming gas is high, and oxygen or a mixed gas of oxygen and a rare gas may be used. it can. Typically, it is preferable that the oxygen concentration in the film-forming gas is 6% or more and 100% or less.

0078When forming a silicon oxide film as a typical example of an oxide insulating film in which a part of oxygen is released by heating, quartz (preferably synthetic quartz) is used as a target, and the substrate temperature is 30 ° C or higher and 450 ° C or lower (preferably). 70 ° C or more and 200 ° C or less), distance between the substrate and the target (distance between TS) is 20 mm or more and 400 mm or less (preferably 40 mm or more and 200 mm or less), pressure is 0.1 Pa or more and 4 Pa or less (preferably 0.2 Pa or more and 1.2) Pa or less), high frequency power supply 0.5kW or more and 12kW or less (preferably 1kW or more and 5kW or less), O in film formation gas₂/ (O₂It is preferable to form a silicon oxide film by the RF sputtering method with the + Ar) ratio set to 1% or more and 100% or less (preferably 6% or more and 100% or less). A silicon target can be used instead of the quartz (preferably synthetic quartz) target. As the film forming gas, only oxygen may be used.

0079When a glass substrate containing impurities such as alkali metal is used, a silicon nitride film, an aluminum nitride film, or the like is formed as a nitride insulating film between the substrate 51 and the oxide insulating film 53 in order to prevent the intrusion of alkali metal. You may. The nitride insulating film can be formed by a CVD method, a sputtering method, or the like. Alkali metals such as lithium, sodium, and potassium are impurities, so it is preferable to reduce the content.

0080Next, an oxide semiconductor film having a thickness of 30 nm or more and 50 μm or less is formed on the oxide insulating film 53 by a sputtering method using a sputtering device.

0081Here, the processing chamber of the sputtering apparatus will be described with reference to FIG. 3 (A). An exhaust means 33 and a gas supply means 35 are connected to the processing chamber 31. Further, a substrate support 40 and a target 41 are provided in the processing chamber 31. The target 41 is connected to the power supply unit 37.

0082The processing chamber 31 is grounded. In addition, the leak rate of the processing chamber 31 is set to 1 × 10.^-10Pa m³By setting the value to / sec or less, it is possible to reduce the mixing of impurities into the film formed by the sputtering method.

0083In order to reduce the leak rate, it is necessary to reduce not only external leaks but also internal leaks. An external leak is a gas flowing in from the outside of the vacuum system due to a minute hole or a defective seal. The internal leak is caused by a leak from a partition such as a valve in the vacuum system or a gas released from an internal member. Leak rate 1x10^-10Pa m³In order to reduce the speed to / sec or less, it is necessary to take measures from both the external leak and the internal leak.

0084To reduce external leaks, the opening and closing parts of the treatment chamber should be sealed with a metal gasket. As the metal gasket, it is preferable to use a metal material coated with iron fluoride, aluminum oxide, or chromium oxide. Metal gaskets have higher adhesion than O-rings and can reduce external leaks. Further, by using a metal material coated with passivation such as iron fluoride, aluminum oxide, and chromium oxide, the released gas containing hydrogen generated from the metal gasket can be suppressed, and the internal leak can be reduced.

0085As a member constituting the inner wall of the treatment chamber 31, aluminum, chromium, titanium, zirconium, nickel or vanadium containing hydrogen and having a small amount of emitted gas is used. Further, the above-mentioned material may be used by coating it with an alloy material containing iron, chromium, nickel and the like. Alloy materials containing iron, chromium, nickel and the like are rigid, heat resistant and suitable for processing. Here, if the surface unevenness of the member is reduced by polishing or the like in order to reduce the surface area, the released gas can be reduced. Alternatively, the members of the film forming apparatus described above may be coated with passivation such as iron fluoride, aluminum oxide, and chromium oxide.

0086The member provided inside the processing chamber 31 is preferably made of only a metal material as much as possible. For example, even when a viewing window made of quartz or the like is installed, the surface is made of iron fluoride in order to suppress the released gas. It is advisable to coat it thinly with passivation such as aluminum oxide and chromium oxide.

0087Further, it is preferable to provide a sputter gas purifier immediately before introducing the sputter gas into the processing chamber 31. At this time, the length of the pipe from the refiner to the processing chamber is 5 m or less, preferably 1 m or less. By setting the length of the pipe to 5 m or less or 1 m or less, the influence of the gas released from the pipe can be reduced according to the length.

0088From the cylinder to the processing chamber 31, it is preferable to use a metal pipe whose inside is coated with passivation such as iron fluoride, aluminum oxide, and chromium oxide for the pipe for flowing the sputter gas. Compared with, for example, the SUS316L-EP pipe, the above-mentioned pipe releases a small amount of hydrogen and can reduce the mixing of impurities into the film-forming gas. Further, it is preferable to use a high-performance ultra-small metal gasket joint (UPG joint) for the pipe joint. Further, it is preferable that the piping material is entirely made of a metal material because the influence of the generated gas and external leak can be reduced as compared with the case where a resin or the like is used.

0089The adsorbent existing inside the treatment chamber 31 does not affect the pressure in the treatment chamber because it is adsorbed on the inner wall, but it causes outgassing when the treatment chamber is exhausted. Therefore, although there is no correlation between the leak rate and the exhaust rate, it is important to use a pump having a high exhaust capacity to remove the adsorbents existing in the processing chamber as much as possible and exhaust them in advance. The processing chamber may be baked in order to promote the desorption of adsorbents. By baking, the desorption rate of the adsorbent can be increased by about 10 times. Baking may be performed at 100 ° C or higher and 450 ° C or lower. At this time, if the adsorbent is removed while introducing the inert gas, the desorption rate of water or the like, which is difficult to desorb only by exhausting, can be further increased.

0090The exhaust means 33 can exhaust impurities in the processing chamber 31 and control the pressure in the processing chamber 31. As the exhaust means 33, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. By using the adsorption type vacuum pump, the amount of hydrogen contained in the oxide semiconductor film can be reduced.

0091The exhaust of the processing chamber 31 may be performed by appropriately combining a roughing pump such as a dry pump and a high vacuum pump such as a sputter ion pump, a turbo molecular pump and a cryopump. Turbo molecular pumps excel in large-sized molecules, but have a low ability to exhaust hydrogen and water. Therefore, it is effective to combine a cryopump having a high water exhaust capacity and a sputter ion pump having a high hydrogen exhaust capacity.

0092The hydrogen contained in the oxide semiconductor film may be contained as a hydrogen molecule, water, a hydroxyl group, or a hydride in addition to a hydrogen atom.

0093The gas supply means 35 is a means for supplying gas for sputtering the target into the processing chamber 31. The gas supply means 35 includes a cylinder filled with gas, a pressure regulating valve, a stop valve, a mass flow controller, and the like. By providing the gas supply means 35 with a refiner, impurities contained in the gas introduced into the processing chamber 31 can be reduced. Noble gases such as helium, neon, argon, xenon, and krypton are used as the gas for sputtering the target. Alternatively, a mixed gas of one of the above rare gases and oxygen can be used.

0094As the power supply device 37, an RF power supply device, an AC power supply device, a DC power supply device, or the like can be appropriately used. Although not shown, if a magnet is provided inside or outside the target support that supports the target, high-density plasma can be confined around the target, the film formation speed can be improved, and plasma damage to the substrate can be reduced. This method is called a magnetron sputtering method. Further, in the magnetron sputtering method, when the magnet can be rotated, the bias of the magnetic field can be reduced, so that the efficiency of using the target can be improved and the variation in the film quality in the plane of the substrate can be reduced.

0095The board support 40 is grounded. A heater is provided on the substrate support 40. As a heater, there is a device that heats an object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, an electric furnace, a GRTA (Gas Rapid Thermal Anneal) device, or an LRTA (Lamp Rapid Thermal). An RTA (Rapid Thermal Anneal) device such as an Anneal device can be used. The LRTA device is a device that heats an object to be treated by radiating light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. The GRTA device is a device that performs heat treatment using high-temperature gas.

0096As the target 41, a metal oxide target containing zinc can be used. Typical examples of the target 41 are In-Sn-Ga-Zn-O metal oxides, which are quaternary metal oxides, and In-Ga-Zn-O metal oxides, which are ternary metal oxides. , In-Sn-Zn-O-based metal oxides, In-Al-Zn-O-based metal oxides, Sn-Ga-Zn-O-based metal oxides, Al-Ga-Zn-O-based metal oxides, Sn Targets such as -Al-Zn-O-based metal oxides, binary metal oxides such as In-Zn-O-based metal oxides, and Sn-Zn-O-based metal oxides can be used.

0097As an example of the target 41, a metal oxide target containing In, Ga, and Zn is used as an In.₂O₃: Ga₂O₃: ZnO = 1: 1: 1 [mol number ratio]. Also, In₂O₃: Ga₂O₃: ZnO = 1: 1: 2 [mol number ratio] target or In₂O₃: Ga₂O₃: ZnO = 1: 1: 4 [mol number ratio] target, In₂O₃: Ga₂O₃A target having a composition ratio of: ZnO = 2: 1: 8 [mol number ratio] can also be used.

0098The distance between the target 41 and the substrate 51 (distance between TSs) is such that an element having a small atomic weight can preferentially reach the oxide insulating film 53 on the substrate 51.

0099Next, a method of forming a crystalline oxide semiconductor film on the oxide insulating film will be described.

0100As shown in FIG. 3A, the substrate 51 in which the oxide insulating film 53 is formed on the substrate support 40 is installed in the processing chamber 31 of the sputtering apparatus. Next, the gas for sputtering the target 41 is introduced from the gas supply means 35 into the processing chamber 31. The purity of the target 41 is 99.9% or more, preferably 99.99% or more. Next, power is supplied to the power supply unit 37 connected to the target 41. As a result, the ions 43 and electrons of the sputtering gas introduced from the gas supply means 35 into the processing chamber 31 sputter the target 41. In the present embodiment, the distance between the target 41 and the substrate 51 is such that an element having a small atomic weight can preferentially arrive at the oxide insulating film 53 on the substrate 51 and deposit. Therefore, as shown in FIG. 3 (B), among the elements contained in the target 41, the element 45 having a small atomic weight moves preferentially to the substrate side over the element 47 having a large atomic weight.

0101In the target 41 shown in this embodiment, zinc has a smaller atomic weight than tin and indium. Therefore, zinc is preferentially deposited on the oxide insulating film 53. Further, since oxygen is contained in the atmosphere at the time of film formation and the substrate support 40 is provided with a heater for heating the substrate and the deposited film at the time of film formation, the zinc deposited on the oxide insulating film 53 is oxidized and zinc is deposited. A seed crystal having a hexagonal structure crystal containing the above 55a, typically a seed crystal having a hexagonal structure zinc oxide is formed.

0102When the target 41 contains an atom having an atomic weight smaller than that of zinc such as aluminum, aluminum is preferentially deposited on the oxide insulating film 53 together with zinc.

0103The seed crystal 55a has a zinc-containing hexagonal crystal having a bond having a hexagonal lattice on the ab plane and a c axis substantially perpendicular to the substrate plane substantially parallel to the ab plane. Here, FIG. 4 is used for a crystal having a hexagonal structure containing zinc, which has a bond having a hexagonal lattice on the ab plane and has a c axis substantially perpendicular to the substrate plane substantially parallel to the ab plane. I will explain. Here, zinc oxide is used as a typical example of a hexagonal crystal containing zinc, and black circles indicate zinc and white circles indicate oxygen. FIG. 4 (A) is a schematic diagram of zinc oxide having a hexagonal structure on the ab plane, and FIG. 4 (B) is a schematic diagram of zinc oxide having a hexagonal structure with the c-axis direction as the vertical direction. .. As shown in FIG. 4 (A), zinc and oxygen form a hexagonal bond in the upper plane on the ab plane. Further, as shown in FIG. 4 (B), layers having a bond having a hexagonal lattice formed by zinc and oxygen are laminated, and the c-axis direction is perpendicular to the ab plane.

0104The seed crystal 55a has one or more atomic layers in the c-axis direction having a bond having a hexagonal lattice on the ab plane.

0105As the sputtering gas, a rare gas (typically argon), an oxygen gas, a mixed gas of a rare gas and an oxygen is appropriately used. Further, as the sputtering gas, it is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups and hydrides have been removed.

0106Subsequently, by sputtering the target 41 with a sputtering gas, the atoms contained in the target are deposited on the seed crystal 55a. At this time, since the crystal grows around the seed crystal 55a as a nucleus, the hexagonal structure is formed on the seed crystal 55a. A crystalline oxide semiconductor film 55b having crystals can be formed. Since the substrate 51 is heated by a heater provided on the substrate support 40, the seed crystal 55a is used as a nucleus, and the atoms deposited on the surface of the substrate grow as crystals while being oxidized to produce a crystalline oxide semiconductor film. can do.

0107The heating temperature of the substrate by the heater at this time is 200 ° C or more and 400 ° C or less, preferably 250 ° C or more and 350 ° C or less. The first heat treatment is performed by forming a film while heating the substrate at 200 ° C or higher and 400 ° C or lower, preferably 250 ° C or higher and 350 ° C or lower. The temperature of the surface to be filmed during sputtering shall be 250 ° C or higher and lower than the upper limit temperature for heat treatment of the substrate.

0108The crystalline oxide semiconductor film 55b has a seed crystal 55a as a nucleus, and an atom having a heavy atomic weight on the surface of the target 41 and an atom having a light atomic weight sputtered after the formation of the seed crystal 55a are oxidized and crystal grow. Similar to the seed crystal 55a, it has a zinc-containing hexagonal crystal having a bond having a hexagonal lattice on the ab plane and a c-axis roughly perpendicular to the substrate plane substantially parallel to the ab plane. .. That is, the crystalline oxide semiconductor film 55 composed of the seed crystal 55a and the crystalline oxide semiconductor film 55b has a bond having a hexagonal lattice on the ab plane parallel to the surface of the oxide insulating film 53, and ab. It has a zinc-containing hexagonal crystal having a c-axis approximately perpendicular to the substrate plane approximately parallel to the plane. The crystalline oxide semiconductor film 55 shown in the present embodiment is not an amorphous structure but a crystalline structure, ideally a single crystal structure, and is a crystal having a c-axis substantially perpendicular to the substrate plane. It is a sex oxide semiconductor (C Axis Aligned Crystal; also called CAAC OS).

0109By setting the pressure of the processing chamber having the substrate support 40 and the target 41 to 0.4 Pa or less, it is possible to reduce the mixing of impurities such as alkali metal and hydrogen on the surface and the film of the crystalline oxide semiconductor film. be able to.

0110In addition, the leak rate in the processing chamber of the sputtering equipment is set to 1 x 10.^-10Pa m³By setting the value to / sec or less, it is possible to reduce the mixing of impurities such as alkali metal, hydrogen, water, hydroxyl groups, and hydrides into the crystalline oxide semiconductor film during film formation by the sputtering method. Further, by using an adsorption type vacuum pump as the exhaust system, it is possible to reduce the backflow of impurities such as alkali metal, hydrogen, water, hydroxyl groups or hydrides from the exhaust system.

0111Further, by setting the purity of the target 41 to 99.99% or more, it is possible to reduce alkali metals, hydrogen, water, hydroxyl groups, hydrides, etc. mixed in the crystalline oxide semiconductor film. In addition, by using the target, the concentration of lithium in the crystalline oxide semiconductor film 55 can be increased to 5 × 10.¹⁵cm^-3Below, preferably 1 × 10¹⁵cm^-3Below, the sodium concentration is 5 x 10¹⁶cm^-3Below, preferably 1 × 10¹⁶cm^-3Below, more preferably 1 × 10¹⁵cm^-3Below, the potassium concentration is 5 x 10¹⁵cm^-3Below, preferably 1 × 10¹⁵cm^-3It can be as follows.

0112Alkali metals and alkaline earth metals are malignant impurities for crystalline oxide semiconductors, and the smaller the amount, the better. In particular, of the alkali metals, sodium diffuses into the oxide insulating film in contact with the crystalline oxide semiconductor and sodium ions (Na).⁺). Further, in the crystalline oxide semiconductor, the bond between the metal and oxygen is broken or interrupted during the bond. As a result, the transistor characteristics are deteriorated (for example, normalization (shift to negative threshold value), decrease in mobility, etc.). In addition, it causes variations in characteristics. Such a problem becomes remarkable especially when the concentration of hydrogen in the crystalline oxide semiconductor is sufficiently low. Therefore, the concentration of hydrogen in the crystalline oxide semiconductor is 5 × 10.¹⁹cm^-3Below, especially 5x10¹⁸cm^-3In the following cases, it is strongly required to set the alkali metal concentration to the above value.

0113By forming a crystalline oxide semiconductor film under the above conditions, the alkali metal concentration is 5 × 10.¹⁶atoms / cm³Below, the hydrogen concentration is 1 x 10¹⁹atoms / cm³The following crystalline oxide semiconductor film with extremely reduced impurities can be formed. By reducing the impurities of the crystalline oxide semiconductor film, the crystal growth of the seed crystal and the crystalline oxide semiconductor film is promoted, and further, a single crystal or a crystalline oxide semiconductor film which is substantially a single crystal is formed. can do.

0114Oxygen bonded to a metal element in a crystalline oxide semiconductor has lower reactivity with hydrogen than an amorphous oxide semiconductor, so that the formation of defects is reduced. Therefore, the transistor having the crystalline oxide semiconductor film as the channel region has a small amount of change in the threshold voltage before and after light irradiation or the BT test, and has stable electrical characteristics.

0115Further, in the process of forming a crystalline oxide semiconductor film, one or more, preferably all of the pressure in the processing chamber, the temperature of the surface to be formed, the leakage rate in the processing chamber, and the purity of the target are set as the above conditions. This makes it possible to reduce the mixing of hydrogen and alkali metals contained in the oxide insulating film and the crystalline oxide semiconductor film. Further, it is possible to reduce the diffusion of hydrogen and alkali metal from the oxide insulating film to the crystalline oxide semiconductor film. Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, and defects are formed in the oxygen-desorbed lattice (or the oxygen-desorbed portion).

0116Therefore, it is possible to reduce defects in the crystalline oxide semiconductor film by extremely reducing impurities in the film forming process of the crystalline oxide semiconductor film. From these facts, a transistor having a crystalline oxide semiconductor film as a channel region has a small amount of change in the threshold voltage before and after light irradiation or a BT test, and has stable electrical characteristics.

0117In the present embodiment, in the same sputtering step, by utilizing the difference in the atomic weight contained in the target, zinc having a small atomic weight is preferentially deposited on the oxide insulating film to form a seed crystal and on the seed crystal. Since tin, indium, and the like having a large atomic weight are deposited while growing crystals, a crystalline oxide semiconductor film can be formed without going through a plurality of steps. Furthermore, since a seed crystal having a hexagonal structure crystal containing zinc is used and an oxide semiconductor having a hexagonal structure is deposited, a single crystal or a crystalline oxide semiconductor film which is substantially a single crystal is formed. be able to.

0118The metal oxide that can be used for the crystalline oxide semiconductor film 55 has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. As described above, by using the metal oxide having a wide bandgap, the off-current of the transistor can be reduced.

0119In the present embodiment, the crystalline oxide semiconductor film 55 is formed by a sputtering method using an In-Ga-Zn-O-based metal oxide target and a mixed gas of argon and oxygen as the sputtering gas.

0120Next, the substrate 51 is heat-treated to release hydrogen from the crystalline oxide semiconductor film 55, and a part of oxygen contained in the oxide insulating film 53 is oxidized with the crystalline oxide semiconductor film 55. It is diffused in the vicinity of the interface of the crystalline oxide semiconductor film 55 in the material insulating film 53.

0121The heat treatment temperature is preferably a temperature at which hydrogen is released from the crystalline oxide semiconductor film 55, a part of oxygen contained in the oxide insulating film 53 is released, and further diffused into the crystalline oxide semiconductor film 55. Typically, the temperature is 150 ° C or higher and less than the strain point of the substrate 51, preferably 250 ° C or higher and 450 ° C or lower. By setting the heat treatment temperature higher than the film formation temperature of the crystalline oxide semiconductor film, a part of oxygen contained in the oxide insulating film 53 can be released more.

0122The heat treatment is preferably carried out in an inert gas atmosphere, and typically is preferably carried out in a rare gas such as helium, neon, argon, xenon or krypton, or in a nitrogen atmosphere. Further, it may be performed in a reduced pressure atmosphere.

0123By the heat treatment, hydrogen is released from the crystalline oxide semiconductor film 55, and a part of oxygen contained in the oxide insulating film 53 is made crystalline in the crystalline oxide semiconductor film 55 and the oxide insulating film 53. It can be diffused near the interface of the oxide semiconductor film 55. By this step, oxygen deficiency contained in the crystalline oxide semiconductor film 55 can be reduced, and the oxide semiconductor film and the oxide semiconductor film and the oxide semiconductor film 55 can be diffused in the vicinity of the crystalline oxide semiconductor film 55 in the oxide insulating film. Defects at the interface of the oxide insulating film can be reduced. As a result, a crystalline oxide semiconductor film having a reduced hydrogen concentration and oxygen deficiency can be formed.

0124Next, after forming a mask on the heat-treated crystalline oxide semiconductor film, the heat-treated crystalline oxide semiconductor film is selectively etched using the mask to form a crystalline oxide semiconductor film. Form 59. After this, the mask is removed (see Figure 1 (C)).

0125As a mask for etching the crystalline oxide semiconductor film 55, a photolithography step, an inkjet method, a printing method, or the like can be appropriately used. In addition, wet etching or dry etching can be appropriately used for etching the crystalline oxide semiconductor film 55.

0126Next, as shown in FIG. 1 (D), a pair of electrodes 61 in contact with the crystalline oxide semiconductor film 59 are formed.

0127The pair of electrodes 61 function as a source electrode and a drain electrode.

0128The pair of electrodes 61 uses a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing the above-mentioned metal element as a component, an alloy obtained by combining the above-mentioned metal elements, and the like. Can be formed. Further, a metal element selected from any one or more of manganese and zirconium may be used. Further, the pair of electrodes 61 may have a single-layer structure or a laminated structure having two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film on which a titanium nitride film is laminated. There are a layer structure, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a titanium film, and a three-layer structure in which an aluminum film is laminated on the titanium film and a titanium film is further formed on the titanium film.

0129Further, the pair of electrodes 61 includes indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, and indium zinc oxidation. It is also possible to apply a material, a conductive material having translucency such as indium tin oxide to which silicon oxide is added. Further, it is also possible to form a laminated structure of the above-mentioned conductive material having translucency and the above-mentioned metal element.

0130The pair of electrodes 61 are formed by a printing method or an inkjet method. Alternatively, after forming a conductive film by a sputtering method, a CVD method, a vapor deposition method, or the like, a mask is formed on the conductive film and the conductive film is etched to form the conductive film. As the mask formed on the conductive film, a printing method, an inkjet method, or a photolithography method can be appropriately used.

0131Here, after forming a conductive film on the crystalline oxide semiconductor film 59 and the oxide insulating film 53, the conductive film is etched into a predetermined shape to form a pair of electrodes 61.

0132After forming a conductive film on the heat-treated crystalline oxide semiconductor film, a concave-convex mask is formed by a multi-gradation photomask, and the crystalline oxide semiconductor is heat-treated using the mask. After etching the film and the conductive film, the uneven mask is separated by ashing, and the conductive film is selectively etched by the separated mask to form a crystalline oxide semiconductor film and a pair of electrodes. Can be done. By this step, the number of photomasks and the number of photolithography steps can be reduced.

0133Next, the gate insulating film 63 is formed on the crystalline oxide semiconductor film 59 and the pair of electrodes 61.

0134Next, the gate electrode 65 is formed on the gate insulating film 63 by superimposing it on the crystalline oxide semiconductor film 59.

0135After that, an insulating film 69 may be formed as a protective film (see FIG. 1 (E)). Further, after forming contact holes in the gate insulating film 63 and the insulating film 69, wiring to be connected to the pair of electrodes 61 may be formed.

0136The gate insulating film 63 can be formed by forming a single layer or a laminate of silicon oxide, silicon oxide nitride, silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, or gallium oxide. The gate insulating film 63 preferably contains oxygen at a portion in contact with the crystalline oxide semiconductor film 59, and is particularly preferably formed of an oxide insulating film that releases oxygen by heating like the oxide insulating film 53. .. By using the silicon oxide film, oxygen can be diffused in the crystalline oxide semiconductor film 59, and the characteristics can be improved.

0137Also, as the gate insulating film 63, hafnium silicate (HfSiO)_x), Nitrogen-added hafnium silicate (HfSi)_xO_yN_z), Nitrogen-added hafnium aluminate (HfAl)_xO_yN_z), Hafnium oxide, yttrium oxide and other high-k materials can reduce gate leaks. Further, the high-k material can be laminated with any one or more of silicon oxide, silicon oxide nitride, silicon nitride, silicon nitride oxide, aluminum oxide, aluminum oxide and gallium oxide. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less.

0138Before forming the gate insulating film 63, the surface of the crystalline oxide semiconductor film 59 is exposed to plasma of an oxidizing gas such as oxygen, ozone, and dinitrogen monoxide, and the surface of the crystalline oxide semiconductor film 59 is exposed. May be oxidized to reduce oxygen deficiency.

0139The gate electrode 65 is formed by using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing the above-mentioned metal element as a component, or an alloy combining the above-mentioned metal elements. can do. Further, a metal element selected from any one or more of manganese and zirconium may be used. Further, the gate electrode 65 may have a single-layer structure or a laminated structure having two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film on which a titanium nitride film is laminated. There are a layer structure, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a titanium film, and a three-layer structure in which an aluminum film is laminated on the titanium film and a titanium film is further formed on the titanium film.

0140Further, the gate electrode 65 includes indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, and indium zinc oxide. , A translucent conductive material such as indium tin oxide to which silicon oxide is added can also be applied. Further, it is also possible to form a laminated structure of the above-mentioned conductive material having translucency and the above-mentioned metal element.

0141The insulating film 69 can be formed by appropriately using the insulating films listed in the gate insulating film 63. Further, by forming a silicon nitride film formed by a sputtering method or a CVD method as the insulating film 69, it is possible to prevent the invasion of moisture and alkali metals from the outside, and it is possible to prevent impurities in the crystalline oxide semiconductor film. The content can be reduced.

0142The heat treatment may be performed after the formation of the gate insulating film 63 or after the formation of the insulating film 69. By the heat treatment, oxygen is diffused from the gate insulating film 63 to the crystalline oxide semiconductor film. As a result, the higher the temperature of the heat treatment, the more the amount of change in the threshold value due to the -BT test is suppressed while irradiating with light.

0143Through the above steps, a transistor 120 having a crystalline oxide semiconductor film in the channel region can be manufactured. Transistor 120 having a crystalline oxide semiconductor film in the channel region, which has a bond having a hexagonal lattice on the ab plane and has a hexagonal crystal structure having a c-axis substantially perpendicular to the substrate plane substantially parallel to the ab plane. Since the amount of change in the threshold voltage before and after light irradiation or the BT test is small, it is possible to manufacture a transistor having stable electrical characteristics.

0144(Embodiment 2) In the present embodiment, a method of manufacturing a transistor having a structure different from that of the first embodiment will be described with reference to FIGS. 5 and 6. The present embodiment is different from the first embodiment in that a pair of electrodes is provided between the oxide insulating film and the crystalline oxide semiconductor film. The cross-sectional view of the alternate long and short dash CD in FIG. 6 corresponds to FIG. 5 (D).

0145As shown in FIG. 5A, the oxide insulating film 53 is formed on the substrate 51 as in the first embodiment. Next, a pair of electrodes 71 are formed on the oxide insulating film 53. Next, the crystalline oxide semiconductor film 73 is formed on the pair of electrodes 71 and the oxide insulating film 53.

0146The pair of electrodes 71 can be formed by appropriately using the same materials and manufacturing methods as those of the pair of electrodes 61 shown in the first embodiment.

0147The crystalline oxide semiconductor film 73 can be formed by appropriately using the same materials and manufacturing methods as those of the crystalline oxide semiconductor film 55 shown in the first embodiment.

0148Next, the substrate 51 is heated in the same manner as in the first embodiment to form a crystalline oxide semiconductor film having a reduced hydrogen concentration and oxygen deficiency, and then a crystalline oxide having a reduced hydrogen concentration and oxygen deficiency. A mask is formed on the semiconductor film, and the crystalline oxide semiconductor film having reduced hydrogen concentration and oxygen deficiency is selectively etched to form the crystalline oxide semiconductor film 75. After this, the mask is removed (see Figure 5 (B)).

0149Next, as shown in FIG. 5C, a gate insulating film 77 is formed on the pair of electrodes 71 and the crystalline oxide semiconductor film 75. Next, the gate electrode 79 is formed on the gate insulating film 77 and superposed on the crystalline oxide semiconductor film 75. Next, the insulating film 81 may be formed as a protective film on the gate insulating film 77 and the gate electrode 79.

0150The gate insulating film 77 can be formed by appropriately using the same material and manufacturing method as the gate insulating film 63 shown in the first embodiment.

0151The gate electrode 79 can be formed by appropriately using the same material and manufacturing method as the gate electrode 65 shown in the first embodiment.

0152The insulating film 81 can be formed by appropriately using the same material and manufacturing method as the insulating film 69 shown in the first embodiment.

0153Next, after forming a mask on the insulating film 81, a part of the gate insulating film 77 and the insulating film 81 is etched to form a contact hole. Next, the wiring 83 connected to the pair of electrodes 71 is formed through the contact hole.

0154The wiring 83 can be formed by appropriately using the same material and manufacturing method as the pair of electrodes 71.

0155Through the above steps, a transistor having a crystalline oxide semiconductor film in the channel region can be manufactured. A crystalline oxide semiconductor film having a hexagonal crystal having a bond having a hexagonal lattice on the ab plane and a c-axis substantially perpendicular to the substrate plane substantially parallel to the ab plane is used as a channel region. Since the amount of change in the threshold voltage before and after light irradiation or the BT test is small, it is possible to manufacture a transistor having stable electrical characteristics.

0156In addition, this embodiment can be appropriately combined with other embodiments.

0157(Embodiment 3) In the present embodiment, transistors different from those of the first embodiment and the second embodiment will be described with reference to FIGS. 7 and 8. In this embodiment, the gate electrode is set on the substrate side differs a transistor having a bottom gate structure as the first embodiment and the second embodiment to be kicked. The cross-sectional view of the alternate long and short dash EF in FIG. 8 corresponds to FIG. 7 (C).

0158As shown in FIG. 7A, the oxide insulating film 53 is formed on the substrate 51. Next, the gate electrode 91 is formed on the oxide insulating film 53. Next, the gate insulating film 93 is formed on the oxide insulating film 53 and the gate electrode 91. Next, a crystalline oxide semiconductor film 95 is formed on the gate insulating film 93 as in the first embodiment.

0159The gate electrode 91 can be formed in the same manner as the gate electrode 65 shown in the first embodiment.

0160The gate insulating film 93 can be formed in the same manner as the gate insulating film 63 shown in the first embodiment.

0161The crystalline oxide semiconductor film 95 can be formed in the same manner as the crystalline oxide semiconductor film 55 shown in the first embodiment.

0162Next, as in the first embodiment, the crystalline oxide semiconductor film 95 is heated to form a crystalline oxide semiconductor film having a reduced hydrogen concentration and oxygen deficiency.

0163Next, a mask is formed on the crystalline oxide semiconductor film in which the hydrogen concentration and oxygen deficiency are reduced, and the crystalline oxide semiconductor film in which the hydrogen concentration and oxygen deficiency are reduced is selectively etched to crystallize. A sex oxide semiconductor film 99 is formed. After this, the mask is removed (see Fig. 7 (B)).

0164Next, as shown in FIG. 7C, a pair of electrodes 101 are formed on the crystalline oxide semiconductor film 99. Next, the insulating film 103 is formed on the crystalline oxide semiconductor film 99 and the pair of electrodes 101.

0165The pair of electrodes 101 can be formed by appropriately using the same materials and manufacturing methods as those of the pair of electrodes 61 shown in the first embodiment.

0166The insulating film 103 can be formed in the same manner as the gate insulating film 63 shown in the first embodiment.

0167After this, heat treatment may be performed.

0168Through the above steps, a transistor having a crystalline oxide semiconductor film in the channel region can be manufactured. A crystalline oxide semiconductor film having a hexagonal crystal having a bond having a hexagonal lattice on the ab plane and a c-axis substantially perpendicular to the substrate plane substantially parallel to the ab plane is used as a channel region. Since the amount of change in the threshold voltage before and after light irradiation or the BT test is small, it is possible to manufacture a transistor having stable electrical characteristics.

0169In addition, this embodiment can be appropriately combined with other embodiments.

0170(Embodiment 4) In the present embodiment, a bottom gate type transistor different from the third embodiment will be described with reference to FIGS. 9 and 10. The present embodiment is different from the third embodiment in that a pair of electrodes is provided between the gate insulating film and the oxide semiconductor film. The cross-sectional view of the alternate long and short dash GH in FIG. 10 corresponds to FIG. 9 (D).

0171As shown in FIG. 9A, the oxide insulating film 53 is formed on the substrate 51. Next, the gate electrode 91 is formed on the oxide insulating film 53. Next, the gate insulating film 93 is formed on the oxide insulating film 53 and the gate electrode 91. Next, a pair of electrodes 105 are formed on the gate insulating film 93.

0172The pair of electrodes 105 can be formed by appropriately using the same materials and manufacturing methods as those of the pair of electrodes 61 shown in the first embodiment.

0173Next, as shown in FIG. 9B, a crystalline oxide semiconductor film 107 is formed on the gate insulating film 93 in the same manner as in the first embodiment.

0174The crystalline oxide semiconductor film 107 can be formed in the same manner as the crystalline oxide semiconductor film 55 shown in the first embodiment.

0175Next, as in the first embodiment, the crystalline oxide semiconductor film 107 is heated to form a crystalline oxide semiconductor film in which the hydrogen concentration and oxygen deficiency are reduced.

0176Next, a mask is formed on the crystalline oxide semiconductor film in which the hydrogen concentration and oxygen deficiency are reduced, and the crystalline oxide semiconductor film in which the hydrogen concentration and oxygen deficiency are reduced is selectively etched to crystallize. A sex oxide semiconductor film 109 is formed. After this, the mask is removed (see Fig. 9 (C)).

0177Next, as shown in FIG. 9D, a protective film 111 is formed on the crystalline oxide semiconductor film 109 and the pair of electrodes 105.

0178The protective film 111 can be formed in the same manner as the gate insulating film 63 shown in the first embodiment.

0179After this, heat treatment may be performed.

0180Through the above steps, a transistor having a crystalline oxide semiconductor film in the channel region can be manufactured. A crystalline oxide semiconductor film having a hexagonal crystal having a bond having a hexagonal lattice on the ab plane and a c-axis substantially perpendicular to the substrate plane substantially parallel to the ab plane is used as a channel region. Since the amount of change in the threshold voltage before and after light irradiation or the BT test is small, it is possible to manufacture a transistor having stable electrical characteristics.

0181In addition, this embodiment can be appropriately combined with other embodiments.

0182(Embodiment 5) In the present embodiment, the transistors having a plurality of gate electrodes will be described in the first to fourth embodiments. Here, the transistor shown in the third embodiment will be described, but the transistor can be appropriately applied to the first embodiment, the second embodiment, and the fourth embodiment.

0183Similar to the third embodiment, as shown in FIG. 11, an oxide insulating film 53 is formed on the substrate 51, and a gate electrode 91 and a gate insulating film 93 are formed on the oxide insulating film 53 to insulate the gate. A crystalline oxide semiconductor film 99, a pair of electrodes 101, and an insulating film 103 are formed on the film 93.

0184Next, the back gate electrode 113 is formed on the insulating film 103 and superposed on the crystalline oxide semiconductor film 99. Next, the insulating film 115 may be formed as a protective film on the insulating film 103 and the back gate electrode 113.

0185The back gate electrode 113 can be formed in the same manner as the gate electrode 65 shown in the first embodiment.

0186The insulating film 103 functions as a gate insulating film on the back gate electrode 113 side. The insulating film 115 can be formed in the same manner as the insulating film 69 shown in the first embodiment.

0187The gate electrode 91 and the back gate electrode 113 may be connected. In this case, since the gate electrode 91 and the back gate electrode 113 have the same potential, the channel region is formed on the gate insulating film 93 side and the insulating film 103 side of the crystalline oxide semiconductor film 99, so that the on-current of the transistor is formed. And the electric potential effect mobility can be increased.

0188Alternatively, the gate electrode 91 and the back gate electrode 113 may not be connected and different potentials may be applied. In this case, the threshold voltage of the transistor can be controlled.

0189In the present embodiment, the pair of electrodes 101 are formed between the crystalline oxide semiconductor film 99 and the insulating film 103, but it may be formed between the gate insulating film 93 and the crystalline oxide semiconductor film 99. Good.

0190Through the above steps, a transistor having a plurality of gate electrodes can be manufactured.

0191(Embodiment 6) In the present embodiment, a method for manufacturing a transistor capable of reducing the contact resistance of the crystalline oxide semiconductor film and the pair of electrodes as compared with the first to fifth embodiments will be described.

0192Similar to the first embodiment, the crystalline oxide semiconductor film 55 is formed on the oxide insulating film 53 by the steps of FIGS. 1 (A) and 1 (B). Next, the crystalline oxide semiconductor film 55 is heated to form a crystalline oxide semiconductor film having a reduced hydrogen concentration and oxygen deficiency. Next, as shown in FIG. 12A, a buffer 84 having an n-type conductive type is formed on the crystalline oxide semiconductor film 57 in which the hydrogen concentration and oxygen deficiency are reduced.

0193Is the buffer 84 having an n-type conductive type one metal oxide selected from indium oxide, indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, and tin zinc oxide? , Or a material in which the metal oxide contains one or more elements selected from aluminum, gallium, and silicon can be used. With this configuration, it is possible to reduce the contact resistance of the pair of electrodes and the crystalline oxide semiconductor film that function as the source electrode and the drain electrode that are formed later.

0194Here, the crystalline oxide semiconductor film is heated to release hydrogen from the crystalline oxide semiconductor film, oxygen is diffused from the oxide insulating film to the crystalline oxide semiconductor film, and then the crystalline oxide is released. Since the buffer 84 having an n-type conductive type is formed on the semiconductor film, hydrogen can be sufficiently released from the crystalline oxide semiconductor film. As a result, it is possible to reduce the hydrogen concentration and oxygen deficiency in the crystalline oxide semiconductor film, and it is possible to reduce the negative shift of the threshold voltage of the transistor.

0195Next, after forming a mask on the buffer 84 having the n-type conductive type, the crystalline oxide semiconductor film having reduced hydrogen concentration and oxygen deficiency and the buffer 84 having the n-type conductive type are etched. A crystalline oxide semiconductor film 59 and a buffer 85 having an n-type conductive type are formed. After this, the mask is removed (see Figure 12 (B)).

0196Next, as shown in FIG. 12C, a pair of electrodes 61 are formed on the crystalline oxide semiconductor film 59 and the buffer 85 having the n-type conductive type. Here, in order to maintain the film quality of the gate insulating film, it is preferable to use a material that does not extract oxygen from the gate insulating film as the pair of electrodes 61. Examples of the material of such a pair of electrodes 61 include tungsten and molybdenum. However, in tungsten and molybdenum, a metal oxide having high resistance is formed in a region in contact with the crystalline oxide semiconductor film and the gate insulating film. Therefore, by providing a buffer having an n-type conductive type between the crystalline oxide semiconductor film 59 and the pair of electrodes 61, the contact resistance between the crystalline oxide semiconductor film 59 and the pair of electrodes 61 can be reduced. Can be done.

0197Next, using a mask (not shown) formed on the pair of electrodes 61, the exposed portion of the buffer 85 having the n-type conductive type is etched to obtain the buffer 87 having the pair of n-type conductive types. Form (see Figure 12 (D)).

0198After removing the mask formed on the pair of electrodes 61, the exposed portion of the buffer 85 having the n-type conductive type is etched using the pair of electrodes 61 as a mask to form the pair of n-type conductive types. The buffer 87 to have may be formed.

0199When etching the buffer 85 having the n-type conductive type, the condition that the crystalline oxide semiconductor film 59 is not etched and the buffer 85 having the n-type conductive type is selectively etched (etching selectivity is high). Condition) is preferably used. When the etching selectivity of the crystalline oxide semiconductor film 59 and the buffer 85 having the n-type conductive type is low, the crystalline oxide semiconductor film 59 is etched when the buffer 85 having the n-type conductive type is etched. A part of it may also be etched to form a shape having a groove (recess).

0200According to the present embodiment, since the buffer 87 having an n-type conductive type is provided between the crystalline oxide semiconductor film 59 and the pair of electrodes 61, the contact resistance between the crystalline oxide semiconductor film 59 and the pair of electrodes 61 is increased. It can be reduced. As a result, it is possible to suppress the reduction of the on-current of the transistor. Further, in the BT test, the amount of change in the on-current (Ion deterioration) before and after applying the negative gate bias stress can be suppressed.

0201Next, the gate insulating film 63, the gate electrode 65, and the insulating film 69 are formed in the same manner as in the first embodiment (see FIG. 12 (E)). Further, after forming contact holes in the gate insulating film 63 and the insulating film 69, wiring to be connected to the pair of electrodes 61 may be formed.

0202Through the above steps, a transistor having a crystalline oxide semiconductor film in the channel forming region can be produced.

0203According to this embodiment, a buffer having an n-type conductive type that reduces contact resistance is formed between the oxide semiconductor film and the pair of wirings, so that the reduction of the on-current of the transistor is suppressed and the minus gate is used in the BT test. The amount of change in on-current (Ion deterioration) before and after applying bias stress can be suppressed.

0204This embodiment can be freely combined with other embodiments.

0205(Embodiment 7) In the present embodiment, the steps from the formation of the oxide insulating film 53 shown in the first embodiment to the heat treatment to form the conductive film to be the source electrode or the drain electrode are continuously performed without touching the atmosphere. FIG. 13 shows an example of the manufacturing apparatus to be performed.

0206The manufacturing apparatus shown in FIG. 13 is a single-wafer multi-chamber apparatus, which includes three sputtering apparatus 10a, 10b, 10c, a substrate supply chamber 11 having three cassette ports 14 for accommodating substrates to be processed, and a load lock chamber 12a. It has 12b, a transport chamber 13, a substrate heating chamber 15, and the like. A transfer robot for transferring the substrate to be processed is arranged in the substrate supply chamber 11 and the transfer chamber 13, respectively. The sputtering apparatus 10a, 10b, 10c, the transport chamber 13, and the substrate heating chamber 15 are preferably controlled in an atmosphere containing almost no hydrogen and moisture (inert atmosphere, dew point atmosphere, dry air atmosphere, etc.), for example. Moisture should be a dry nitrogen atmosphere with a dew point of -40 ° C or less, preferably a dew point of -50 ° C or less.

0207As an example of the procedure of the manufacturing process using the manufacturing apparatus of FIG. 13, first, the substrate to be processed is transported from the substrate supply chamber 11 and moved to the substrate heating chamber 15 via the load lock chamber 12a and the transport chamber 13 to heat the substrate. Moisture adhering to the substrate to be processed is removed in the chamber 15 by heat treatment in a vacuum atmosphere, and then the substrate to be processed is moved to the sputtering apparatus 10c through the transport chamber 13 and oxide insulating in the sputtering apparatus 10c. A film 53 is formed. Then, the substrate to be processed is moved to the sputtering apparatus 10a through the transport chamber 13 without being exposed to the atmosphere, zinc is preferentially deposited on the oxide insulating film 53 in the sputtering apparatus 10a, and then oxidized to zinc. A seed crystal 55a having a hexagonal structure crystal containing the above is formed, and subsequently, by sputtering in the same sputtering apparatus, the seed crystal 55a is used as a nucleus for crystal growth, and the seed crystal 55a has a hexagonal structure crystal. A crystalline oxide semiconductor film 55b is formed. Then, the substrate to be processed is moved to the substrate heating chamber 15 via the transport chamber 13 without being exposed to the atmosphere, and the heat treatment is performed. Then, the substrate to be processed is moved to the sputtering apparatus 10b through the conveying chamber 13 without being exposed to the atmosphere, and the conductive film for forming the source electrode and the drain electrode is crystallinely oxidized in the sputtering apparatus 10b using a metal target. A film is formed on the object semiconductor film 55b.

0208In this way, by using the manufacturing apparatus shown in FIG. 13, a part of the transistor manufacturing process can be advanced without being exposed to the atmosphere.

0209Moreover, this embodiment can be freely combined with other embodiments.

0210(Embodiment 8) In the present embodiment, the transistors using the oxide semiconductors shown in the first to seventh embodiments are used, and the stored contents can be retained even in a situation where power is not supplied, and the number of writes is not limited. An example of a semiconductor device having a similar structure is shown.

0211Since the transistors using the oxide semiconductors shown in the first to seventh embodiments have an extremely small off-current, it is possible to retain the stored contents for an extremely long period of time by using the transistors. That is, the refresh operation becomes unnecessary, or the frequency of the refresh operation can be made extremely low, so that the power consumption can be sufficiently reduced. Moreover, even when there is no power supply, it is possible to retain the stored contents for a long period of time.

0212FIG. 14 is an example of the configuration of the semiconductor device. FIG. 14 (A) shows a cross section of the semiconductor device, and FIG. 14 (B) shows a plane of the semiconductor device. Here, FIG. 14 (A) corresponds to the cross section in E1-E2 and F1-F2 of FIG. 14 (B). The semiconductor device shown in FIGS. 14 (A) and 14 (B) has a transistor 260 using a material other than an oxide semiconductor at the lower portion and a transistor 120 using an oxide semiconductor at the upper portion. Since the transistor 120 is the same as that of the first embodiment, the same parts as those in FIG. 14 (A), (B), and (C) will be described with reference to the same reference numerals.

0213The transistor 260 includes a channel forming region 216 provided on the substrate 200 containing a semiconductor material (for example, silicon), an impurity region 214 provided so as to sandwich the channel forming region 216, and a high concentration impurity region 220 (these are combined). The gate insulating film 208 provided on the channel forming region 216, the gate electrode 210 provided on the gate insulating film 208, and the source electrode or drain electrically connected to the impurity region. It has an electrode 230a and a source or drain electrode 230b.

0214Here, a sidewall insulating film 218 is provided on the side surface of the gate electrode 210. Further, in the region of the substrate 200 that does not overlap with the sidewall insulating film 218 when viewed from the direction perpendicular to the surface, there is a high-concentration impurity region 220 and a metal compound region 224 in contact with the high-concentration impurity region 220. Further, an element separation insulating film 206 is provided on the substrate 200 so as to surround the transistor 260, and an interlayer insulating film 226 and an interlayer insulating film 128 are provided so as to cover the transistor 260. The source electrode or drain electrode 230a and the source electrode or drain electrode 230b are electrically connected to the metal compound region 224 through openings formed in the interlayer insulating film 226 and the interlayer insulating film 128. That is, the source electrode or drain electrode 230a and the source electrode or drain electrode 230b are electrically connected to the high-concentration impurity region 220 and the impurity region 214 via the metal compound region 224. The sidewall insulating film 218 may not be formed due to the integration of the transistors 260 and the like.

0215The transistor 120 shown in FIG. 14 includes a crystalline oxide semiconductor film 59, a pair of electrodes 61 that function as source or drain electrodes, a gate insulating film 63, and a gate electrode 65. The transistor 120 can be obtained in the process shown in the first embodiment.

0216In FIG. 14, by increasing the flatness of the interlayer insulating film 128 which is the surface to be formed of the crystalline oxide semiconductor film 59, the film thickness distribution of the crystalline oxide semiconductor film 59 can be made uniform, so that the transistor The characteristics of 120 can be improved. However, the channel length shall be short, for example, 0.8 μm or 3 μm. Further, the interlayer insulating film 128 corresponds to the oxide insulating film 53 and is formed of the same material.

0217Further, the capacitance element 265 shown in FIG. 14 forms a capacitance with one of the pair of electrodes 61, the gate insulating film 63 functioning as a dielectric, and the electrodes 248.

0218Further, an insulating film 69 is provided on the transistor 120 and the capacitive element 265, and a protective insulating film 110 is provided on the insulating film 69.

0219Further, wirings 242a and 242b formed in the same process as the pair of electrodes 61 are provided. The wiring 242a is electrically connected to the source electrode or the drain electrode 230a, and the wiring 242b is electrically connected to the source electrode or the drain electrode 230b.

0220The circuit configuration is shown in FIG. 14 (C). In the circuit diagram, the OS code may be added to indicate that the transistor uses an oxide semiconductor.

0221In FIG. 14C, the first wiring (1st line) and the source electrode of the transistor 260 are electrically connected, and the second wiring (2nd line) and the drain electrode of the transistor 260 are electrically connected. It is connected. Further, the third wire (3rd line) and one of the source electrode or the drain electrode of the transistor 120 are electrically connected, and the fourth wire (4th line) and the gate electrode of the transistor 120 are electrically connected. It is connected to the. Then, the gate electrode of the transistor 260 and the other of the source electrode or the drain electrode of the transistor 120 are electrically connected to one of the electrodes of the capacitive element 265, and the fifth wire (5th line) and the electrode of the capacitive element 265 are connected. The other is electrically connected.

0222In the semiconductor device shown in FIG. 14C, information can be written, held, and read as follows by taking advantage of the feature that the potential of the gate electrode of the transistor 260 can be held.

0223First, writing and retaining information will be described. First, the potential of the fourth wiring is set to the potential at which the transistor 120 is turned on, and the transistor 120 is turned on. As a result, the potential of the third wiring is given to the gate electrode of the transistor 260 and the capacitance element 265. That is, a predetermined charge is given to the gate electrode of the transistor 260 (writing). Here, it is assumed that one of charges giving two different potential levels (hereinafter referred to as low level charge and high level charge) is given. After that, the electric potential given to the gate electrode of the transistor 260 is retained (retained) by setting the potential of the fourth wiring to the potential at which the transistor 120 is in the off state and turning the transistor 120 into the off state.

0224The off-current of the transistor 120 is extremely small, specifically, the off-current at room temperature (here, the value per unit channel width (1 μm)) is 100 zA / μm (1 zA (zeptoampere) is 1 × 10).^-21A) Below, preferably 10 zA / μm or less, the charge on the gate electrode of the transistor 260 is retained for a long period of time. Further, as shown in the fifth embodiment, the back gate electrode may be provided, and it is preferable to ensure the normal off of the transistor 120 by applying a voltage to the back gate electrode.

0225Further, as the substrate 200, a semiconductor substrate (SOI substrate) called a silicon on insulator can also be used. Further, as the substrate 200, a substrate in which an SOI layer is formed on an insulating substrate such as glass may be used. As an example of an SOI substrate in which an SOI layer is formed on a glass substrate, there is a method of forming a thin single crystal silicon layer on the glass substrate by using a hydrogen ion implantation peeling method. Specifically, H using an ion doping device₃⁺By irradiating, a separation layer is formed from the surface of the silicon substrate to a predetermined depth, and a glass substrate having an insulating film on the surface is pressed against the surface of the silicon substrate to be adhered to the surface, and the boundary between the layers or the interface of the separation layer is formed. The heat treatment is performed at a temperature lower than the temperature at which the separation layer is separated and the separation layer becomes fragile. As a result, a part of the semiconductor substrate is separated from the silicon substrate with the inside of the separation layer or the interface as a boundary, and the SOI layer is formed on the glass substrate.

0226The present embodiment can be combined with any one of the first to seventh embodiments.

0227(Embodiment 9) In the present embodiment, an example in which at least a part of the drive circuit and a transistor to be arranged in the pixel portion are manufactured on the same substrate will be described below.

0228The transistor arranged in the pixel portion is formed according to any one of the first to seventh embodiments. Further, since the transistors shown in the first to seventh embodiments are n-channel TFTs, a part of the drive circuit that can be configured by the n-channel TFT is placed on the same substrate as the transistor of the pixel portion. Form.

0229An example of a block diagram of the active matrix type display device is shown in FIG. 15 (A). On the substrate 5300 of the display device, a pixel unit 5301, a first scanning line driving circuit 5302, a second scanning line driving circuit 5303, and a signal line driving circuit 5304 are provided. In the pixel unit 5301, a plurality of signal lines are arranged so as to extend from the signal line drive circuit 5304, and a plurality of scan lines are arranged so as to extend from the first scan line drive circuit 5302 and the scan line drive circuit 5303. There is. In the intersection region of the scanning line and the signal line, pixels having a display element are provided in a matrix. Further, the substrate 5300 of the display device is connected to a timing control circuit (also referred to as a controller or a control IC) via a connection portion such as an FPC (Flexible Printed Circuit).

0230In FIG. 15A, the first scanning line driving circuit 5302, the second scanning line driving circuit 5303, and the signal line driving circuit 5304 are formed on the same substrate 5300 as the pixel portion 5301. Therefore, the number of parts such as a drive circuit provided externally is reduced, so that the cost can be reduced. Further, when the drive circuit is provided outside the board 5300, it becomes necessary to extend the wiring, and the number of connections between the wirings increases. When the drive circuit is provided on the same substrate 5300, the number of connections between the wirings can be reduced, and the reliability or the yield can be improved.

0231Further, an example of the circuit configuration of the pixel portion is shown in FIG. 15 (B). Here, the pixel structure of the VA type liquid crystal display panel is shown.

0232In this pixel structure, one pixel has a plurality of pixel electrodes, and a transistor is connected to each pixel electrode. Each transistor is configured to be driven by a different gate signal. That is, the multi-domain designed pixel has a configuration in which the signal applied to each pixel electrode is independently controlled.

0233The gate wiring 602 of the transistor 628 and the gate wiring 603 of the transistor 629 are separated so that different gate signals can be given. On the other hand, the source electrode or drain electrode 616 that functions as a data line is commonly used in the transistor 628 and the transistor 629. As the transistor 628 and the transistor 629, the transistor of any one of the first to seventh embodiments can be appropriately used.

0234The first pixel electrode electrically connected to the transistor 628 and the second pixel electrode electrically connected to the transistor 629 have different shapes and are separated by a slit. A second pixel electrode is formed so as to surround the outside of the first pixel electrode spreading in a V shape. The orientation of the liquid crystal is controlled by making the timing of the voltage applied to the first pixel electrode and the second pixel electrode different between the transistor 628 and the transistor 629. The transistor 628 is connected to the gate wiring 602, and the transistor 629 is connected to the gate wiring 603. By giving different gate signals to the gate wiring 602 and the gate wiring 603, the operation timings of the transistor 628 and the transistor 629 can be made different.

0235Further, a holding capacitance is formed by the capacitive wiring 690, the gate insulating film that functions as a dielectric, and the capacitive electrode that is electrically connected to the first pixel electrode or the second pixel electrode.

0236The first liquid crystal element 651 is formed by overlapping the first pixel electrode, the liquid crystal layer, and the counter electrode. Further, the second liquid crystal element 652 is formed by overlapping the second pixel electrode, the liquid crystal layer, and the counter electrode. Further, it has a multi-domain structure in which a first liquid crystal element 651 and a second liquid crystal element 652 are provided in one pixel.

0237The pixel configuration shown in FIG. 15B is not limited to this. For example, a switch, a resistance element, a capacitance element, a transistor, a sensor, a logic circuit, or the like may be newly added to the pixel shown in FIG. 15 (B).

0238Further, an example of the circuit configuration of the pixel portion is shown in FIG. 15 (C). Here, the pixel structure of the display panel using the organic EL element is shown.

0239In the organic EL element, by applying a voltage to the light emitting element, electrons and holes are injected into the layer containing the luminescent organic compound from the pair of electrodes, respectively, and a current flows. Then, when those carriers (electrons and holes) are recombined, the luminescent organic compound forms an excited state, and when the excited state returns to the ground state, it emits light. From such a mechanism, such a light emitting element is called a current excitation type light emitting element.

0240FIG. 15C is a diagram showing an example of a pixel configuration to which digital time gradation drive can be applied as an example of a semiconductor device.

0241The configuration of pixels to which digital time gradation drive can be applied and the operation of pixels will be described. Here, an example is shown in which two n-channel transistors that use an oxide semiconductor layer in the channel formation region are used in one pixel.

0242The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, a light emitting element 6404, and a capacitance element 6403. In the switching transistor 6401, the gate electrode is connected to the scanning line 6406, the first electrode (one of the source electrode and the drain electrode) is connected to the signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is driven. It is connected to the gate electrode of the transistor 6402. In the drive transistor 6402, the gate electrode is connected to the power supply line 6407 via the capacitive element 6403, the first electrode is connected to the power supply line 6407, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. Has been done. The second electrode of the light emitting element 6404 corresponds to the common electrode 6408. The common electrode 6408 is electrically connected to a common potential line formed on the same substrate.

0243A low power potential is set for the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a potential that satisfies the low power supply potential &lt;high power supply potential with reference to the high power supply potential set in the power supply line 6407, and for example, GND, 0V, etc. are set as the low power supply potential. Is also good. Since the potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404 and a current is passed through the light emitting element 6404 to cause the light emitting element 6404 to emit light, the potential difference between the high power supply potential and the low power supply potential is the light emitting element 6404. Set each potential so that it is equal to or higher than the forward threshold voltage of.

0244The capacitive element 6403 can be omitted by substituting the gate capacitance of the driving transistor 6402. Regarding the gate capacitance of the drive transistor 6402, a capacitance may be formed between the channel forming region and the gate electrode.

0245Here, in the case of the voltage input voltage drive method, a video signal is input to the gate electrode of the drive transistor 6402 so that the drive transistor 6402 is in two states of being sufficiently turned on and off. .. That is, the drive transistor 6402 operates in the linear region. Since the drive transistor 6402 operates in the linear region, a voltage higher than the voltage of the power supply line 6407 is applied to the gate electrode of the drive transistor 6402. A voltage equal to or higher than (power supply line voltage + Vth of drive transistor 6402) is applied to the signal line 6405.

0246Further, when analog gradation drive is performed instead of digital time gradation drive, the same pixel configuration as in FIG. 15 (C) can be used by different signal inputs.

0247When performing analog gradation drive, a forward voltage of the light emitting element 6404 + a voltage equal to or higher than Vth of the drive transistor 6402 is applied to the gate electrode of the drive transistor 6402. The forward voltage of the light emitting element 6404 refers to a voltage at which a desired brightness is obtained, and includes at least a forward threshold voltage. By inputting a video signal such that the drive transistor 6402 operates in the saturation region, a current can be passed through the light emitting element 6404. In order to operate the drive transistor 6402 in the saturation region, the potential of the power supply line 6407 is made higher than the gate potential of the drive transistor 6402. By making the video signal analog, an analog gradation drive can be performed by passing a current corresponding to the video signal through the light emitting element 6404.

0248The pixel configuration shown in FIG. 15C is not limited to this. For example, a switch, a resistance element, a capacitance element, a sensor, a transistor, a logic circuit, or the like may be newly added to the pixels shown in FIG. 15 (C).

0249(Embodiment 10) The semiconductor device disclosed in the present specification can be applied to various electronic devices (including gaming machines). Examples of electronic devices include television devices (also referred to as televisions or television receivers), monitors for computers, digital cameras, cameras such as digital video cameras, digital photo frames, and mobile phones (mobile phones, mobile phones). (Also called a device), a portable game machine, a mobile information terminal, a sound reproduction device, a large game machine such as a pachinko machine, and the like. An example of an electronic device including the semiconductor device described in the above embodiment will be described.

0250FIG. 16A is a portable information terminal, which is composed of a main body 3001, a housing 3002, display units 3003a, 3003b, and the like. The display unit 3003b is a touch panel, and screen operations and character input can be performed by touching the keyboard button 3004 displayed on the display unit 3003b. Of course, the display unit 3003a may be configured as a touch panel. By manufacturing a liquid crystal panel or an organic light emitting panel using the transistor shown in the first embodiment as a switching element and applying it to the display units 3003a and 3003b, a highly reliable portable information terminal can be obtained.

0251FIG. 16A shows a function for displaying various information (still images, moving images, text images, etc.), a function for displaying a calendar, a date or time, etc. on the display unit, and operating or editing the information displayed on the display unit. It can have a function, a function of controlling processing by various software (programs), and the like. Further, the back surface or the side surface of the housing may be provided with an external connection terminal (earphone terminal, USB terminal, etc.), a recording medium insertion portion, or the like.

0252Further, the portable information terminal shown in FIG. 16A may be configured to be able to transmit and receive information wirelessly. It is also possible to purchase and download desired book data or the like from an electronic book server wirelessly.

0253FIG. 16B shows a portable music player, and the main body 3021 is provided with a display unit 3023, a fixed unit 3022 for attaching to the ear, a speaker, an operation button 3024, an external memory slot 3025, and the like. By manufacturing a liquid crystal panel or an organic light emitting panel using the transistor shown in the first embodiment as a switching element and applying it to the display unit 3023, a more reliable portable music player can be obtained.

0254Furthermore, if the portable music player shown in Fig. 16 (B) is equipped with an antenna, microphone function, and wireless function and is linked with a mobile phone, wireless hands-free conversation is possible while driving a passenger car or the like.

0255FIG. 16C shows a mobile phone, which is composed of two housings, a housing 2800 and a housing 2801. The housing 2801 is equipped with a display panel 2802, a speaker 2803, a microphone 2804, a pointing device 2806, a camera lens 2807, an external connection terminal 2808, and the like. In addition, the housing 2800 is equipped with a solar cell 2810 for charging a portable information terminal, an external memory slot 2811, and the like. In addition, the antenna is built in the housing 2801. By applying the transistor shown in the first embodiment to the display panel 2802, a highly reliable mobile phone can be obtained.

0256In addition, the display panel 2802 is provided with a touch panel, and in FIG. 16C, a plurality of operation keys 2805 displayed as images are shown by dotted lines. A booster circuit for boosting the voltage output by the solar cell 2810 to the voltage required for each circuit is also mounted.

0257For example, a power transistor used in a power supply circuit such as a booster circuit can also be formed by setting the thickness of the crystalline oxide semiconductor film 59 of the transistor 120 shown in the first embodiment to 2 μm or more and 50 μm or less.

0258The display direction of the display panel 2802 changes as appropriate according to the usage pattern. In addition, since the camera lens 2807 is provided on the same surface as the display panel 2802, videophone calls are possible. The speaker 2803 and the microphone 2804 are capable of videophone, recording, playback, etc., as well as voice calls. Further, the housing 2800 and the housing 2801 can be slid and changed from the unfolded state as shown in FIG. 16C to the overlapping state, and can be miniaturized to be suitable for carrying.

0259The external connection terminal 2808 can be connected to various cables such as an AC adapter and a USB cable, and can be charged and data communication with a personal computer or the like is possible. Further, a recording medium can be inserted into the external memory slot 2811 to support storage and movement of a larger amount of data.

0260Further, in addition to the above functions, an infrared communication function, a television reception function, and the like may be provided.

0261FIG. 16 (D) shows an example of a television device. In the television device 9600, the display unit 9603 is incorporated in the housing 9601. The display unit 9603 makes it possible to display an image. In addition, here, the configuration in which the housing 9601 is supported by the stand 9605 with a built-in CPU is shown. By applying the transistor shown in the first embodiment to the display unit 9603, a highly reliable television device 9600 can be obtained.

0262The operation of the television device 9600 can be performed by the operation switch provided in the housing 9601 or a separate remote control operation device. Further, the remote controller operating device may be provided with a display unit for displaying information output from the remote controller operating device.

0263The television device 9600 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts, and by connecting to a wired or wireless communication network via a modem, it can be unidirectional (sender to receiver) or bidirectional (sender and receiver). It is also possible to perform information communication between (or between recipients, etc.).

0264In addition, the television device 9600 is provided with an external connection terminal 9604, a storage medium playback / recording unit 9602, and an external memory slot. The external connection terminal 9604 can be connected to various cables such as a USB cable, and data communication with a personal computer or the like is possible. The storage medium reproduction recording unit 9602 can insert a disc-shaped recording medium, read data stored in the recording medium, and write data to the recording medium. It is also possible to display images and videos stored in the external memory 9606 inserted in the external memory slot on the display unit 9603.

0265Further, by applying the semiconductor device shown in the eighth embodiment to the external memory 9606 or the CPU, it is possible to obtain a highly reliable television device 9600 in which the power consumption is sufficiently reduced.

026611 Board supply room 13 Transport room 14 cassette port 15 Substrate heating chamber 31 Processing room 33 Exhaust means 35 Gas supply means 37 Power supply 40 Board support 41 Target 43 ions 51 board 53 Oxide insulating film 55 Crystalline oxide semiconductor film 57 Crystalline oxide semiconductor film 59 Crystalline oxide semiconductor film 61 Electrodes 63 Gate insulating film 65 Gate electrode 69 Insulation film 71 electrodes 73 Crystalline oxide semiconductor film 75 Crystalline oxide semiconductor film 77 Gate insulating film 79 Gate electrode 81 Insulating film 83 Wiring 84 buffer 85 buffer 87 buffer 91 Gate electrode 93 Gate insulating film 95 Crystalline oxide semiconductor film 99 Crystalline oxide semiconductor film 101 electrode 103 Insulating film 105 electrodes 107 Crystalline oxide semiconductor film 109 Crystalline oxide semiconductor film 10a Sputtering equipment 10b sputtering equipment 10c sputtering equipment 110 Protective insulating film 111 Protective film 113 Backgate electrode 115 Insulation film 120 transistors 128 interlayer insulating film 12a Road lock room 200 board 206 element separation insulating film 208 Gate insulating film 210 Gate electrode 214 Impurity area 216 channel formation region 218 sidewall insulating film 220 High concentration impurity region 224 Metal compound area 226 Interlayer insulating film 248 electrode 260 transistor 265 Capacitive element 55a seed crystal 55b Crystalline oxide semiconductor film 602 Gate wiring 603 Gate wiring 616 Source or drain electrode 628 transistor 629 transistor 651 Liquid crystal element 652 Liquid crystal element 690 Capacitive wiring 230a Source or drain electrode 230b Source or drain electrode 242a wiring 242b wiring 2800 housing 2801 housing 2802 display panel 2803 speaker 2804 Microphone 2805 Operation keys 2806 Pointing device 2807 Camera lens 2808 External connection terminal 2810 solar cell 2811 External memory slot 3001 body 3002 housing 3004 keyboard buttons 3021 body 3022 Fixed part 3023 Display 3024 Operation buttons 3025 External memory slot 5300 board 5301 Pixel part 5302 Scan line drive circuit 5303 Scan line drive circuit 5304 Signal line drive circuit 6400 pixels 6401 Switching transistor 6402 Drive transistor 6403 Capacitive element 6404 Light emitting element 6405 signal line 6406 scan line 6407 Power line 6408 Common electrode 9600 television device 9601 Housing 9602 Storage medium playback recording unit 9603 Display 9604 External connection terminal 9605 stand 9606 external memory 3003a Display 3003b Display