Display device and semiconductor integrated circuit device

The present invention relates to a display device, and more particularly to a technique effective for being applied to a COG (Chip On Glass) type display device.

As one of the display devices, for example, a TFT (Thin Film Transistor) type liquid crystal display device is known. This TFT type liquid crystal display device is widely used as a display unit of various electronic devices, and mainly controls a liquid crystal display panel capable of arbitrarily displaying characters and images and the liquid crystal display panel. It is equipped with a semiconductor chip (semiconductor integrated circuit device) on which a circuit is mounted. Then, in such a liquid crystal display device, COG (COG) in which a bare semiconductor chip (a semiconductor chip in an unpackaged state) is directly mounted on one of the pair of substrates constituting the liquid crystal display panel. Chip On Glass) method is adopted. In this COG method, various methods have been proposed and put into practical use as mounting methods for semiconductor chips. One of them is, for example, ACF (Anisotropic Conductive). A method of mounting a semiconductor chip (ACF mounting) using an anisotropic conductive film called Film) is known. In this ACF mounting, a bump connection portion (connection land, connection pad, connection terminal) consisting of a part of wiring formed on one of the pair of substrates constituting the liquid crystal display panel, and a semiconductor The bumps formed on the circuit forming surface (main surface) of the chip are electrically and mechanically connected by the anisotropic conductive film. As the anisotropic conductive film, for example, a sheet having an epoxy-based thermosetting insulating resin and a large number of conductive particles is used. A COG type liquid crystal display device using ACF is described in, for example, Patent Document 1 below.

<p><patcit num="1"><text>Japanese Unexamined Patent Publication No. 2002-258317</text></patcit></p>

<p> By the way, in ACF mounting, the semiconductor chip is heated on the back surface side facing the circuit forming surface while heating with an anisotropic conductive film interposed between one substrate of the liquid crystal display panel and the circuit forming surface of the semiconductor chip. Conductive particles in the anisotropic conductive film between the bump connection part (connection land, connection pad, connection terminal) consisting of a part of the wiring of the board and the bump of the semiconductor chip. By sandwiching the two (bump connection part of the substrate / bump of the semiconductor chip), they are electrically and mechanically connected. Here, since the peeling of the semiconductor chip greatly affects the reliability of the liquid crystal display device, it is necessary to stabilize the adhesion and fixing of the semiconductor chip by the anisotropic conductive film so that the semiconductor chip is not peeled from the substrate. Therefore, as a result of studying the conventional ACF mounting, the present inventor warps (deforms) the semiconductor chip when crimping the semiconductor chip with a crimping tool, and the stress caused by this warp causes the semiconductor chip to peel off from the substrate. We have found that problems are more likely to occur. This defect will be described in detail together with an example to which the present invention is applied. The present invention has been made to solve the problems of the prior art, and an object of the present invention is to provide a technique capable of improving the mounting reliability of a semiconductor chip. The above and other objects and novel features of the present invention will be made clear by the description and accompanying drawings herein.</p>

<p> A brief description of typical inventions disclosed in the present application is as follows. (1) A display device including a display panel and a rectangular semiconductor chip mounted on a substrate constituting the display panel with an anisotropic conductive film interposed therebetween, wherein the semiconductor chip is different from the above. A first bump group consisting of a plurality of first bumps arranged along one of the two long sides located on opposite sides of each other on the surface on the side of the rectangular conductive film, and the two long sides. The extension direction of the long side between the second bump group consisting of a plurality of second bumps arranged along the other long side of the first bump group and the second bump group. It has a dummy bump group composed of a plurality of dummy bumps arranged along the same direction as the above. (2) In (1), at least a part of each of the plurality of dummy bumps overlaps with the center line in the long side direction of the semiconductor chip. (3) In (1), the semiconductor chip has a circuit for driving and controlling the display panel, and the plurality of first bumps and the plurality of second bumps are bumps that are electrically connected to the circuit. And the bumps that are not electrically connected to the circuit, and the plurality of dummy bumps are not electrically connected to the circuit. (4) In (1), the arrangement pitch of the dummy bumps is larger than the arrangement pitch of the first bumps and the second bumps. (5) In (1), the number of the dummy bumps is smaller than the number of the first bumps and the second bumps. (6) In (1), the substrate constituting the display panel has a plurality of electrode pads in a region where the semiconductor chip is mounted, and the electrode pads face the first bump and the second bump. It is arranged at each position and is not arranged at a position facing the dummy bump. (7) In (1), alignment marks are provided at both ends of the first bump group.</p><p>(8) A display device including a display panel and a rectangular semiconductor chip mounted on a substrate constituting the display panel with an anisotropic conductive film interposed therebetween. A first bump group consisting of a plurality of first bumps arranged along one long side of two long sides located on opposite sides to each other on the surface on the sex conductive film side, and the two long sides. A second bump group consisting of a plurality of second bumps arranged along the other long side of the other, and a plurality of a plurality of second bumps arranged along the short side of one of the two short sides located on opposite sides of each other. It has a first dummy bump group composed of a first dummy bump and a second dummy bump group composed of a second dummy bump arranged along the other short side of the two short sides. (9) In (8), the semiconductor chip has a circuit for driving and controlling the display panel, and the plurality of first bumps and the plurality of second bumps are bumps that are electrically connected to the circuit. And the bumps that are not electrically connected to the circuit, and the plurality of first dummy bumps and the plurality of second dummy bumps are not electrically connected to the circuit. (10) In (8), the arrangement pitch of the first dummy bump and the second dummy bump is larger than the arrangement pitch of the first bump and the second bump, or (11) In (8), the number of the first dummy bump and the second dummy bump is smaller than the number of the first dummy bump and the second dummy bump. (12) In (11), the number of the first dummy bump and the second dummy bump is 3 or 5. (13) In (8), the substrate constituting the display panel has a plurality of electrode pads in a region where the semiconductor chip is mounted, and the electrode pads face the first bump and the second bump. It is arranged at each position and is not arranged at a position facing the first dummy bump and the second dummy bump. (14) In (8), alignment marks are provided at both ends of the first bump group.</p><p>(15) A rectangular semiconductor integrated circuit device having a circuit for driving and controlling a display panel and mounted on a substrate constituting the display panel with an anisotropic conductive film interposed therebetween. A first bump group consisting of a plurality of first bumps arranged along one long side of two long sides located on opposite sides to each other on the surface on the conductive film side, and one of the two long sides. A second bump group consisting of a plurality of second bumps arranged along the other long side of the above, and between the first bump group and the second bump group, which is the same as the extending direction of the long side. It has a dummy bump group composed of a plurality of dummy bumps arranged along the direction. (16) A rectangular semiconductor integrated circuit device having a circuit for driving and controlling a display panel and mounted on a substrate constituting the display panel with an anisotropic conductive film interposed therebetween. A first bump group consisting of a plurality of first bumps arranged along one long side of two long sides located on opposite sides to each other on the surface on the conductive film side, and one of the two long sides. A second bump group consisting of a plurality of second bumps arranged along the other long side of the, and a plurality of second bumps arranged along one of the two short sides located on opposite sides of each other. It has a first dummy bump group composed of one dummy bump and a second dummy bump group composed of a second dummy bump arranged along the other short side of the two short sides.</p>

<p> A brief description of the effects obtained by representative of the inventions disclosed in the present application is as follows. According to the present invention, it is possible to improve the mounting reliability of a semiconductor chip (semiconductor integrated circuit device).</p>

<figref num="1">It is a top view which shows the liquid crystal display panel of the liquid crystal display device which is one Example of this invention.</figref><figref num="2">It is sectional drawing which shows the cross-sectional structure along the 1x-1x'line of FIG.</figref><figref num="3">It is a top view which shows the bump arrangement of the semiconductor chip shown in FIG.</figref><figref num="4">It is a perspective view for demonstrating the chip mounting process in the manufacturing process of the liquid crystal display device which is one Example of this invention.</figref><figref num="5">FIG. 5 is a diagram showing a state in which a semiconductor chip is arranged on a substrate with an anisotropic conductive film interposed therebetween in a chip mounting process during a manufacturing process of a liquid crystal display device according to an embodiment of the present invention. ) Is a cross-sectional view showing a cross-sectional structure along the a-a'line of FIG. 4, and FIG. 4 (b) is a cross-sectional view showing the cross-sectional structure along the b-b'line of FIG.</figref><figref num="6">It is a figure which shows the state which the semiconductor chip was crimped by the crimping tool in the chip mounting process in the manufacturing process of the liquid crystal display apparatus which is one Example of this invention, and FIG. FIG. 6B is a cross-sectional view showing a cross-sectional structure along the line b-b'in FIG. 4, and FIG. 4B is a cross-sectional view showing the cross-sectional structure along the line b-b'of FIG.</figref><figref num="7">It is a top view which shows the bump arrangement of the semiconductor chip which is the 1st modification of one Example of this invention.</figref><figref num="8">It is a top view which shows the bump arrangement of the semiconductor chip which is the 2nd modification of one Example of this invention.</figref><figref num="9">It is a top view which shows the bump arrangement of the semiconductor chip which is the 3rd modification of one Example of this invention.</figref><figref num="10">It is a top view which shows the bump arrangement of the semiconductor chip which is the 4th modification of one Example of this invention.</figref><figref num="11">It is a top view which shows the bump arrangement of the semiconductor chip incorporated in the conventional liquid crystal display device.</figref><figref num="12">It is a figure for demonstrating the problem of the conventional liquid crystal display device, and is the cross-sectional view which shows the cross-sectional structure along the a-a'line of FIG. A cross-sectional view showing a crimped state, and FIG. 6B is a cross-sectional view showing a stress state after chip mounting.</figref><figref num="13">It is a figure for demonstrating the problem of the conventional liquid crystal display device, and is the cross-sectional view which shows the cross-sectional structure along the b-b'line of FIG. A cross-sectional view showing a crimped state, and FIG. 3B is a cross-sectional view showing a stress state after chip mounting).</figref>

Hereinafter, examples of the present invention will be described in detail with reference to the drawings. In all the drawings for explaining the examples, those having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted. In addition, the following examples are not intended to limit the interpretation of the scope of claims of the present invention. In the following examples, an example in which the present invention is applied to a liquid crystal display device used as a display unit of a mobile phone will be described.

1 to 6 are views relating to a liquid crystal display device according to an embodiment of the present invention. FIG. 1 is a plan view showing a liquid crystal display panel of a liquid crystal display device. FIG. 2 is a cross-sectional view showing the cross-sectional structure along the 1x-1x'line of FIG. FIG. 3 is a plan view showing the bump arrangement of the semiconductor chip shown in FIG. FIG. 4 is a perspective view for explaining a chip mounting process during the manufacturing process of the liquid crystal display device. FIG. 5 is a diagram showing a state in which a semiconductor chip is arranged on a substrate with an anisotropic conductive film interposed therebetween in a chip mounting process during a manufacturing process of a liquid crystal display device, and FIG. Sectional view showing the cross-sectional structure along the line a-a', FIG. 4 (b) is the cross-sectional view showing the cross-sectional structure along the line b-b'of FIG. FIG. 6 is a diagram showing a state in which a semiconductor chip is crimped with a crimping tool in a chip mounting process during a manufacturing process of a liquid crystal display device according to an embodiment of the present invention, and FIG. 6A is a diagram of FIG. 4a. A cross-sectional view showing a cross-sectional structure along the -a'line, and FIG. 4B is a cross-sectional view showing the cross-sectional structure along the b-b'line of FIG.

In the liquid crystal display device of the present embodiment, a semiconductor chip (driver element; semiconductor integrated circuit device) in which a circuit for driving and controlling the liquid crystal display panel is mounted on one of a pair of substrates constituting the liquid crystal display panel is bare. It is a COG type liquid crystal display device that is directly mounted in the state of. As shown in FIGS. 1 and 2, the liquid crystal display device of this embodiment includes a liquid crystal display panel 1 and a semiconductor chip 10 on which a circuit for driving and controlling the liquid crystal display panel 1 is mounted. Further, in the liquid crystal display device of this embodiment, the flexible wiring substrate (FPC) 8 connected to the liquid crystal display panel 1 and the illustration are omitted for the sake of easy viewing of the drawings, but the observer side of the liquid crystal display panel 1 is shown. It is equipped with a backlight arranged on the opposite side of the screen and a frame for accommodating the liquid crystal display panel 1 together with the backlight.

The liquid crystal display panel 1 has a first substrate 2 (hereinafter referred to as a TFT substrate) on which a pixel electrode, a thin film transistor, etc. are formed and a flat surface is formed in a rectangular shape, and a color filter or the like is formed, and the flat surface is a TFT. A second substrate 3 (hereinafter referred to as a CF substrate) formed in a rectangular shape having a size smaller than that of the substrate 2, a display area 4 arranged at a position where the TFT substrate 2 and the CF substrate 3 overlap, and this Enclosed in the area surrounded by the sealing material 5 arranged between the TFT substrate 2 and the CF substrate 3 so as to surround the display area 4 and the sealing material 5 between the TFT substrate 2 and the CF substrate 3. It has a sealed liquid crystal layer 6. The TFT substrate 2 and the CF substrate 3 are bonded to each other by the sealing material 5 and are bonded and fixed to each other. A plurality of pixels are arranged in a matrix in the display area 4, and each of the plurality of pixels has a pixel electrode and a counter electrode. Although not shown, polarizing plates are attached to the surface of the TFT substrate 2 opposite to the liquid crystal layer side surface and the surface of the CF substrate 3 opposite to the liquid crystal layer side surface, respectively. There is.

As the TFT substrate 2 and the CF substrate 3, for example, a glass substrate is used. As the sealing material 5, a thermosetting epoxy resin material is used. The liquid crystal display panel 1 of this embodiment has a liquid crystal injection port 7 provided in a part of the sealing material 5, and a liquid crystal for closing the liquid crystal injection port 7 is omitted for the sake of easy viewing of the drawing. It has a sealing material. Here, the liquid crystal display panel 1 of this embodiment is an IPS type liquid crystal display panel, and in the case of this IPS (In Plane Switching) method, the counter electrode is provided on the TFT substrate 2 side together with the pixel electrode, but the TN method. In the case of a liquid crystal display panel of the or VA system, the counter electrode is provided on the CF substrate 3 side unlike the pixel electrode. The TFT substrate 2 is formed of, for example, a rectangle having a long side and a short side. The TFT substrate 2 has two short sides and two long sides, and further has a non-overlapping region 2 m that does not overlap with the CF substrate 3 on one short side. The semiconductor chip 10 is mounted in the non-superimposed region 2 m of the TFT substrate 2.

As shown in FIG. 3, the semiconductor chip 10 is formed of a rectangle whose plane has, for example, a long side and a short side. The semiconductor chip 10 has two long sides (10a, 10b) and two short sides (10c, 10d), and further, a circuit forming surface (mainly) on which a circuit for driving and controlling the liquid crystal display panel 1 is formed. It has a surface) 10sf and a back surface located on the opposite side of the circuit forming surface 10sf. As shown in FIG. 3, a plurality of semiconductor chips 10 are arranged on the circuit forming surface 10sf along one long side (10a) of two long sides (10a, 10b) located on opposite sides of each other. The bump group 11 consisting of the bumps 11B of the above, the bump group 12 consisting of a plurality of bumps 12B arranged along the other long side (10b) of the two long sides (10a, 10b), and the bump group 11 Dummy bump group 13 consisting of a plurality of dummy bumps 13DB arranged along the same direction as the extending direction of the long side (10a, 10b) between the bump group 12 and two short sides located on opposite sides to each other. A dummy bump group 14 consisting of a plurality of dummy bumps 14DB arranged along one short side (10c) of (10c, 10d) and the other short side (10d) of the two short sides (10c, 10d). ), It has a dummy bump group 15 composed of a plurality of dummy bumps 15DB.

In the dummy bump group 13, at least a part of each of the plurality of dummy bumps 13DB is out of two center lines (center line 10x in the long side direction and center line 10y in the short side direction) on the circuit forming surface 10sf of the semiconductor chip 10. It is arranged so as to overlap with the center line 10x in the long side direction (longitudinal direction) of. The arrangement pitch of the dummy bumps 13DB is larger than the arrangement pitch of the bumps 11B of the bump group 11 and the bumps 12B of the bump group 12, and the number of dummy bumps 13DB is smaller than the number of bumps 11B and 12B. In the dummy bump groups 14 and 15, the arrangement pitch of the dummy bumps 14DB and 15DB is larger than the arrangement pitch of the bumps 11B of the bump group 11 and the bumps 12B of the bump group 12, and the number of the dummy bumps 14DB and 15DB is larger than that of the bumps 11B and the bumps 12B. Less than the number. In this embodiment, five dummy bumps 14DB and five are provided. In the bump groups 11 and 12, each of the plurality of bumps 11B and the plurality of bumps 12B is electrically connected to the circuit mounted on the semiconductor chip 10. In the dummy bump group (13, 14, 15), each of the plurality of dummy bumps 13DB, the plurality of dummy bumps 14DB, and the plurality of dummy bumps 15DB is not electrically connected to the circuit mounted on the semiconductor chip 10.

Each of the bumps (11B, 12B) and dummy bumps (13DB, 14DB, 15DB) is, for example, an Au bump composed of Au, and the dummy bumps (13DB, 14DB, 15DB) are formed in the same process as, for example, bumps (11B, 12B). Has been done. The height of the dummy bumps (13DB, 14DB, 15DB) is set to be the same as the height of the bumps (11B, 12B). Here, the height of the bump means the height from the circuit forming surface 10sf of the semiconductor chip 10 to the peak of the bump. The bumps 11B of the bump group 11 are arranged in, for example, one row, and the bumps 12B of the bump group 12 are arranged, for example, in two rows. The bump group 11 is mainly composed of an input signal bump for inputting a signal and a power supply bump for a power supply, and the bump group 12 is mainly composed of an output bump for outputting a signal and a power supply bump for a power supply. ing. In the semiconductor chip 10 of this embodiment, the bump group 11 is the input side and the bump group 12 is the output side when viewed in terms of a circuit. Alignment marks AM are provided at both ends of the bump group 11, and the plurality of bumps 11B of the bump group 11 are arranged in a region sandwiched between the two alignment mark AMs.

As shown in FIG. 2, in the non-superimposed region 2 m of the TFT substrate 2, a plurality of bump connection portions 2p are arranged in the region where the semiconductor chip 10 is mounted. The plurality of bump connection portions 2p are arranged at positions facing the bumps (11B, 12B) of the semiconductor chip 10, and are not arranged at positions facing the dummy bumps (13DB, 14DB, 15DB) of the semiconductor chip 10. The bump connection portion 2p is composed of a part of the wiring formed on the TFT substrate 2, and is mainly a connection land (connection) that mediates the continuity between the circuit mounted on the semiconductor chip 10 and the wiring formed on the TFT substrate 2. Land, connection terminal).

As shown in FIG. 2, the semiconductor chip 10 has a state in which the circuit forming surface 10sf faces the non-superimposed region 2m of the TFT substrate 2, that is, a plurality of bumps (11B, 12B, 13DB, 14DB, 15DB) of the semiconductor chip 10 are present. It is mounted in the non-superimposed region 2m of the TFT board 2 in a state of facing a plurality of connection portions 2p of the TFT board 2. An anisotropic conductive film 20 called ACF, for example, is interposed between the TFT substrate 2 and the semiconductor chip 10, and the semiconductor chip 10 is transferred to the TFT substrate 2 by the adhesive force of the anisotropic conductive film 20. It is adhesively fixed to the non-superimposed area 2m. As the anisotropic conductive film 20, for example, a sheet-like material having an epoxy-based thermosetting insulating resin and a large number of conductive particles 21 is used. That is, the semiconductor chip 10 is mounted in the non-superimposed region 2 m of the TFT substrate 2 by ACF mounting in which the semiconductor chip is mounted using an anisotropic conductive film. The anisotropic conductive film 20 shown in FIG. 2 is in a state after being thermoset, and the anisotropic conductive film 20 shown in FIGS. 4 and 5 is in the form of a sheet before being thermoset.

Next, the chip mounting process during the manufacturing process of the liquid crystal display device of this embodiment will be described with reference to FIGS. 4 to 6. The semiconductor chip 10 of this embodiment is mounted on the non-superimposed region 2 m of the TFT substrate 2 by ACF mounting using the anisotropic conductive film 20. Specifically, first, as shown in FIGS. 4 and 5 (a) and 5 (b), the sheet-shaped anisotropic conductive film 20 is placed in the chip mounting region of the non-superimposed region 2 m of the TFT substrate 2. The semiconductor chip 10 is placed interveningly. In this step, the semiconductor chip 10 is arranged so that its circuit forming surface 10sf faces the non-superimposed region 2m of the TFT substrate 2. Further, the plurality of bumps (bumps 11B, bumps 12B) arranged on the circuit forming surface 10sf of the semiconductor chip 10 face the plurality of bump connection portions 2p arranged in the chip mounting area of the non-overlapping area 2m of the TFT substrate 2. Position to.

Next, as shown in FIGS. 6 (a) and 6 (b), the anisotropic conductive film 20 is located between the chip mounting region of the non-superimposed region 2 m of the TFT substrate 2 and the circuit forming surface 10 sf of the semiconductor chip 10. The semiconductor chip 10 is crimped with a crimping tool 25 from the back surface side facing the circuit forming surface 10sf while heating with the interposition of the semiconductor chip 10, and the bump connection portion arranged in the chip mounting area of the non-superimposed region 2 m of the TFT substrate 2 The conductive particles 21 in the anisotropic thin film transistor 20 are sandwiched between 2p and the bumps (11B, 12B) arranged on the circuit forming surface 10sf of the semiconductor chip 10 and crushed. Since the anisotropic conductive film 20 melts once and then cures, the pressure-bonded state of the semiconductor chip 10 is maintained until the anisotropic conductive film 20 cures. In this step, the anisotropic conductive film 20 is also formed between the chip mounting area of the non-superimposed area 2 m of the TFT substrate 2 and the dummy bumps (13DB, 14DB, 15DB) arranged on the circuit forming surface 10sf of the semiconductor chip 10. Conductive particles 21 are sandwiched. By this step, the bump connection portion 2p1 of the TFT substrate 2 and the bumps (11B, 12B) of the semiconductor chip 10 are electrically and mechanically connected, and the semiconductor chip 10 is placed in the non-superimposed region 2 m of the TFT substrate 2. It is adhesively fixed. In order to prevent the anisotropic conductive film 20 from adhering to the crimping tool 25, the crimping of the semiconductor chip 10 by the crimping tool 25 is performed as shown in FIGS. 4 and 5 ((a) and 5 (b)). A sheet 26 made of, for example, a fluororesin-based material is sandwiched between the back surface of the semiconductor chip 10 and the crimping tool 25 as an interfering material.

Next, the problems of the conventional technique and the features of this embodiment will be described. [Problems with conventional technology] FIG. 11 is a plan view showing bump arrangement of a semiconductor chip incorporated in a conventional liquid crystal display device. FIG. 12 is a diagram for explaining a problem of the conventional liquid crystal display device, and is a cross-sectional view showing a cross-sectional structure along the a-a'line of FIG. 4, and FIG. 12 (a) is a semiconductor chip. Is a cross-sectional view showing a state of being crimped with a crimping tool, and FIG. FIG. 13 is a diagram for explaining a problem of the conventional liquid crystal display device, and is a cross-sectional view showing a cross-sectional structure along the line b-b'of FIG. 4, and FIG. 13 (a) is a semiconductor chip. Is a cross-sectional view showing a state in which is crimped with a crimping tool, and FIG. 3B is a cross-sectional view showing a stress state after chip mounting. The conventional semiconductor chip 30 shown in FIG. 11 does not have dummy bump groups (13,14,15) as compared with the semiconductor chip 10 of the present embodiment shown in FIG. 3, and the other configurations are the semiconductor chip 10. Is almost the same as. In a semiconductor chip 30 equipped with a circuit for driving and controlling a liquid crystal display panel, the bump (11B) on the input side is generally the long side of one of the two long sides (10a, 10b) of the semiconductor chip 30. It is placed on the (10a) side, and the bump (12B) on the output side is often placed on the other long side (10b) of the two long sides (10a, 10b). As shown, there are regions where bumps are not arranged at both ends in the longitudinal direction and the central portion in the lateral direction of the semiconductor chip 30.

As a result of studying ACF mounting using the conventional semiconductor chip 30, when the semiconductor chip 30 is crimped with the crimping tool 25, the semiconductor chip 30 is warped (deformed), and the stress caused by this warp is generated. As a result, it was found that problems such as the semiconductor chip 30 being peeled off from the TFT substrate 2 are likely to occur. According to the study by the present inventor, there are roughly two types of warpage generated in the semiconductor chip 30. The first warp is a warp (A1) in which both ends of the semiconductor chip 30 in the longitudinal direction bend downward, as shown in FIG. 12 (a). The second warp is a warp (B1) in which the central portion of the semiconductor chip 30 in the lateral direction bends downward, as shown in FIG. 13 (a). Since both of the warpages (A1) and (B1) occur in the region without bumps (11B, 12B), the pressing force when the semiconductor chip 30 is crimped with the crimping tool 25 escapes to the region without bumps. I think it is due to that.

In the ACF mounting, since the anisotropic conductive film 20 is once melted and then the crimping of the semiconductor chip 30 by the crimping tool 25 is held until it is cured, the semiconductor chip 30 is in a state where the warp (A1) and (B1) remain. It is adhesively fixed to the TFT substrate 2 with. As shown in FIG. 12 (b), the warp (A1) remaining on the semiconductor chip 30 becomes a peeling stress (A2) that attempts to peel the semiconductor chip 30 from the TFT substrate 2 in the direction of the arrow (upward), and also The warp (B1) remaining on the semiconductor chip 30 also becomes a peeling stress (B2) that attempts to peel the semiconductor chip 30 from the TFT substrate 2 in the direction of the arrow (upward), as shown in FIG. 13 (b). Since these peeling stresses (A2) and (B2) are constantly applied to the semiconductor chip 30 after mounting, contamination of the interface 20a between the anisotropic conductive film 20 and the semiconductor chip 30 and the anisotropic conductive film 20 are caused. When the adhesive force due to the anisotropic conductive film 20 is reduced due to contamination of the interface 20b between the and the TFT substrate 2, problems such as peeling of the semiconductor chip 30 from the TFT substrate 2 are likely to occur. When the semiconductor chip 30 is peeled off, the liquid crystal display panel 1 and the bumps (11B, 12B) of the semiconductor chip 30 are connected and opened, resulting in functional defects such as line defects and display abnormalities. Further, the peeling of the semiconductor chip 30 may occur not only immediately after mounting but also after a long period of time, which is a defect related to reliability. In recent years, as the liquid crystal display panel 1 has become thinner, the semiconductor chip 10 itself has become thinner due to polishing of the semiconductor substrate that is the base material thereof, and the semiconductor chip 10 itself is easily deformed due to a decrease in strength.

[Features of this example] Therefore, in the semiconductor chip 10 of this embodiment, dummy bumps (13DB, 14DB, 15DB) are arranged in a region where the bumps (11B, 12B) are not conventionally arranged. That is, as shown in FIG. 3, the semiconductor chip 10 of this embodiment is on one of the two long sides (10a, 10b) located on the opposite sides of the circuit forming surface 10sf (10a). A first bump group 11 consisting of a plurality of first bumps 11B arranged along the line, and a plurality of second bumps arranged along the other long side (10b) of the two long sides (10a, 10b). A plurality of dummy bumps arranged along the same direction as the extending direction of the long side (10a, 10b) between the second bump group 12 consisting of 12B and the first bump group 11 and the second bump group 12. A dummy bump group 13 composed of 13 DBs, a dummy bump group 14 composed of a plurality of dummy bumps 14 DB arranged along one short side (10c) of two short sides (10c, 10d) located on opposite sides, and a dummy bump group 14 It has a dummy bump group 15 composed of a plurality of dummy bumps 15DB arranged along the other short side (10d) of the two short sides (10c, 10d).

By arranging the dummy bumps (13DB, 14DB, 15DB) in this way, at one end (short side 10c side) of both ends in the longitudinal direction of the semiconductor chip 10, as shown in FIG. 6A. , The pressing force when the semiconductor chip 10 is crimped with the crimping tool 25 can be received by the dummy bump 14DB, and the other end (short side 10d side) is not shown, but is the same as one end. Since the dummy bump (15DB) can receive the pressing force when the semiconductor chip 10 is crimped with the crimping tool 25, both ends of the semiconductor chip 10 in the longitudinal direction are suppressed from bending downward (A1). be able to. Further, in the central portion of the semiconductor chip 10 in the lateral direction, as shown in FIG. 6 (b), the pressing force when the semiconductor chip 10 is crimped by the crimping tool 25 can be received by the dummy bump 13DB, so that the semiconductor It is possible to suppress the warp (B1) in which the central portion of the chip 10 in the lateral direction bends downward. As a result, it is possible to suppress the occurrence of a problem that the semiconductor chip 10 is peeled off from the TFT substrate 2 due to the stress caused by the warp generated in the semiconductor chip 10 due to the pressing force when the semiconductor chip 10 is crimped by the crimping tool 25. , The mounting reliability of the semiconductor chip 10 can be improved.

In this embodiment, the warp generated in the semiconductor chip 10 due to the pressing force when the semiconductor chip 10 is crimped by the crimping tool 25 is suppressed by dummy bumps (13DB, 14DB, 15DB), but the warp of the semiconductor chip 10 is suppressed. Since suppression affects the height of dummy bumps (13DB, 14DB, 15DB), the height of dummy bumps (13DB, 14DB, 15DB) is as much as possible along the long sides (10a, 10b) of the semiconductor chip 10. It is desirable to make it equal to the height of (11B, 12B). The width and length of the semiconductor chip 10 vary depending on the size and display performance of the liquid crystal display panel 1. Therefore, the number of dummy bumps 14DB of the dummy bump group 14 and the number of dummy bumps 15DB of the dummy bump group 15 are set according to the width of the semiconductor chip 10 in the lateral direction, and the number of dummy bumps 13DB of the dummy bump group 13 is set in the longitudinal direction of the semiconductor chip 10. It is desirable to set according to the length of. Some semiconductor chips 10 have a width of 1.5 mm to 0.6 m. In this embodiment, since the width of the semiconductor chip 10 is 1.5 m, five dummy bumps 14DB of the dummy bump group 14 and five dummy bumps 15DB of the dummy bump group 15 are provided. When the width of the semiconductor chip 10 is 0.6 m, it is desirable to provide three each.

At least the short sides (10c, 10d) are required to effectively suppress the warpage (A1) in which both ends of the semiconductor chip 10 in the longitudinal direction bend downward due to the pressing force when the semiconductor chip 10 is crimped with the crimping tool 25. A total of three or more dummy bumps are required, one near the center of the and one near both ends (corners) of the short sides (10c, 10d). Further, even when the warp (B1) in which the central portion in the lateral direction of the semiconductor chip 10 is bent downward due to the pressing force when the semiconductor chip 10 is crimped by the crimping tool 25 is effectively suppressed, at least the semiconductor chip 10 A total of 3 or more dummy bumps are required, one near the center of the longitudinal centerline 1x and one near both ends of the longitudinal centerline 1x (near the short side (10c, 10d) side). .. In this embodiment, as shown in FIG. 2, an example in which the bump connection portion 2p is not arranged at a position facing the dummy bumps (13DB, 14DB, 15DB) of the semiconductor chip 10 in the non-superimposition region 2m of the TFT substrate 2 will be described. However, as with the bumps (11B, 12B), the bump connection may be placed at a position facing the dummy bumps (13DB, 14DB, 15DB). However, in this case, it is necessary to newly create the TFT substrate 2 according to the arrangement of the dummy bumps of the semiconductor chip 10. On the other hand, in this embodiment, since the bump connection portion for the dummy bumps (13DB, 14DB, 15DB) of the semiconductor chip 10 is not provided, it is not necessary to newly create the TFT substrate 2, and the cost can be reduced. Can be done. In this embodiment, bumps (11B, 12B) and dummy bumps (13DB, 14DB, 15DB) are formed in the same process. By forming in the same process in this way, the number of manufacturing processes can be simplified and the cost can be reduced.

Next, a modified example of this embodiment will be described. [First modification] FIG. 7 is a plan view showing the bump arrangement of the semiconductor chip, which is the first modification of the embodiment of the present invention. In the above-described embodiment, as shown in FIG. 3, a semiconductor chip 10 having a dummy bump group 13, a dummy bump group 14, and a dummy bump group 15 has been described as dummy bumps, but the semiconductor chip 10L of this modification is shown in FIG. As shown in 7, only the dummy bump group 13 is provided as the dummy bump. In this case, it is possible to suppress the warp (B1) in which the central portion of the semiconductor chip 10L in the lateral direction bends downward due to the pressing force when the semiconductor chip 10L is crimped with the crimping tool 25.

[Second variant] FIG. 8 is a plan view showing the bump arrangement of the semiconductor chip, which is a second modification of the embodiment of the present invention. In the first modification described above, as shown in FIG. 7, a semiconductor chip 10L having only a dummy bump group 13 as a dummy bump has been described. However, the semiconductor chip 10M of this modification has a dummy bump group 14 and a dummy bump group as dummy bumps. Has only 15. In this case, it is possible to suppress the warp (A1) in which both ends of the semiconductor chip 10M in the longitudinal direction bend downward due to the pressing force when the semiconductor chip 10M is crimped with the crimping tool 25.

[Third variant] FIG. 9 is a plan view showing the bump arrangement of the semiconductor chip, which is a third modification of the embodiment of the present invention. A driver chip equipped with a circuit for driving and controlling a liquid crystal display panel may include dummy bumps in the bump group that are not electrically connected to the circuit. The semiconductor chip 10N of the present modification shown in FIG. 9 has bumps 11B electrically connected to the circuit of the semiconductor chip 10N and electrically connected to the circuit among the plurality of bumps constituting the bump group 11. There is no dummy bump 11DB, and among the plurality of bumps that make up the bump group 12, the bump 12B that is electrically connected to the circuit of the semiconductor chip 10 and the dummy bump 12DB that is not electrically connected to the circuit are included. include. As shown in FIG. 9, the semiconductor chip 10N also has dummy bump groups 13, 14 and 15 as dummy bumps, as in the semiconductor chip 10 of the above-described embodiment. Further, the present invention is not limited to this configuration, and the dummy bump may be configured to have only the dummy bump group 13 as in the first modification shown in FIG. 7, and the dummy bump may be a dummy bump as in the second modification shown in FIG. It may be configured to have only groups 14 and 15.

[Fourth variant] FIG. 10 is a plan view showing the bump arrangement of the semiconductor chip, which is the fourth modification of the embodiment of the present invention. In the above-described embodiment, as shown in FIG. 3, a case where one bump group 11 composed of a plurality of bumps 11B arranged along the other long side 10b of the semiconductor chip 10 is one has been described. The semiconductor chip 10P divides one bump group 11 into a plurality of bump groups, that is, has a plurality of bump groups 11. As shown in FIG. 9, the semiconductor chip 10P also has dummy bump groups 13, 14 and 15 as dummy bumps, as in the semiconductor chip 10 of the above-described embodiment. Further, the present invention is not limited to this configuration, and the dummy bump may be configured to have only the dummy bump group 13 as in the first modification shown in FIG. 7, and the dummy bump may be a dummy bump as in the second modification shown in FIG. It may be configured to have only groups 14 and 15.

In the above description, an embodiment in which the present invention is applied to a liquid crystal display device used as a display unit of a mobile phone has been described, but the present invention is not limited to this, for example, an in-vehicle electronic device. It can also be applied to all display devices such as liquid crystal display devices used as display units for digital steel cameras (DSCs) and organic EL display devices. Although the invention made by the present inventor has been specifically described above based on the above-mentioned Examples, the present invention is not limited to the above-mentioned Examples and can be variously modified without departing from the gist thereof. Of course.

1 ... LCD panel 2 ... TFT board (first board) 2m ... non-superimposed area 2p ... bump connection 3 ... CF board (second board) 4 ... Display area 5 ... Sealing material 6 ... LCD layer 7 ... LCD inlet 8 ... Flexible Wiring Board (FPC) 10,10L, 10M, 10N, 10P ... Semiconductor chip 10a, 10b, 10c, 10d ... sides 10sf ... main face 11,12 ... Bumps 11B, 12B ... Bump 11DB, 12DB ... Dummy bump 13,14,15 ... Dummy bumps 13DB, 14DB, 15DB ... Dummy bump 20 ... anisotropic conductive film 21 ... Conductive particles 20a, 20b ... interface 25 ... crimping tool 26 ... sheet 30 ... Semiconductor chip