Field effect transistor

The present invention relates to a field-effect transistor, and more particularly to a field-effect transistor in which a film made of an amorphous oxide is used as a gate insulating layer and can be applied to a display device or the like.

A field effect transistor (FET) is a three-terminal element including a gate electrode, a source electrode, and a drain electrode.

It is an electronic active element that applies a voltage to the gate electrode, controls the current flowing through the channel layer, and switches the current between the source electrode and the drain electrode.

In particular, a FET that uses a thin film formed on an insulating substrate such as ceramics, glass, or plastic as a channel layer is called a thin film FET (Thin Film Transistor, TFT).

Since the above-mentioned TFT uses a thin film technology, it has an advantage that it can be easily formed on a substrate having a relatively large area, and is widely used as a driving element for a flat panel display element such as a liquid crystal display element. There is.

That is, in the active liquid crystal display element (ALCD), individual image pixels are turned on and off by using a TFT created on a glass substrate.

In addition, in future high-performance organic LED displays (OLEDs), current driving of pixels by TFT is considered to be effective.

Further, a higher-performance liquid crystal display device in which a TFT circuit having a function of driving and controlling the entire image is formed on a substrate around an image display area has been realized.

Currently, the most widely used TFT is the Metal-Insulator-Semiconductor Field Transistor (MIS-FET) element. It uses a polycrystalline silicon film or an amorphous silicon film as the material for the channel layer.

Recently, oxide materials have been attracting attention as materials that can be applied to the channel layer of TFTs.

For example, a TFT using a transparent conductive oxide polycrystalline thin film containing ZnO as a main component for a channel layer is being actively developed.

The thin film can be formed at a relatively low temperature, and the thin film can be formed on a substrate such as a plastic plate or a film.

However, the electron mobility cannot be increased due to scattering at the polycrystalline particle interface.

In addition, since the shape and interconnection of polycrystalline particles differ greatly depending on the film formation method, the characteristics of the TFT element vary.

Recently, a thin film transistor using an In-Ga-Zn-O-based amorphous oxide has been reported (Non-Patent Document 1).

This transistor can be made on a plastic or glass substrate at room temperature.

Furthermore, the field effect mobility is about 6-9, and the normally-off type transistor characteristics are obtained.

It also has the characteristic of being transparent to visible light.

As the gate insulating layer of the thin film transistor, SiO₂And SiN_xEtc. are generally used.

Transistors in which oxides are applied to the channel layer are also being studied using these gate insulating layers.

On the other hand, conventionally, as a transistor having a gate insulating film containing Ga as a main component, Patent Document 1 discloses a FET using GaN as a channel layer.

However, in this technique, a nitrogen compound having excellent crystallinity is applied to the channel layer.

Patent Document 2 describes LiGaO as an insulating layer in a TFT using crystalline ZnO as a channel layer.₂, (Ga1-z Alz) O₂Is disclosed to be used.

However, the insulating layer described in Patent Document 2 is a thin film having crystalline properties, and the materials are selected from the viewpoint of lattice matching between the channel layer and the insulating layer.

By the way, in a thin film transistor using an In-Ga-Zn-O-based amorphous oxide, HfO₂And Y₂O₃Attempts have been made to realize a thin film transistor having a large on-current by using a gate insulating layer having a high dielectric constant such as.<nplcit num="1"><text>K.Noumra et.al. Nature 432, 488 (2004)</text></nplcit><patcit num="1"><text>Japanese Patent Application Laid-Open No. 2005-268507</text></patcit><patcit num="2"><text>Japanese Patent Application Laid-Open No. 2003-086808</text></patcit>

<p> However, with these gate insulating layers, it has been difficult to achieve both good transistor characteristics and operational stability.</p><p> One reason is considered to be that it is difficult to create a good interface between the gate insulating layer and the channel layer in these gate insulating layers.</p><p> Here, good transistor characteristics include the fact that a large on-current and a small off-current can be obtained.</p><p> It can also be mentioned that the electric field effect mobility is large and that it is normally off.</p><p> The operation stability includes a small hysteresis, stability with respect to elapsed time, stability with respect to drive history, stability with respect to environmental changes, and the like.</p><p> When a thin film transistor using an amorphous In-Ga-Zn-O oxide for the channel layer was examined, hysteresis may occur in the transistor characteristics (Id-Vg characteristics) of the TFT, depending on the composition and manufacturing conditions. there were.</p><p> The occurrence of hysteresis causes variations in the operation of organic LEDs and liquid crystals to be driven, for example, when used in a pixel circuit of a display, and eventually leads to deterioration of image quality in the display. Therefore, an object of the present invention is to realize a thin film transistor having both good transistor characteristics and operational stability.</p><p> Another object of the present invention is to reduce the hysteresis and drive stability by devising the oxide material used for the gate insulating layer in the thin film transistor using an oxide for the channel layer.</p>

<p> In the present invention, in a field effect transistor having a gate electrode, a source electrode, and a drain electrode, a channel layer made of an oxide semiconductor containing at least one selected from In, Zn, and Sn, the channel layer, and the above. It has a gate insulating layer arranged between the gate electrodes, and the gate insulating layer includes an amorphous oxide containing Ga as a main component.</p>

<p> According to the present invention, the thin film transistor exhibits excellent TFT characteristics and further has excellent operational stability. In particular, it is possible to realize a transistor having a small gate leakage current and a relatively large on-current.</p><p> In addition, the hysteresis is small, and the stability over time when driven is excellent.</p>

Hereinafter, the best embodiment of the present invention will be described in detail with reference to the accompanying drawings.

The field-effect transistor according to the embodiment of the present invention is a field-effect transistor having a channel layer made of an oxide containing at least one selected from In, Zn and Sn, such as indium oxide, zinc oxide and tin oxide, and is gate-insulated. The layer comprises an amorphous oxide containing Ga as a main component.

The gate insulating layer first needs to have high dielectric strength (high dielectric strength).

Due to the high insulation property, it is possible to realize a transistor having a small gate leakage current (current flowing between the source and the gate or between the drain and the gate).

Further, if the insulating layer has a high insulating property, the film thickness of the insulating layer can be reduced, so that a high-performance transistor can be realized.

By using an insulating material having such high insulating properties, it is possible to drive the device at a high voltage, and the device can be made highly reliable against overvoltage.

Further, the material constituting the gate insulating layer preferably has a high dielectric constant.

By having a high dielectric constant, a transistor having a large on-current can be realized.

Further, it is desired that the material constituting the gate insulating layer can be an element having a small hysteresis or an element having a small change with time when applied to a TFT.

In this regard, it is preferable that the charge is less likely to be trapped inside the insulating film.

In addition, it is preferable that a good interface is formed between the gate insulating layer and the channel layer.

By applying an amorphous oxide containing Ga as a main component as the insulating layer, high insulating properties and a relatively high dielectric constant can be realized.

For example, amorphous Ga₂O₃The thin film has a relatively large dielectric constant of about 9, and can achieve a dielectric strength of about 4 MV / cm, which is preferable.

Further, with this configuration, stable device characteristics can be obtained when applied to the gate insulating layer of the TFT.

Since it is amorphous, it is considered that a flat thin film can be produced and stable characteristics can be obtained because there is no charge trap at the grain boundary.

In particular, it is preferable to apply a gate insulating layer containing Ga as a main component to a channel layer made of an amorphous oxide containing In, Zn, or Sn as a main component.

With respect to a TFT having such a channel layer, it is possible to realize a TFT having a small hysteresis and excellent stability over time.

The reason for this is not clear, but a good interface is formed between the oxide semiconductor containing In, Zn, or Sn as the main component and the oxide insulator containing Ga as the main component, and the charge is trapped at the interface. It may be difficult.

In addition, it is considered that the influence on the transistor characteristics is small when the mutual diffusion of atoms (Ga etc.) occurs between the insulating layer and the channel layer.

Furthermore, it can be considered that one of the reasons is that the amorphous channel layer does not crystallize when Ga is diffused and a stable amorphous structure is maintained.

1 and 2 are cross-sectional views showing a configuration example of a field effect transistor as an embodiment of the present invention.

Figure 1 is an example of a staggered structure.

In FIG. 1, 10 is a substrate, 11 is a channel layer, 12 is an insulating layer, 13 is a source electrode, 14 is a drain electrode, and 15 is a gate electrode.

The field effect transistor is a three-terminal element including a gate electrode 15, a source electrode 13, and a drain electrode 14.

It is an electronically active element having a function of applying a voltage Vg to a gate electrode to control the current Id flowing in the channel layer and switching the current Id between the source electrode and the drain electrode.

FIG. 1 is an example of a top gate structure in which a gate insulating film 12 and a gate electrode 15 are sequentially formed on the semiconductor channel layer 11.

Figure 2 is an example of an inverted staggered structure.

The same parts are designated by the same reference numerals as in FIG.

Further, the example of FIG. 2 is an example of a bottom gate structure in which the gate insulating film 12 and the semiconductor channel layer 11 are sequentially formed on the gate electrode 15.

The staggered structure and the inverted staggered structure are so called because of the arrangement relationship between the electrode and the channel layer-insulating layer interface.

In the present embodiment, the structure of the TFT is not limited to this, and any top / bottom gate structure and stagger / reverse stagger structure can be used.

(Gate insulating layer) The material of the gate insulating layer 12 is not particularly particular as long as it is an amorphous oxide containing Ga as a main component.

For example, as an amorphous oxide containing Ga as a main component, Ga₂O₃, Ga-In-O, Ga-Zn-O, Ga-Zn-O, Ga-In-Zn-O, Ga-Al-O, Ga-Si-O, Ga-Hf-O, Ga-Ti-O and so on.

In the present invention, the term "having a certain component as a main component" means that the element is the most abundant among the elements other than oxygen.

Therefore, in the above description, the term "Ga as a main component" means that the Ga element is contained in the largest amount among the elements other than oxygen.

In addition, the fact that a certain element is a sub-component means that oxygen and a main component element are contained in the second largest amount.

In a transistor, the combination of the gate insulating layer material and the channel layer material is important because the nature of the interface between the gate insulating layer and the channel layer greatly contributes to the characteristics.

In this respect, it is particularly preferable to combine a channel layer containing In as a main component and a gate insulating layer containing Ga as a main component.

In addition, an example of combining a channel layer containing In as a main component and a gate insulating layer containing Ga as a main component and In as a sub component is also a preferable example.

As described above, it can be considered that such a combination of the gate insulating layer material and the channel layer material forms a good interface.

By combining such a gate insulating layer and a channel layer, it is possible to realize a thin film transistor having excellent TFT characteristics such as a high on / off ratio and a high saturation current, and further having excellent drive stability such as hysteresis characteristics.

In addition, it is also preferable that the amorphous oxide containing Ga as a main component contains Ti, Hf, Zr, Y, La, Nb or Ta as a sub component.

This is because having such a sub-component makes it possible to obtain an insulating layer having a high dielectric constant.

This makes it possible to realize a thin film transistor having a relatively large on-current.

A plurality of insulating films may be laminated as the gate insulating layer.

For example, SiO₂And SiN_xAn example is given in which an amorphous oxide containing Ga as a main component is laminated on a general insulating layer such as.

Gas phases such as sputtering method (SP method), pulsed laser deposition method (PLD method), electron beam deposition method, and atomic layer deposition method (Atomic LaYer deposition method) are used as the film forming method for the gate insulating film made of amorphous oxide. It is better to use the method.

Among the gas phase methods, the SP method is suitable from the viewpoint of mass productivity.

However, the film forming method is not limited to these methods. The temperature of the substrate at the time of film formation can be maintained at substantially room temperature without being intentionally heated.

(Channel layer) Examples of the amorphous oxide forming the channel layer used in the present invention include indium oxide, zinc oxide, tin oxide, indium tin oxide, indium zinc oxide, zinc oxide, and indium tin oxide. The amorphous semiconductor represented by the number 1 can be used.

<maths num="1"><img file="JP2007201366A_D0001.tif" /></maths> Among these, those shown by the following equation 2 are particularly preferable.

<maths num="2"><img file="JP2007201366A_D0002.tif" /></maths> For example, an amorphous oxide film is SnO when its composition is shown in the phase diagram.₂, In₂O₃And can be realized by a unidimensional, binary or ternary composition located inside a triangle with ZnO as the apex.

Depending on the composition ratio of the ternary composition, it may crystallize within a certain composition ratio.

For example, of the binary composition containing two of the above three compounds (the composition located on the side of the triangle), the In-Zn-O system has a composition containing more than about 30 atomic% of In. , Amorphous film can be made.

In particular, when a gate insulating layer containing Ga as a main component is applied, it is preferable to apply a channel layer containing In (Zn or Sn) as a main component and Ga as a sub component.

In this case, it is possible to realize a TFT having a small hysteresis and excellent stability over time.

Although the reason for this is not clear, it is considered that the interface characteristics are improved by using the insulating layer having the above-mentioned specific composition, and as a result, the charge is less likely to be trapped at the interface.

In addition, it is considered that the influence on the transistor characteristics is small when the mutual diffusion of atoms (Ga etc.) occurs between the insulating layer and the channel layer.

For example, if the composition is shown in a phase diagram, Ga₂O₃, In₂O₃And it is a preferable example to construct the channel layer by the ternary composition located inside the triangle having ZnO as the apex.

That is, it is a more preferable example that the channel layer is composed of an amorphous oxide containing In, Ga and Zn.

In this way, when a material containing Ga such as an In-Ga-Zn-O material is applied to the channel layer, the insulating layer and the channel layer are made of the same material, so that the production can be performed at low cost. It is possible and the burden on the environment is small.

Such an amorphous oxide has the following characteristics.

That is, in a normal compound, as the carrier concentration increases, the electron mobility decreases due to scattering between carriers and the like. On the other hand, in the above amorphous oxide, the electron mobility increases as the electron carrier concentration increases.

When a voltage is applied to the gate electrode, electrons can be injected into the amorphous oxide channel layer, so that a current flows between the source and drain electrodes, and both electrodes are turned on.

Since the electron mobility of the amorphous oxide film increases as the electron carrier concentration increases, the current when the transistor is on can be further increased. That is, the saturation current and the on / off ratio can be made larger.

As the film forming method of the amorphous oxide, it is preferable to use a vapor phase method such as a sputtering method (SP method), a pulse laser vapor deposition method (PLD method), and an electron beam vapor deposition method.

Among the gas phase methods, the SP method is suitable from the viewpoint of mass productivity.

However, the film forming method is not limited to these methods.

The temperature of the substrate at the time of film formation can be maintained at substantially room temperature without being intentionally heated.

When applying an amorphous oxide to a channel layer, it is preferable to apply an amorphous oxide having an electrical conductivity of 0.0001 S / cm or more at 10 S / cm or less in order to obtain good TFT characteristics. ..

In order to obtain such electrical conductivity, although it depends on the material composition of the channel layer, 10¹⁴~10¹⁸/cm³It is preferable to form an amorphous oxide film having a degree of electron carrier concentration.

When the electrical conductivity is 10 S / cm or more, the normally-off transistor cannot be constructed and the on-off ratio cannot be increased.

In extreme cases, even when the gate voltage is applied, the current between the source and drain electrodes does not turn on and off, and the transistor does not operate. On the other hand, if the insulator, that is, the electrical conductivity is 0.0001 S / cm or less, the on-current cannot be increased.

In extreme cases, even when the gate voltage is applied, the current between the source and drain electrodes does not turn on and off, and the transistor does not operate.

Usually, in order to control the electric conductivity electrons and carrier concentration of an oxide, it is performed by controlling the oxygen partial pressure at the time of film formation.

That is, by controlling the partial pressure of oxygen, the amount of oxygen deficiency in the thin film is mainly controlled, thereby controlling the electron carrier concentration.

FIG. 7 is a graph showing an example of the oxygen partial pressure dependence of the carrier concentration when the In-Ga-Zn-O oxide thin film is formed by the sputtering method.

In fact, by highly controlling the oxygen partial pressure, the electron carrier concentration is 10.¹⁴~10¹⁸/cm³A semi-insulating film of an amorphous oxide film having a semi-insulating property can be obtained. By applying such a thin film to the channel layer, a good TFT can be created.

As shown in FIG. 7, a semi-insulating thin film can be obtained by forming a film with an oxygen partial pressure of about 0.005 Pa.

At 0.001 Pa or less, insulation is obtained, while at 0.01 Pa or more, the electrical conductivity is too high, which is unsuitable as a channel layer of a transistor.

The materials of the source electrode 13, the drain electrode 14, and the gate electrode 15 are not particularly particular as long as they enable good electrical conductivity and electrical connection to the channel layer.

For example, In₂O₃: A transparent conductive film such as Sn or ZnO or a metal such as Au, Pt, Al or Ni can be used.

As the substrate 10, a glass substrate, a plastic substrate, a plastic film, or the like can be used.

Since the channel layer and the gate insulating layer are transparent to visible light, a transparent thin film transistor can be obtained by using a transparent material as the material of the electrode and the substrate.

(TFT Characteristics) FIGS. 3 and 4 are graphs showing typical characteristics of the field effect transistor of the present invention.

When a voltage Vd of about 5V is applied between the source and drain electrodes, the current Id between the source and drain electrodes can be controlled (on and off) by turning the application of the gate voltage Vg on and off between 0V and 5V. it can.

Fig. 3 shows an example of Id-Vd characteristics at various Vg, and Fig. 4 shows an example of Id-Vg characteristics (transfer characteristics) at Vd = 6V.

(Hysteresis) Hysteresis will be described with reference to FIGS. 5 and 6.

FIG. 5 is a graph showing the hysteresis when an amorphous oxide containing Y as a main component is applied to the gate insulating layer.

FIG. 6 is a graph showing the hysteresis when an oxide containing Ga as a main component is applied to the gate insulating layer.

Hysteresis refers to different values of Id when the voltage rises and falls when Vd is fixed and Vg is swept (up and down) as shown in Fig. 5 and Fig. 6 in the evaluation of TFT transfer characteristics. Say that.

If the difference in hysteresis is large, the value of Id obtained will vary with respect to the set Vg, so an element with a small difference in hysteresis is preferable.

When an oxide containing Y as a main component is applied to the gate insulating layer, it shows the hysteresis characteristics as shown in Fig. 5.

In comparison with this, when an amorphous oxide containing Ga as a main component is applied to the gate insulating layer, an element having a small difference in hysteresis can be obtained as shown in FIG.

By applying an amorphous oxide containing Ga as the main component to the gate insulating layer, the physical reason for reducing the hysteresis is not clear, but it is said that a channel layer / insulating layer interface where carriers are less likely to be trapped is realized. Conceivable.

Hereinafter, the present invention will be described in more detail based on Examples, but the present invention is not limited thereto.

Amorphous Ga₂O₃Insulation layer In this example, the top gate type TFT element shown in Fig. 1 is manufactured.

In addition, a channel layer made of In-Ga-Zn-O-based amorphous oxide and amorphous Ga₂O₃It has a gate insulating layer made of.

First, an amorphous oxide film is formed as a channel layer 11 on a glass substrate 10 (1737 manufactured by Corning Inc.).

In this embodiment, an In-Zn-Ga-O-based amorphous oxide film is formed by a high-frequency sputtering method in a mixed atmosphere of argon gas and oxygen gas.

A sputtering film forming apparatus as shown in FIG. 8 is used.

In FIG. 8, 51 is a sample, 52 is a target, 53 is a vacuum pump, 54 is a vacuum gauge, 55 is a substrate holding means, 56 is a gas flow rate controlling means provided for each gas introduction system, and 57 is a pressure control. Means, 58, is a film forming chamber.

The gas introduction system includes argon, oxygen, and a mixed gas of argon and oxygen (Ar: O).₂= 80:20) It has three systems.

A predetermined gas atmosphere can be obtained in the film forming chamber by the gas flow rate control means 56 that can control each gas flow rate independently and the pressure control means 57 for controlling the exhaust speed.

In this embodiment, the target (materials as the charge source), a 2-inch size InGaO₃A polycrystalline sintered body having a (ZnO) composition is used, and the input RF power is 100 W.

The atmosphere at the time of film formation is a total pressure of 0.4 Pa, and at that time, the gas flow rate ratio is Ar: O.₂= 100: 1. The film formation rate is 12 nm / min. The substrate temperature is 25 ° C.

When the obtained film was subjected to incident X-ray diffraction (thin film method, incident angle 0.5 degrees) on the film surface, no clear diffraction peak was detected, and the prepared In-Zn-Ga-O film was an amorphous film. It can be seen that it is.

Furthermore, as a result of spectroscopic ellipsometry and pattern analysis, it was found that the mean square roughness (Rrms) of the thin film was about 0.5 nm and the film thickness was about 60 nm.

As a result of fluorescent X-ray (XRF) analysis, the metal composition ratio of the thin film was In: Ga: Zn = 38: 37: 25.

Also, the electrical conductivity is 10^-1It is about S / cm and the electron carrier concentration is 4 × 10.¹⁶/cm³, Electron mobility is about 2 cm²It is estimated to be about / V · seconds.

Moreover, from the analysis of the light absorption spectrum, the forbidden band energy width of the produced amorphous oxide film is about 3 eV.

Next, the drain electrode 14 and the source electrode 13 were patterned and formed by a photolithography method and a lift-off method. The electrode material is Au, and the thickness is 30 nm.

Next, the gate insulating layer 12 was patterned and formed by a photolithography method and a lift-off method.

The gate insulating film is Ga₂O₃The film is formed by the high frequency RF sputtering method, and the thickness is 150 nm.

In this embodiment, a 2-inch size polycrystalline Ga203 sintered body is used as the target (material source), and the input RF power is 160 W.

The atmosphere at the time of film formation is a total pressure of 0.4 Pa, and at that time, the gas flow rate ratio is Ar: O.₂= 100: 5. The substrate temperature is 25 ° C.

The relative permittivity of the formed Ga203 film is about 9, and the withstand voltage is about 4 MV / cm.

In addition, it has been confirmed by X-ray diffraction that this thin film is amorphous.

Further, the gate electrode 15 was formed by a photolithography method and a lift-off method.

The channel length is 50 μm and the channel width is 200 μm. The electrode material is Au and the thickness is 30 nm.

(Comparative Example 1) The configuration is the same as that of the above Example except for the gate insulating film. The gate insulating film is Y₂O₃The film is formed by a sputtering film formation method and has a thickness of 150 nm. Also, Y₂O₃The relative permittivity of the film is about 12. Moreover, it was a polycrystalline film according to X-ray diffraction.

(Comparative Example 2) The configuration is the same as that of the above Example except for the gate insulating film. The gate insulating film is SiO₂The film is formed by a sputtering film formation method and has a thickness of 150 nm.

Also, SiO₂The relative permittivity of the film is about 4. Moreover, it was an amorphous film according to X-ray diffraction.

Characteristic evaluation of TFT element Figures 3 and 4 show an example of the current-voltage characteristics of the TFT element measured at room temperature. FIG. 3 shows the Id-Vd characteristic, and FIG. 4 shows the Id-Vg characteristic.

As shown in Fig. 3, when a constant gate voltage Vg is applied and the drain voltage Vd dependence of the source-drain current Id with a change in Vd is measured, it is typical to saturate (pinch off) at about Vd = 6V. The behavior of a semiconductor transistor was shown.

When the gain characteristics were investigated, the gate voltage V when Vd = 4V was applied._GThe threshold of was about -0.5V.

Also, when Vg = 10V, Id = 1.0 × 10^-5A current of about A flowed.

Transistor on / off ratio is 10⁶It was super. Moreover, when the electric field effect mobility was calculated from the output characteristics, it was about 9 cm in the saturation region.²(Vs)^-1The field effect mobility of was obtained.

The same measurement was performed by irradiating the manufactured device with visible light, but no change in transistor characteristics was observed.

Further, the characteristics of the TFT of this example are characterized in that the hysteresis is smaller than that of the TFT of Comparative Example 1.

In FIGS. 5 and 6, the Id-Vg of this example and the comparative example are illustrated and compared. FIG. 5 shows Comparative Example 1 and FIG. 6 shows an example of the TFT characteristics of this example.

In this way, the amorphous is Ga in the gate insulating layer.₂O₃By applying, the hysteresis of the TFT can be reduced.

Further, in this embodiment, since the dielectric constant of the insulating layer is smaller than that of Comparative Example 1, a TFT having a slightly smaller on-current can realize a TFT having excellent stability.

On the other hand, in this embodiment as compared with Comparative Example 2, since the dielectric constant of the gate insulating layer is large, a large on-current can be obtained.

Hysteresis was the same, but there was a tendency for the characteristic change to be small after long-term operation.

As described above, it can be considered that such a highly stable TFT can be realized by using Ga as a main component in the gate insulating layer.

As described above, by applying the gate insulating layer made of an amorphous oxide containing Ga as a main component, it is possible to realize a transistor having a relatively large on-current and a small hysteresis.

The field-effect transistor having a relatively large field-effect mobility of this embodiment can be expected to use an organic light-emitting diode in an operating circuit.

Amorphous Ga-In-O Insulation Layer In this example, the top gate type TFT element shown in Fig. 1 is manufactured.

Further, an amorphous oxide containing Ga as a main component and In as a sub component is used as a gate insulating layer.

First, an In-Zn-Ga-O-based amorphous oxide film was deposited on a glass substrate (1737 manufactured by Corning Inc.) by the PLD method using a KrF excimer laser.

InGaO₃(ZnO)₄An In-Zn-Ga-O-based amorphous oxide film was deposited on a polycrystalline sintered body having a composition as a target. The oxygen partial pressure at the time of film formation is 6 Pa.

The power of the KrF excimer laser is 1.5 x 10^-3mj / cm²/ pulse, pulse width is 20nsec, repetition frequency is 10Hz. The substrate temperature is 25 ° C.

As a result of fluorescent X-ray (XRF) analysis, the metal composition ratio of the thin film was In: Ga: Zn = 0.97: 1.03: 4.

Furthermore, as a result of spectroscopic ellipsometry and pattern analysis, the average square roughness (Rrms) of the thin film is about 0.6 nm, and the film thickness is about 60 nm. When the resistivity of this thin film is evaluated, it shows a semi-insulating property of about 50 Ωcm.

When the obtained film was subjected to incident X-ray diffraction (thin film method, incident angle 0.5 degrees) on the film surface, no clear diffraction peak was detected, and the prepared In-Zn-Ga-O film was an amorphous film. Is.

The drain electrode 14 and the source electrode 13 were patterned and formed by a photolithography method and a lift-off method. Each electrode material is gold and has a thickness of 30 nm.

Next, the gate insulating layer 12 was patterned and formed by a photolithography method and a lift-off method. As the gate insulating film, a Ga-In-O film is formed by the PLD method. The thickness is 150 nm.

As a result of fluorescent X-ray (XRF) analysis, the metal composition ratio of the thin film was Ga: In = 90: 10.

The relative permittivity of the formed Ga203 film is about 10, and the withstand voltage is about 3 MV / cm. Moreover, it was confirmed by X-ray diffraction that this thin film was amorphous.

Further, the gate electrode 15 was formed by a photolithography method and a lift-off method. The electrode material was Au and the thickness was 50 nm. The channel length was 50 μm and the channel width was 200 μm.

Characteristic evaluation of TFT element The thin film transistor of this example showed the behavior of a typical semiconductor transistor that saturates (pinch off) at about Vd = 6V. Transistor on / off ratio is 10⁶Super, field effect mobility is about 7 cm²(Vs)^-1Is.

Further, the TFT of the present embodiment is characterized in that the hysteresis is smaller than that of the first embodiment.

Since the gate insulating layer is composed of an amorphous oxide having Ga as a main component and In as a sub component, it can be considered that a TFT having excellent stability can be realized.

Amorphous Ga-Hf-O Insulation Layer In this example, the top gate type TFT element shown in Fig. 1 is manufactured.

In addition, an amorphous oxide containing Ga as a main component and Hf as a sub component is used as a gate insulating layer.

The structure and manufacturing method of the TFT of this example are the same as those of Example 1 except for the gate insulating layer.

As the gate insulating film, a Ga-Hf-O film made of amorphous material is formed by the RF sputtering method. The thickness is 150 nm.

In this embodiment, the target (material source) is a 2-inch size polycrystalline Ga.₂O and HfO₂A sintered body consisting of a mixture of the above is used, and the input RF power is 160 W.

The atmosphere at the time of film formation is a total pressure of 0.4 Pa, and at that time, the gas flow rate ratio is Ar: O.₂= 100: 5. The substrate temperature is 25 ° C.

As a result of fluorescent X-ray (XRF) analysis, the metal composition ratio of the thin film is Ga: Hf = 64: 36. Filmed Ga₂O₃The relative permittivity of the film is about 11, and the dielectric strength is about 3MV / cm.

Characteristic evaluation of TFT element The thin film transistor of this example showed the behavior of a typical semiconductor transistor that saturates (pinch off) at about Vd = 6V. Transistor on / off ratio is 10⁶Super, field effect mobility is about 8 cm²(Vs)^-1Is.

Further, the TFT of the second embodiment has a feature that a larger on-current can be obtained because a material having a large dielectric constant is applied to the gate insulating layer as compared with the first embodiment.

This is because the dielectric constant of the gate insulating layer can be increased by using the gate insulating layer containing Hf as a sub-component.

Hysteresis is smaller than that of Comparative Example 1 and is almost the same as that of Example 1.

Since an amorphous oxide containing Ga as the main component is applied to the gate insulating layer, it can be considered that a TFT with excellent stability can be realized.

The field-effect transistor having a relatively large on-current of this embodiment can be expected to be used in an operating circuit of an organic light emitting diode.

Bottom Gate Structure Ga-Si-O Insulation Layer This example is an example of manufacturing the bottom gate type TFT element shown in Fig. 2.

In addition, an amorphous oxide containing Ga as a main component is used as the gate insulating layer.

First, a gate electrode 15 made of Ta having a thickness of 200 nm is formed on the glass substrate 10 by sputter film formation. A photolithography method and a dry etching method are used for patterning.

Next, a laminated film of a-SIn and Ga-Si-O film is formed as the gate insulating layer 12. An insulating layer made of a-SIn having a thickness of 100 nm is formed by a plasma CVD method.

Further, the Ga-Si-O insulating layer having a thickness of 50 nm is laminated by the sputtering method.

As a target (material source), 2-inch size polycrystalline Ga₂O and SiO₂The input RF power is 150W using the mixed sintered body of. The atmosphere at the time of film formation is a total pressure of 0.4 Pa, and at that time, the gas flow rate ratio is Ar: O.₂= 100: 5. The substrate temperature is 25 ° C.

The metal composition ratio of the thin film is about Ga: Si = 6: 4.

The two-layer laminated insulating layer is equivalent to about 8 in terms of the relative permittivity of the uniform layer. Dielectric strength is about 6MV / cm. Moreover, it was confirmed by X-ray diffraction that this thin film was amorphous.

Next, a channel layer composed of an oxide of In-Sn-O is formed. In this example, the channel layer film forming method is the same as in Example 1. The metal composition ratio is In: Sn = 4: 6.

Evaluation of characteristics of TFT elements The TFTs of this example tend to have smaller characteristic variations when a plurality of elements are produced, as compared with Comparative Example 1.

The transistor on / off ratio is 10⁶Super, field effect mobility is about 6 cm²(Vs)^-1Is.

Since the TFT of this embodiment has a large dielectric strength of the gate insulating layer, stable operation is possible even when driving with a large gate voltage applied.

Hysteresis is as small and good as in Example 1.

On the other hand, the stability against long-time driving is better than that of Comparative Examples 1 and 2, but slightly inferior to that of Examples 1 and 2.

In Examples 1 and 2, Ga is contained in both the channel layer and the gate insulating layer, so that it is considered to have excellent stability.

That is, it can be considered that the gate insulating layer-channel layer interface is stable with respect to long-term driving.

Plastic Substrate This example is an example in which the top gate type TFT element shown in FIG. 1 is manufactured on a plastic substrate.

In addition, an amorphous oxide containing Ga as a main component and Zn as a sub component is used as a gate insulating layer.

The manufacturing method and composition are in accordance with Example 1.

However, a polyethylene terephthalate (PET) film is used as the substrate.

The channel layer is composed of an In-Ga-Zn-O film having a thickness of 50 nm, and its metal element composition ratio is In: Ga: Zn = 2: 2: 6. The film forming method is the RF sputtering method. As a target (material source), a 2-inch size In203, Ga203, and ZnO mixed sintered body is used, and the input RF power is 100 W.

The atmosphere at the time of film formation is a total pressure of 0.4 Pa, and at that time, the gas flow rate ratio is Ar: O.₂= 100: 1. The substrate temperature is 25 ° C.

However, the gate insulating film is composed of an In-Ga-Zn-O film having a thickness of 200 nm, and its metal element composition ratio is In: Ga: Zn = 0.9: 8: 1.1. The film forming method is the RF sputtering method.

As a target (material source), a 2-inch size In203, Ga203, and ZnO mixed sintered body is used, and the input RF power is 100 W.

Since the composition ratio of the target is different from that when the channel layer is formed, a thin film containing Ga as a main component is formed.

The atmosphere at the time of film formation is a total pressure of 0.4 Pa, and at that time, the gas flow rate ratio is Ar: O.₂= 100: 2. The substrate temperature is 25 ° C.

The source electrode, drain electrode and gate electrode were transparent conductive films made of an In-Zn-O film. The metal element composition ratio is In: Zn = 9: 1. The thickness is 100 nm. The film forming method is the RF sputtering method.

As a target (material source), 2 inch size In₂O₃A mixed sintered body of and ZnO is used, and the input RF power is 50 W. The atmosphere at the time of film formation is an Ar atmosphere, and the total pressure is 0.5 Pa. The substrate temperature is 25 ° C.

Characteristic evaluation of TFT element The measurement was performed at room temperature of the TFT formed on the PET film. Transistor on / off ratio is 10³It's super. Moreover, when the electric field effect mobility was calculated, it was about 3 cm.²(Vs)^-1The electric field effect mobility of. In addition, it has the same good hysteresis characteristics as in Example 1.

The element made on the PET film was bent with a radius of curvature of 30 mm, and the same transistor characteristics were measured, but no significant change was observed in the transistor characteristics. Further, the same measurement was performed by irradiating visible light, but no change in transistor characteristics was observed.

The thin film transistor produced in this embodiment is transparent to visible light and is formed on a flexible substrate.

The TFT of this embodiment has a feature that the load on the environment is small because the channel layer, the gate insulating layer, and the electrodes are made of the same material system.

Since the present invention can form a thin film at a low temperature and is in an amorphous state, it can be formed on a flexible material such as a PET film. That is, switching in a curved state is possible. Moreover, since it is transparent to visible light and infrared light having a wavelength of 400 nm or more, it can be applied as a switching element for LCDs and organic EL displays. It can be widely applied to flexible displays, see-through displays, IC cards and ID tags.

<figref num="1">It is sectional drawing which shows the structural example of the electric field effect transistor as one Embodiment of this invention.</figref><figref num="2">It is sectional drawing which shows the structural example of the electric field effect transistor as one Embodiment of this invention.</figref><figref num="3">It is a graph which shows the typical characteristic of the field effect transistor of this invention.</figref><figref num="4">It is a graph which shows the typical characteristic of the field effect transistor of this invention.</figref><figref num="5">It is a graph which shows the hysteresis when the amorphous oxide containing Y as a main component is applied to the gate insulating layer.</figref><figref num="6">It is a graph which shows the hysteresis when the oxide containing Ga as a main component is applied to the gate insulating layer.</figref><figref num="7">It is a graph which shows an example of the oxygen partial pressure dependence of the electric conductivity when the In-Ga-Zn-O type oxide thin film is formed by the sputtering method.</figref><figref num="8">This is a high-frequency sputtering film forming apparatus used in the examples of the present invention.</figref>

Code description

10 Substrate 11 Channel layer 12 Insulation layer 13 Source electrode 14 Drain electrode 15 Gate electrode