Data processing system

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a data processing method for inputting / outputting data having a predetermined number of bits between a plurality of devices in an audio system or the like.

【0002】

[Conventional technology]

In some audio systems, digital audio data output from a CD player or the like is subjected to various correction processing using a DSP (Digital Signal Processor), and the corrected data is oversampled by a digital filter. It is carried out. In such an audio system, when performing correction processing using DSP, for example, when performing processing to raise the signal level in a predetermined band, a large signal is generated while maintaining the number of bits of input digital data. When digital data corresponding to a level audio sound is input, the data obtained in the correction process may exceed the maximum value expressed by this number of bits, causing distortion. Therefore, in reality, in consideration of the amplification of the signal generated by the correction process, the signal level corresponding to the input digital data is lowered to secure a margin on the upper bit side, and then the predetermined correction process is performed. There is.

【0003】

[Problems to be Solved by the Invention]

By the way, as described above, the DSP that performs a predetermined correction process in the audio system handles data having a larger number of bits than the input / output data in the internal process, so that when the data is output (transferred to the digital filter in the subsequent stage). In some cases), it is necessary to reduce the number of bits that have been increased in order to perform internal processing, and there is a problem that information deterioration, that is, deterioration of sound quality, occurs due to the lack of information for this number of bits. ..

【0004】

FIG. 7 is a diagram illustrating a correction process performed in the DSP described above. Further, FIG. 8 is a diagram illustrating the number of bits of data before and after this correction process. For example, let 16 be the number of bits of digital data input / output to each of the DSP and the digital filter. Further, in the DSP, it is assumed that the equalizer processing for emphasizing (amplifying) a part of the frequency band is performed as shown in FIG. In this way, when 16-bit digital data is input when the signal level of a part of the frequency band is amplified by the DSP, the entire input data is input by a predetermined bit (for example, 2 bits) corresponding to this amplification. After the bit shift is performed, a predetermined equalizer process is performed. As a result, the number of bits of digital data handled inside the DSP is 18 bits, which is 16 bits plus 2 bits. However, since the number of bits of data input / output between the DSP and the digital filter connected to the subsequent stage is 16, the DSP lacks the lower 2 bits of the 18 bits that are the internal data. Data is output. Information is degraded by the missing lower 2 bits.

【0005】

The present invention has been created in view of these points, and an object of the present invention is to provide a data processing method capable of preventing deterioration of information.

【0006】

[Means for solving problems]

In order to solve the above-mentioned problems, in the data processing method of the present invention, the input L-bit data is converted into M-bit data by the data conversion means, and then predetermined data processing is performed by the data processing means. The data obtained as a result is oversampled by a predetermined multiple by the oversampling means, and then compressed into N bits by the bit compression means. When reducing the number of bits of data processed data, the number of bits is reduced by temporally distributing the information corresponding to the reduced number of bits to a plurality of data obtained by the oversampling process. It is possible to prevent the deterioration of information caused by the above.

【0007】

Therefore, the oversampling processing means described above is at least 2 for the input data.^MN It is desirable to perform double oversampling processing. As a result, the information corresponding to the reduced number of bits can be reliably distributed to a plurality of data obtained by the oversampling process, and the deterioration of the information can be reliably prevented.

【0008】

Further, it is desirable to obtain N-bit compressed data by performing ΣΔ modulation processing by the above-mentioned bit compression means. By combining the ΣΔ modulation processing and the oversampling processing, the number of data bits can be reduced without causing deterioration of information.

【0009】

Further, it is desirable to obtain N-bit data excluding the lower MN bit by performing dither addition processing by the above-mentioned bit compression means. Since the information for the missing MN bits can be stochastically distributed to a plurality of data by the dither addition processing, it is possible to prevent the deterioration of the information caused by reducing the number of bits. In particular, when the L-bit data input to the above-mentioned data conversion means is audio sound data, it is desirable to add a high-frequency concentrated dither whose band is limited to about 20 kHz or more by the bit compression means. By adding a high-frequency concentrated dither whose band is limited to approximately 20 kHz or higher, it is possible to eliminate the effect on human hearing when the number of bits of data is reduced.

【0010】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, an audio system according to an embodiment to which the data processing method of the present invention is applied will be described with reference to the drawings.

【0011】

FIG. 1 is a diagram showing a configuration of an audio system of the present embodiment. The audio system 100 shown in FIG. 1 includes an audio device 1, a sound quality correction unit 2, an oversampling processing unit 3, a digital-to-analog (D / A) converter 4, a low-pass filter (LPF) 5, an amplifier 6, and a speaker 7. It is composed of. In FIG. 1, for simplification of the explanation, monaural audio data is output from the audio device 1, but when stereo audio data is output, the sound quality correction unit 2 is in the latter stage. Each configuration of the above may be provided for two channels or more.

【0012】

The audio device 1 is an audio source that outputs audio data corresponding to various audio signals, and for example, a CD player or the like corresponds to this. In the following description, it is assumed that the audio device 1 of the present embodiment outputs 24-bit audio data.

【0013】

The sound quality correction unit 2 performs sound quality correction that emphasizes the treble range and the bass range by performing predetermined data processing on the audio data output from the audio device 1 to change the frequency characteristics and the like. This sound quality correction unit 2 can be realized by, for example, a DSP.

【0014】

The oversampling processing unit 3 performs oversampling processing on the corrected audio data output from the sound quality correction unit 2. This oversampling processing unit 3 can be realized by a digital filter.

【0015】

The D / A converter 4 converts the audio data output from the oversampling processing unit 3 into an analog signal. LPF5 smoothes the output signal of the D / A converter 4 that changes stepwise by removing the high frequency component (for example, the band of 20 kHz or more) of the analog signal output from the D / A converter 4. ..

【0016】

The amplifier 6 amplifies the analog signal output from the LPF 5 with a predetermined gain and outputs a signal for driving the speaker. The speaker 7 outputs an audio sound corresponding to the drive signal output from the amplifier 6.

【0017】

FIG. 2 is a diagram showing a detailed configuration of the sound quality correction unit 2. As shown in FIG. 2, the sound quality correction unit 2 includes a level shift processing unit 20, an equalizer processing unit 22, an oversampling processing unit 24, and a ΣΔ modulation unit 26.

【0018】

The level shift processing unit 20 sets a predetermined bit of audio data input from the audio device 1 in order to secure a margin for the amplification (bit carry) of the signal level generated by the equalizer processing by the equalizer processing unit 22 in the subsequent stage. The process of lowering the signal level by bit-shifting by the number is performed. In the present embodiment, when 24-bit audio data is input, the level shift processing unit 20 performs a bit shift to the lower side by 2 bits corresponding to the amplification and outputs 26-bit digital data. It shall be. As a result, in this 26-bit data, the upper 2 bits are "0", and the input audio data is included in the lower 24 bits.

【0019】

The equalizer processing unit 22 performs equalizer processing such as emphasizing (amplifying) a part of the frequency band on the 26-bit digital data output from the level shift processing unit 20. For example, as shown in FIG. 7, equalizer processing is performed to amplify the signal level in a part of the midrange and maintain the signal level in the other frequency regions.

【0020】

The oversampling processing unit 24 performs oversampling processing (upsampling processing) that artificially raises the sampling frequency with respect to the digital data after the equalizer processing output from the equalizer processing unit 22. How many times the oversampling process is performed is determined in consideration of how many bits of the 26-bit digital data are suppressed (compressed) by the ΣΔ modulator 26 in the subsequent stage. For example, when compressing M-bit (M = 26 in the above example) data to N-bit, at least 2^MN It is desirable to perform double oversampling processing.

【0021】

FIG. 3 is a diagram showing a specific example of the oversampling process performed by the oversampling processing unit 24, and shows a case where, for example, a quadruple oversampling process is performed. First, 0 data (data with a value of 0) is inserted into the original data (FIG. 3 (a)) input from the equalizer processing unit 22 (FIG. 3 (b)). In the case of 4 times oversampling processing, 3 0 data are inserted between 2 adjacent original data. In general, when performing X-fold oversampling processing, (X-1) 0 data may be inserted between two adjacent original data.

【0022】

Then, by passing the data in which one original data and three 0 data are alternately arranged in this way through a low-pass filter, they are smoothly connected between two adjacent original data. Three interpolation data are inserted and oversampling processing is performed four times (Fig. 3 (c)).

【0023】

The ΣΔ modulation unit 26 performs ΣΔ modulation processing on the digital data after the oversampling processing input from the oversampling processing unit 24. This ΣΔ modulation is a method of converting the amplitude information of data into a temporal pulse width, and by performing this ΣΔ modulation, the number of bits of digital data can be compressed. In the present embodiment, the ΣΔ modulation unit 26 converts the 26-bit data output from the oversampling processing unit 24 into 24-bit data equal to the number of bits of the audio data output from the audio device 1.

【0024】

FIG. 4 is a diagram showing a detailed configuration of the ΣΔ modulation unit 26. As shown in FIG. 4, the ΣΔ modulator 26 includes two adders 40 and 42, a subtractor 44, two multipliers 46 and 48, two delayers 50 and 52, and a quantizer 54. ing.

【0025】

The adders 40 and 42 add a quantization error delayed by a predetermined delay time to the input digital data. This quantization error occurs when the 26-bit digital data after passing through the adders 40 and 42 is converted into 24-bit digital data by the quantizer 54, and is input to the quantizer 54. It is obtained by calculating the difference between the digital data before the data is generated and the digital data output from the quantizer 54 by the subtractor 44.

【0026】

The delay device 52 delays the quantization error output from the subtractor 44 by a time corresponding to one sampling time of the digital data input to the ΣΔ modulator 26. Similarly, the delay device 50 further delays the quantization error output from the delay device 52 by a time corresponding to one sampling time. The multiplier 48 multiplies the quantization error output from the delayer 52 by the multiplier "2". Similarly, the multiplier 46 multiplies the quantization error output from the delayer 50 by the multiplier "-1".

【0027】

The level shift processing unit 20 described above corresponds to the data conversion means, the equalizer processing unit 22 corresponds to the data processing means, the oversampling processing unit 24 corresponds to the oversampling processing means, and the ΣΔ modulation unit 26 corresponds to the bit compression means.

【0028】

As described above, in the sound quality correction unit 2 included in the audio system 100 of the present embodiment, the input 24-bit audio data is bit-shifted by 2 bits to secure a margin on the upper bit side, and then the equalizer. Processing is performed, and the resulting 26-bit digital data is oversampled four times, and then ΣΔ modulation processing is performed to obtain 24-bit digital data. By combining the oversampling process and the ΣΔ modulation process, the oversampling process can obtain information for 2 bits, which is reduced when the number of bits of the 26-bit digital data after the equalizer process is reduced by 2 bits. Since it can be distributed over time to a plurality of digital data, it is possible to prevent information deterioration caused by a decrease in the number of bits.

【0029】

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the gist of the present invention. For example, in the above-described embodiment, the sound quality correction unit 2 performs a process of compressing 26-bit digital data to 24 bits by performing a ΣΔ modulation process on the digital data after the oversampling process is performed. However, the compression process of this number of bits may be performed by the dither addition process.

【0030】

FIG. 5 is a diagram showing a configuration of the sound quality correction unit 2a when the bit number compression process is performed by the dither addition process. The sound quality correction unit 2a shown in FIG. 2 has a configuration in which the ΣΔ modulation unit 26 included in the sound quality correction unit 2 shown in FIG. 2 described above is replaced with a dither addition unit 28. The dither addition unit 28 corresponds to the bit compression means. The level shift processing unit 20, the equalizer processing unit 22, and the oversampling processing unit 24 included in the sound quality correction unit 2a are basically the same as those included in the sound quality correction unit 2 shown in FIG. , The corresponding configurations are designated by the same reference numerals, and detailed description of the operation is omitted.

【0031】

The dither addition unit 28 performs a predetermined dither addition process on the 26-bit digital data after the oversampling process output from the oversampling processing unit 24, and converts the data into 24-bit digital data. In the present embodiment, the dither addition unit 28 performs a process of adding a high-frequency concentrated dither whose band is limited to 20 kHz or more to the input digital data. By performing the process of adding the high-frequency concentrated dither in this way, the missing 2 bits of information can be stochastically distributed to a plurality of digital data (digital data obtained by oversampling). It is possible to prevent the deterioration of information. Further, since the high-frequency concentrated dither used in the present embodiment is small-amplitude noise uniformly distributed in the band of 20 kHz or higher, the audio sound reproduced based on the digital data output from the dither addition unit 28 is produced. When listening, there is no effect of hearing discomfort or the like. By passing a low-pass filter having a cutoff frequency of approximately 20 kHz in the subsequent stage, the minute amplitude generated by adding this high-frequency concentrated dither may be removed.

【0032】

FIG. 6 is a diagram for explaining the principle of bit number compression processing by dither addition processing, and FIG. 6 (a) shows the relationship between the input signal and the quantization output for the input signal when the high frequency concentrated dither is not added. Figure 6 (b) shows the relationship between the input signal and the quantized output when the high-frequency concentrated dither is added.

【0033】

Simply deleting the lower bits without adding high-frequency concentrated dither means that the four types of information represented by the lower 2 bits, "00", "01", "10", and "11", are missing. It will be. As shown in FIG. 6A, the input data are 1 × Δ and 2 × Δ (since 2 bits are compressed in this embodiment, Δ = 2).² Considering the case between), for example, these are all quantized and output as a value of 3/2.

【0034】

However, in the dither addition unit 28 of the present embodiment, after adding the high frequency concentrated dither of ± Δ / 2 (= ± 2) to the input data, a process of deleting the lower two bits is performed. For example, as shown in Fig. 6 (b), considering the case where the input data is (1 + 3/4) × Δ, by adding ± Δ / 2 dither to this input data, 1.25Δ Data with a distribution with a width of ~ 2.25Δ can be obtained. In reality, one piece of data is available in this distribution, so 24-bit quantization on such data means that this data is in the 75% range, which corresponds to 1.25Δ to 2Δ. If it is included, the quantized output is 3/2, and if it is included in the range of 25% corresponding to 2Δ to 2.25Δ, the quantized output is 5/2. Therefore, the time average is 1.75.

【0035】

In this way, by performing dither addition processing instead of performing ΣΔ modulation processing, it is possible to prevent information deterioration caused by a decrease in the number of bits by temporally distributing the information for the missing 2 bits. it can.

【0036】

Further, in the above-described embodiment, the case where the number of bits of the output data of the sound quality correction unit configured by the DSP or the like is compressed has been described, but the number of bits of the output data in the DSP or other device used for other purposes is used. The present invention can also be applied to the case of compression.

【0037】

Further, in the description of the above-described embodiment, the number of bits of the data input / output to the sound quality correction unit are both set to 24 bits, but the number of bits of the input data and the number of bits of the output data are different. May be good.

【0038】

[Effect of the invention]

As described above, according to the present invention, the information generated by the decrease in the number of bits is obtained by temporally distributing the information for the decrease in the number of bits with respect to the plurality of data obtained by the oversampling process. Deterioration can be prevented.

[Simple explanation of drawings]

[Figure 1]

It is a figure which shows the structure of an audio system.

[Figure 2]

It is a figure which shows the detailed structure of the sound quality correction part.

[Fig. 3]

It is a figure which shows the specific example of the oversampling processing performed by the oversampling processing unit.

[Fig. 4]

It is a figure which shows the detailed structure of the ΣΔ modulation part.

[Fig. 5]

It is a figure which shows the structure of the sound quality correction part at the time of performing the compression processing of the number of bits by the dither addition processing.

[Fig. 6]

It is a figure explaining the principle of the bit number compression processing by the dither addition processing.

[Fig. 7]

It is a figure explaining the correction process performed in DSP in the conventional audio system.

[Fig. 8]

It is a figure explaining the number of bits of data before and after a correction process.

[Explanation of symbols]

1 Audio device 2, 2a Sound quality correction unit 3 Oversampling processing unit 4 Digital-to-analog (D / A) converter 5 Low Pass Filter (LPF) 6 amplifier 7 speaker 20 level shift processing unit 22 Equalizer processing unit 24 Oversampling processing unit 26 ΣΔ modulator 28 dither addition part