Apparatus and methods for multi-channel metering

ES 2 554 499 T3

DESCRIPTION

Apparatus and procedures for multi-channel measurement

Related requests

This application claims the priority of United States Provisional Patent Application No. 60 / 737,580, filed November 15, 2005, United States Provisional Patent Application No. 60 / 739,375, filed November 23, 2005, and United States Provisional Application No. 60 / 813,901, filed June 15, 2006, and is a partial continuation of United States Patent Application No. 11 / 431,849, filed May 9, 2006, which is a divisional of United States Patent Application No. 11 / 030,417, filed January 6, 2005 (now United States Patent No. 7,054,770), which is a divisional of United States Patent Application US Patent No. 09 / 795,838, filed February 28, 2001 (now US Patent No. 6,947,854).

Document US 5696501 relates to an electrical measuring device and a method thereof. The apparatus has a common node and a number of electrical measurement devices connected to the node. The metering devices measure power consumption and transmit a signal indicative of them to the node. The node calculates the consumed power and stores the results in a register.

Document EP 1379012 relates to an integrated and automated meter reading method and transferring obtained digital data to a remote computer system and apparatus thereof. The device measures power, gas and water usage, processes the measured data and transmits the data to a utility substation.

Document US 2005/0137813 refers to a system and method for online monitoring and billing of power consumption. The system has a measuring device connected to a power line and a transponder connected to the measuring device. The transponder receives and transmits data to and from the measuring device over the power line, and receives and transmits data to and from a remotely located computer.

Background and summary

According to the present invention, there is provided an apparatus for multi-channel electricity metering as set forth in claim 1.

One embodiment of the present invention comprises a measuring device that is related to the family of meters based on Quadlogic ASIC (see US Patent No. 6,947,854, and US Patent Application Published No. 20060036388) . Specifically, this embodiment (referred to herein for convenience as "Energy Guard") is a multi-channel meter that can preferably provide many of the functionalities of the aforementioned family of meters, and further provides the enhancements, features, and components. listed below.

Used in at least one embodiment, a MiniCloset is a 24-channel metering device that can measure electrical usage from up to 24 single-phase clients, 12 two-phase clients, or 8 three-phase clients. Preferably connected to the MiniCloset are one or more Load Control Modules (LCM), discussed below.

The Energy Guard preferably comprises a MiniCloset meter head module and two LCMs mounted in a steel case. Relays are also mounted in the box that allow a power customer to be remotely disconnected and reconnected, along with current transformers. See Figure 1.

After installation, an electricity supply line from the electricity customer is drawn from the main electrical feeder, which passes through the Energy Guard apparatus, and runs directly to the customer's home. The construction and use of the Energy Guard will be apparent to those skilled in the art upon review of the description below and related figures. Source code is provided in the attached Appendix.

Energy Guard meters preferably operate to provide:

(A) Remote disconnect / reconnect: the meter supports full duplex (bi-directional) communication via power line communication (“PLC”) and can be equipped with remotely operated relays (60 amp, 100 amp or 200 amp) that allow disconnection and reconnection of electrical users remotely.

(B) Theft prevention: The system is designed with three specific features to prevent theft. First, an Energy Guard device is installed on a utility pole above medium voltage lines, making it difficult for customers to reach and manipulate it. Second, since there are no additional signal cables with the system (that is, all communication is over the power line), any broken communication cables are immediately detectable. That is, if a communication cable is cut, the service is cut, which is easily evident. A third theft prevention feature is that the meter can be used to measure transformer power to validate measured totals from customers.

ES 2 554 499 T3 individual. Discrepancies may indicate theft of power.

(C) Tamper Detection: The Energy Guard provides two optical tamper detection modes. Each unit contains a light that is reflected against a small mirror-like adhesive sticker. The absence of this reflective light indicates that the box has been opened. This detection will automatically disconnect all clients measured by that Energy Guard unit. Also, if the Energy Guard latch is open and ambient light enters, this will automatically disconnect all clients measured by that Energy Guard unit as well. These two tamper detection modes operate continuously and alternate multiple times per second for maximum security.

(D) Reverse Voltage Detection: In some cases, a utility company may disconnect power to an individual customer and that customer can obtain power from an alternate supply. If the service reconnects power under these conditions, damage to the metering equipment and / or distribution system could occur. The Power Guard can preferably detect this fault condition. The Energy Guard can detect any voltage that is fed back into the open disconnect through the lines connecting the customer premises. If voltage is detected, the Energy Guard firmware will automatically prevent reconnection.

(E) Pre-payment: prepayment for energy can be made by telephone, electronic transaction or in person. The amount of kWh purchased is transmitted to the meter and stored in its memory. The meter will count down, showing how much power is available before reaching zero and disconnecting. As long as the customer continues to purchase energy, there will be no interruption in service, and the utility company will have a daily activity report.

(F) Load limiting: as an alternative to disconnection for non-payment or part of a prepayment system, Guarda de Energía meters can allow the service to remotely limit the power supplied to a set level, disconnecting when the load is exceeded . If the customer exceeds that load and disconnects, the customer can reset a button on the optional remote display unit to restore the load as long as the connected load is less than the pre-set limit. Alternatively, customers can call an electric service line by phone to have service restored. This feature allows utilities to provide electricity for critical systems even, for example, in the case of a non-paying customer.

(G) Limitation of monthly consumption: some customers benefit from subsidized rates and are provided with a maximum total consumption per month. The Energy Guard firmware can turn off the power when a certain level of consumption is reached. However, this type of program is best implemented when advance notification is provided to customers. This can be achieved with a screen in the home in which a message or series of messages notify customers that their consumption rate is approaching the projected consumption for the month. Alternatively (or in conjunction with) timed outages can be scheduled so that as the limit approaches, power is disconnected for periods of time in increasingly longer increments to notify residents. These planned outages act as a warning to customers that their limit is near so they have time to change their usage patterns.

(H) Meter validation: the integrated module of the system is preferably removable. This allows for easy revalidation of the laboratory's meter accuracy in the event of customer billing disputes.

(I) Operational benefits per service: The Energy Guardian has extensive on-board event logs and diagnostic functions, providing field technicians with an abundance of data to commission and troubleshoot electrical and communication systems . The various billing parameters include: Amps, Volts, Temperature, Total Harmonic Distortion, Frequency, Instantaneous Watts, Variables, and Volt-Amps, V2h, 12h, Power Factor, and Phase Angle.

These and other features will become apparent to those skilled in the art after reviewing the accompanying descriptions, software code, and schematic diagrams.

In one aspect, the invention comprises a device for measuring electricity usage, comprising: means for remote disconnection by means of power line communication; means for detecting theft of electricity; means for tampering detection; and means for detecting reverse voltage.

In another aspect, the invention comprises a multi-channel electricity metering apparatus, comprising: (a) a meter head operating to measure electricity usage for a plurality of lines of electricity consumers; (b) a transponder in communication with the meter head and operating to transmit data received from the meter head by power line communication to a remotely located computer, and to transmit data received by power line communication from the remotely located computer to the meter head; and (c) a load control module in communication with the meter head and operating to actuate the connection and disconnection of each of the plurality of relays, each relay of the plurality of relays corresponding to one of the plurality of lines. of electricity consumer.

ES 2 554 499 T3

In various embodiments: (1) the apparatus further comprises a tamper detector in communication with the meter head; (2) the tamper detector comprises a light and a reflective surface, and the meter head can operate to command the load control module to disconnect all customer lines if the tamper detector provides notification that the light is not detected reflecting off the reflective surface; (3) the apparatus further comprises a box containing the meter head, the load control module, and the relays, and wherein the tamper detector comprises an ambient light entering the box; (4) The apparatus further comprises a box containing the meter head, the load control module and the relays, and in which the box is installed on a utility pole; (5) the apparatus further comprises means for comparing the energy of the transformer with total energy used through the consumer lines; (6) the apparatus further comprises means for detecting reverse voltage flow through consumer lines; (7) The apparatus further comprises a computer-readable memory in communication with the meter head and a meter in communication with the meter head, the meter corresponding to a customer line and operating to discount an amount of energy stored in the memory, and the meter head operating to send a disconnect signal to the load control module to disconnect the customer line when the counter reaches zero; (8) The apparatus further comprises a computer-readable memory in communication with the meter head, the memory operates to store a load limit for a customer line, and the meter head operates to send a disconnect signal to the meter module. load control to disconnect the customer line when the load limit is exceeded; (9) The apparatus further comprises a computer-readable memory in communication with the meter head, the memory operates to store a usage limit for a customer line, and the meter head operates to send a disconnect signal to the meter module. load control to disconnect the customer line when the usage limit is exceeded; (10) the transponder operates to communicate with the remotely located computer over medium voltage power lines; (11) the apparatus further comprises a display unit in communication with the meter head and operating to display data received from the meter head; (12) the display unit operates to present information regarding a customer's power consumption; (13) the display unit operates to display warnings regarding customer power usage or suspected power theft; and (14) the display unit operates to transmit information entered by a customer to said meter head.

Brief description of the drawings

Figure 1 is a block / wiring diagram showing the connection of preferred embodiments.

Figure 2 is a block diagram showing the physical configuration of preferred embodiments.

Figures 3A-3B are schematic diagrams of a preferred CPU board of a Scanning Transponder and MiniCloset.

Figure 4 is a schematic diagram of a preferred Scanning Transponder power supply.

Figure 5 is a schematic diagram of a preferred MiniCloset power supply.

Figure 6 is a schematic diagram of a preferred circuit board for returning current transformer information to a MiniCloset meter head.

Figures 7A-7C are schematic diagrams of a preferred Charge Control Module circuit board.

Figures 8A-8D are schematic diagrams of a preferred power supply board that provides optical tamper detection.

Figures 9A-9C are schematic diagrams of a preferred Energy Guard backplane.

Figure 10 is a schematic diagram for a control circuitry board that operates to provide relay control.

Figure 11 is a diagram of a preferred Energy Guard base assembly. Figures 12 and 13 are preferred phase bus bar diagrams and construction thereof.

Figure 14 is a diagram depicting a preferred neutral bar chassis construction and assembly.

Figure 15 depicts preferred transition bars; Figure 16 depicts the preferred transition bar placement.

Figures 17 and depict a preferred acceptor module construction.

Figure 19 depicts a preferred integrated relay and current sensing module. Figure 20 depicts an exploded view of a preferred integrated relay and current sensing module.

ES 2 554 499 T3

Figure 21 shows exploded views of preferred measurement modules.

Figure 22 shows the measurement modules placed in an EG chassis and acceptor module assembly.

Figure 23 shows an exploded view of a preferred embodiment of the Energy Guard. Figure 24 shows an exploded view of a preferred EG assembly and base assembly.

Figure 25 shows a preferred EG distribution.

Figures 26 and 27 are preferred measurement module schematic diagrams.

Figure 28 has preferred schematic diagrams for a rear locating plate.

Figure 29 has preferred schematic diagrams for a power board.

Figure 30 has preferred schematic diagrams for an I / O extension board.

Figure 31 has preferred schematic diagrams for a CPU board.

Figure 32 has preferred schematic diagrams for a control module.

Figure 33 has preferred schematic diagrams for metering and power supply circuitry for a customer display module; Figure 34 has preferred schematic diagrams for a display board for the CDM.

Figure 35 is a block diagram of a preferred analog front end for measurement. Figures 36 and 37 depict preferred DSP implementations.

Figure 38 illustrates preferred in-phase filter pulse and frequency response characteristics.

Figure 39 illustrates injection of PLC signals at 60 Hz odd half harmonics. Figure 40 depicts 12 possible ways in which a meter received FFT frame can be out of phase with a transponder FFT frame exploration.

Figure 41 illustrates preferred FIR filter specifications.

Figure 42 depicts voltage and current resulting from a preferred FFT.

Detailed description of preferred embodiments

In one embodiment, an Energy Guard metering apparatus comprises a MiniCloset (ie, a metering apparatus that operates to measure a plurality of customer lines); a Scanning Transponder; one or more relays that operate to disconnect service to selected customers; a Load Control Module; and optical tamper detection means.

The MiniCloset and the Scan Transponder referred to herein are largely the same as described in US Patent No. 6,947,854. That is, although each has been improved over the years, the functionality and structure relevant to this description can be taken to be the same as those described in that patent.

One aspect of the invention comprises taking the existing multi-channel measurement functionality found in the MiniCloset and adding remote connection and disconnection via PLC. Providing such additional functionality requires adding new hardware and software. The added hardware comprises a Load Control Module (LCM) and on / off relays. Supporting circuitry is also added to route signal traces to and from the main meter processor - the MiniCloset5 Meter Head. The software additions include code modules that communicate with the added hardware, as described in the tables below.

Figure 1 is a connection block diagram of a preferred embodiment. Medium voltage power lines A, B, C, and N (neutral) are fed into Distribution Transformer 110. The low voltage lines connect (through the current transformers 120) the Distribution Transformer 110 to the Energy Guard unit 140. The Energy Guard unit 140 monitors the current transformers 120, and feeds the single phase customer lines 1-24.

Figure 2 is a block diagram of the preferred structure of an Energy Guard unit 140.

Scanning Transponder 210 is the preferred data collector for unit 140, can be located external to or within the MiniCloset, and can be the primary data collector for more than one MiniCloset at a time. The Scanning Transponder 210 preferably: (a) verifies data (each communication preferably begins with verification of clock and meter identity to ensure data integrity); (b) collect data (periodically collect a block of data from each meter unit, each block containing readings from

ES 2 554 499 T3 previously collected meter, interval readings and event logs); (c) stores data (preferably the data is stored in non-volatile memory for a specified period (eg, 40 days)); and (d) reports data (via PLC, telephone modem, RS-232 connection, or other means).

The slide plate 280 comprises a Minicloset meter head and a load control module 240 that provide the control signals to activate the relays. Preferably all electronics are powered by power supply 250. Backplate assembly 270 comprises multiple (eg, 24) Current Transformers and relays - grouped, in this example, as three sets of 8 CTs and relays. Customer cables are wired through the CTs and connected to the circuit at the customer's 290 facility. The remotely located Scan Transponder 210 accesses the Power Guard meter head and communicates bi-directionally using power line carrier communication.

The signal flow shown in Figures 1 and 2 is preferably achieved by implementing different software code modules that work concurrently to enable remote connection / disconnection capability in the Minicloset. These software modules, provided in the Appendix below, are:

<td>Code Module</td><td>Location</td><td>Function</td>

<td>lcm.def and pic.def</td><td>Load Control Module</td><td>Activate connection and disconnection of relays.</td>

<td>pulse.c and pulse.h</td><td>Meter Head</td><td>Establish communication with LCM.</td>

<td>picend.def and picvars.def</td><td>Meter Head</td><td>Provide control signals to the LCM.</td>

<td>pulselink.def and pulseoutm.c</td><td>Meter Head</td><td>Provide the LCM with pulses to be used to connect and disconnect relays.</td>

Figures 3-10 are schematic diagrams of preferred components, as described below. Preferred on / off relays are K850 KG series relays, but those skilled in the art will recognize that other relays can be used without departing from the scope of the invention.

<td>Figure</td><td>Schematic diagram</td><td>Detail</td>

<td> 3</td><td>PCB 107D</td><td>MiniCloset and Scanning Transponder CPU Board</td>

<td> 4</td><td>PCB 135C</td><td>Power Supply for Scanning Transponder.</td>

<td> 5</td><td>PCB 144C</td><td>MiniCloset Power Supply</td>

<td> 6</td><td>PCB 146C</td><td>This board provides the Current Transformer information back to the MiniCloset meter head.</td>

<td> 7</td><td>PCB 160A</td><td>Plates for the Load Control Module.</td>

<td> 8</td><td>PCB 170</td><td>EG power supply board adds capability for optical tamper detection.</td>

<td> 9</td><td>PCB 171</td><td>EG connecting plate. A plate with traces to route the signal.</td>

<td> 10</td><td>PCB 172</td><td>Control circuitry board for relay control</td>

In another embodiment, the Energy Guard implementation takes advantage of the similarity of the traditional circuit breaker panel architecture to the multi-channel measurement environment. In a circuit breaker panel, electricity is fed to the panel and distributed among various customer circuits by circuit breakers that provide the ability to connect or disconnect customer circuits.

In the MiniCloset / Energy Guard, multiple current transformers measure the current in the customer circuits and provide this data back to the central processing unit where the measurement quantities are calculated. However, the MiniCloset / Energy Guard has several key differences from a circuit breaker panel. For example, while circuit breakers are located near the customer's premises, the Energy Guard is typically installed near the utility distribution transformer. The advantages offered by this alternative embodiment will be apparent to those skilled in the art. For example, this embodiment offers improved overall dimensions and size over the previously discussed embodiments. Space is always a constraint when making equipment additions to existing electrical installations. This version of the Energy Guard ("EG"), with preferred dimensions of 28 "X 22" X 11 "(71.12 cm X 55.88 cm X 27.94 cm) provides a substantial advantage in situations where there are volumetric restrictions. .

The following description includes construction details, detailed schematic diagrams, and descriptions of preferred software. As with the previously discussed embodiments, this embodiment can operate to provide remote disconnect / connect operations, preventing theft, detecting tampering, detecting reverse voltage, performing pre-payment and load limiting, and performing meter validation.

Preferred EG Construction Details

In this embodiment, the main components of the EG are:

ES 2 554 499 T3

1. Energy Guard Base Set

2. Energy Guard Set

to. Phase bus bars and neutral bars

b. Transition bars

c. Acceptor module

3. Energy Guard Measurement Modules

to. Measurement modules

i. Integrated relay and current sensing modules

Four. Energy Saving Electronics

to. PCB 203

b. PCB 204

c. PCB 234

d. PCB 235

and. PCB 202

F. PCB 210

g. PCB 230

h. PCB 206

EG base set

The EG base comprises a lower locking part with screws and lock washers as a locking mechanism for the EG top cover, which is connected on one side by piano hinges. See Figure 11. The bottom of the closure provides routing for customer cables.

EG Set - Phase Bus Bars

Three aluminum phase bus bars are positioned towards the center of the Energy Guard assembly and staggered. See Figures 12 and 13. These provide connection to customer metering modules through the use of transition bars. A staggered bus bar layout is depicted in Figure 13. Bus bars are shown in black.

Neutral bars

The EG preferably comprises 4 neutral bars that form a chassis for the EG assembly, thus providing a path for the neutral current. This is shown in Figure 14. The lug on the crossbar provides the neutral power from the utility distribution transformer. Also, there are 2 motherboard neutral bars that carry the neutral current to the control module.

Transition bars

Transition bars complete the mechanical and electrical connection between customer measurement modules and phase bars. See Figure 15. A transition bar for phase A and C is shown in Figure 15A; A transition bar for phase B is shown in Figure 15B. Figure 16 shows the transition bars in black.

Acceptor module

An acceptor module is preferably made of plastic and mechanically accepts measurement modules that can be easily fitted into the EG assembly. Each eG has 4 acceptor modules that are stacked together and can accommodate either 12 biphasic or 8 triphasic measurement modules. See Figure 17. The acceptor module also provides a mechanical path for the motherboard neutral bus that connects to the control module. See Figure 18.

Customer measurement modules

Preferred customer metering modules provide the required metrology to measure the consumption of a single-phase, two-phase or three-phase customer. A single module functions as a complete standalone meter that can be tested and evaluated as a separate unit of measurement. Each module preferably comprises an integrated relay and current sensing module and metrology electronics, and provides a connection between the customer circuit and the phase bus bars. Figure 19 depicts a preferred integrated relay and current sensing module. Figure 20 depicts an exploded view of a preferred integrated relay and current sensing module.

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Figure 21 shows exploded views of preferred measurement modules. Figure 22 shows the measurement modules (shown in black) placed in the EG chassis assembly and the acceptor module.

Figure 23 shows an exploded view of the Energy Guard, and Figure 24 shows an exploded view of a preferred EG Assembly and EG Base Assembly.

electronics

The Control Module housings preferably comprise several PCBs that operate concurrently to collect measurement data from individual measurement modules and communicate over power lines to transmit this data to a master device, such as a Scanning Transponder ("ST" ).

Figure 25 shows a preferred Energy Guard distribution for this embodiment. Each customer line has a corresponding Measurement Module (PCB 203 and PCB 204, discussed below) (schematic diagrams shown in Figures 26 and 27).

A Rear Placement Board 2510 shown in Figure 25 (PCB 234; see Figure 28 for construction diagram and schematic diagram) is the common bus that routes signals on the EG. There are two types of communication options for the Rear Placement Board 2510 to enable data transfer from the 2520 Control Module to the individual Measurement Module PCB 203. This can be done using the 2-wire I2C option or the 1-wire serial option.

The Control Module 2520 comprises a Power Board (PCB 210; see Figure 29 for schematic diagram) is the power supply board that also has the PLC transmit and receive circuitry on it. The Power Board provides power to the CPU board and the electronics on the 203 boards. The Control Module 2520 also comprises an I / O Extension Board (PCB 230; see Figure 30 for schematic diagram) is a board with various I / O extension options that allow communication from Measurement Modules to the CPU board.

Control Module 2520 also comprises a CPU Board (PCB 202; see Figure 31 for schematic diagram), which has an on-board Digital Signal Processing (DSP) processor.

Finally, Control Module 2520 comprises a routing board (PCB 235; see Figure 32 for schematic diagram) with traces and a header with no electronics on it.

Each 2530 Customer Display Module (CDM) is installed at the customer's premises and can communicate bi-directionally with the EG installed in the distribution transformer serving the customer. The bi-directional PLC enables service-customer communication over low voltage power lines and enables the utility company to send regular information, warnings, special information about outages, etc., to the customer.

Each CDM 2530 comprises a selected combination of measurement and power supply along with PLC circuitry on the same board (PCB 240; see Figure 33 for schematic diagram). Each CDM preferably also has a 9-digit display board (PCB 220; see Figure 34 for schematic diagram). This screen communicates with the EG and displays information about consumption, cautions, warnings, and other service messages.

Hardware implementation

In one embodiment, the Energy Guard implements the Fast Fourier Transform (FFT) on the PLC communication signal at both the ST and the meter, and for measurement purposes performs detailed harmonic analysis. This section discusses an implementation scheme of the Measurement Modules, the communication with the Control Modules and the PLC communication of the Control Module with a remotely located Scanning Transponder.

Control Module 2520 comprises the power supply and PLC circuitry (PCB 210; see Figures 25 and 29); I / O extension (PCB 230; see Figure 30) and the CPU board named Meter D (PCB 202; see Figure 31). The power supply supplies power to the D-meter and I / O extension and contains the PLC transmitter and receiver circuitry. PCB 235 provides trace routing and header connection between various boards.

The Measurement Module can have two versions: 2 phases or 3 phases. The 2-phase version can be software programmed to operate as a single 2-phase meter or two 1-phase meters. The 2-phase version comprises a B2 meter (the schematic diagram of PCB 203 shown in Figure 26), while the 3-phase version comprises a B3 meter (the schematic diagram of PCB204 shown in Figure 27). The B meters act as slaves for the D meter in the 2520 Control Module. Meters D and B can communicate using a serial ASCII protocol. The various B meters are interconnected by BPB 2510 to 2520 which provide power, a J Hz reference and serial communications to the D meter.

ES 2 554 499 T3 preferred DSP engine for meter B is the Freescale F8014VFAE chip. The preferred microprocessor used to implement the CPU in meter D is one of the ColdFire Integrated Microprocessor family, MCF5207. The use of a specific processor is determined by the RAM and Flash requirements dictated by the meter version. A separate power supply and LCD board complete the electronic portion of the D-meter as a product. In addition to acting as a master for the B meters, the D meter is also a 3-phase meter and measures the output of the total transformer in which the EG is installed. As an anti-theft feature, this total is compared to the total consumption reported by the various B meters.

= total transformer output

The bases of the signal sources are as follows:

B2: two voltages, two currents and no carrier channel per power line (PLC).

B3: three voltages, three currents and no PLC channel.

D: three voltages, three currents and a PLC channel.

Each stream has an associated circuit to effect analog amplification and anti-overlap.

Specific to meter D is the preferred implementation of:

• A Phase Lock Loop (PLL) to block sampling of signal sources at a multiple of the incoming C / A line (line synchronous sampling).

• A 90-100 MHz Voltage Controlled Oscillator (VCO) controlled by the DSP processor by means of two PWM modules that directly control the system clock thus making the DSP consistent with the PLL.

• A phase synchronous detector that responds only to the fundamental of the incoming line frequency wave and not to its harmonics.

• Option to perform FSK and PSK modulation schemes.

Each measurement and communication channel preferably comprises front end analog circuitry followed by signal processing. Unique to analog circuitry is a fixed gain anti-overlap filter that provides first-order temperature tracking, thereby eliminating the need to recalibrate meters when temperature deviations are encountered. This is discussed below, and then a preferred signal processing implementation is discussed.

Voltage and current analog signal chain

The analog front end for voltage (current) channels comprises voltage (current) sensing elements and a programmable attenuator, followed by an anti-overlap filter. The attenuator reduces the incoming signal level so that clipping does not take place after the anti-overlap filter. The constant gain anti-overlap filter restores the signal to full value at the input of the Analog to Digital Converter (ADC). For measurement, the anti-overlap filter cuts frequencies above 5 kHz. The inputs are then fed into the ADC which is a part of the DSP. See Figure 35, which is a block diagram of a preferred analog front end for measurement.

While a typical implementation would include a Programmable Gain Amplifier (PGA) followed by a low gain anti-overlap filter, the invention, in this embodiment, implements a programmable attenuator followed by a fixed high gain filter. Also, the implementation of both of the anti-overlap filters on a single chip is the same as using the same Quad Op Amps in conjunction with 25 ppm resistors and NPO / COG capacitors. This unique implementation matching the anti-overlap filters ensures that the phase deviations found in both the voltage and current channels are exactly identical and therefore the precision of the power calculation (given by the product of V and I) is not. engaged. This provides a means for both the V and I channels to track temperature drifts down to the first order without recalibrating the meter.

In contrast, using a PGA in conjunction with a low gain filter cannot track phase shift in input V and I signals due to temperature. This is because the phase shift introduced by the PGA is a function of the gain.

PLC digital signal chain, current and voltage

Figure 36 is a block diagram of PCB board 202; the functions of each block will be evident to

ES 2 554 499 T3 those skilled in the art. Figure 36 shows a preferred DSP implementation.

This embodiment preferably uses a PLL to block the sampling of signal sources at a multiple of the incoming C / A line frequency. In the embodiment discussed above, the sampling is a rate asynchronous to the power line. In meter D, there is a VCO at 90-100 MHz that is controlled by the DSP engine by two PWM modules. The VCO directly controls the DSP chip's system clock (by turning off the internal PLL), so the DSP becomes an integral part of the PLL. Locking the DSP's system clock to the power line makes it easier to align the sample to the power line waveform. The phase detector should function to respond only to the fundamental of the incoming 60 Hz wave and not to its harmonics. Figure 37 is a block diagram of this preferred DSP implementation.

A DSP BIOS or voluntary context switch code provides three stacks, each for background, PLC communications, and serial communications. The little mic communicates with the DSP using an I2C controller. The MSP430F2002 integrated circuit measures power supplies, handling port, temperature, and battery voltage. MSP430F2002 tasks include:

i. maintain a RTC;

ii. measure the battery voltage;

iii. measure temperature;

iv. measure power supply + U;

v. reset the DSP on output power;

saw. provide an additional surveillance circuit; and vii. provide a 1 second reference to pass on the DSP during a time reference to measure the 1 second reference against the system clock from the VCO.

D-meter PLC communication signal chain

A typical installation consists of multiple EGs and STs communicating over power lines. The D-meter communicates bi-directionally with a remotely located Scanning Transponder through the distribution transformer. To enable this, this embodiment uses a 10-25 kHz band for PLC communication. The PLC signal is sampled at approximately 240 kHz (212 * 60), synchronous with the line voltage, following which a Finite Impulse Response (FIR) filter is applied to decimate the data. Preferred FIR specifications are provided below:

10-25 kHz band

<td>Number of referrals</td><td> 65</td>

<td>Stop band attenuation</td><td>71.23 dB</td>

<td>Band pass upper frequency</td><td>25 kHz</td>

<td>Lower stop band frequency</td><td>35 kHz</td>

<td>Sampled input</td><td> 60 * 4096</td>

<td>Sample output</td><td> 30 * 2048</td>

See Figure 38 for preferred in-phase filter frequency response and impulse response characteristics.

After decimation is done at 60 kHz (2¹¹ * 30), then a 2048 point FFT is performed on the decimated data. The data rate is then determined to be 30 baud depending on the choice of FIR filters. Each FFT produces two bits approximately every 66 ms when using FIRs in the 10-25 kHz band to communicate through the distribution transformers.

To avoid the communication problem in the presence of line noise, this embodiment preferably implements a single technique for robust and reliable communication. This is done by injecting PLC signals at frequencies that are odd half harmonics of the line frequency (60 Hz). This is discussed below, for an embodiment using a typical noise spectrum found on AC lines in the 12-12.2 kHz range.

Figure 39 illustrates injecting PLC signals at 60 Hz odd semi-harmonics. Since the FFT is done every 30 Hz and the harmonics are separated by 60 Hz, the data bits reside in the source that corresponds to 201.5- th and 202.5-th harmonic of 60 Hz in Figure 39. The algorithm considers these two sources of frequencies and compares

ES 2 554 499 T3 the amplitude of the signal in the two to determine 1 or 0. This FSK scheme uses two frequencies and produces a data rate of 30 baud. Alternatively, QFSK, which uses 4 frequencies, can be implemented to produce 60 baud.

When traversing through the transformers, both the ST and the D meters preferentially perform the FFT on the PLC and data signals every 30 Hz in a 10-25 kHz range. Since the Phase Lock Loops (PLL) implemented in both the ST and the D-meter are locked to the line, the data frames are synchronized to the line frequency (60 Hz) as well. However, data frames can shift in phase due to:

1. various transformer configurations that may exist in the path between the ST and the meter (deltaWye, etc.); Y

2. a phase shift due to the fact that STs are locked in a particular phase, while single phase and polyphase meters can be powered by other phases.

The signal-to-noise ratio (SNR) is maximized when the meter data frame and the ST data frames are closely aligned. From a meter standpoint, this requires receiving the PLC signal from every possible ST it can "hear", decoding the signal, checking the SNR by aligning data frames, and then responding to the ST that is producing the maximum SNR. Figure 40 depicts the 12 possible ways that the FFT frame received by the meter can be out of phase with the ST FFT frame. The dotted lines correspond to a 30 degree rotation that takes into account a delta transformer in the signal path between the ST and the meter.

Also, since the data frames are available every 30 Hz on a 60 Hz line, there are two possibilities that correspond to the 2 possible phases obtained by dividing 60 Hz by 2. Therefore, there are 24 ways that the data frames of meter can be misaligned with the ST data frames.

In each ST frame, there is an odd number of integral cycles of the carrier frequency. Since the preferred modulation scheme is Frequency Shift Keying (FSK), if there are n cycles to transmit bit 1, bit 0 is transmitted using n + 2 cycles of the carrier frequency. It becomes vital for the meter to recognize its own 2 cycles of 60 Hz in order to decode its data bits which are available every 1 / 30th of a second.

If the D-meter decodes signals with misaligned data frames, there is energy spilling into the adjacent frequencies (separated by half-odd). If the signal level falling at the “adjacent” frequency source is less than the background noise, the signal can be decoded correctly. However, if the spill is larger than the background noise, the ability to distinguish between 1 and 0 decreases, and therefore the SNR drops, resulting in an error when decoding. In conclusion:

to. If the frames are misaligned, data bit shifting occurs and the SNR degrades.

b. In the event that the frequency changes and there are misaligned data frames, there is a substantial amount of energy spilling into adjacent FFT sources, thereby interfering with other STs in the system communicating using frequencies on those specific sources. .

Once the clock shift corresponding to the highest SNR is determined, the meter is then locked until a significant change in the SNR ratio is found by the meter, in which case the procedure is repeated.

Measurement implementation on meter D and B using FFT

While Meter B and Meter D versions perform the measurement, Meter D is also responsible for collecting the measurement information from the various Meter B via PCB 234. Each data source in the meters has an associated circuit to perform. analog amplification and anti-overlap. Each of the analog front end sections has a programmable attenuator that is controlled by top-level code. The data stream is sampled at 60 kHz (2¹⁰ * 60) and then an FIR filter is applied to decimate the data stream to ~ 15 kHz (2⁸ * 60). Preferred filter specifications are shown in the table below and in Figure 41.

ES 2 554 499 T3

<td>Number of referrals</td><td> 29</td>

<td>Stop band attenuation</td><td>80,453 dB</td>

<td>Band pass upper frequency</td><td>3 kHz</td>

<td>Lower band pass frequency</td><td>12 kHz</td>

Since only data up to 3 kHz are of interest, preferably a 3-12 kHz run is used in the decimation FIR with ~ 15 kHz sample rate. Frequencies from 0-3 kHz or 12-15 kHz are mapped to 0-3 kHz. A real FFT is performed to produce 2 data sources that can be further decomposed into 4 data sources: Real and Imaginary Voltage and Real and Imaginary Current. This is achieved by adding and subtracting positive and negative mirror frequencies for the real and imaginary parts, respectively. Since the signal aligned in the 12-15 kHz range falls below 80 dB, precision is achieved using the previously discussed FIR filter. Alternatively, a 256-point complex FFT can be performed on each phase of the decimated data source. This produces 2 pairs of data sources: a real part, which is voltage, and an imaginary part, which is current. This approach requires a complex FFT of 256 every 16,667 milliseconds.

The results to perform the FFT are the voltage and current shown in Figure 42, where the notation V_m,_nindicates the mth harmonic of the nth cycle number. For example, Vn and In correspond to the fundamental of the first cycle, and V21 and I21 to the first harmonic of the first cycle, etc., as shown in Figure 42, which represents FFT frames by voltage, indicating the harmonics.

The real and imaginary parts of the harmonic content of any k-th cycle are given by:

= ^Re(^) + i); m = 1 ... M

Λ * = + 'HLí = ι .. · λ

The imaginary part of the voltage is the measure of absence of synchronization between the PLL and the line frequency. To calculate measurement quantities, the calculations are done in the time domain. In the time domain, the FFT functionality offers the flexibility to calculate measurement quantities using only the fundamental or including harmonics. Using the complex form of voltage and current obtained from the FFT, the measurement quantities are calculated as:

p - y * 1 *

W = Re (P) = Re (r_) * Re (7._t) + * Im (K_)

Var = Im (P) = Re (7_,) * - Re (Z,) *

Power Factor = W / P

However, in the above formulas, when harmonics (i /_m/ &lt;yl_mk, m = 1 ... / W, k = 1 ... n), all measurement quantities include the effects of harmonics. On the other hand, when only the fundamental (Vj / &lt;y / ir) is used, all the calculated quantities represent only the 60 Hz contribution. As an example, the calculations are shown when only the fundamental is used to perform calculations. Only Vi and h are used from all FFT data frames. The following quantities are calculated for a given set of N frames and a tune line frequency '·

ES 2 554 499 T3 kWh = ¿[Re (K_or ) * Re (/_b ) + ΙΐΒ (η,) * 101 (7 ,,)] * Δτ, * 10 '³

WAr = É [R_and(7 „) * Im (^,) - Re (r;,) 'Im (7_or)] * Aí, '1CT t = l í = ¡

1=1

<img file="ES2554499T3_D0001.tif" />

<img file="ES2554499T3_D0002.tif" />

The displacement power factor is given by:

Cos (ff) =

W

VA where Wy VA includes only the fundamentals and VA \ = V \ RMS * IRMS: where = I, RMS = ^ f | 7_w) · For N cycles.

This flexibility to include or exclude harmonics when calculating measurement quantities translates into a significant improvement over the capabilities offered by the previously described embodiment. Yet another feature offered by this embodiment is the Total Harmonic Distortion (THD) calculation. THD is the measurement of the harmonic distortion present, and is defined as the ratio of the sum of the powers of all harmonic components to the power of the fundamental. For the nth cycle, this evaluates to:

VTHD ',

<img file="ES2554499T3_D0003.tif" />

V_mm (/_mm) is the m-th harmonic from the n-th cycle obtained from the FFT, where

Vj = &amp;!.; = w „) '+ Im (7„ y.

Customer View Module

The customer display module is installed at the customer's premises, communicates with the Energy Guard near the transformer, and comprises: PCB 240, power supply and PLC circuitry (see Figure 33); and PCB 220, LCD display (see Figure 34). In one embodiment, the customer display unit installed in the customers residence is a bi-directional PLC unit that communicates with the EG. For example, not only can the service send messages, the customer can also request a consumption verification with the EG installed on the pole.

APPENDIX

ES 2 554 499 T3

LCM.DEF; QLC LCM (Load Control Module) program for PIC 16C63A;

»Inelude 'C: \ pictools \ 16c63a.inc'; inelude 'C: \ pictools \ l 6c63.inc';

; Configuration bits

FUSES _BODEN_OFF; Output ignition reset deactivated FUSES _CP_OFF; No code protection

FUSES PWRTEOFF; Disable on timer FUSES _WDT_ON; Watchdog timer activated

FUSES RCOSC; Oscillator = RC; Program parameter comparisons

<td>Software_type equ</td><td> 7</td><td>; What PIC program is this? ; 7 = LCM program</td>

<td>Softwarejversion equ</td><td> 2</td><td>; Version number</td>

<td>LCM_base_addr equ</td><td> 16</td><td>; First LCM address</td>

<td>Ram_start equ</td><td>020h</td><td>; Available RAM start</td>

<td>RESET_VECTOR</td><td>equ</td><td>0; Reset vector location</td>

<td>ROM_start equ</td><td>OOSh</td><td>; First available program location</td>

<td>Nurn_start_bits equ</td><td> 12</td><td>; Start bis number</td>

Port definitions

<td>9 comm_port</td><td>equ</td><td>HOLDER</td>

<td>data_out</td><td>equ</td><td> 3</td>

<td>data__in</td><td>equ</td><td> 4</td>

<td>clock_in</td><td>equ</td><td> 5</td>

<td>ctl_portequ</td><td colspan="2">HOLDER</td>

<td>driver_enable</td><td>equ</td><td>0 J Output bit for connecting controllers</td>

<td colspan="2">Driver_enable_mask</td><td>equ 1 «driverjenable</td>

Initialization Values ​​for I / O Ports

<td>init_TRISA</td><td>equ</td><td>00110000b</td>

<td>initJTRlSB</td><td>equ</td><td>OOOh</td>

<td>init ^ TRISC</td><td>equ</td><td>OOOh</td>

t Data address for port A * Data address for port B - output of all ports

J Data address of port C - sludge outlet

ES 2 554 499 T3

<td>read_TRISC equ</td><td>01 fil J Data address of port C for bridge reading - 0-4 input</td>

<td>Init_comm_port_value</td><td>equ 1 «data_out + Driver_enable_jmask</td>

<td>option reg val equ</td><td>1000111 Ib; Option to register initial value</td>

bit 7 = 1: Port B start off bit 6 = 0: Int with falling edge bit 5 = 0: Tc timer 0 uses inst clock bit 4 = 0: Tc timer 0 on rising edge bit 3 = 1: Prescaler used by WDT bit 2,1,0 = il: Pre-scaler divides by 128; NOTE - interrupts and timer 0 are not used by this program ms_preset equ 700; Time set for millisecond delay; Dc RAM locations

ORG Ram_start

<td>Status reg</td><td>ds</td><td> 4</td><td>; Status register</td>

<td>ORG</td><td>Status</td><td>reg</td><td></td>

<td>Status_MSB</td><td>ds</td><td> 1</td><td></td>

<td>Clk_timeout_flag</td><td>equ</td><td> 7</td><td>* Timeout limit for communication clock edge</td>

<td>bad reset flag</td><td>equ</td><td> 6</td><td>; Reset not found POR, WDT</td>

<td>POR_flag</td><td>equ</td><td> 5</td><td>; Power reset detected</td>

<td>WDT__reset_flag</td><td></td><td>equ</td><td>4 ; WDT reset, not from standby</td>

<td>StatusLSB</td><td>ds</td><td> 1</td><td></td>

<td>CPU reset_flag</td><td>equ</td><td>Ί</td><td></td>

<td colspan="2">Need_param_Teíresh_flag</td><td>equ</td><td> 6</td>

<td>Parity_err_flag</td><td>equ</td><td> 5</td><td></td>

<td>Global — cmd_timer</td><td>ds</td><td> 1</td><td></td>

<td>Jumper__state</td><td>ds</td><td> 1</td><td>; Current state of input bridges</td>

<td>Parameterreg</td><td>ds</td><td> 4</td><td>; Communication parameters</td>

<td></td><td>org</td><td colspan="2">Parameter_reg</td>

<td></td><td>ds</td><td> 1</td><td> »</td>

<td></td><td>ds</td><td> 2</td><td> 9</td>

<td></td><td>ds</td><td>l</td><td></td>

; Rapid communication variables

<td>Comm_state</td><td>ds</td><td> 1</td><td>• Stored state of dc uari dc fast communication</td>

<td>Wstate</td><td>ds</td><td> 1</td><td>9 Stored state of fast communication word handler</td>

<td>Comm_bit_count</td><td></td><td>ds</td><td>1 ; Bit counter for fast communication</td>

<td>Comm bufíer</td><td>ds</td><td>l</td><td>; Fast communication word dc buffer</td>

ES 2 554 499 T3

<td>Work ^ addr</td><td>ds</td><td> 1</td>

<td>Temp</td><td>ds</td><td> 1</td>

<td>Tpar</td><td>ds</td><td> 1</td>

<td>Word_count</td><td>ds</td><td> 1</td>

<td>Command</td><td></td><td>ds</td>

<td>RegisterJD</td><td>ds</td><td> 1</td>

<td>PIC_addr</td><td>ds</td><td> 1</td>

<td>Comm_buf</td><td>ds</td><td> 5</td>

<td>Inputhold</td><td>ds</td><td> 1</td>

<td>Output_bit_reg</td><td>ds</td><td> 4</td>

<td>Flags</td><td>ds</td><td> 1</td>

<td>Clk_wait_flag</td><td>equ</td><td> 7</td>

<td>Global_cmd_flag</td><td></td><td>equ</td>

<td>scratch</td><td>ds</td><td> 1</td>

<td>Timeout_ctr</td><td>ds</td><td> 2</td>

<td>Millisecs</td><td>ds</td><td> 1</td>

<td>Clk_timeout_ctr</td><td></td><td>ds</td>

<td>NPR_timer</td><td>ds</td><td> 2</td>

; Address read from bridges; Temporary registration; Cross-sectional parity; Counter for sending and receiving 5-bit words

J Command received on communication link; Register specified in communication command; Address of this PIC chip; Communication buffer; Record kept for value received from communication; Register kept for output bit mask; Program control flags; Indicates for which clock edge we are waiting 6; Global command of processing; Operation record; Counter for pulse duration; Counter milliscconds for pulse duration; Counter for clock time limit; Counter for necessary parameter refresh

ORG OaOh; RAM bank 1 locations

IF $ -land0100h error - RAM overflow ENDIF

ORG RESET_VECTOR jmp start; Jump to first program location

Start of program space

ORG ROM_start

<td colspan="3">Initialization</td>

<td>setb</td><td>RPO</td><td>; Pointer to upper register bank</td>

<td>jnb</td><td>NOT POR.got POR</td><td>; Power reset, set flags</td>

<td>clrb</td><td>RPO</td><td>; Pointer to RAM bank 0</td>

<td>jnb</td><td>NOT TO.WDT reset</td><td>; Surveillance reset</td>

<td>setb</td><td colspan="2">status MSB.bad_reset_flag; Indicate unknown reset condition</td>

<td>jmp</td><td>Do_initialÍze</td><td></td>

ES 2 554 499 T3

WDT_reset setb jmp got_POR clrb mov clr Do_initialize mov: clr_loop clr inc jz mov and jnz add jmp Jnit_state

StatusJMSB.WDT_reset__flag do_inítialize

RPO; Putero to RAM bank 0

Status_MSB, # l «PORjlag; Set flag BY Status_LSB

F SR, # Ram_start + 2; Pointer to past state flags

<td>INDF</td><td>; Clear RAM location</td>

<td>FSR</td><td>; Increase pointer</td>

<td>Init state</td><td>; If it's zero, done</td>

<td>W, FSR</td><td>; Get pointer</td>

<td>W, # 7fH</td><td>; Look at 7 LSB (Least Significant Bits)</td>

<td>: clr loop</td><td>JNo end of segment, continue</td>

<td>FSR, # 20h</td><td>i Pointer to next segment</td>

<td>: clr_loop</td><td>; No last segment, continue</td>

setb Status_LSB.CPU_reset_flag; Indicate CPU rcsctco setb StatuS_LSB.Need__param_refresh_flag; Indicate refresh of necessary parameter mov comm_port, # Init_comin_j&gt; ort_value; Initialize state of communication port mov Comm_state, # Edge_wait mov COmm_bÍt_COUnt_}#Num__start_bits; Initialize communication status fast machine clr PORTB clr PORTC jmp Main_loop; Start main program execution; Communication reception routines

Edge_waít mov! OPnON. # Option reg val setb comm_port.data_out dec Commbitcount jz See__edge_one jb Input_hold.data_in, Set_edge_ jmp Comm_ret

See_edge_one jnb Input_hoId.data_in, Set_edge mov Wstate, # Rcv_addr mov Tpar, # 01fh jmp Rcv_ncxt_word; Initialize watchdog timer t Set option register; send a 1; Reduce bit count; If it is zero, look for a 1 wait; Find 0, reset bit count if 1; Done wait; Search 1, reset if 0; First word is direction; Initialize parity

Rcv__stop mov mov jnb jmp

Comm_state, # Edge_wait

Comrn_bÍt_eount, # Num_Start_bits; Preset state to wait for edge

Input_hoid.data_in, Parity_error; Stop bit must be 1

Cmd_exec; Done, process received buffer

Rcv_bits ele&gt; Copy ...

ES 2 554 499 T3

<td>snb</td><td>Input_hoki.da.ta_m</td>

<td>setc</td><td></td>

<td>rl</td><td>Comm_buffer</td>

<td>jmp</td><td>Rcv_word_handler</td>

; ... input bit ...

; ... drag&gt; Shift buffer; Check whole word; Communication transmission routines

Send_edge

<td>dec</td><td>Comm_bit_count</td><td>; Reduce bit count</td>

<td>jz</td><td>: One</td><td>; If it is zero, send a 1</td>

<td>clrb</td><td>comm_port.data_out</td><td>; Send a 0</td>

<td>jmp</td><td>Comm_ret</td><td></td>

<td>: One</td><td></td><td></td>

<td>setb</td><td>comm__port.data_out</td><td>; Send a 1</td>

<td>jmp</td><td>Doxmitword</td><td></td>

<td>Send bits</td><td></td><td></td>

<td>rl</td><td>Comm_buffer</td><td>J Set xmit bit to carry</td>

<td>heh</td><td>tone</td><td></td>

<td>clrb</td><td>comm_port.data_out</td><td>; Send a '0'</td>

<td>jmp</td><td>tcheck</td><td></td>

<td>tone</td><td></td><td></td>

<td>setb</td><td>conun_port.data_out</td><td>; Send a 'Γ</td>

<td>tcheck</td><td></td><td></td>

<td>jmp</td><td>Xmit_word_handler</td><td></td>

; Driving routines! communication reception word&gt;

Re v_word_handl er

<td>djnz</td><td>Comm_bit_count, Comm_ret</td><td>; If word is not complete, continue</td>

<td>and</td><td>Conun_buffer, # 03fh</td><td>; Only 6 bits</td>

<td>ele</td><td></td><td></td>

<td>mov</td><td>W, »Comm_buffer</td><td>; Get 5 MSB of received word</td>

<td>cali</td><td>parítylookup</td><td></td>

<td>xor</td><td>W, Comm_buffer</td><td>; Compare with received word</td>

<td>jnz</td><td>Parityerror</td><td></td>

<td>rr</td><td>Comm_buffer</td><td></td>

<td>and</td><td>Conun_buffer, # 01 fh</td><td>; Extract 5-bit value</td>

<td>xor</td><td>Tpar, Comm buffer</td><td>t Calculate total parity</td>

<td>mov</td><td>PCLATH, # Rcv addr &lt;</td><td></td>

<td>mov</td><td>W, Wstate</td><td></td>

<td>jmp</td><td>W</td><td>; Execute word handler routine</td>

Rcv_addr clrb mov mov xor jnz setb jmp See_if_us

Flags.Global_cmd_flag; Clear global command flag

W, Comm_b uffer PIC_addr, W

W, # Ifh Sec_if_us Flags.Global_cmd_flag Its us i 'Get received address í Save it í It is global command ζ No, check address match J Set global command flag j Process rest of command

ES 2 554 499 T3 mov clrb mov: Ioop djnz mov mov setb mov mov and add cjne Its_us mov jmp! PORTC, # read_TRISC; Switch port C bits 0-4 to enter ctl port.driver enable; Disable output drivers, enable bridge read temp, # 9 temp,: loop W / PORTC Work_addr, W ctl_port.driver_enable! PORTC, # init „TRJSC&gt;

» &gt;

í

Jumper_state, W orkaddr Work_addr, # 03h Work_addr, # LCM_base_addr Work_addr, PIC_addr, Set_edge_wait

Wait at least 20 us

Get inverse of bridges in W

Record bridge value

Enable output drivers

Restore C port state; Record bridge status; Ignore all but 2 LSB i Add base offset

Wstate, # Rcv_cmd Rcv_next_word; Pointer to next routine

Rcv cmd

<td>mov</td><td>Comm and, Comm_buffer</td><td>&gt; Record command</td>

<td>jnb</td><td>Command.4, Comm_get_fast</td><td>'Fast read command, skip record ID</td>

<td>mov</td><td>Wstate, # Rcv_reg_ID</td><td>ζ Pointer to next mouse</td>

<td>jmp</td><td>Rcv_next_word</td><td></td>

<td colspan="2">Comm get fast</td><td></td>

<td>mov</td><td>Wstate, # Rcv_tpar</td><td>1 Pointer to next mouse</td>

<td>jmp</td><td>Rcvncxtword</td><td></td>

<td>Rcv reg ID</td><td></td><td></td>

<td>mov</td><td>rcgister_ID, Comm_buffer</td><td>; Record registration number</td>

<td>mov</td><td>W state, # Rcv_tpar</td><td>; Pointer to next routine</td>

<td>jnb</td><td>Command, 3, Rcv_next_word</td><td>; If there is no value, done</td>

<td>mov</td><td>word_count, # 7</td><td>; Initialize word count</td>

<td>mov</td><td>Wstate, # Rcv_value</td><td>I Pointer to next mouse</td>

<td>jmp</td><td>Rcv_next_word</td><td></td>

<td>Rcv value</td><td></td><td></td>

<td>rl</td><td>Commbuffer</td><td></td>

<td>rl</td><td>Commbuffer</td><td></td>

<td>rl</td><td>Comm_buffer</td><td>; Shift received bits to MSB</td>

<td>mov</td><td>Comm_bit_count, # 5</td><td>Shift 5 bits</td>

<td>: shift_loop</td><td></td><td></td>

<td>rl</td><td>Comm_buffer</td><td></td>

<td>rl</td><td>Comm_buf + 4</td><td></td>

<td>rl</td><td>Comm_buf + 3</td><td></td>

<td>rl</td><td>Comm_buf + 2</td><td></td>

<td>rl</td><td>Comm__buf + 1</td><td></td>

<td>rl</td><td>Comm_buf</td><td> Shift a bit from Comm buf to comm buf</td>

<td>djnz</td><td>Comm_bit_count ,: shift_loop</td><td></td>

<td>djnz</td><td>word_counkRcv_next_word</td><td>; more words?</td>

<td>mov</td><td>Wstate, # Rcv_tpar</td><td>J Pointer to next routine</td>

<td>jmp</td><td>Rcv_next_word</td><td></td>

<td>Rcv_tpar</td><td></td><td></td>

<td>mov</td><td>W, Tpar</td><td>; Get result of parity calculations</td>

<td>jnz</td><td>Parity_error</td><td>; If not 0, parity error</td>

<td>jmp</td><td>Set_rcv_stop</td><td>; Configure to receive stop bit</td>

ES 2 554 499 T3; Communication transmission word stamper routines

Xmit_word_hand 1st djnz Comni_bit_count, Comm_ret Do__xmit_word mov PCLATH, # $ &lt;mov W, Wstate jmp W; If word is not complete, continue; Execute Word Crawler Routine

Send addr

<td>mov mov jmp</td><td>Wstate, # Send cmd&gt; W, PIC_addr Send_next_word</td><td>Pointer to next word mouse Get direction</td>

<td>Sendcmd</td><td></td><td></td>

<td>mov</td><td>Wstate, # Send_value&gt;</td><td>Pointer to send value</td>

<td>jnb</td><td>Command .4, V alue_is_next</td><td>; Is it speed read command?</td>

<td>mov</td><td>W state, # Send_reg_L_ID&gt;</td><td>Pointer to next word routine</td>

<td>Valueis_next</td><td></td><td></td>

<td>mov</td><td>W, Command</td><td>Get command</td>

<td>jmp</td><td>Send_next_word</td><td></td>

<td>Send reg ID</td><td></td><td></td>

<td>mov</td><td>W statc, # Send_value&gt;</td><td>Pointer to next word routine</td>

<td>mov</td><td>W, Register_lD</td><td>Get Registration ID</td>

<td>j^mP</td><td>Send_next_word</td><td></td>

<td>Send_yalue</td><td></td><td></td>

<td>mov</td><td>Wstate_F#Next_value&gt;</td><td>Pointer to next word mouse!</td>

<td>mov</td><td>Word_count, # 7</td><td>Value is 7 words long</td>

Nex.t_value mov:! Oop rl rl rl rl rl rl djnz mov djnz mov mov jmp

Send_Tpar mov Wstate, # Send_stop mov W.Tpar

Comm_bit_count, # 5 comm_buf + 4 comm_buf + 3

Comm_buf + 2 Comm_buf + 1 Comm_buf Commbuffcr Comm_bit_count / .loop W, Comm_buffer word_count, Send_next_word Wstate, # Send_Tpar&gt; WjCommbuffer Send next word Get 5-bit word; If it is not the last word, all set ¡Send next parity ¡Pointer to next word mark »Get cross parity

ES 2 554 499 T3 jmp

Send_stop jmp

Send_next_word

Set_edge_wait; Return to reception mode; Process received buffer org lOOh

Cmd_exec Process_cmd cjbe Command, # 7h, Fast_register_read; Is it speed reading? Command axis, # 10h, read_register; is it read register command? CommandjftlSb.write-jegister axis; cs write log? Command axis, // 19h, rcsct_status_bits; Is it reset state?

jmp Cmd_process_done

Fast__register_read

<td>mov</td><td>register_n&gt;, eommand</td><td>; Register number that is equal to command code</td>

<td>Read_register</td><td></td><td></td>

<td>mov</td><td>W, # 27</td><td></td>

<td>mov</td><td>W, register_ID-W</td><td>; Get record index to read</td>

<td>jnc</td><td>Cmd_process_done</td><td>; If negative, not a valid record</td>

<td>mov</td><td>Temp »W</td><td>; Record Index</td>

<td>mov</td><td>PCLATH, # $ &lt;</td><td>j Set higher order PC bits</td>

<td>mov</td><td>W, Temp</td><td>1 Get Index</td>

<td>jmp</td><td>PC + W</td><td></td>

<td>jmp</td><td>cpy__output_reg</td><td></td>

<td>jmp</td><td>cpy reg 28</td><td></td>

<td>jmp</td><td>cpyreg 29</td><td></td>

<td>jmp</td><td>^cpy_^reg_30</td><td></td>

<td>cpy_^reg_3i</td><td></td><td>; Reg 31 = Status register</td>

<td>mov</td><td>Cotnm_buf, Status_reg</td><td></td>

<td>mov</td><td colspan="2">Comm_buf + 1, Status_reg + 1</td>

<td>mov</td><td colspan="2">Comm_buf + 2, Status_reg + 2</td>

<td>mov</td><td colspan="2">I ate »buf + 3, Status reg + 3</td>

<td>jmp</td><td>Setup_reply</td><td></td>

<td>Cpy_jeg_30</td><td></td><td>; Reg 30 = Serial number</td>

<td>cali</td><td>semo</td><td></td>

<td>mov</td><td>comm_buf + 3, W</td><td></td>

<td>cali</td><td>semo + 1</td><td></td>

<td>mov</td><td>comm_buf + 2, W</td><td></td>

<td>cali</td><td>semo + 2</td><td></td>

<td>mov</td><td>comm_buf + 1, W</td><td></td>

<td>cali</td><td>semo + 3</td><td></td>

<td>mov</td><td>comm_buf, W</td><td></td>

<td>jmp</td><td>Setup_reply</td><td></td>

<td>Cpy_reg_29</td><td></td><td>; Reg 29 = Software type and version</td>

<td>mov</td><td colspan="2">Commbuf, # Software_type</td>

<td>mov</td><td colspan="2">Comm buf + l, # Software version</td>

<td>mov</td><td>Comm_bufH-2, # 0</td><td></td>

<td>mov</td><td>Comm_buf + 3, # 0</td><td>; Send software type and version</td>

ES 2 554 499 T3

<td>jmp</td><td>Setup_reply</td>

<td>Cpy_reg_28 mov mov mov mov jmp</td><td>; Reg 28 - Parameter register Comm_buf, Parameter_reg Comm_buf + 1, Parameter_reg + 1 Comm_buf + 2, Parameter_reg + 2 Comm_buf + 3, Parameter_reg + 3 Setup_reply</td>

Cpyoutputreg; Reg 27 = Output status

<td>mov mov mov mov jmp</td><td>Comm_buf, Output_bit_reg Comm_buf + 1, Output_bit_reg + l Commbuf + 2, Output_bÍt_reg + 2 Comm_buf + 3, Output_bit_reg + 3 Setup_reply</td>

<td>Writeregister mov bits ¡loop rl rl rl rl rl djnz cjne mov mov mov mov clrb jmp</td><td>Comni bit count) # 5&gt; You need to offset buffer by 5 comm_buf + 4 comm_buf + 3 conun_buf + 2 comm_buf + I commbuf Comm_bit_count ,: loop Register_ID_&gt;# 28, See_write_output_reg; No register 28, see if output register Parameter_reg, Comm_buf Parameter_reg + 1, Comm_buf + 1 Parameter_regE2, Comm_—buf + 2 Parameter_reg + -3, Comm_buf + 3; Copy data received to record Status LSB.Need_param_refresh_flag; Reset necessary parameter refresh flag Cpy reg_28 '&gt; Send content back in response</td>

See_write_output_reg

<td>cjne mov mov mov mov cali jmp</td><td>Register LD, # 27₃Cind_process_done; If there is no check-out, ignore Output_bit_rcg, Comm_buf Output_bit_reg + 1, Comm_buf + 1 Output_bit_reg + 2, Comm_buf + 2 Output_bit_reg + 3, Comm_buf + 3; Copy received data to record Update_outputs Cpy_output_reg 1 Send contents back in response</td>

Reset_status_bits

<td>mov bits: loop rl rl rl rl rl djnz mov and / mov</td><td>ϋΟΠΙΠΊ COUfitjffS bit You need to shift buffer by 5 comm_buf + 4 comm_buf + 3 commbuft-2 comm_buf + l comm_buf Comm bitcount ,: loop W, / Comm_buf + 1 *, Get bytc Status__reg + 1, W; Clear bits WyComm_buf; Get MSB</td>

ES 2 554 499 T3 and Status__reg, W mov Register_ID, # 31 jmp Cpy reg 31; Clear bits; Indicate status register in response

Setupjreply jb Flags.Global_cmd_flag_JSet_edge_wait; If it was global, do not respond mov W, Status_LSB mov Comm__buf + 4, W and W, # 01fh or W, Status_MSB sz setb Comm_buf + 4.7

MSB mov Tpar, # lfh mov Comm_state, # Send_ © dge mov Wstate, # Send_addr mov CommJbitjcount, # Numjstart jmp Commret; Get status LSB »Preset stored flags; Disconnect 3 MSB; Combine 5 LSB with Status MSB

If any other flag bit set, indicate in Initialize parity word

J Go to send edge status

J Pointer to next mouse bit; initialize number of bits

Cmd_process_done jmp Set__edge_wait; No answer needed, done

J Exit ratins for communication

Parity_error setb statUS_LSB.Parity_err_flag; Report parity error Set_edge_wait mov Comm_State, # Edge_Wa¡t; Go to wait state limit mov Comm_bÍt_COUnt, # Num_Start__bítS; Initialize number of bits jmp Comm_ret

<td colspan="3">Set send_repiy</td>

<td>mov</td><td>Comm_state, # Send_edge</td><td>; Go to shipping limit state</td>

<td>mov</td><td>Comm_bit_count₁#Num_start_bits</td><td></td>

<td>jmp</td><td>Comm_ret</td><td></td>

Rcvnextvvord

<td>mov mov jmp</td><td>Comm_state, # Rcv__bits Comm_bit_count, # 6 Comm_ret</td><td>J Set to receive 6-bit word</td>

<td colspan="2">Send next word</td><td></td>

<td>and</td><td>W, # 01fh</td><td>ζ Only 5 bits</td>

<td>xor</td><td>Tpar, W</td><td>j Update parity calculation</td>

<td>cali</td><td>paritylookup</td><td></td>

<td>mov</td><td>Comm_buffer, W</td><td>ζ Record word with parity (6 bits)</td>

<td>rl</td><td>Commbuffer</td><td></td>

<td>rl</td><td>Comm_J&gt; uffer</td><td>I Move to MSB</td>

<td>mov</td><td>Comm_state, # Send_bits</td><td>J Set to send 6-bit word</td>

<td>mov</td><td>Conun_bit_count, # 6</td><td></td>

<td>jmp</td><td>Commjet</td><td></td>

<td>Set_rcv_stop</td><td></td><td></td>

ES 2 554 499 T3

<td></td><td>mov jmp</td><td>Comm_state, # Rcv_stop Comm_ret</td><td>J Pointer to next mouse</td>

<td></td><td>ORG</td><td>200h</td><td></td>

<td>Semo</td><td>retw</td><td>05h, 092h, 05fh, 000h</td><td></td>

<td> »</td><td>retw</td><td>Offh, Offh, Offh, Offh</td><td></td>

<td></td><td>ds</td><td> 4</td><td></td>

<td></td><td>ret</td><td></td><td></td>

*; Returns 6-bit value that corresponds to 5-bit value passed with odd parity parity_lookup

<td>mov</td><td>Temp, W</td><td>; Record Index</td>

<td>mov</td><td>PCLATH, #: table &lt;</td><td>; Set higher order bits</td>

<td>mov</td><td>W, Temp</td><td>; Get index</td>

<td>jmp</td><td>pc + w</td><td></td>

<td>retw</td><td></td><td></td>

1,2,4,7,8,11,13,14,16,19,21,22,25,26,28,31,32,35,37,38,41,42,44,47,49,50,52,55,56,5

<img file="ES2554499T3_D0004.tif" />

Set output bits according to received data

Comm_bur = pulse duration cu milliscconds

0: continuous output (infinite duration)

-255 set output state for specified duration after duration has expired, turn off all outputs

Comm_buf + 1 [3] = output state bitmap - MSB first bits 23-18: Unused bits 17-0: Outputs 18-1

Update_outputs

<td>mov</td><td>W, Comm buf + 3</td><td>; Get lsb</td>

<td>and</td><td>W, # 03h</td><td>; Only 2 bits required</td>

<td>mov</td><td>Tcmp, W</td><td></td>

<td>add</td><td>Temp, W</td><td>; Shift in bits 1 and 2 (XI and X2)</td>

<td>mov</td><td>W, PORTA</td><td>; Get current status of port A pins</td>

<td>and</td><td>W, # 0fl9h</td><td>; Clear output control bits</td>

<td>or</td><td>W, Temp</td><td>; Set desired output state</td>

<td>mov</td><td>PORTA, W</td><td>Issue new value</td>

<td>rr</td><td>comm_buf + l</td><td></td>

<td>rr</td><td>comm_buf + 2</td><td></td>

<td>ITEM</td><td>comm_buf + 3</td><td></td>

<td>rr</td><td>comm_buf + l</td><td></td>

<td>rr</td><td>comm_buf + 2</td><td></td>

<td>rr</td><td>comm_buf + 3</td><td>; Shift buffer to. left 2 bits</td>

<td>mov</td><td>PORTB, comtn_buf + 2</td><td></td>

<td>mov</td><td>PORTC, comm buf + 3</td><td></td>

<td>mov</td><td>IPORTA, flinitJTRISA</td><td></td>

ES 2 554 499 T3 mov mov mov jz ms_loop mov mov: loop djnz djnz djnz and clr clr! PORTB, # ínit_TRISB 'PORTC, # init_TRJSC Millisecs, Comm_buf doneoutputset

Timeout_ctr, # ms__preset &lt;Timeout_cb + 1, # ms_preset&gt;

Timeout_ctr4-1loop Timeout_ctr,: loop Millisecs, ms_loop PORTA, # 0f9h PORIB

PORTC done_output_set ret; First byte is pulse duration; Delay for pulse duration; Disconnect XI and X2; Disconnect other outputs

Main program start

Main_loop mov mov mov mov clr c.lrb Clkwait_loop djnz clr djnz djnz jb flag cleared setb jmp Clk_cont jb: low jb mov setb jmp: high jnb djnz djnz setb: cont mov mov jmp! PORTA, # Init_TRISA! PORTB, # Init_TRISB! PORTC , # Init_TRISC C lk_timeout_ctr, # 12 Clk_timeout_ctr + 1 Flags.Clk_wait_flag; Initialize port A address; Initialize port address B; Initialize C port address; Preset ...

J clock time limit counter ζ Indicate wait for lower clock scratch, C lk_cont

WDT J Resctear vigilante

Clk_timeout_ctr + 1, Clk_cont

Clk_timeout_ctr, Clk_cont

Status_MSB.POR_flag, got_POR; Ignore clock time limit until POR

StatusMSB.CJktimeoutflag; Indicate time limit in communication clock doinitialize

Comm_port.clock_in,; high; Top watch

F iags .C lk_wait_flag, Clkwait_Ioop

Inpnt_hold, Comm_pOrt; Record data port value

Flags.Clk wait flag; Indicate wait for top clock

Clkwait_loop

Flags.Clk_wait_nag, CIkwait_loop

NPR_timer + l,: cont; Dcc LSB of required parameter timer

NPR_timer,; cont; Dec MSB

StatUS_LSB.Need__param_refresh_flag; Set flag every 64k clocks

PCLATH, # 0 W, Comm_state W

J Set higher order bits for routines on page 0 • Get vector j Run communication state machine

ES 2 554 499 T3

Comm_ret jmp Main_Joop

ES 2 554 499 T3

PIC.DEF / *

Include file for serial communication with PIC chips * / #pragma switch (ALL, FREQ) switch (PIC_serial_status) {

case sending_bits:

case sending st5 bits:

flífdefVATEST out_bit_value = (PICxmitBuf.bits.bufLongfO] and 0x80000000) '= 0; / * Output bit value =

MSB * /

PICxmitBuf.bits.bufLongfO] = PICxmitBuf.bits.bufLongfO] «1;

if (PICxmitBuf.bits.bufLongfl] and 0x80000000)

PICxmítBuf.bits.buíLong [0] ++;

PICxmitBuf.bits.bufLongfl] = PICxmitBuf.bits.buíLongf 1] «1;

if (PICxmitBuf.bits.bufLong [2] and 0x80000000)

PICxm itBuf.bits .bufLongfl] ++;

PICxmitBuf.bits.bufLongfl] = PICxmitBuf.bits.bufLongfl] «1; / * Shift 96-bit buffer * / tfeise out_bit_value = 0;

shift LSB_ptr = andPICxmitBuf.bits.bufBytefl 2]; / * point to pass least significant word of 96-bit register * / asm (MOVE.L _shiñ_LSB_ptr, A0ⁿ,

<td colspan="3">"ROXL.W - (A0), ROXL.W - (A0),</td>

<td></td><td> ROXL.W ROXL.W ROXL.W ”ROXL.W</td><td>- (AO), - (AO), - (A0), - (A0),</td>

<td> */</td><td></td><td></td>

<td></td><td> ROXL.W</td><td>_outjb it_value "</td>

/ * Get pointer to buffer, clear drag * / / * Rotate left and reduce pointer * / / * Rotate left and reduce pointer * / / * Rotate left and reduce pointer * / / ♦ Rotate pointer left and reduce pointer * / / * Rotate left and reduce pointer * / / * 96 bits shifted, MSB in drag / * put MSB in out_bit_value * / ifendif break;

case do send cmd:

bitcounf = 'NUM_START_BITS-1; PIC_serial_status = sending start; out_bit_value = 0;

break;

case do__PIC__start: bit_count = 3 * BITS_PER_SEC; out_bit__value = l;

PIC_seria) _status = sending PIC start; break;

case sendingstart: out_bit_value = 0; break;

ES 2 554 499 T3 case sending stop:

case sending_start_l: out_bit_value = 1; brcak;

default: outbitvalue = 1;

if (out_bit_value) fsl004.io.pulse0ut20ff = 1;

else fsl Ó04.io.pulsé0llt20ff - 0; / * Send output bit * / in__bit_value = fs1004.to.pulseln 1 State; / * Get received bit value * / fsl004.io.puise0utl0ff = 1; / ♦ Send Increasing Clock Raneo * / switch (PIC_serial_status) {

case waiting for start;

if (ID_bit_value = 0) zero_count-H-;

else {

if (zero_count = (NUM_START_BITS-1)) í

PIC_serial_status = reving bits; bit_count = PICrcvBuf.bitCount + 1; ) else zero__count - 0;

} break;

case reving bits:

tfifdefV ATEST

PICrevBuf.bíts.bufLong [0] = PICrevBuf.bíts.bufLong [0] «1; if (PlCrcvBuf.bits.bufLong [l] and 0x80000000)

PICrcvBuf.bits.bufLong [0] -l- +;

PlCrcvBuf.bits.bufLong [l] - PICrcvBuf.bits.bufLong (l) «1; if (BlCrevBuf.bíts.bufLong [2] and 0x80000000)

PICrcvBuf.bits .bufLong [1] ++;

PlCrcvBuf.bits.bufLong [2] = (PICrcvBuf.bits.bufLong [2] «1) + inJbit — Value;

// else shift_LSB_ptr = andPiCrcvBuf.bits.bufByte [12J; / * Point to 96-bit register least significant word * / asmf 'MOVE.L _shift_LSB_ptr, A0,

<td>"ROXL.W - (A0),</td><td> /*</td>

<td> ROXL.W - (A0),</td><td> /*</td>

<td> ROXL.W - (A0),</td><td> /*</td>

<td>, ROXL.W - (A0),</td><td> /*</td>

<td> ROXL.W - (A0) ”,</td><td> /*</td>

<td> ROXL.W - (A0)ⁿ</td><td> /*</td>

/ ♦ Get pointer to buffer, delete drag ♦ /

Rotate left and reduce pointer * /

Rotate left and reduce pointer * /

Rotate left and reduce pointer * /

Rotate left and reduce pointer * /

Rotate left and reduce pointer * /

96 bits have been shifted, LSb are unknown

ES 2 554 499 T3);

PIC-rcvBuf.bits.bufByten 1] = (PlCrcvBuf.bits.bufByte [l 1] and Oxfe) | in bit value; / * Add in received bit * / #endif break;

default:

{ }

if (—bit_count &lt;= 0) í.

switch (PÍC_serial_status) {

case rcving_bits:

PIC_seriaI_status - revine stop;

bit_count = l;

break;

case sending bits:

PIC_serial_status = sending stop;

bit_count = 1; .

break;

case sendingjstop:

if (PICxinitBuf.PIC_addr = GLOBAL — PIC_AT&gt; DR.)

PIC_serial — status - idle;

he is {

PICjserial_status = waiting for start;

bit_count = PiC_wait_lim it;

zero_count = 0;

} break;

case sending PIC start:

PIC_seriaI_status = idle;

break;

case sending_start

PIC — serial_status = sending start 1;

bit — count = 1;

break;

case sending start 1:

PIC — serial_status = sending_bits;

bit_count = PICxmitBuf.bitCount;

break;

case waiting for start:

PICrcvBuf.flags | = rcv_timeout_flag | rcv_data_ready_flag;

PIC_seria] _status = idle;

break;

case rcving — Stop:

if (in_bit_valué = 0)

PICrcvBuf.flags | “rcv_bad_length_flag;

P] C_serial_status · = idle;

PICrcvBuf.flags j = rcv_data_ ^ ready_flag;

bit_count = 1;

ES 2 554 499 T3 break;

default:

PIC_serial_status = idle;

Ϊ tfpragma switch (ALL, NOFREQ)

ES 2 554 499 T3

PRESS.C # inelude mtrlink.def ”/ * #include flash.def '* /

-¿Define PSTRU_DEFINED // inelude pulselink.def ”#include pulse.h ¿inelude” ufloat.h tfinclude '' log.h tfinclude alarm.h ¿inelude copymem.h ¿inelude plcctrl.h ¿inelude &lt;stdio.h&gt;

¿Ifdef fakeMCS ¿undefNUMPH. Define NUMPH 24? Endif / * Define WDT flags for PIC communication routine * /? Pragma region (rarn = WDTFlags) short int WDTpulseSec;

Pragma region (ram = ram) pragma region (data = secondBack) void (* pu lse SecondpXvoid) = pulseSecond;

Pragma region (data = data) ifndef IS_MC5 pragma region C'data = everySubsecond) ifdef 1S_RSM void (* pulseSubsecp) (void) = puIseSubsccond; Else void (* pulseSubsecp) (void)^spuIseService; Endif pragma. region (data = data) ¿endif ¿pragma region (data = powerüp) void (* pulseStartupp) (void) = pulseStartup;

Pragma region ('^,data = data * ') pragma region (data = dayBack) void (* pulseDayp) (void) = pulseDay;

Pragma region (data ^ data)

ES 2 554 499 T3 / * Empty PIC * / void pulseColdstartO.

t λ

int i;

for (i = 0; i &lt;num_PICs; iH-) if (PlC_status [i] .software_type = 3) {

PICstatusfi] .clear_pulse_regs = TRXJE;

PIC_status [i] .get_status = TRUE;

'}. olear state - SEND_GLOBAL_CLR;

} void pulseStartup (void) t

i int i;

ífifndef IS_RSM int work_PlC_addr;

#endif # ifdefIS_MC5 int work__num_pu! ses;

tfendif tfifdefV ATEST '* Test !!! * / tempcommand = SYSTEMCONTROL;

tempregID = 0;

temp_command_data = READ_ENCODER_ID;

temp_flags = rcv_data_ready_flag;

tfendif for (i = 0; (! dont_clear_PIC_stats) andand (i &lt;(2 * NTJMPH)); i ++) {

puIseData [i] .error_cnt = 0;

pufseData [i] .ED_fieJd [0] = O;

pulscData [i] .reading - 0;

for (i = 0; i &lt;MAX_PICS; í ++)

PIC_status [i] .PIC__addr = Ó;

ho! d_num_pulse_ctrs = releaseCodep-&gt; option.numPulseCounters;

if (hold_num_pulse_ctrs&gt; NUMPH) num_pulse_ctrs = NUMPH;

else num_pu! se_ctrs = hold_num_pulse_ctrs;

numJMCs - 1;

tfifdef IS_MC5

- PlC_statús [O) .PIC_addr = MC5_MUX_PÍC_ADDR; / * If MC5, add PDM PIC to table

PIC * /

ES 2 554 499 T3 if (int_configltniessg.configLTM [PULSE 1] .accum) {

work_num_pulses - num_pulse_ctrs;

work_PIC_addr = 0;

while (work_num_jiulses&gt; 0) {

PIC__status [num_PICs ++]. PIC_addr - workJPIC_addr ++; / * Pulse counters for Q13 * / work_num_pulses - = 4;

} · ·. if (int_configItmessg.configLTM [PULSE2] .accum) {-. . · · WOrk_num_jjulses = num__pulse_ctrs;

work_PIC_addr = 6;

while (work_num_jjulses&gt; 0) (

PlC_status [num_PICs + -t -]. PIC addr = work Pic_addi ^ - +; / * Pulse counters for Q14 work_num_pulses - = 4;

} num LCMs = releaseCodep-&gt; option.LCM_flags and 0x03;

work_PIC_addr = LCM_BASE_ADDR;

for (i = 0; i &lt;num_LCMs; i ++) {

PIC_status [num_PlCs-H -] - PIC_addr = work_PIC_addr ++; / * LCM * /}

#else tfifdef IS_ST5

PIC_status [0] .PIC_addr = ST5_MUX_PIC_ADDR; / * If ST5, add mux to PIC table. * /

ATMwork = releaseCodep-&gt; option.couplers_mask;

work_PIC_addr = ATM_BASE_ADDR;

for (i = 0; i &lt;4; i ++) {

if ((ATM_work and 0x08)! = 0) {/ * Bit is set to mask, add ATM PIC to table * /

PJC_status [num_PICs-t - +]. PIC_addr = work_PIC_addr;

} work_PIC_addr ++;

ATM_work = ATMwork «1;

} #else if (num_pulse_ctrs = 0) num_PICs = 0;

tfendif #endif for (i = 0; i &lt;MAX_PICS; i ++) {/ *. Create PIC table * /

PlC_siatus [i] .get_semo = TRUE;

PIC_status [i] .get_version = TRUE;

PIC_status [i] .get__status = FALSE;

PICjstatus [í] .reset_status = FALSE;

PIC_status [i] .updatejiarameter = FALSE;

ES 2 554 499 T3 if (Idont — clear__PIC_stats) {'

PIC_status [i] .PIC_reset_count = 0;

PIC — status [i], commerrorcount = 0;

PIC — status [i] .PlC_data_err_count = * O; PIC_status [i] .software_type = O; PlC_status [i], software_version = 0; PIC status [i] .serial-number = 0;

)

PIC_status [i] .curr_puIse_reg = 0;

# ifdeflS_MC5 if (PIC_status [i], PIC_addr&gt; = ST5_MUX_PIC_ADDR) PIC_status [i] .reply_waitJimit = DIRECTJPIC_WAITLIMIT; else

PlC_status [i] .repIy_waitJimit = BUFFERELDPIC-WAITLIMIT; / 'else

PlC_status [i] .reply_wait_limit - DIRECT_PIC_WAIT_LIMIT; #endif if (PIC_status [i] .PIC — addr &lt;= MAX_PULSE_PIC_ADDR) PlC_status [i] .num_pulse_regs = PULSES_PER_PIC;

else '

PIC_status [i] .tnnn .__ pulse_regs - 0;

} current — PTC_index = 0;

rcv_PlC — Index = 0;

if (dont_clear_PIC_stats) dont_clear_PIC_stats = FALSE; / * Bonar flag * / else í

PIC_bad — addr_count = 0;

PICrcvBuf.flags = 0;

PICjSerial_status = do_PIC_start;

. PIC clk State = clk low; / * Initialize serial communication variables * /}

clear_3tate = NOGLOBALSEND;

pulseOutMode = releaseCode.option.picMode; / * For compatibility with old code * / if (startup.coldStart) í

pressColdstartO í}

j

ES 2 554 499 T3 const unsigned char parity6 [32] = void pulseDayO {

dont_clear_PIC_stats = TRUE; / * Tell pulseStartup not to clear error counts * / rebuild_timer = REBUILD DELAY; / * Configure delayed table rebuild * /}

void pulseSecondO ΐ

flifndef 1S_ST5 pulseServicef);

ífendif íf (Comm_background__flags.do_rebuild) (

pulseStartupO;

Comm_background_flags.do_rebuild = FALSE;

} if (Comm_background flags.do_alarm). {putAlarm (andPIC_alarm, 4);

Comm_background_flags.do_alann = FALSE;

}

I / * F unction set_PLC_rclays * / / * Requested from PLC routines to request update * / / * PI.C port multiplexer chip on S'1'5 power board * / # ifdefIS_ST5 void setjPLC_relays (int xmitRclay , int rcvRelay) f

while (MUX_control.actíve_flag || MUX_control.request_flag) {

ccwaitO;

MUX_control.xniit_mask = xmitRelay;

MUX_control.rcv_mask = rcvRelay;

MUX_control.done_flag = FALSE;

MUX_control.request_flag = TRUE;

if ((MUX_control, xmit_mask! = MUX_control.Iast_xmÍt_rnask) || (MUX_control.rcv_mask MUX_control.last_rcv_mas! c)) {while (* MUX_control.done_flag andand! (MUX_control.activeIC_flag andand_ bits)^-)) ccwaifO;

} }

ES 2 554 499 T3 #endif void pulseService (void) r

BOOLEAN need__pulse_read, copy_rcvd_data, rcv_buf_err;

# ifdefIS_MC5

BOOLEAN got_vcr_3, got_ver_3_3;

int j;

unsigned char * work_charjptr;

unsigncd long work_jbit_mask;

// endif. int work_pulse_index;

phaccum accumXfer;

int i;

if (num_PICs ~ O)

PIC_serial_status = idle;

if (PICserialstatus = idle) &lt;

if ('WDTpuIseSec)

WDTpulseSec = l; / * Indicate WDT driver is OK * /}

if (hold_num_jjulse_ctrs 1 = releaseCodep-&gt; option.numPulseCounters) {/ * hdwr-n has changed * / dont_clear_PIC_stats = FALSE;

rebuild_timer = l; / * force immediate table rebuild * /}

. if ((PIC_serial_status = idle) andand (rebuild_timer l— 0) andand (—rebuild-timer = 0)) {

Comm_background_ñags.do_rebuild = TRUE;

} else if ((PIC_seriaLstatus = idle) andand (num_PICs! = 0) andand (pulseOutMode 1 = PIC_MC__SERIAL) andand (! Comm_backgronnd_fiagS.do_rebuild)) f * serial processing enabled? * [{if (PICrcvBuf.flags and rcv_data_ready_flag) (/ * Process message received * /

PICrcvBuf.flags and = ~&gt; rcv_data_ready_flag;

ES 2 554 499 T3 rcvjbuf_err -! Decode_rcv_buffer ();

if ((PIC ^ comm_mon.control_flags and RCV_DATA_RDY) - 0) í

PIC_comm_mon.rcv__buf = PICrcvBuf; PIC_comm__mon.contro1_flags (= RCV_DATA_RDY;} if ((ext_comm.control_flags and CPY_RCV_DATA)! = 0) ext_comm.rcv_buf = PICrcvBuf;

ext_comm.control_fiags and = ~ CP.Y_RCV_DATA; ext_eomm.controi_flags | = RCVDATARDY;

} ftifdef IS_ST5 if (ATM_control.active_flag) {

ATM_control.result_flags - PICrcvBuf.flags;

if (rcv__buf_err) {

if (ATM_control. state 1 = WAIT_ALIGN) {

ATM_controI.error_flag = TRUE;

ATNÍ_control.active_flag - FALSE;

ATM_control.done_flag = TRUE;

}· }

else {· switch (ATM control .state) {

case DO_PRESET:

{

ATM__controLxmit_leve! - PICrcvBuf.command__data »24; ATM_control.coupler_level = (PICrcvBuf.command_data »16) and OxOff; ATM_control.active_flag = FALSE;

} break;

case SET_AL1GN:

{

ATM_contfol.state = WAÍT ALIGN;

} break:

case WA1T ALIGN:

{

ATM_control.optimum_cap_c &lt;ide = PICrcvBuf.command_data and ATM_RC „C AP_MA SK;

ATM_control.optimum_reading = PICrcvBuf.command_data »16; ATM_control.result_flags | = (PICrcvBuf.command_data and OxeOOO);

/ ♦ Copy flags from response * /. if ((ATM_control.result_flags and OxeOOO)! = 0) (/ * Analog levels out of range: * /

ATM_control.error_flag = TRUE;

}

ES 2 554 499 T3 if (ATM_contro¡.optimiim_reading &lt;ATM_MIN_READING) {

ATM_controLreSUlt_flagS | = 0x1000; / * Indicate reading too low * / ATM_control.errorflag = TRUE;

}

ATM_control.active_flag = FALSE;

break;

case DO_PLC_SET;

case DO_ATM_DISCONNECT:

{

ATM_controi, activate_flag. = FALSE;

} break;

default:

{

ATM_control.actíve_flag = FALSE;

ATM_control, errorflag = TRUE;

break;

} }

if (lATM_control.active_flag)

ATM_coiitrol.done_flag = TRUE;

} if (NíUX_control.active_flag) {

MUX_control.resuIt_JIags = PICrcvBuf.fiags;

if (rcv buf err) {

MUX_control.error_flag - TRUE;

MUX_control.last_xniit_niask ~ 0;

MUX_control.last_rcv_mask = 0;

} clse {

MUX controLlast_xmít_mask = PICrcvBuf.command_data and Oxff;

MUX_control.last rcv_mask = (PICrcvBuf.command_data »8) and Oxff; }

MUX_control.active_flag = FALSE;

MUX_control.done_flag = TRUE;

} #endif if (rcv_buf err) {

tfifdef IS_ST5 if (! ATM__control.activc_flag || (ATM_control.state 1 = WA1T_ALIGN)) flendif {

last_comtn_err_flag = PICrcvBuf.fiags;

copymem (sizeof (PICbitBuf), (char *) (andHoldrcvBuf), (char *) (andPlCrcvBuf));

if ((PICrcvBuf.fiags and rcv_bad_addr_flag)! = 0)

ES 2 554 499 T3 {/ * Past end of valid PICs, address error * /

PIC_bad — addr_count ++;

set — PIC — alarmfPICadden · —O, PICrcvB u f.PIC_addr, (PICxmitBuf.PIC — addr «8) + PICxmitBuf.command);

} else {/ * PIC address was valid, but communication failed * /

PIC — status [rcV — PIC — indexj.comm — error_count ++;

if (PIC — statusfrcv PIC index] .conim_error_count&gt; 2) &lt;

set — PIC-alarm (PÍ C_comerr_0, PIC-Status [rcv_PIC_index] .PIC_addr, PICrcvBuf.flags);

} / * Contact lost with PIC, read serial number and software version * /

PIC — status [rcv_PIC_index] .get_semo = TRUE;

PIC_status [rcv PIC — index] .get_version - TRUE;

} }

} else {/ * Valid message received * / if ((PICrcvBuf.command = READ_REGISTER) andand (PICrcvBuf.reg_ID = STATUS_REG)) {

process — status_bits ();

} else íf (PICrcvBuf.command = SYSTEMCONTROL) {

if (PICrcvBuf.reglD = STATUS_REG) (/ * Response from cmd of reset status bits * /

PIC — status [rcv — PIC_index] .reset_status = FALSE; procesS-StatuS — b its ();

} riifdef IS_MC5 else if ((PIC_statusLrcV — PIC — Index] .software_type = 4) andand ((PIC — stanrs [rcv_PIC — index] .last_cmd — data and OxffffüOOO) = READ_ENCODER_1D)) / * Response from read ID comd)) / * Response from read ID comd)) encoder * / work — pulse-Index = (PlCrcvBuf.PIC_addr * PULSES_PER_PIC) + PICrcvBuf.reg — TD;

i “(PIC — status [rcv_PIC_index] .last — cmd — data and OxOOOOfíDO)» 8; work — char_ptr = (unsigned char *) andPÍCrcvBuf.command__data; fbr (j = 0; j &lt;4; j ++) · {

if ((* work_char-ptr = 0) || (i&gt; = ID_FIELD_LENGTH)) &lt;

j = 10; / * Indicate end of message found * /} 'else &lt;

pulseDatafwork — pulse — index] .ID_buffer [i] = * work_char_ptr, i ++;

work — chai — ptr ++;

} }

ES 2 554 499 T3 {/ * Final dc ID field found from remote encoder * / for (i = 0; i &lt;ID_FIELD_LENGTH; i ++) {pulseDatafworkjpu lse_index], ID_field [i] = pulseData [workj »ulse_indexJ.ED-bufferfí ];

pulseData [work_pulse_index] .ID_bufferfi] = 0;

} }

ii

} else if ((PiCrcvBuf.command - READ — REGIS TER) andand (PICrcvBuf.regJD = ERROR — REG)) {

if (PIC_status [rcv_PIC_index]. software_type = 4) {/ * Remote Encoder Interface Module * / w ° rk_pulse__¡ⁿdex = (PICrcvBuf.PIC_addr * PULSES_PER_PIC) + (PiCrcvBuf.command — data »24);

if (work_pulse__index &lt;(2 * NUMPH)) puiseData [work — pulse_index] .error_cnt-H-;

for (i = 0; i &lt;ID_FIELD — LENGTH; DulseData {work_pulse_index] .ID_buffer [iH-] = 0);

}} ¿Endif

- ·} else if ((PiCrcvBuf.command - WR1TE REG1STER) andand (PICrcvBuf.reg ID = PARM_REG)) í

PIC_status [rcv_PIC_i ndex). update_parameter = FALSE;

} else if ((PiCrcvBuf.command = READ_REGISTER) andand (PÍCrcvBuf.reg ID = VERS_REG)) í PIC_status [rcv_PIC_index] .get_version = FALSE; PIC_status [rcv_P] 'C_index] .software_type = (PICrcvBuf.command — data and OxffDOOOOO) »24;

i PíC_staiusfrcV — PIC_index] .software_version = (PlCrcvBuf.command_data and OxOOffOOOO) »16; PIC_status [rcv_PIC_index] .loop-rate = (PICrcvBuf.command — data and OxOOOOffDO) »8;

} else if ((PICrcvBuf.command - READ_REGISTER) andand (PICrcvBuf.reg_ID == SERNO-REG »{

PIC_status [rcv_PIC-index] .get-Semo = FALSE;

PlC — StatusfrcV — PIC_index] .serial_number = PICrcvBuf.command — data;

} ... · . .

else if (((PiCrcvBuf.command = READ_REGISTER) | l (PICrcvBuf.command &lt;~ MAX_FAST_READ)) andand (PICrcvBuf.reg_ID &lt;= MAX_PULSE_REG)) {/ ♦ Pulse read * / work_pulse_ICndexB * / work_pulse_ICndexB *. PERJPICI + · PICrcvBuftreg ID:

ES 2 554 499 T3 if (work_pulse_index &lt;(NUMPH * 2)) {pulseData [work_pulse_index] .reading - PlCrcvBuf.command_data; copy_rcvd_data = FALSE;

if (P [C_status [rcv_PIC_index] .get_version) {

} else if (PIC_status [rcv PIC index] .software_type = 4) {/ * Remote Encoder Interface Module * / copy_rcvd_data = TRUE;

• accumXfer.low = pulseData [work_pulse_index] .reading;

} else if (PIC_status [rcv_PIC_index] .software_Jype = 3) {/ * Remote pulse counter module * / copyrcvddata = TRUE;

if (! PIC_status [rcv_PIC_mdex] .get_semo) ΐ

sprintf ((char *) press £&gt; ata [work__pulse_index] .ID_field_JS% OSldP% d_JPIQ_status [rcv_PTC_index] .serial_number₅PICrcvBuf.regID);

} if (releaseCode.option.countEveiyEdge) {accumXfer.low = pulseData [work_pulse_index] .reading;

else {accumXfer.low = pulseData [work_pulse_indcx] .reading »1;

}} accumXfer.high = OL;

tfifndefV ATEST if (copy_rcvd_data) {

# ifhdefIS_MC5 / * It is an RSM or ST5, so the mapping for pulse 1 to 4 is MlQ13, M1Q14, M2QI3, M2Q14 * / ph [0] [work_pulse_index / 2] [(work_pulse_indexand0x0l)? PULSE2: PULccSEl]. = ph [1] [work_pulse_jndex / 2] [(work_pulsc_ir.dexand0x01)? PULSE2: PULSE 1] .accum^;accumXfer;

ΐ / else / * It is an MC5, so the default for pulse 1 to 48 is M1Q13..M24Q13, M1Q14..M24Q14 · / ph [0] [work_pulseindcx% NUMPH] [(work_pulse_indcxZNUMPH)? PULSE2 ¡PRESS 1 ] .accu m =

ES 2 554 499 T3 ph [l] [work_jjulse_index% NUMPH] [(woriq_pulse_index / NUMPH)? PULSE2: PLrLSEl] .accu m - accumXfer;

#endif}

fiendif)

} if ((PICrcvBuf.flags and (PlC_error_flag j PIC_invaIid_data_flag))! = 0) PlC_status [rcv_JPIC_index} .get_status = TRUE; ...

if ((PICrcvBuf.flags and PICneed_refresh_flag)! = 0) PIC_status [rcvJPIC_mdex] .update_paratneter = TRUE;

/ * check status flags * / f

and f

/ * Decide which command to send ♦ /

PICxmitBuf.flags = 0;

jf ifndefISSTS _ · / * MC5 or RSM, check cold start processing to clear pulse records * / if (clear_state = SEND_GLOBAL_CLR) {/ * Cold start, send global clr * /

PICxmitBuf.PIC_addr - GLOBAL_PIC_ADDR;

PICxmitBuf.command = CLEAR_PULSE_REGISTERS;

format_xmit_buffer ();

clear_state = SENDING_GLOB ALCLR;

PIC_serial__status = do_send_cmd; (* Start UART * /}

else if (clear_state = SENDING_GLOBAL CLR).

t cJear_state = GLOBAL CLR ^ SENT;

} #else / * ST5, check ATM operations (Automatic Tuning Module) * / if (ATM_control.request__flag) {

ATM_contro! .Request_flag = FALSE;

ATM_control.error_flag = FALSE;

ATM_control.acriveflag - TRUE;

ATM__control.state = ATM_DONE;

PICxmitBuf.PlC_addr = ATM_control.ATM_nuinber + ATM_BASE_ADDR;

switch (ATM_control.operation) {

case SET_PRE_ALIGN :.

ES 2 554 499 T3

PICxmitBuf.command = WRITEREGISTER;

PICxmitBuf.reg_ID = OUTPUTJREG;

PICxmitBuf.command ^ data = ATM_control.start_cap_code and ATM_RC_CAP_MASK; '' '

PICxmitBuf.commanddata | = ATM_PRESET_CODE;

ATM_ccntrol.state = DO_PRESET;

break;

case DO_ALIQN:

. PICxmitBuf.command = WRITEREGISTER;

PICxmitBuf.regID = CONTROL_REG;

if (ATM_control.start_cap_code&gt; ATM_control.end_cap_code) ATM_control.end_cap_code = ATM_control.start_cap_code;

PICxmitBnf.commandjdata = ATM control.start cap code and ATM_RC_CAP_MASK;

PlCxmitBuf.command_data = (PICxmitBuf.command data «12) | (ATM_control.end_cap_code and ATM_RC_CAP_MASK) I (ATMJMEAS_TIME «24);

ATM_control.state = SETJALIGN;

ATM_control.align_timer - ATM_control.end_cap_code ATM_control.start_cap_code;

ATM_control.align_tnner * = ((ATM DISC_T1ME + ATM_MEAS_TIME + 4) * (1.25 / 62.5));

ATM_control.align_timer + = 13; / * Time in 1/64 s to wait before checking result * / / * Number of stages * time per stage + 25% + .2 seconds * / break;

case SET NORMAL_PLC:

PICxmitBuf.command = WR1TE_REGISTER; PlCxmitBuf.regJD = OUTPUTJREG;

PICxmiiBuf.command_data = ATM_control.optimum_cap_code and ATM_RC_CAP_MASK;

PICxmitBuf.commanddata | = ATM_PLC_CODE;

ATMjcontrol.state = DO_PLC_SET;

break;

case DISCONNECTCOUPLER:

PICxmitBuf.command = WRITEREGISTER; PlCxmitBuf.regJD = OUTPUTREG;

PICxmitBuf.command data = ATM_controliOpt¡mum__cap_code and ATM_RC_CAP_MASK;

PlCxmitBuf.command_data j = ATM_DISC_CODE; . ATM_control.state = DO_ATM__D1SCONNECT; break;

defauit;

case READ_XM1T_LEVEL:

. ATM_control, error__flag = TRUE; ATM_control.done_flag =&gt; TRUE; ATM_control.active_flag FALSE; break;

ES 2 554 499 T3 if (ATM_control .acti ve_flag) {

format_xmit ^ buffer ();

PIC_wait_iimit = D1RECT_PIC_WAIT_LIMIT;

PIC_serial_status = do_send_cmd; / * Start UART * /}

else if (ATMcontrol.activeflag) if ((ATM_control.state! = WAIT.ALIGN) [| (—ATM_control.align_timer &lt;= 0)) {

ATM_controI.error_flag = TRUE;

ATM_control.done_flag = TRUE;

ATM_control.active_flag - FALSE;

} else | / * Interrogate ATM for end of auto-tuning * /

PICxmitBuf.command = 0; format_xmit_bufferO;

PIC_waitJimit = DIRECT_PÍC_WAIT_LIMIT;

PIC_serial_status = do_send_cmd; / * Start UART * /}

} else if (MUX_control.request_flag) {

MUX_control.request_flag = FALSE;

MUX control.error_flag = FALSE;

if ((pressOutMode = P1C_ST_SERIAL)) (

PICxmitBuf.bits.bufByte [O] = ((MUX_control.rcv_mask and 0x03) «5) | ((MUX_control.xmit_mask and Ox7f) »2);

PICxmitBuf.bits.birfByte [l] = ((MUX_control.xmit_mask and 0x03) «6);

bit_count = 11;

PIC_serial_staius = sending st5 bits; / * Start UART * / MUX_control.iast_xmit_mask - MUX_control.xmÍt_n) ask; MUX_control.last_rcv_mask = MUX_control.rcv_mask; MUX_control.done_flag = TRUE;

.} else

MUX_control.active_flag = TRUE;

PICxmitBuf.PIC_addr = ST5_MUX_PÍC_ADDR; PICxmitBuf.command = WRTTEREGISTER; PICxmitBuf. regID = OUTPUT_REG;

PICxmitBuf.ccmmand_data = (MUX_controI.rcv_mask «8) + MUX_control.xmit_mask;

íbrmat_xmit_buffer ();

PlC_wait_lÍxnít = DJRECT_PIC_WA1T_LIMTT;

PIC_serÍal__status. =? do_send_cmd; 1 * Start UART * /

ES 2 554 499 T3 #endif else if ((ext_comm.control_flags and (XMIT_DATA_RDY | XMIT_REQUEST)) = • (XM1T Jl) ATA_RDY I XMIT_REQUEST)) {, / * 'Send command for external routine ♦ /

PICxmitBuf = ext_comm.xmit_buf;

ext_comm, control_flags-and = —XMIT_REQUEST; ext_comm.control_flags | = CPY_RCV_DATA;

/ * Find correct PICstatus index for requested PIC * / for (i = 0; ((i &lt;MAX_PICS) andand (PIC_status [i] .PlC addr! = PICxmitBuf.PlC „addr)); i ++); · If (i &lt;num_PlCs) {

PIC_status [i] .last_cmd_data "PICxmitBuf.commanddata; PlC_status [i].! Ast_command = PICxmitBuf.command;

} / lifdef 1S_MC5 if (ext_camm.xmit_buf.PIC_addr &lt;ST5_MUX_PÍC_ADDR) PIC_wait_Kmit = BUFFERED_PIC_WA1TLIM1T;

else fondif

PIC_waitJimit = DIRECT_P1C_WAÍ [T_LIMIT;

format_xinit_bufferO;

PlC¿senal_status = do_send_cmd; / * Start IJART · /}

else if (((ext_comm.control_flags and SUPPRESS_NORMAL_COMM) = 0) #ifdef IS__ST5 andand (—ST5_PIC_delay_ctr &lt;= 0)) {

ST5_PlC__delay_ctr = ST5_PIC_DELAY; / * Slow down routine communications in ST5 * / tfelse)

{

Wendif

PICxmitBuf.PlC_addr = PIC_status [current__PlC_index] .PTC_addr; need_pulse_read = TRUE; / * Set default values ​​* / # ifdefIS_ST5 if ((pulseOutMode = PTC_ST_SERIAL) andand (PICxmitBuf.PICaddr = ST5_MUX_PIC_ADDR)) {}

else

ES 2 554 499 T3 #endif if (PIC_status [current_PIC_index] .force_pulse_read andand (! PIC_status [current__PÍC_index] .get_version) andand (PICstatus [current_PIC_index] .PIC_addr &lt;{ST5_MUX) „PIC_ADDR)„ PIC_ADDR)

PICsratus [current_PIC_index] .force_pulse_read = FALSE:

} · Else, · í PIC_status [ourrent_PTC_Jndex] .force_pulse_read = TRUE;

Sifndef IS_ST5 if (PlC_status [current_PIC_index] .clear_j&gt; ulse_regs andand (clear_state = GLOBAL_CLR_SENT)) f / + Global clear sent, get status * / need_pulse_read - FALSE;

PICxm itBuf.command - READ_REGISTER; PICxmitBuf.regJD = STATUS_REG; format_xmit_bufferO;

} else tfendif if (PIC_status [current_PlC_index] .get_veision) í ·. 'need_pulse_read = FALSE; PICxmitBuf.command = READ_REGISTER; PlCxmitBuf.reg_TD = VERS_REG;

formatxm it_buffer ();

else if (PIC_status [current_PlC_index] .get_semo) {

need_pulse__read = FALSE;

PICxmitBuf.command - RJEAÜ_REG1STER; PlCxmitBuf.reglD. = SERNO_REG; formatxm it_bufferO;

} else if (PlC_status [current_PIC_index] .update_parameter) &lt;

PICxmitBuf.command = WR1TEREGISTER;

if (PIC_status [current_PIC_jndex] .software_type = 3) {/ * pulse ctr * / r / * Pulse ctr parameters * / / * power-on sample rate: 42 / s * / / * Power-off sampling rate: 1 / s * / / * Days to count if pulses are received: * / / * RSM: 5 days * / / * PI) M: 35 days * / / * Days to count if no pulses are received: * / / * RSM : 1 day * / / * PDM: 3 days. * / / * In RSM, the 2 lsbs of * /

ES 2 554 499 T3 / * load_shedmask [0] is sent to * / / * the output bits of PIC * / #ifdefIS_RSM

PICxmitBuf.command_data = 0x01150507 and (load_shed_state [0] | ΟχΓΓΠΊΤΓο);

flelse

PICxmitBuf.command_data = 0x0115230d;

#endif

Ϊ # ifdefIS_MC5 else if (P1C — status [current_PICJndex] .software_type = 4) {/ * remote encoder reader * /

PICxTnitBuf.commanddata - READ_ENCODER — PARM;

if ((releaseCodep-&gt; option.couplers_ mask and 0x01) = 0) {/ * If mask bit 0 is 0, no touchpad support * /

PICxmitBuf.command — data and = OxffOOfíiff;

} }

else if (PIC_status [current_PIC_index] .software_type - 5) {/ * MC5 mux * / got_ver_3 - É. ° l_^watch_3_3 = FALSE;

for (i = 0; i &lt;num_PICs; ¡-H-) {

if (PIC_status [j] .get_version) {

got_ver_3 = TRUE; got_ver_3_3 = TRUE;

} else if (PIC_status [i] .software_type = 3) {

got_ver_3 = TRUE;

if (PIC_status [i] .software_version = 3) got — view — 3—3 = TRUE;

} if (got_ver_3) {

if tgot_ver_3_3 andaitd ((rcleascCodep-&gt; option.coiiplers_mask and 0x02) 1 = 0)) í

PTCxmítBuf.command-data = 0x0c007000; / * 32 bps, periodic wake-up * /}

else &lt;PICxmitBuf.command_data = 0x0c007080; / * 32 bps, no wake-up * /) '} else

PICxmitBuf.command — data = 0x02030080; / * 205 bps, no wake-up * /}

#endif i / ifdcflS ST5

ES 2 554 499 T3 else if. (PIC_status [cun-ent_PIC_index] .software_t \ 'pe = 8) {/ * Auto-tuning module * /

PICxmitBuf.commanddata = 0x020300001 (ATM_DISC_TIME "8) | · (ATM_RC_XMIT_ON" 8) | ATM_NUM_CAP_BITS;

/ * xmit offset = 2, cplr offset = 3, * / / * relay delay = ATMD1SC_TIME, Xmit mask = ATM_RC „XMIT_ON, * / / * number of capacitor relays = ATM_NTJM_CAP_BITS * /}

else if (PIC_status [current_PlC_jndex] .software type —- 6) {/ * ST5 mux * /

PICxmitBuf.command_data = 0x00000000;

} '' tfendif else if (PIC_status [current_PlC_mdex] .software__type = 7) {/ * Load control module * / 'PICxmitBuf.commanddata = 0x00000000;

else {'

PIC_status [current_PICindex] .update_parameter = FALSE;

/ * Unknown software type, cancel command * /}

if (PIC_status [current_PIC_index] .updatejparameter) {

need_pulse_read = FALSE;

PlCxmitBuf.reg_ID = PARM_REG;

format_xjmit_buffer ();

} }

else if (PICjstatus [current_PIC_index] .reset_status) {

need_pulse_read = FALSE;

PICxmitBuf.command = SYSTEM_CONTROL; PICxmitBuf.command_data = (PIC_status [current_PTC_index] .status_reg_value and Oxffbf); PICxmitBuf.command_data = PICxmitBuf.command_data «16; / * Move status bits to MSb * /

PICxmilBuf.rcgJD = STATUS_REG;

fbrmat_xmit_buffer ();

} else if (PIC_status [current_PlC_index] .get_status) &lt;

need_pulse_read = FALSE;

PICxmitBuf.command = READREGISTER; prCxmitBuf.reg ID = STATUS_REG; format_xinit_bufferO;

# ifdefIS_MC5 if (need_prilse_read andand (PIC_sratus [currcnt_PIC_index] .soñware_type = 4)) í need_pulse_read = FALSE;

PICxmitBuf.command = SYSTEM_CONTROL;

ES 2 554 499 T3 if (++ PlC_status [current__PIC_index] .curr_ID_reg&gt; = PULSES_PER_PIC) PlC_status [current_PIC_index], cun_ED_reg - 0;

if ((((PIC_status [current_PIC_index] .PIC_addr * PULSESJPERJ3IC) + PIC_statusIcurrent_PIC_index] .curr_ID_reg)% 24)&gt; = num_pulse_ctrs) PIC_status [current_PIC_index] .rcg ~JD;

PlCxmitBuf.reglD = PIC_status [current_PIC_index] .curr_ID_reg; work_pulse_index = (PIC_status [current_PIC_index] .PIC_addr * PULSESPERPIC) + PICxmitBuf.reg_lD;

for (i = 0; i &lt;lD_FIELD_LENGTH; i ++) í if (pulseData [work_pulse_index] .ID_buffer [i] = 0) í i = ID_FIELD_LENGTH;

} }

ifÜ &lt;0) i j = 0;

} else if (j&gt; (ID_FIELDJLENGTH-4)) {

j = UT_FIELDJLENGTH-4;

}

PICxmítBuf.command_data = READ_ENCODER_ID | (j «8) ;; format_xmit_bufferQ;

} #endif}

if (need_pulse_read) &lt;

// ifdef IS_MC5 if (PIC_status [current_PIC_index] .software_type = 7) i = PIC_status [current_PIC_index] .PIC_addr - LCM_BASE_ADDR; / * Get I.CMN * / work bit mask = (load_shed_state [0 '| »(9 * i)) and OxOOOOOlff;

PlCxmitBuf.command — data = 0;

for (Í = 0; i &lt;9; i ++).

{if ((work_bit_mask and 0x100)! = 0) PICxmitBuf.corninand_data ~ (PICxmitBuf.command data «2) + I; / * Isb turns on relays * / else

PICxmitBuf.command_data = (PICxmitBuf.command data «2) + 2; / * msb turns relays on. * / work_bit_mask = work_bit_mask «1;

}

PICxmitBuf.COmmand_data | = 0x32000000; / * Set pulse time - 50 ms * /

ES 2 554 499 T3

PICxmitBuf.command = WRJTEJREGISTER;

PICxmitBuf.reg ^ ID = OUTPUT_REG; formalxmitbufferO;

need_pulseread = FALSE;

} else í / endif if (PIC — status [current_PIC_ index] .num_pulse_regs = 0). {ííifindef IS_ST5

PICxmitBuf.command = READ_REGISTER;

. PICxmitBuf. regJD - VERS_REG;

format — xmit — bufíerO;

need_pulse_read - FALSE;

ftendif} else {ífifdef 1S_MC5 if ((((PIC_status [current_PIC_index] .PIC_addr * PULSES_PER_PIC) + PIC_status [current_PIC_index] .curr_jju1se_reg)% 24)&gt; = num_pulse_ctrs)

PIC_status [current_PIC_index] .curr_pulse_reg = 0; í / endif if (PIC_status [current_PIC_ »ndex] .curr_pulse_reg &lt;= MAX_FASTJREAD) PICxmitBuf. command = PIC_status [current — PIC_index] .curr_pulse_reg;

else

PICxmitBuf. command = READ_REGISTER;

PICxmitBuf.regID = PIC_status [current_PICJndex] .curr._pulse_reg;

&gt; format — xmit_buffer ();

need_pulse_read = FALSE;

. if (++ PlC_status [current__PIC — index] .curr_pulse_reg&gt; = PIC_status [cuirent_PIC_index] .num — pulse — regs) {

. PJCstatus [currcnt_PIC_index] .curr_pulse_reg = 0; tfifdef IS_RSM

PIC_status [currenl_PIC_index] .update — parameter = TRUE; ΐ / endif)

}

PIC_status [cuiTent_PIC_index] .last_cmd__data = PICxmitBuf.command_data; PIC_status [current_PICJndex] .last — command = PICxmitBuf.command;

PIC — wait — limit = PIC_starus [current_PTC_index] .reply_wait__limit;

rcv_PIC_index = current_PIC_index;

if (++ current_PIC_Índex = num_PICs) current_PIC_index = 0;

if (Ineed jpulse_read)

PIC — serial_status- = do ^ send — cmd; / * Start UART * /

ES 2 554 499 T3}

} }

tfifdef IS_RSM 7 * In RSM, generate serial source from subseconds * / void pulseSubsecond (void) {

if (numJPICs! - 0) {·.

if (PIC_clkjstate = clkjngh) {

/ *. Increasing float, only set lower clock '* / fsl 004.io.pulse0utl0ff = 0;

PlC_clk_state = * clk_low;

} else {

PIC_clk_state = clk_higb;

#inelude pic.def / * Make PIC serial communication at clock range limit * /}}}

index void process_status_bits (void) f

X unsigned int work_pulse_index, work_status_bits;

PIC_status [rcv_PlC_index] .get_status = FALSE;

PIC statusfrev PIC indexl .status reg value = PÍCrcvBuf.command_data »16;

PIC statusfrev PIC indexl-time since global = (PICrcvBuf.cornmand ^ data »8) and Oxff;

if (PIC statusfrev PIC indexl .status reg value! ~ 0) &lt;

PIC_status [rcv_PIC_index] .reset_status = »TRUE;

ifffPIC statusfrev PIC indexl.status reg value and OxSflO) 1 = 0)

PIC_status [rcv_PlC_index] .PIC_data_err_count ++; / ♦ pie detected bad data ♦ / set__PIC_alarm (PIC_flags_O, PIC__status [rcv_PIC_index], PIC_addr,

PIC statusfrev PIC indexl.status reg value):

work_status_bits = (PIC_status [rcv_PIC_index] .status_reg_value »8) and OxOf; work_pulse_index = PIC_status [rcv_PIC_index] .PIC_addr * PULSES_PER_PIC; while (work_status__bits&gt; 0) í

if (work_status_bits and 0x01) pulseData [work_pulse_index] .error_cnt + H-;

ES 2 554 499 T3 work_status_bits = work_status_bits »1; work_pulse_indexH- +;

}}. . '· If (((PIC_status [rcv_PlC_index] .statusreg_yalue and 0x20) 1 = 0) andand! PlC_status [rcv_PIC_Jndex] .clear_pulse_regs) {

PIC_status [rcv_PlC_index] .comm_error_count ++; / * Error &lt;ie P1C communication parity detected * / if (PIC_status [rcv_PTC_indcx] .comm_crror_count&gt; 2) ΐ set_PIC_alarm (PlC_comerr_0_&gt;PIC_status [rcv_PIC_index] .PIC_addr, PICrcvBuf.fiags | 0x0800);

} }

if (fPlC statusfrcv PIC indexl.status reg value and 0x3080)! = 0) {

PlC_status [rcv_PIC_indexJ .PIC_reset_count + -t-; / * PIC has been reset * / if (PIC_status [rcv_PIC_index), PIC_reset_count&gt; 1) ({set_pIC_alarni (PiC_reset_O, PIC_status [rcv_PIC_index] .PIC_addr, PIC_status [rcv_status).

} }

if (PIC_status [rcv_PIC_index] .clear_pulse_regs andand (c) ear_state = GLOBAL_CLR_SENT)) {.

PIC__status [rcv_PIC_jndex] .clearj&gt; ulse_regs = FALSE;

if £ ((PIC_status [rcv_PIC_indcx] .status_reg_value and OxOf)! = OxOf) andand (PlC_status [rcv_PIC_index] .soñware_type = 3)) í

PlC_status [rcv_PIC_index] .PrC_data_err_count ++; / * Delete cmd failed * / set_PIC_alarm (PIC_flags_O, PIC_status [rcv_PICJndex] .PIC_addr, PIC statusfrcv PIC indexl.status reg value);

} · Else if (£ (PIC_status [rcv_PICJndex] .status_regjvalue and OxOf)! = 0) andand ((PIC_status [rcv_PIC_index] .sta.tus_reg_vaIue and OxflO) == 0)) ΐ

PIC_status [rcv_PICJndex] .PIC_data_eir_count 1000; / * Cmd clr false * / set_PIC__alann (PIC_flags_O, PIC_status [rcv_PICjndex] .PIC_addr,

PIC_status [rcv_PIC_index] .status reg value);

} }

void set_PIC_alarm (alanncodes pass_alarm_codes, int pass_PIC_addr, unstgned int pass_alarm_data) rt if (! Comm_background_flags.do_alarm) {

PIC_alarm.alann__codes = pass_alann_codes + pass_PIC_addr;

ES 2 554 499 T3

PICalarm.ack = pass_alarm_data; Comm_background_flags.do_alarm = TR.UE;

} i

unsigned char workTpar;

BOOLEAN decode_rcv_buffer (void) t

int i;

unsigned int worklnt;

workTpar = 0x1 f;

if (PICrcvBuf.flags = 0) {

work_PIC__addr = GetS 0;

if (PICrcvBuf.flags == 0)

PlCrcvBuf.PlC_addr - work_PlC_addr; / * Valid address received * / PICrcvBuf.command = Get5 (); if (PICrcvBuf.command&gt; OxOf)

P.ICrcvBuf.reg_ID = Get50;

else

PICrcvBuf.regíD = PICrcvBtif.command;

PICrcvBuf.command_data = 0;

for (i = 0; i &lt;6; iH)

PlCrcvBuf.command_data - (PlCrcvBuf.command_data «5) + Get5 (); worklnt ~ Get50;

PLCrcvBuf.command_data = (PICrcvBuf.commaTid_data "2) + (worklnt" 3); PICrcvBuf.flags j = worklnt and 0x07;

worklnt = Get50;

if (workTpar! = 0)

PICrcvBuf.flags | = rcv_tpar_error_flag;

} / * Find correct PIC status index for received buffer data * / for (i = 0; ((i &lt;MAX_PICS) andand (PIC_status [i] .PIC_addr! = PICrcvBuf.PIC „addr)); i ++);

if (i&gt; = num__PICs)

PICrcvBuf.flags | = rcv__bad addr_flag; / * Passed end of valid PIOs, address error * / if (i == MAX_PICS) rcv_PIC_index = 0;

else rcv_PJC_index = i;

5ifdefVATEST # ifVATEST = l

PICrcvBuf.command = temp_command;

PlCrcvB »if.reg_ID = I fear reR ID;

PlCrcvBuf.command_data = temp_command_daia;

PICrcvBuf.flags = temp__flags;

flendif #endif

ES 2 554 499 T3 retumfíPICrcvBuf.flags and ~ (PIC_error_flag | PIC__need_jefresh_flag | PIC_invalid_data_flag)) - O);

void fc&gt; rmat_xmit_buffer (void) f

int ÍJ, ShiftCount;

unsigned int Worklnt;

unsigncdlong WorkData;

PICxmitBuf.bitCount = Ó; '

PICxmitBuf.bíts.buíLong [0] = 0;

PICxmitBuf. bits.bufLong [1] ~ 0; .

PICxniítBuf.bits.bufLong [2] = 0; / * Clear xmit bit buffer * / workTpar = Oxlf; / * initialize Tpar ​​* /

StufT6 (? LCxmitBuf.PIC_addr);

StufT6 (PICxmitBuf.command);

if (PICxmitBuf.command&gt; OxOf) í

Stnffó ^ ICxmitBuf.rcgJDD);

if (PÍCxrnitBuf.command 0x17) {

WorkData ~ PICxmitBuf.commanddata;

ShiftCount ~ 32;

for (i = 0, i &lt;7; i ++) f

i

Worklnt = 0;

-for G-0j &lt;5ü ++) í

Worklnt = Worklnt «1;

if (WorkData and OxSOOOOOOO)

Worklnt 4 = 1;

WorkData = WorkData «1;

if (—ShiflCount = 0) (

Worklnt = (Worklnt «3) + (PICxmitBuf.flags and 0x07);

j = 5 ;.

}

·).

Stuff6 (Worklnt);

• í ·} ··}

Stuff6 (workTpar); ,, / * Buffer set, configure UART control * / '

PICrcvBiif.bhCount = 66;

if ((PIC_comm_mon.control_flags and XMIT_DATA_RDY) ~ 0) í

PIC__comm_mon.xmit_buf = PICxmitBuf;

PIC comm_mon.contro1_ftags | = XMIT_DATA RDY;

&gt;

ES 2 554 499 T3

PlCrcvBuf.flags - 0;

PICrCVBuf.PIC_addr = PICxmítBuf.PIC_addr; / * Default remote PIC address * /} unsigned int Get5 (void) {

int byte_index, bitjndex;

unsigned int work_result;

work_result = 0;

if ((PlCrcvBuf.flags and - (PIC_error__flag | PIC_need_refresh_flag | PICJnvalid_data_flag)) = 0) í byte__index = 96- PTCrcvBuf.bitCount;

bit_index = byte_index and 0x07; byte_index = byte_index »3; work resuit = (PICrcvBuf.bits.bufByte [byte_index] «8) + PICrcvBuf.bits.bufByte [byte_index + 1];

work result = work_result »(10 - bit_index); work-result and = 0x3 f;

if (parity6 [work_result »1]! = work_result) &lt;work_result = 0; PlCrcvBuf.flags | = rcv_parity__err_flag;

} else í work_result = workjresult »I; workTpar^Λ= work_result; PICrcvBuf.bitCount - 6; if (PICrcvBuf.bitCount &lt;0) PlCrcvBuf.flags ¡== rcv_bad Iength_flag;

}} return (work_result);

} void Stuff6 (int pass_data) {

int byte_index, bitjndex; workTpar pass_data;

byteindex = PICxmitBuf.bitCount »3; bit_index = PICxmitBuf.bitCount and 0x07; pass_data = parity6 [pass — data] «(10 - bit_index); PICxmitBuf.bits.buffiyte [byte_index] | = pass_data »8; PICxmitBuf.bits.bufByte [byte_index + l] | = pass_data and Oxff; PICxmitBuf.bitCount + = 6;

ES 2 554 499 T3

PULSE.H / * * / #ifndef BOOLEANJDEFINED ^ define BOOLEAN_DEFINED typedefint BOOLEAN;

#endif / * Subsecond processing for pulse counters * / void pulseSubsecond (void);

/ ♦ Reconstruction of daily PIC table * / void pu! SeDay (void);

/ * Main PIC communication routine ♦ / void pulseService (void);

/ * PIC communication roll - code once per second * / void puiseSecond (void);

/ * Subroutines for PIC communication * / \^roid Stuff6 (int pass_data);

void format_xmit_buffer (void);

BOOLEAN decode_rcv_buffer (void);

void process_status_bits (void); unsigned int Get5 (void);

void set_PIC_alarm (alarmcodes pass alarm type, int pass PIC addr, unsigned int pass_alarm_data);

/ * Start code for PIC communication * / void pulseStartup (void);

/ * Routine to clear pulse records after cold start * / void pulseCoidstari (void);

/ * Defined in pt.e * / #define RELAY_A 0 ^ define RELAYJB 1 void puiseOut (int picNbr, int relayNbr.int ONoff); void ptEveryMinute (void);

void ptEverySecond (void);

void set_PLC_relays (int xmitRelay, ¡nt revRelay);

ES 2 554 499 T3

PICEND.DEF / *

Include file at the end of mtrsamp to control MC and ST foot chips from interrupt mtrsamp * / # ifdefIS_MC5 if (pulseOutMode = PIC_MC_SERIAL) í

asin (MOVE.L # 0x804O0E_toA0 ");

asmC AND.W # 0xFCFF, (A0)); / ♦ Delete clock and data ports * / #endif #ifdef ISST5 asm (MOVE.L # 0x804O0E, A0);

asm (AND.W #OxFEFF, (AO)); / * Insert clock drop limit * / if (PIC_serial_status - sending st5 bits) í asm (NOP);

asm (NOP);

asm (NOP);

asm (NOP ");

asm (NOP);

asm (NOP);

asm ("NOP");

asm ("NOP);

asm (NOP);

asm (NOP);

asm (NOP ");

asm ("NOP);

asm ('' NOP);

asm (MOVE.L # 0x80400E, A0);

asm (OR.W # 0x0100, (AO)); / * If sending bits, activate clock. * / #Endif

PICVARS.DEF / ♦

Local variables to control pie MC and ST chips from interrupt mtrsamp meter / c / lib / picvars.def * / nnsigned long bitOneFlag;

ES 2 554 499 T3

PÜLSELINK.DEF / * Determine if variables are external or defined here * /

Sundef ref

Sifdef PSTRUDEFINED

Sdefine ref

Seise

Sdefine ref extern

Sendif

Yes (NUMPH&gt; 6)

Sdefine IS_MC5

Seise

Sifdef MAX_.SCAN_METERS

Sdefine IS_ST5

Seise

Sdefine IS_RSM

Sendif

Sendif / ♦ Values ​​for hdwr -p (pulseOutMode) * /

Sdefine STANDARD_PIC_COMM 0

Sif 0 / * Delete this is equivalent from mtrlink.def * /

Sdefine PIC_PULSE_SERIAL 1

Sdefine PIC_MC_SERIAL 2

Sdefine PIC_ST SERIAL 3

Sendif / * then stop commenting here * / / * Sdefine VATEST 1 * /

SifdefVATEST

Sundef IS_MC5

Sundef ISJRSM

Sundef IS_ST5

Sdefine IS_RSM

Sundef NUMPH

Sdefine NUMPH 3

Sundef MAX_SCANMETERS

Sendif / * not commented for water meters (Oakville Hydro) * /

Sdefine READJENCODERJD Ox49fíDOOO

Sdefine READ ENCODER PARM 0x0312500c / * not commented for gas meters (Sonix)

Sdefine READ ENCODER! DOx49fe0389

ES 2 554 499 T3 // define READ_ENCODER_PARM 0x03 00500c * / // define ID_FIELD_LENGTH 13 // define PULSES_PER_PIC 4 // ifdef ISMC5 // define BITS_PER_SEC 822 // define MAX.PICS 16 #else // ifdef IS_ST5 #define BECIT 942 / define MAX_PICS 5 // else // define BITS_PER_SEC 32 // define MAX_PÍCS 1 tfendif f / endif // define DIRECTPICWAITLIMIT 24 // define BUFFERED_PIC_WATT_LIMn '10 * BITS_PER_SEC // define NUM_START_BITS 12 # tfdefIS_00 else / define REBAY 300 / define REBU1LDDELAY 1000 tfendif typedef strvct {unsigned long unsigned char unsigned char unsigned char loop_rate; status reg val ue; time since global; num_pulse_regs; curr_pulse_reg;

unsigned long serial_number; last_cmd_data;

PIC_addr; software_type; so ftwarc_version;

unsigned char unsigned int unsigned char unsigned char unsigned char unsigned char curr ID reg;

unsigned char last command; unsigned int unsigned int unsigned int unsigned int unsigned unsigned unsigned unsigned unsigned reply_wait_limit; PIC_data_err_count; PIC_reset_count; comm_error_count; force_pulse_read: 1;

i; 1;

1; i;

get_semo get_version get_status reset status

ES 2 554 499 T3 unsigned update_parameter: I;

unsigned clear_pulse_regs: 1;

}

PIC_statust;

typedef enum {sending_bits, sending st5 bits, rcvingbits, dO-PlC-Start, sending_PIC_start, do_send_cmd, sending_start, sending start 1, sending stop, waiting for start. rcving-Stop, idle}

PIC_s_stat_t;

typedef enum {

SET_PRE_ALIGN, DOALIGN, SET_NORMAL_PLC, DISCONNECTCOUPLER, READ_XMIT_LEVEL

ATM__op_t;

typedef enum {DO-PRESET, DO_PLC_SET, SET_ALIGN, WAIT_ALIGN, DO_ATM_D1SCONNECT, ATMDONE}

ATM_state_t;

typedef struct {unsigned char unsigned char unsigned char unsigned long

PIC_addr; command; reg_ID ·, command — data;

unsigned int int bitCount;

flags;

union {unsigned long bufLong {3); unsigned char bufByte [I2];

ES 2 554 499 T3} bits;

}

PICbitBuf;

#ifndef BOOLEAN_DEFINED # define BOOLEAN_DEFINED typedefintB OOLEAN;

/ fendif / * Definition of bits in PIC communication buffers flag field ♦ / / * NOTE - Upper 4 bits (OxfflOO) reserved for use by ATM code * / // define rcv_bad_addr_flag OxOlOO // definercv_tpar_error_flag 0x0080 // define rcv_data_ready_flag 0x0040 // define rcv_bad_length_flag 0x0020 // define rcv_timeoutjlag 0x0010 // define rcv_parity_erF_flag 0x0008 // define PIC_error_flag 0x0004 // define PlC__need_refresh_flag 0x0002 ^ define PIC * invalid data flag 0x0001 Command codes for PIC communication * / // define MAX_FAST_READ 0x07 // define CLEAR_PULSE_REGISTERS 0x08 ü define READ_REGISTER Οχ 10 // define WRITE_REGISTER 0x18 // define SYSTEM_CONTROL 0x19 / ♦ Register ID codes for PIC communication · /

<td>// define MAX PULSE REG</td><td> 15</td>

<td>// define CONTROL REG 16</td><td></td>

<td>// define ERROR REG 26</td><td></td>

<td>// define OUTPUT REG 27</td><td></td>

<td>#definePARM REG</td><td> 28</td>

<td>// define VERS REG</td><td> 29</td>

<td>// define SERNO REG</td><td> 30</td>

<td>// define STATUS REG</td><td> 31</td>

/ * Special purpose PIC addresses * / // define GLOBAL_PIC_ADDR 31 // defineMC5_MUX_PIC_ADDR 30 // define ST5_NÍUX_PIC_ADDR 29 // define LCM_B ASE_ADDR 16 / * Primer I.CM is at address 16 * / // define ATNFbASEEaDDR 20 / * Primer ATM is. at address 20 * / // define MAX_PULSE_PIC_ADDR 15 / * Pulse counters are from 0 to 15 * / / * Bit usage in ATM relay control word * /

ES 2 554 499 T3 // define ATM_RC_XM1T_ON 0x00008000 // define ATM_RC_MEAS_XMIT 0x00004000 // define ATM_RC_MEAS_CPLR 0x00002000 // define ATM_RCJRES_SHORTED 0x00001000 // define ATM_RC_CAP_MASK 0x000003ff // define ATM_RC_CAP_MASK 0x000003ff // define ATM_RC_CAP_MASK 0x000003ff // define CODE ATM_NUMCAP 0x000003ff // define CODE ATM_NUMCAP 0x000003ff // define CODE ATM_NUMCAP | ATMJRC_MEAS_XMIT ¡ATM-RC_MEAS_CPLR // define ATM JPLC_CODE ATM_RC_XMIT_ON | ATM_RC_RES_SHOR.TED // define ATM_D1SC_CODE 0 / * Other ATM control equivalents * / // define ATM_MEAS_TIME 20L / * ms to wait between change of stop and ADC read * / // define ATM DISC TIME 20L / * ms to wait before changing stop relays * / // define ATM_MIN_READING 0x0038 / * yes]_to read at the end of autotuning is less than this, failure * / / ♦ equals ST5 communication * / // define ST5_P1C_DELAY 66 // pragma region (ram = ram) ref unsigned short current_PlC_index, rcv_PIC_index;

ref PIC — status — t PIC_status [MAX_PICS];

struct {unsigned long reading; int error_cnt;

unsigned char ID_field [ID_FIELD_LENGTH]; unsigned char ID_buffer [II&gt; _FIELD_LENGTH];

} ref pulseData [2 * NUMPH];

struct {

PICbitBuf xmit_buf;

PICbitBuf rcv_buf; int control_flags;

} ref ext_comm, PIC_comm_mon;

struct {

ATM — op_t operation;

unsigned int ATM_number;

ATM_state_t state; unsigned request_flag: 1; unsigned done_flag: 1;

unsigned error_flag; 1;

unsigned active flag: 1; unsigned int start cap_code; unsigned int end_cap_code; unsigned int optimum_cap_code;

ES 2 554 499 T3 unsigned int optimumjreading; unsigned int xmitlevel; unsigned int coupler_level; unsigned int resultflags; long int a! ign_timer;

) ref ATM_control;

struct {unsigned unsigned unsigned unsigned unsigned int unsigned int unsigned int unsigned int unsigned int request_flag: 1; done_flag: 1; error_flag: 1; active_flag: 1; xmitmask; rcvjmask; result_flags; last_xmit_mask; last_rcv_mask;

} ref MUX_control;

struct {unsigned do_rebuild: 1; unsigned do_alarm: 1;

} ref Comm_background_flags;

/ * Definitions of.bjts in ext_buf.control_flags * / ^ define SUPPRESS_NORMAL_COMM define XMITJREQUEST 0x0002 define CPY_RCV_DATA 0x0004 rcv_buf * / # define RCVDATARDY 0x0008 rcv_buf * / / define ΧΜΤΓ0010 DATA

0x0001 / * External routine requests sent from xmit buf * / / * External cnid sent, copy received buffer to / * Get response from external cmd, answer is in / * Xmit_buff has copy of last cmd sent * / ref PICbitBuf ref PiCsstatt ref unsigned int ref unsigned int ref unsigned int ref unsigned int ref unsigned int ref unsigned int ref unsigned int ref unsigned int ref unsigned int ref unsigned char ref unsigned char ref unsigned int lef unsigned int ref unsigned int ref BOOLEAN ref int ref unsigned int ref alarmstru

PICxmilBuf, PICrcvBuf, HoldrcvBuf; PICserialstatus;

num_PICs; num_LCMs; rebuild_timer; ATM_work; work_PIC_addr, num_jf&gt; ulse_ctrs; hold_num_pulse_ctrs; bit_count;

outbitvalue;

* shift__LSB_ptr; in_bit_value;

PÍC_wait_limit; zerojcount; last_comm_err_flag; dont_clear_PIC_stats;

ST 5_PIC_delay_ctr;

PIC_bad_addr_count;

PIC_alarm;

tfifdefV ATEST

ES 2 554 499 T3 / * Try !!! * / ref int tef ¡nt reflong ref int / * Try !!! * / f / endif temp_command; temp_reg_ID;

temp_conmiand_data; temp_flags;

ref enum {clk_high_;clk low

PIC_clk_state;

ref enum {

NO_GLOBAL_SEND, SEND_GLOBAL_CLR,

SENDING_GLOBAL_CLR, GLOBAL_CLR_SENT} clear_state;

/ * The old is equivalent to kept for compatibility '* / #if 0 #define RELAY_A_BIT 1 ^ define RELAYJB_BIT 2 // define IDLE 0 // define TX l #define RX 2 // define DATA_READY 3 // define WAKE 4 ^ define PIC_RESET 5 // define WAKECOUNTRELOAD (64 * 4) / * Four seconds * / #define RESETZCOUNTIRELOAD 10 / * i / 4 seconds * / #define RELAY_A_OFF_CMD 5 / * Low trigger active * / # define RELAY_A_ON_CMD 4 // define RELAYJB_OFF_CMOND 7 tf_ RELAYJB_OFF_fineCMD 7 tf_ // define CLEAR_ACC_CMD 8 // define SUBACC_CMD 12 // define ECHO ^ CMD 14 // define SLEEP_CMD 15 // define PULSE_SER1AL_COM_MAX 15 // define WAKE_CMD 16 // define RESET_CMD 17 // define PULSE_COM_NUM 18 #define NO_PULSE_BIT_DATA OxFFFFFFFFX // define RELAY_CMD_MTN CMD 4_ define RELAY_CMD_MTNCMD 4_ define RELAY_CMD_MTN 4_define RELAY_CMD_MTN 4_

ES 2 554 499 T3

PULSEOUTM.DEF # inelude clklink.def #inelude mtrlink.def #include plc.def '#include serlink.def' ftinclude '' pulselink.def '#ifndef NO_PULSES # inelude scan.h #include pulse.h ííinclude log.h void pulseout_second_back (void);

void pulseout_jram_initl (void);

ADDRFN pulseoutaddrfn;

#pragma region f'data = ranilnitl) void (* pulseout_ram_initl p) (void) = pulseout_rani_mitl;

#pragma region (data = data ”)

Spragma region (data = secondBack) void (* pulseout_5econd_backp) (void) = pulseout_second_back;

Spragma region (data = data)

ADDRFN RET pulscoutaddrfh (reg8stru reg8) &lt;

Write the load delivery event cu flash * / putEvent (LOAD_SHED_E VENT, 1, andreg8.ulong);

retum (O);

} void puIseout_ram_inÍtl () (

addrfn_tbl [GEr_FROM_SLAVE] [PULSEOUT_STATE] = pulseoutaddrfn;

void pulseout_second back () r

} #endif