Continuous synchronous encryption and decryption in a wireless communications system throughout handoffs.

ES 2 149 816 T3

DESCRIPTION

Continuous synchronous encryption and decryption during transfers in a wireless communication system.

Field of the invention

This invention relates in general to radio communication systems and, more specifically, to two-way radio communication systems consisting of a method and apparatus for performing synchronous encryption and decryption.

Foundation of the invention

Synchronous counter-driven encryption techniques for wireless two-way digital communication systems are well known. This type of system normally employs separate encryption and decryption devices in each communication unit to encrypt and decrypt a transmission and reception path, respectively. The use of separate encryption and decryption devices in each communication unit contributes to the cost and size of the unit, as well as the complexity of the synchronization of both devices.

In order to maintain synchronization between the two linked communication units, conventional systems must transmit an encryption synchronization signal (E-sync) along with the encrypted information. The transmission of the E-sync signal is not a problem when the information consists of stored data, which can be interrupted at any time. On the other hand, the transmission of the E-sync signal in a voice communication system is somewhat more difficult, since the voice information is continuous and cannot be periodically interrupted to carry out the transmission of the E-sync signal without result in noticeable interruptions or bursts of noise in the received speech audio signal.

Some conventional voice encryption systems periodically "steal" bits of voice information and use the stolen bits for the transmission of the E-sync signal, this is based on the theory that if only the bits are stolen infrequently, their absence does not seriously degraded the vocal audio signal. Furthermore, lost bits certainly degrade the quality of speech audio, making encryption systems based on the use of stolen speech bits not as well-regarded in subjective tests of audio quality in an encryption mode, with It is in a mode in which they do not encrypt, that is, in "clear" mode.

Another problem that arises in conventional encryption techniques used in wireless communication systems that can transfer a portable communication unit (PCU) from one fixed communication unit (FCU) to another, is associated with the transfer procedure. The problem arises because when two communication units are linked, the encryption device for the transmission path of each of the two communication units provides the E-sync signal for the decryption device in the corresponding reception path. from the other communication unit. Thus, after a transfer to a new FCU, the encryption synchronization is lost for a period of time necessary to resynchronize the decryption device in the PCU with the new E-sync of the new FCU, and the encryption device. decryption in the new FCU with the E-sync of the PCU.

As the loss of synchronization for the encryption will lead to the loss of all the information communicated during the resynchronization period that follows the transfer, conventional encryption systems to send continuous information such as the vowel must go to "clear" mode before each transfer, followed by a return to encryption mode after sufficient time has passed for encryption synchronization to be re-established. This obviously implies that each transfer is accompanied by a short period in which the security of the information transmitted is compromised.

Therefore, an encryption technique is needed that solves the aforementioned problems of conventional encryption techniques. This means that an encryption technique is needed that can continue to operate in encrypted mode throughout the transfer time without loss of information. It requires an encryption technique that does not degrade the quality of the voice. In addition, an encryption technique is needed that can contribute to a lower cost and smaller size than that allowed by the use of conventional encryption techniques.

US Patent 5,081,679 includes a description of an encryption and decryption system in a duplex cellular radio system in which an encrypted call can be switched between cells.

Summary of the invention

The present invention consists of a method and apparatus to maintain a synchronized encryption and decryption of the information without interruption during the entire time that a transfer lasts, as set out in the attached claims 1 and 5. Brief description of the drawings

Figure 1 is a block diagram of a wireless communication system according to a preferred embodiment of the present invention.

Figure 2 is a diagram showing the content of a duplex time division multiple access frame (TDMA / TDD) constructed according to the European Wireless Digital Telecommunications (DECT) standard used in accordance with the preferred embodiment of the present invention.

Figure 3 is a block diagram of a fixed communication unit (FCU) in accordance with the preferred embodiment of the present invention.

Figure 4 is a block diagram of a portable communication unit (PCU) in accordance with the preferred embodiment of the present invention.

Figure 5 is a block diagram of

ES 2 149 816 T3 an encryption sync counter (ESC) according to the preferred embodiment of the present invention.

Figure 6 is a flow diagram of a method to carry out synchronized encryption and decryption of the information by means of the generation of a single encryption sequence according to the preferred embodiment of the present invention.

Figure 7 is a flow diagram of a method for maintaining synchronized encryption and decryption of information without interruption during the entire time that a transfer lasts according to the preferred embodiment of the present invention.

Description of a preferred embodiment

With reference to Figure 1, a preferred embodiment of a wireless communication system according to the present invention consists of a plurality of fixed communication units (FCUs) 102 that provide radio coverage in a plurality of radio coverage areas 108, 110, 112 The FCUs are connected to the Public Switched Telephone Network (PSTN) 114 by a plurality of telephone lines 116. Those skilled in the art will observe that the wireless communication system according to the present invention can also be used in other telephone systems than the PSTN, for example in a private branch exchange (PBX). The system additionally consists of at least one portable communication unit (PCU) 120 that has transfer capability and that transmits and receives according to a duplex time division multiple access digital format (TDMA / TDD). The system further comprises at least one wired telephone set 124 for sending and receiving calls to and from a PCU 120. A PCU 120 can also communicate with another PCU 120 through one or more FCUs 102.

An additional possibility of the wireless communication system according to the present invention is to use a standard protocol to carry out communication between the plurality of FCUs and the at least one PCU. The standard protocol defines messages and procedures to request and establish wireless communication links, to transmit and receive signaling data, to transmit and receive user communications, and to define the TDMA / TDD format used in them. An example of this standard protocol is the European Standard for Wireless Digital Telecommunications (DECT). The DECT standard is defined in the European telecommunications standard document prETS 300 175, entitled “Digital European Cordless Telecommunications Common Interface”, dated August 1991 and prepared by the European Institute of Telecommunications Standards, citing here two, three as applicable parts , five and seven of the aforementioned document for reference purposes.

With reference to figure 2, a TDMA / TDD frame 201 constructed according to the DECT standard and used according to the preferred embodiment of the present invention, consists of twelve channels (time slots) 202 for the transmission of

FCU and twelve channels (time slots) 203 for PCU transmission. Channels 202, 203 are positionally paired for information transmission and reception. For example, an FCU 102 (Figure 1) that transmits on channel 202 labeled "0" would receive on channel

203 also labeled as "0". Each channel 202, 203 consists of a sync part

204 comprising a sync mark for synchronizing a linked PCU 120 (FIG. 1) and the FCU 102, and a data part 205. The data part 205 consists of a control part 206 for passing control information, eg identification channel and frame, and other control messages between the linked PCU 120 and the FCU 102, and also consists of a user data portion 208 for carrying the user data, eg, voice.

The synchronization part 204 and the control part 206 are used to synchronize the encryption and decryption of the information carried in the user data part 208, as well as any user signals carried in the control part 206, according to the present invention. . By synchronizing the encryption and decryption processes with the use of existing parts 204, 206 of DECT channel 202, 203, it is not necessary to steal bits from user data part 208. In this way, the encryption and decryption technique according to the present invention does not degrade the quality of the voice, as do the conventional encryption and decryption techniques that employ the bit stealing method for synchronization. Also, by synchronizing the encryption and decryption circuitry by means of the synchronization signals already available in the FCU 102 and PCU 120 (Figure 1), fewer parts are needed for synchronization, thereby reducing the cost and size of the device. PCU 120 and FCU 102.

In operation, the frame synchronization portions of the TDMA / TDD circuits contained in the FCU 102 and in the PCU 120 (described hereinafter) allow the encryption and decryption of information during transmission of the data portion of the data. user 208 and during transmission of control part 206 when control part 206 comprises user signaling information. TDMA / TDD circuits prevent encryption and decryption during other parts of the transmission.

With reference to figure 3, a preferred embodiment of the FCU 102 (figure 1), according to the present invention, consists of a radio frequency (RF) transceiver 302 that carries out the transmission and reception of radio signals that comprise the digital information transmitted. and received in TDMA / TDD format. The RF transceiver was coupled to a microprocessor 304 that controls the transceiver 302 through a bus 306. Microprocessor 304 is coupled via bus 306 to a system frame synchronization circuit 307 to maintain frame synchronization among all FCUs in the system. The frame sync circuit 307 receives a system sync master signal at a terminal 305. If the interface to the PSTN 114 (Figure 1) is

ES 2 149 816 T3 digital, the synchronization master signal can be derived, for example, from the synchronization patterns (marks) contained therein, after having made adjustments of the differential delays between the PSTN 114 and the plurality of FCUs 102 (Figure 1).

The RF transceiver 302 is also coupled to a TDMA / TDD circuit 308 that interfaces the RF transceiver 302, through a two-module adder 309, to a plurality of CODECs 310 that perform audio-digital and digital-audio conversions of the signals. signals transmitted and received, respectively, by the FCU 102. The plurality of CODECs 310 were coupled to a plurality of telephone interfaces 312 to couple a plurality of telephone lines 116 to CODECs 310. The modulo-two adder 309 is coupled to an encryption sync counter (ESC) 314 driven by an incremental clock generator 315, which operates at the serial bit rate of the TDMA / TDD circuit 308 and the CODECs 310, and is synchronized by the TDMA / TDD circuit 308 to the system synchronization master signal, to allow the encryption and decryption of the information that passes between the CODECs 310 and the TDMA / TDD circuit 308 according to the present invention.

The TDMA / TDD circuit 308, the CODECs 310, the incremental clock generator 315, the ESC 314, and the telephonic interfaces 312 are also coupled to the bus 306 to allow control by the microprocessor 304. A memory 316 is also coupled to the microprocessor for storing the program control software and for storing values ​​in a plurality of memory addresses 320 reserved for the contents of the ESC and a corresponding plurality of memory addresses 318 reserved for the duration of the program. the transfers, the pluralities of corresponding memory addresses 320 being associated, 318 to a corresponding plurality of TDMA / TDD paired receive and transmit channels 202, 203 (FIG. 2) used by FCU 102.

When one of the plurality of TDMA / TDD paired receive and transmit channels 202, 203 (Figure 2) is actively transporting user information, the content value of the end ESC of each TDMA / TDD channel 202, 203 is stored in the memory address 320 reserved for the content of the ESC corresponding to the associated channel of the plurality of paired TDMA / TDD reception and transmission channels 202, 203, while the corresponding memory address 318 reserved for the duration of the transfer is not used. The value stored in memory address 320 reserved for ESC content is then used to refresh ESC 314 to the beginning of the next corresponding channel of the plurality of paired TDMA / TDD receive and transmit channels 202, 203. Using memory 316 as described according to the present invention, a single ESC allows the encryption and decryption of the information of all TDMA / TDD channels 202, 203 used in the FCU, thus reducing the cost and size of the FCU.

When a pair of transmit / receive channels are not actively carrying user information, but are waiting for a link establishment or the completion of a pending transfer, the memory location 320 reserved for ESC content corresponding to the channel pair Waiting is used to store the start or continue value sent by a PCU that performs the link establishment or the pending transfer, respectively. Whenever there is a pending transfer directed to a TDMA / TDD channel pair, memory location 318 of the transfer duration time corresponding to the TDMA / TDD channel pair is used to control the timing of the pending transfer, according to the present invention.

With reference to Figure 4, the PCU 120 (Figure 1) according to the preferred embodiment of the present invention consists of an RF transceiver 402 for transmitting and receiving radio signals comprising the digital information transmitted and received in a TDMA / TDD format. . The RF transceiver is coupled to a microprocessor 404 that controls the transceiver 402 over a bus 406. The RF transceiver 402 is also coupled to a TDMA / TDD circuit 408 that interfaces the RF transceiver 402 through a two-module adder 409 to a CODEC 410 that performs the audio-digital and digital-audio conversions of the signals. transmitted and received, respectively, by the PCU 120. Module 2 adder 409 is coupled to an ESC 414 driven by an incremental clock generator 415, which operates at the serial bit rate of the TDMA / TDD circuit 408 and the CODEC 410 which allows the encryption and decryption of the information that passes between the CODEC 410 and TDMA / TDD circuit 408 according to the present invention. Using the single ESC 414 for both encryption and decryption of TDMA / TDD information, the size and cost of the PCU are reduced compared to conventional encryption and decryption techniques that use separate devices for transmission and reception paths. .

The incremental clock generator 415 is synchronized by the TDMA / TDD circuit 408 with a frame synchronization pattern (mark) received through the wireless link from the FCU 102, the referred pattern being synchronized within the FCU 102 by the signal system master sync on terminal 305 (figure 3). The CODEC 410 is coupled to the audio interfaces 412 to send and receive audio signals to or from a user of the PCU 120. TDMA / TDD circuit 408, CODEC 410, incremental clock generator 415, ESC 414, and audio interfaces 412 are also coupled to bus 406 to allow control by microprocessor 404. A memory 418 is also coupled to the microprocessor 404 to store the program control software and to store a pair of values ​​419, 420 of the ESC content and the transfer completion time, respectively. The values ​​419, 420 are determined by the microprocessor and then transmitted from the PCU to an FCU for the establishment of

ES 2 149 816 T3 a link and for link transfer, according to the present invention. Also coupled to the microprocessor 404 is a display device 417 to present the information sent by the microprocessor 404, as well as a keyboard 416 that allows user control input.

With reference to figure 5, the preferred embodiment of the ESC 314, 414, according to the present invention, consists of a shift register 502 that has a parallel data input 504 enabled by means of the corresponding parallel data enable input. 506 to load a start or continue value into shift register 502 from microprocessor 304, 404 (Figures 3 and 4). The shift register 502 has a clock input 508 driven by the incremental clock generator 315, 415 (Figures 3 and 4) each time the microprocessor 304, 404 enables a clock enable signal input 510 that allows and inhibits the encryption and decryption of the information that passes between the CODECs 310, 410 and the TDMA / TDD circuit 308, 408 (figures 3 and 4), according to the present invention. The shift register is used as a linear feedback shift register that has its last output 512 and intermediate outputs 518, 514 fed back to its serial data input 522 through modulo-two adders 516, 520. Connected in this way, the shift register generates in its last output 512 a predefined sequence of serial bits to synchronize the encryption and decryption of the information.

Better yet, for added security, the serial bit sequence of the last output 512 is sent through a key chain generation algorithm device 524 powered by a key variable provided by the microprocessor 304, 404 (Figures 3, 4 ) on a KV 528 port, to produce a secure encryption sequence on a 526 final output terminal. An example of this type of device is that manufactured by Motorola, Inc., Schaumburg, Illinois, under the designation TRN4836A. The serial signal present in the final output terminal 526 is added in the module two adder 309, 409 (figures 3 and 4) to carry out the encryption and decryption of the information transmitted and received by the FCU 102 and the PCU 120.

Better yet, in FCU 102 a separate, unique key variable can be used for each pair of TDMA / TDD channels 202, 203 (FIG. 2). The unique and separate key variable for each pair of TDMA / TDD channels 202, 203 could be stored in memory 316 (Figure 3) and transferred to KV port 528 by microprocessor 304 (Figure 3) at the beginning of each TDMA / channel. Associated TDD 202, 203. The use of a separate and uonic key variable, as described, for each pair of channels allows a greater degree of security in the encryption, while allowing the use of a uonic ESC that consists of an algorithm device of generation of unique key chain 524 for all TDMA / TDD channels 202, 203 of FCU 102.

With reference to figure 6, a method to carry out the synchronized encryption and decryption of the information generating a unique encryption sequence, according to the preferred embodiment of the present invention, comprises the reception 602 in an FCU 102 (figure 1) of information of registration from a PCU 120 (FIG. 1) during the establishment of the link between the PCU 120 and the FCU 102. The registration information comprises an encrypted personal identification number (CPIN). In response to receipt of registration information, FCU 102 decrypts 604 a corresponding personal identification number (PIN) using a predetermined algorithm, and stores the PIN in memory address 320 reserved for ESC content (Figure 3). corresponding to the channel used by the FCU (102) for the link. Since the PIN is also stored in PCU 120, microprocessors 304, 404 (Figures 3 and 4) of both FCU 102 and PCU 120 will store 606 identical PIN values ​​in their respective ESCs 314, 414 (Figures 3, 4 ) at the appropriate time, as described below.

When the link establishment reaches a point where the link is ready to support user communication, microprocessors 304, 404 load 608 the PIN into ESCs 314, 414 of FCU 102 and PCU 120 (Figure 1) , respectively, and simultaneously enable the respective clock enable signal 510 (figure 5) for the ESCs 314, 414 at the time of the next sync mark contained in the sync part 204 (figure 2) of the signal transmitted by the FCU 102 of the transmission channel of FCU 202 (figure 2) that is being used. Those skilled in the art will observe that the synchronization part 204 of the signal transmitted by the PCU 120 on the transmission channel of PCU 203 (Figure 2) could be used alternatively to enable the respective incremental clock generators 315, 415, always that the same signal be used in both FCU 102 and PCU 120 to enable clock enable signal 510 of ESCs 314, 414 at the same time.

For the duration of the established link, the incremental clock generators 315, 415 for the ESCs 314, 414 are synchronized 609 with each other by the TDMA / TDD circuits 308, 408 (Figures 3 and 4), respectively, in response to the sync mark. recurring of the timing portion 204 (FIG. 2) of the signal transmitted by the FCU 102 (FIG. 1).

As those skilled in the art know, if a first string of serial bits is added in a first modulo-two adder (logic gate OR exclusive) with a second pseudo-random string of serial bits synchronized with the first string of serial bits, and with at the same bit rate, a new (encrypted) serial bit string is produced at the output of adder module two. If the new resulting (encrypted) serial bit string is then added in a second module two adder with a third pseudo-random serial bit string, synchronized with the second pseudo-random serial bit string and with the same bit rate, then then a serial bit string identical to the first serial bit string at the output of the second modulo two adder. Thus, the

ES 2 149 816 T3 present invention provides a method and apparatus for performing synchronized encryption and decryption of information by generating a single encryption sequence to control synchronized encryption and decryption taking place in FCU 102 and PCU 120.

With reference to figure 7, a method to keep the encryption and decryption of the information synchronized without interruption for the duration of a transfer, following the preferred embodiment of the present invention, comprises a PCU 120 (figure 1) linked to a first FCU 120 ( Figure 1) that determines 701 the need to perform a transfer to a second FCU 120 and, subsequently, the selection of a duration time for the transfer, the chosen time being concurrent with a future synchronization mark (pattern) contained in the synchronization part 204 (figure 2) of the signal transmitted by the first FCU 102 on the transmitted channel of FCU 202 (figure 2) used for the link with the first FCU 102. This takes place in the same step 701 as the calculation in the PCU 120 of a continuation value for the transfer, that is, an expected value in the ESC 414 (Figure 4) of the PCU 120 in the time selected to finish the transfer. .

Next, the PCU 120 establishes 702 a second wireless link with the second FCU 102, and transmits the continue value and the selected time for completion of the handover. As the time for handover completion is concurrent with a future sync mark in the sync part 204 (figure 2) of the signal transmitted by the first FCU 102 on the transmission channel of FCU 202, and as all FCUs 102 of the system are synchronized with the master synchronization signal of the system in the terminal 305 (FIG. 3) of the FCU 102, the second FCU 102 can determine with great precision the timing of the transfer.

The second FCU 102 (figure 1) stores 706 the continuation value and the time for completion of the transfer in memory address 320 for the contents of the ESC (figure 3) and in memory address 318 for the completion time of the transfer (figure 3), respectively, being the memory addresses 320, 318 those associated with the corresponding TDMA / TDD channel used by the FCU 102 for the second wireless link.

When the time selected for the completion of the transfer expires, the microprocessor 304 (figure 3) accesses its memory 316 to obtain the continuation value, loads 708 the continuation value in the ESC 314 (figure 3), and enables the clock incremental for the ESC 314, thus starting the ESC 314 of the second FCU 102 at the value that the ESC 414 (FIG. 4) of the PCU 120 has simultaneously reached.

While the second wireless link lasts, the incremental clock generators 315, 415 for the ESCs 314, 414 of the second FCU 102 and the PCU 120, respectively, are synchronized 709 with each other by the TDMA / TDD circuits 308, 408 (Figures 3 and 4), respectively, in response to the recurring timing mark of the timing portion 204 (FIG. 2) of the signal transmitted by the second FCU 102 (FIG. 1).

Thus, the present invention comprises a method and apparatus to carry out the synchronized encryption and decryption of the information by generating a single encryption sequence that controls the synchronized encryption and decryption that takes place in the FCU 102 and the PCU 120. Furthermore, the present invention comprises a method and apparatus to keep the encryption and decryption of the information synchronized without interruption during the duration of a transfer. Therefore, the present invention provides an encryption technique that solves the aforementioned problems present in conventional encryption techniques by providing: (a) an encryption technique that can continue to operate in encrypted mode for the duration of a transfer without loss of information, (b) an encryption technique that does not steal bits or, therefore, degrade voice quality, and (c) an encryption technique that can be implemented at a lower cost and smaller size than a system employing conventional encryption.