Power semiconductor

0001The invention relates to a power semiconductor having a housing and power and control connections.

0002The above-mentioned power semiconductors, for example, the known IGBTs. include, for example, find in various fields of electrical engineering, for example, in the drive control devices for electric motors use.

0003From the <patcit id="pcit0001" dnum="EP0513410B1"><text>EP 513 410 B1 0</text></patcit> and <patcit id="pcit0002" dnum="DE19646396C2"><text>DE 196 46 396 C2</text></patcit> are known power semiconductor modules, each having an electrically insulating substrate on which a circuit arrangement with power semiconductor components is arranged. The substrate forms the bottom of a plastic housing which encloses the circuitry. The contacted with the circuit arrangement electric power terminals of the semiconductor devices extending through the housing to the outside. The housing is filled to protect the circuit arrangement with potting compound. Attachment points at the enclosure are screwing the module to a heatsink.

0004The <patcit id="pcit0003" dnum="EP1976358B1"><text>EP 976 358 B1 1</text></patcit> describes a power semiconductor which has a support plate made of an insulating ceramic substrate, which forms the bottom of the housing. The support plate is provided at the top and bottom with a metal layer, wherein the upper metal layer is patterned to form conductor tracks. With the conductors of a power semiconductor component and the power and control terminals of the semiconductor device are electrically connected. The power and control connections are led out laterally from the housing. The power and control connections of the power semiconductor are configured as terminals of a surface mount device, which is also known as SMD (Surface Mounted Device). The SMD component is mounted on a circuit board.

0005To maintain the required for the electrical insulation clearances for clearance and creepage distances between the located within the housing portions of the power and control cables and the support plate and between lying outside the housing portions of the power and control cables and the circuit board, the power and control terminals configured such that at first then extend the terminals within the housing perpendicularly away from the carrier plate, laterally through the housing to the outside and finally perpendicular to the circuit board. Here, all power and control connections are the same distance.

0006The <patcit id="pcit0004" dnum="DE19625240A1"><text>DE 196 25 240 A1</text></patcit> describes a semiconductor device having a lead frame are connected to the groups of power and control connections.

0007From the <patcit id="pcit0005" dnum="WO2004090977A1"><text>WO 2004/090977 A1</text></patcit> is a semiconductor device is known, are led out at the connecting elements of varying width on opposite sides of the housing. To reduce the inductance is proposed that the power connections to be arranged directly next to one another, wherein the current-carrying conductor tracks should not form conductive loops.

0008The <patcit id="pcit0006" dnum="US20100140786A1"><text>US 2010/0140786 A1</text></patcit> describes a semiconductor module having the power and control terminals at opposite sides of the housing, wherein the control terminals are not grouped by a plurality of components each to groups which form on one side of the housing in spaced-apart rows of terminals.

0009The <patcit id="pcit0007" dnum="WO03071601A2"><text>WO 03/071601 A2</text></patcit> describes a power semiconductor with a carrier plate, which is separated into three sections. There is a power diode and a power transistor on each support section. The power supply of the diodes and the transistors, and the transmission of control signals to the circuit module is carried out with flat conductors, which are led out on the side of the housing of the module. The narrower flat conductor for the transmission of the signals are located on one longitudinal side of the housing. The narrow flat conductors are each divided into groups of five conductors which are each associated with one of the carrier portions.

0010The invention has for its object to provide a power semiconductor with improved technical properties.

0011This object is achieved with the features indicated in claim. 1 The sub-claims relate to preferred embodiments of the invention.

0012The power semiconductor according to the invention has a carrier plate on which is arranged at least one power semiconductor component. The carrier plate with the at least one power semiconductor component is at least partially enclosed by a housing. With the at least one power semiconductor component power and control terminals are electrically connected, are led out of the housing,

0013The power semiconductor according to the invention is characterized in that the power terminals are disposed on one side of the housing in a row and the control terminals are disposed on the other side of the housing in a row, wherein the spacing between adjacent power terminals larger than the spacing between adjacent lying control terminals is. From the particular arrangement of the power and control connections on both sides of the housing to improved electrical properties result particularly when used with high voltages and currents, as the isolation distances for clearance and creepage distances are greater than in the known power semiconductors.

0014In a preferred embodiment, the power terminals have a larger cross section than the control terminals so that the power semiconductor is suitable for switching high currents.

0015In addition to the above arrangement, the power and control connections critical air or creepage distances are avoided by the special design of the terminals themselves. The power and control connections have, at a further preferred embodiment, a first portion which extends laterally from the housing, a second section extending from the first portion to the circuit board, and a third portion, extending from the second portion extending laterally outward. Preferably, the individual sections include an angle which is about 90 °.

0016On the carrier plate a plurality of power semiconductor devices are arranged. A particularly preferred embodiment provides for an arrangement of two power semiconductor components on the carrier plate. Here, the power semiconductor components have common power terminals, which are arranged on one side of the housing and separate control terminals, which are arranged on the other side of the housing. To the first power semiconductor component associated control terminals are arranged in a first row of the housing next to each other and the second power semiconductor component associated control terminals are arranged in a second row adjacent. Preferably, the distance between the first row and the second row of control terminals is greater than the distance between adjacent control terminals in the first and second row. With this particularly preferred arrangement, the control terminals are divided into groups, each group of terminals is associated with only one power semiconductor. This ensures that the control connections of different groups, which with regard to the electric potential of more can differ from each other, are arranged in a sufficient insulation distance, during the control terminals of a group that less may differ with regard to the potential different from each other closer to each other are arranged. The distance between the first row and the second row of control terminals can the distance between adjacent power terminals correspond to or be smaller.

0017For the invention it is not important to which components it is in the power semiconductor modules. Performance Hall pus modules can, for example, IGBTs, but also MOSFETs or other known power semiconductor components.

0018For mounting on a heat sink, the heat sink facing side of the carrier is preferably flush with the housing.

0019In the following, an embodiment of the invention will be explained referring to the figures in more detail.

0020Show it:<dl id="dl0001"><dt>Fig. 1</dt><dd>An embodiment of the power semiconductor according to the invention in a perspective view in the rear view, and</dd><dt>FIG. 2</dt><dd>the power semiconductor of <figref idrefs="f0001">Fig. 1</figref> in plan view.</dd></dl>

0021The power semiconductor device according to the invention comprises a housing 1, which preferably consists of an insulating material, for example, an epoxy compound. However, the housing 1 may also at least partly be made of metal. The<figref idrefs="f0001">Figures 1 and 2</figref> show the housing of the power semiconductor from different views. Since power semiconductors are known as such, is to dispense with the representation of the power semiconductor components and their contact in the interior of the housing. In the present embodiment, the rectangular flat housing has the dimensions of 25 mm x 23 mm x 5.5 mm.

0022The housing 1 includes a partially a support plate 2 made of an insulating ceramic substrate, wherein the carrier plate 2, the bottom 3 of the housing 1 forms. The carrier plate 2 is provided both on its side facing the housing and on its side facing away from the housing with a metal layer, said metal layer facing the housing is structured according to the circuit traces of a circuit arrangement. On this structured metal layer two not shown in the figures, the power semiconductor components, such as IGBT's are arranged in the present embodiment. The power semiconductor components can be soldered on the underside with a structured metal layer. At the top, the power semiconductor components are electrically connected by means not shown, bonding wires to the conductor tracks of the patterned metal layer, wherein the ends of the bonding wires are soldered respectively to the power semiconductor components and the conductor tracks. The power semiconductor is mounted on a heat sink, not shown, the housing bottom 3 rests on the heat sink.

0023Both the power semiconductor modules have output terminals 4, 5, 6 and control terminals 7, 8, 9, 10, 11, 12. The output terminals 4, 5, 6 of the two power semiconductor components are summarized, in the present embodiment to three common power terminals, the side of the housing 1 are led out. However, the two power semiconductor devices each have three separate control terminals 7, 8, 9 and 10, 11, 12, which are also led out of the housing first

0024The power and control terminals 4 to 12 are tab-shaped terminals, ie an SMD component (surface-mount technology) are constructed as terminals of a surface mount component. All connectors have a first section A, which extends laterally outward from the housing 1. On the first section A, a second pioneering the not shown printed circuit board section B follows, which includes an angle of approximately 90 ° to the first section. The second section B goes into a outwardly facing third section C, which includes an angle of approximately 90 ° with the second section B again. The third portion of each terminal is electrically connected to the printed circuit board, not shown. The power and control terminals 4 to 12 differ in their cross-section, wherein the power terminals 4, 5, 6 have a larger cross section than the control terminals 7, 8, 9, 10, 11, 12th

0025The power connections 4, 5, 6 are arranged in a row at constant intervals A on the one longitudinal side of the housing, while the adjacent control terminals 7, 8, 9, 10, 11, 12 in a row on the other longitudinal side of the housing at a distance b are arranged. The distance a between the adjacent power terminals 4, 5, 6 is greater than the distance of the external power terminals and the edges of the housing. The adjacent control terminals 7, 8, 9, 10, 11, 12 of both power semiconductor devices form a first group 7, 8, 9 and a second group 10, 11, 12, which are arranged on the other longitudinal side of the housing 1 at a distance c side by side which is greater than the distance b between the adjacent control terminals 4, 5, 6 to a group. It corresponds to the distance c to the distance a or smaller than the distance a. Both with the particular arrangement as well as the special design of the power and control connections sufficient clearance and creepage distances are designed for the electrical operation at high voltages and currents, so that the electrical properties of the semiconductor device are improved.