EP1589656A1

Circuit for and method of load modulation in a system comprising a transmit resonant circuit and a receive resonant circuit

Abstract

Vorgestellt wird eine Schaltung zur Lastmodulation in einem Empfangsschwingkreis (22), der transformatorisch mit einem Sendeschwingkreis koppelbar ist, mit wenigstens einer Induktivität (24), einer Kapazität (26) und einer steuerbaren Impedanz. Die Schaltung zeichnet sich dadurch aus, dass die steuerbare Impedanz wenigstens ein Sperrschichtbauteil (36, 38, 72, 74) und einen Ohm'schen Widerstand (76, 78) aufweist. Ferner wird ein Verfahren zur Lastmodulation vorgestellt.

EP1589656A1, drawing sheet 1
Sheet 1 of 5

Term

Term ended

Projected expiry passed 19 April 2025, 1.4 years ago.

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15 claims: 5 independent, 10 dependent

  1. 1
    A process for the load modulation in a connection of a transmission resonant circuit (16) and a receiving resonant circuit (22), wherein a voltage at the Transmitting resonant circuit (16) by reaction of change of voltage (U_E) in the receiving resonant circuit (22) is modulated, characterized in that the Load modulation by controlled changing a receiving resonant circuit impedance takes place, the at least one barrier layer component (34, 36, 38, 40;80, 81, 82, 84;72, 74 86) and an ohmic resistor (76, 78).
  2. 3
    Circuit to the load modulation in a receiving resonant circuit (22), the a transformer with a transmission resonant circuit (16) can be coupled, with at least an inductor (24), a capacitance (26) and a controllable impedance, thereby in that the controllable impedance at least one barrier layer component (34, 36, 38, 40;72, 74;80, 81, 82, 84, 86) and an ohmic resistor (76, 78) having.
  3. 7
    A circuit according to at least one of claims 3 to 6, characterized, that the controllable impedance further a switchable bridging of at least a barrier member (36, 38) and / or the ohmic resistor (76, 78) having.
  4. 9
    A circuit according to at least one of claims 3 to 8, characterized, that the controllable impedance at least one series circuit of a first Barrier layer component (72, 74) and an ohmic resistor (76, 78).
  5. 12
    A circuit according to at least one of claims 3 to 11, characterized, that the controllable impedance is a parallel connection of at least one A semiconductor device (80, 81) and an ohmic resistor (76, 78).