EP1580809B1

Ceramic substrate incorporating an ESD protection for a light emitting diode

Abstract

This record has no abstract on file.

EP1580809B1, drawing sheet 1
Sheet 1 of 5

Term

Term ended

Expired 9 February 2025, 1.6 years ago.

  1. Priority
  2. Filed
  3. Granted
  4. Expired
  5. Today

12 claims: 2 independent, 10 dependent

  1. 1
    A device comprising:a ceramic substrate having a top surface and a bottom surface, the top surface having at least one metal electrode for electrical connection to an electrode of an overlying semiconductor device, the ceramic substrate comprises a first area comprising a first metal oxide, the first metal oxide forming a metal oxide varistor that provides electrostatic discharge or ESD protection of a semiconductor device mounted over a top surface of the ceramic substrate;CHARACTERIZED IN THAT the ceramic substrate further comprising a second area comprising a ceramic second material that does not contain any first metal oxide, the second area not forming a varistor;wherein the first metal oxide comprises zinc oxide, and wherein the zinc oxide is located only around at least a portion of a periphery of the ceramic substrate and the second area is located at the central portion of the ceramic substrate;metal pads on a top surface of the ceramic substrate for connection to the semiconductor device;metal electrodes on a bottom surface for electrical connection to a printed circuit board;and metal vias through the ceramic substrate for electrically connecting the metal pads to the metal electrodes on a bottom surface.
  2. 2
    The device of Claim 1, wherein the zinc oxide is located on at least a portion of a top or bottom surface of the ceramic second material around at least a portion of a periphery of the ceramic substrate.
  3. 3
    The device of Claim 1, wherein the zinc oxide comprises a majority of the material in the ceramic substrate.
  4. 4
    The device of Claim 1, wherein the varistor comprises ceramic grains, the varistor further comprises a plurality of metal layers sandwiching the ceramic grains, the metal layers being electrically connected to exposed substrate electrodes, the ceramic grains providing a low resistance path between the metal layers when an ESD voltage is applied across the metal layers.
  5. 5
    The device of Claim 1, wherein the varistor comprises ceramic grains, the varistor further comprising multiple overlying metal layers with the ceramic grains between the metal layers, the metal layers being electrically connected to metal electrodes on the substrate.
  6. 6
    The device of Claim 1 further comprising a light emitting diode (LED) chip mounted on the top surface of the substrate and being protected from ESD by the varistor.
  7. 7
    The device of Claim 1 wherein the varistor forms part of a heat conduction path between the semiconductor device and a printed circuit board over which the substrate is mounted.
  8. 8
    The device of Claim 1 wherein the semiconductor device comprises a semiconductor chip directly affixed to the top surface of the ceramic substrate.
  9. 9
    A device comprising a ceramic substrate having a top surface and a bottom surface, the top surface having at least one metal electrode for electrical connection to an electrode of an overlying semiconductor device, the ceramic substrate comprises a first area comprising a first metal oxide, the first metal oxide forming a metal oxide varistor that provides electrostatic discharge or ESD protection of a semiconductor device mounted over a top surface of the ceramic substrate;CHARACTERIZED IN THAT the ceramic substrate further comprising a second area comprising a ceramic second material that does not contain any first metal oxide, the second area not forming a varistor;wherein the first metal oxide comprises zinc oxide, and wherein the zinc oxide forms only a central portion of the ceramic substrate, and a second area surrounds the zinc oxide around a periphery of the ceramic substrate, wherein the second material comprises one of aluminum oxide, aluminum nitride, silicon carbide, and boron nitride.
  10. 10
    The device of Claim 9 comprising metal pads on a top surface of the ceramic substrate, as metal electrodes for connection to the semiconductor device, and further metal electrodes on a bottom surface of the ceramic substrate for electrical connection to a printed circuit board.
  11. 11
    The device of Claim 10 further comprising metal vias through the ceramic substrate for electrically connecting the metal pads to the metal electrodes.
  12. 12
    The device of Claim 10 wherein the metal pads are electrically connected to the metal electrodes by metal portions over a periphery of the ceramic substrate.