Method of transferring of a layer of strained semiconductor material

0001The present invention relates to the transfer of a thin layer of a donor wafer to a receiving substrate in order to form structures such as a semiconductor-on-insulator structure.

0002The invention relates more particularly to carry out this transfer in order to produce electronic structures comprising strained layers.

0003The expression "strained layer" is understood here to mean any layer of a semiconductor material whose crystallographic structure is mainly elastically strained in tension or in compression during crystal growth, such as epitaxy, requiring at least one lattice parameter to be substantially different from the nominal lattice parameter of this material, a nominal lattice parameter can be understood as the lattice parameter of the material in its bulk form in equilibrium.

0004Conversely, the term "relaxed layer" means a layer of a semiconductor material, having a crystallographic relaxation rate (as measured by X-ray diffraction or Raman spectroscopy) superior to 50%. A layer having 100% relaxation rate, has a lattice parameter substantially identical to the nominal lattice parameter of the material of the layer.

0005A transfer aim is to produce, in particular, a "semiconductor-on-insulator" (also called here "SeOl") structure.

0006Such a strain exerted within a semiconductor material may in fact exhibit physical and/or electrical properties worthwhile exploiting.

0007Thus, for example, the main benefit of tension-strained silicon layers (also called strained Si layers) consists mainly in the fact that the charge carriers (such as holes and electrons) have a higher mobility than that usually found in relaxed Si layers.

0008The strained Si layers may in this regard reach a charge carrier mobility 100% higher than that within relaxed Si layers. To produce such strained Si layers, it is known to grow a silicon film by epitaxy on a base composed of silicon and germanium.

0009Since germanium in equilibrium has a lattice parameter slightly greater than that of the silicon in equilibrium (greater by approximately 4%), the presence of germanium in a defined amount in the silicon thus makes it possible to slightly increase the lattice parameter compared with a base consisting only of silicon.

0010This silicon-germanium base (also called SiGe base) will thus strain the epitaxially grown Si film so as to make its lattice parameter substantially identical to its own.

0011In practice, a substrate made of bulk SiGe is not available on the market and the SiGe base is then generally composed of a single-crystal Si support substrate on which a relaxed SiGe layer is produced via a buffer layer.

0012The term "buffer layer" is understood to mean an intermediate layer between two crystallographic structures with different lattice parameters, having in the region of one of its faces a lattice parameter substantially identical to that of the first structure and in the region of its other face a lattice parameter substantially identical to that of the second structure.

0013The buffer layer inserted between the Si support substrate and the relaxed SiGe layer is generally made of SiGe, with a quantity-wise proportion of germanium which progressively increases through the thickness of the support substrate towards the relaxed layer.

0014Thus, it makes it possible to: <ul id="ul0001" list-style="dash" compact="compact"><li>gradually increase the germanium content from the support substrate towards the relaxed layer;</li><li>confine defects associated with the difference in lattice parameter so that they are buried;</li><li>give a sufficiently thick relaxed SiGe layer stability with respect to an Si film grown epitaxially on its surface in order to strain the latter so as to modify its lattice parameter without influencing that of the relaxed SiGe layer.</li></ul>

0015For all these reasons, the buffer layer must be sufficiently thick, typically having a value between one and three microns.

0016In the field of application of the present invention, this type of wafer is used as a donor in the sense that at least one layer of material is removed therefrom in order to transfer it to a receiving substrate.

0017This transfer generally comprises a first step of bonding the donor wafer to the receiving substrate.

0018A second step consists in keeping of the bonded donor wafer only at least one thin layer adjacent to the bonding region, by removing the superfluous parts from the donor wafer.

0019Several processes and techniques for transferring semiconductor layers, such as Si or SiGe layers, have thus been proposed, the donor wafer comprising in succession a single-crystal silicon support substrate and a thickness of SiGe.

0020<nplcit id="ncit0001" npl-type="s"><text>Zhi-Yuan Cheng et al. of Massachusetts Institute of Technology have presented, in a document entitled "SiGe-On-Insulator (SGOI): Substrate Preparation and MOSFET Fabrication for Electron Mobility Evaluation" (2001 IEEE International SOI Conference, 10/01</text></nplcit>), two known techniques for transferring layers from the said donor wafer comprising an SiGe buffer layer: <ul id="ul0002" list-style="dash" compact="compact"><li>the first layer transfer technique is called "etch-back": it consists in removing, by chemical-mechanical means, the single-crystal Si support substate and the SiGe buffer layer after bonding the donor wafer to the receiving substrate.</li></ul>

0021In particular, etching called "selective" etching is used to remove the buffer layer, as this has the ability of etching the strained SiGe of the buffer layer more easily than the relaxed SiGe of the surface layer. The relaxed SiGe layer then behaves as a "stop layer" for the etching, since the etching stops at least partly at the level thereof.

0022Finally, a strained Si film is then grown epitaxially on the relaxed SiGe layer in order to produce a strained Si-on-SiGe structure.

0023In this final structure, a layer of relaxed material (in this case, the layer of SiGe) is interposed between the layer of strained material (in this case the Si film) and the oxide. This may substantially reduce the technical performance expected of the Si/SiGe combination, and especially its electrical properties.

0024Thus, for example, the SiGe layer may have a tendency to increase the circuit capacitances and therefore reduce the switching rates of the electronic components to be produced or produced in the Si/SiGe active part.

0025The fabrication of electronic components in the active part of such a structure comprising this combination having two layers on insulator also has the risk of being complex to carry out, especially by the creation of lateral insulating regions in the on-insulator combination.

0026This process furthermore limits the application to the production of an Si/SiGe-on-insulator structure and provides no solution to the production, for example, of a strained Si-on-insulator structure.

0027Other etch-back techniques and processes have been proposed, for example, in document <patcit id="pcit0001" dnum="US5013681A"><text>US 5 013 681</text></patcit>, in which an unstrained Si layer is especially transferred. <ul id="ul0003" list-style="dash" compact="compact"><li>the second layer transfer technique reported in the document by Zhi-Yuan Cheng et al. is based on the "Smart-Detachment^®" technology of the Applicant, known to those skilled in the art, and descriptions of which may be found in a number of works dealing with wafer reduction techniques: it consists, before bonding, in implanting species into the relaxed SiGe layer so as to create therein an embrittlement zone, at which, after bonding, the donor wafer is detachment.</li></ul>

0028What is obtained therefore is, on the one hand, a donor wafer, stripped of part of the relaxed SiGe layer, and, on the other hand, a structure comprising, bonded together, a removed thin layer of relaxed SiGe and the receiving substrate.

0029The Smart-Detachment^® technique is advantageous in that it affords the possibility of recycling the donor wafer instead of sacrificing it, unlike the etch-back technique.

0030Other processes have been proposed, using the two techniques simultaneously.

0031Documents <patcit id="pcit0002" dnum="US5882987A"><text>US 5 882 987</text></patcit> and <patcit id="pcit0003" dnum="US6323108B"><text>US 6 323 108</text></patcit> thus disclose an overall process for producing SeOl structures from a donor wafer comprising in succession a single-crystal Si base support substrate, an SiGe layer and an epitaxially grown Si film bonded to an oxidized support substrate.

0032The Smart-Cut^® technique is employed, creating, before bonding, an embrittlement zone in the Si support substrate and, after bonding, causing detachment in the donor wafer in this region.

0033A structure consisting in succession of part of the Si support substrate, the SiGe layer and the epitaxially grown Si film is thus removed, the whole assembly being bonded to the oxidized receiving substrate.

0034Two successive selective etching operations are then carried out on the structure in order firstly to remove the remaining part of the Si support substrate with an etching solution such that the SiGe layer forms a stop layer and then in order to remove the SiGe layer with an etching solution such that the Si film forms a stop layer.

0035The structure obtained at the end is an SeOl structure with a surface Si layer.

0036The main objective of this process is to produce an SeOl structure with a silicon layer which is both very thin and very uniform through the thickness, using a process which can avoid a finishing step which would otherwise be prejudicial to the quality of the silicon layer.

0037The main objective of this process is not, however, to produce an SeOl structure with a strained silicon layer.

0038The SiGe layer used to produce the SeOl structure during implementation of this process has, moreover, a typical thickness of between 0.01 and 0.2 microns, a thickness insufficient, as seen above, to claim to fulfil the role of a buffer layer between the Si support substrate and a potential relaxed SiGe layer.

0039The silicon of the film grown epitaxially on the SiGe layer and constituting the Si layer of the final SeOl structure therefore seems to be little strained or unstrained, and therefore does not meet the main objective of the invention which is subject of the present document, explained above, which relates to the production of a structure comprising a strained Si layer so as to benefit from its useful electrical properties, especially in SeOl structures.

0040This type of process therefore seems to be unsuitable for producing a structure comprising a strained Si layer.

0041The IBM document by <nplcit id="ncit0002" npl-type="s"><text>L.J. Huang et al. ("SiGe-On-Insulator prepared by wafer bonding and layer transfer for high-performance field-effect transistors", Applied Physics Letters, 26102/2001, Vol. 78, No. 9</text></nplcit>) discloses for example a process of producing an Si/SGOI structure with strained silicon, starting from a donor wafer comprising in succession a single-crystal Si support substrate, an SiGe buffer layer and a relaxed SiGe layer.

0042The process employed consists in using the Smart-Cut^® technique in the relaxed SiGe layer, thus making it possible, after bonding to an oxidized receiving substrate and after detachment in the embrittlement zone created beforehand, to produce an SGOI structure with relaxed SiGe.

0043Finally, a film of strained Si is then epitaxially grown on the relaxed SiGe layer in order to produce an Si/SGOI structure.

0044In this final structure, a layer of relaxed material (i.e. the SiGe layer) is subjacent to the layer of strained material (i.e. the Si film). This may be prejudicial to the performance, especially the electronic performance, expected in this case of the layer of strained material, as already mentioned above.

0045This process furthermore limits the application to the production of such an Si/SiGe-on-insulator structure and does not provide a solution to the production, for example, of a strained Si-on-insulator structure.

0046As regards document <patcit id="pcit0004" dnum="WO0199169A"><text>WO 01/99169</text></patcit>, this proposes processes of producing, from a wafer consisting in succession of an Si substrate, an SiGe buffer layer, a relaxed SiGe layer and, optionally, a layer of strained Si or SiGe, a final structure with the relaxed SiGe layer on the optional other strained Si or SiGe layer.

0047The technique employed to produce such a structure involves, after bonding the wafer to a receiving substrate, removal of material from the wafer that it is not desired to retain, by selectively etching the Si substrate and the SiGe buffer layer.

0048It transpires that this technique does make it possible to achieve layer thicknesses that are particularly thin and homogeneous through the thickness, but it does entail, however, the destruction of the Si substrate and of the SiGe buffer layer by chemical etching.

0049These processes do not therefore afford the possibility of reusing part of the wafer, and especially at least part of the buffer layer, for a new layer transfer.

0050<patcit id="pcit0005" dnum="WO0215244A"><text>WO 02/15244</text></patcit> document describes a source wafer, provided before transfer, comprising relaxed SiGe layer/strained Si/SiGe layer/buffer SiGe layer/Si subtract structure.

0051Then, the transfer consists of doing a Smart-Cut® process at the strained Si layer level.

0052In these conditions, this strained Si layer is a sacrificial layer, and can not become a useful layer in the formed final structure.

0053<patcit id="pcit0006" dnum="WO0215244A"><text>WO 02/15244</text></patcit> document describes as well a production of a strained Si/SGOI structure after having transferred a SiGe layer (from a source wafer comprising in succession a relaxed SiGe layer/SiGe buffer layer/Si substrate structure) and after having grown a Si layer on the transferred SiGe.

0054These processes do not provide a solution to the production of a simple strained silicon-on-insulator structure.

0055To avoid these drawbacks and the other disadvantages mentioned above, as well as others, the present invention proposes, according to a first aspect, a method of producing a structure comprising a thin layer of strained semiconductor material obtained from a donor wafer, the donor wafer comprising a lattice parameter matching layer comprising an upper layer of a material chosen from semiconductor materials having a first lattice parameter, according to claim 1.

0056Other preferred aspects of the process according to the invention are the following: <ul id="ul0004" list-style="dash" compact="compact"><li>a process for correcting the surface roughness is carried out after step (d), on the surface of the unremoved part of the matching layer;.</li><li>the removal of the part of the matching layer which remains, comprises at least one operation of selective etching of the matching layer which remains with respect to the material constituting the film;</li><li>after step (a), a step of growing at least one growth layer on the film is additionally carried out, so that the film stays substantially elastically strained;</li><li>the growth layer has a nominal lattice parameter substantially identical to the first lattice parameter;</li><li>between step (a) and step (c), steps of growing, on the film, of layers which are not substantially decreasing the strained state of the film are additional carried out, these growth layers forming a multilayer structure having a respective alternation of layer having the first lattice parameter and of layer strained to have the first lattice parameter, the growth layer directly made on film being a layer having the first lattice parameter;</li><li>between step (a) and step (c), a step of forming at least one bonding layer between the receiving substrate and the donor wafer is additionally carried out, the bonding layer being formed on the receiving substrate and/or on the bonding face of the donor wafer;</li><li>the bonding layer is made of silica;</li><li>step (c) of the bonding is carried out by molecular adhesion (wafer bonding).</li><li>the bonding is accompanied by a thermal treatment in order to strengthen the bonds;</li><li>the embrittlement zone is formed in step (b) by implantation of atomic species into the matching layer, at a depth substantially equal to the implant depth;</li><li>before step (a), the embrittlement zone is formed in step (b) by porosification of a layer beneath the film;</li><li>the film of strained material is made of silicon and the matching layer is made of silicon-germanium, the matching layer comprising a buffer layer with a germanium concentration that increases through the thickness and the upper layer which is relaxed beneath the strained film;</li><li>that part of the matching layer not removed after the supply of energy during step (d), is at least part of the upper relaxed silicon-germanium layer of the matching layer;</li><li>the growth layer is made of relaxed silicon-germanium, with a germanium concentration substantially equal to the germanium concentration of the relaxed upper layer of the matching layer;</li><li>the receiving substrate is made of silicon;</li><li>the wafer comprises at least one layer furthermore containing carbon, with a carbon concentration in the layer substantially less than or equal to 50%; and</li><li>the wafer comprises at least one layer furthermore containing carbon, with a carbon concentration in the layer substantially less than or equal to 5%.</li></ul>

0057Further aspects, objects and advantages of the present invention will be more clearly apparent on reading the following detailed description of the implementation of preferred processes thereof, these being given by way of non-limiting example and with reference to the appended drawings, in which: <ul id="ul0005" list-style="dash"><li><figref idref="f0001">Figure 1</figref> shows the various steps of a first process for producing an electronic structure comprising a thin layer of strained silicon;</li><li><figref idref="f0002">Figure 2</figref> shows the various steps of a second process for producing an electronic structure comprising a thin layer of strained silicon;</li><li><figref idref="f0003">Figure 3</figref> shows the various steps of a third process for producing an electronic structure comprising a thin layer made of strained silicon; and</li><li><figref idref="f0004">Figure 4</figref> shows the various steps of a fourth process for producing an electronic structure comprising a thin layer of strained silicon.</li></ul>

0058It is a main objective of the present invention to provide a reliable process for transferring a film of strained material from a donor wafer to a receiving substrate, the assembly then forming the desired electronic structure, without relaxing the strain within the film during transfer.

0059An example of a process will now be described below, which starts, with reference to <figref idref="f0001">Figures 1a</figref>, <figref idref="f0002">2a</figref>, <figref idref="f0003">3a</figref> and <figref idref="f0004">4a</figref>, from a donor wafer 10 consisting firstly of a single-crystal silicon support substrate 1 and an SiGe lattice parameter matching layer 2.

0060The expression "lattice parameter matching layer" denotes any structure behaving as a buffer layer and having, on the surface, a layer of substantially relaxed material without an appreciable number of structural defects, such as dislocations.

0061Thus, in our example, it will be advantageous to choose an SiGe matching layer 2 consisting in succession of an SiGe buffer layer and a relaxed SiGe layer on the surface.

0062The buffer layer preferably has a germanium concentration which grows uniformly from the interface with the support substrate 1, for reasons which were explained above. Its thickness is typically between 1 and 3 micrometres in order to obtain good structural relaxation on the surface.

0063The relaxed SiGe layer has advantageously been formed by epitaxy on the surface of the buffer layer and its thickness may vary widely depending on the case, with a typical thickness of between 0.5 and 1 micron.

0064The germanium concentration in the silicon within the relaxed SiGe layer is typically between 15% and 30% in order to obtain, during the next step (shown by <figref idref="f0001">Figures 1b</figref> , <figref idref="f0002">2b</figref>, <figref idref="f0003 f0004">3b or 4b</figref>), an epitaxially grown Si film 3 sufficiently strained in order to have appreciable electrical properties and not too strained so as to prevent internal structural defects from appearing.

0065This 30% limitation represents a typical limitation in the current techniques, but this may be caused to change in the coming years.

0066With reference to <figref idref="f0001">Figures 1b</figref>, <figref idref="f0002">2b</figref>, <figref idref="f0003">3b </figref>and <figref idref="f0004">4b</figref>, an Si film 3 is grown on the SiGe matching layer 2.

0067The Si film 3 is advantageously formed by epitaxy using known techniques such as CVD (chemical vapour deposition) and MBE (molecular beam epitaxy) techniques.

0068The silicon of the film 3 is then obliged by the matching layer 2 to increase its nominal lattice parameter in order to make it substantially identical to that of its growth substrate and thus introduce internal tensile strains.

0069These modifications of its internal crystallographic structure will increase the mobility of the charge carriers (such as holes and electrons) by modifying the energy band structure of the silicon crystal.

0070The electrical properties desired in this invention are thus obtained.

0071However, it is necessary to form quite a thin Si film 3: too great a film thickness would in fact cause at least relative relaxation of the strain in the thickness of the film towards the nominal lattice parameter of the silicon.

0072The thickness of the film 3 is thus typically less than 20 nanometers, preferably between 10 and 20 nanometers; above 20 nanometers there is a risk of substantial relaxation of the strain that is desired in the present invention, and below 10 nanometers there is a risk of the thickness of the film causing problems in the fabrication of certain electronic components.

0073Once this donor wafer 10 containing a strained Si film 3 has been produced, one difficulty resides in implementing a reliable process for transferring the strained film 3 from the donor wafer 10 onto a receiving substrate 4, the whole assembly then forming the desired electronic structure 20 without any relaxation of the strain within the film 3 during transfer.

0074To solve this particular difficulty, several methods of implementation may be suggested:

0075According to a first method of implementing the process, with reference to <figref idref="f0001">Figures 1c</figref> and <figref idref="f0002">2c</figref>, a receiving substrate 4 is attached to the surface of the strained film 3.

0076This receiving substrate 4 may, for example, be made of silicon or may consist of other types of material.

0077The receiving substrate 4 is attached by bringing it into intimate contact with the strained Si film 3 and carrying out bonding, in which molecular adhesion between the substrate 4 and the film 3 is advantageously effected.

0078This bonding technique, as well as variants, is especially described in the document entitled "<nplcit id="ncit0003" npl-type="b"><text>Semiconductor Wafer Bonding" (Science and Technology, Interscience Technology) by Q.Y. Tong, U. Gösele and Wiley</text></nplcit>.

0079If necessary, bonding is accompanied by an appropriate prior treatment of the respective surfaces to be bonded and/or by supplying thermal energy and/or supplying an additional bonding layer.

0080Thus, for example, a thermal treatment carried out during bonding allows the bonds to be strengthened.

0081Bonding may also be reinforced by a bonding layer inserted between the film 3 and the receiving substrate 4, which makes it possible to produce molecular bonds both with the film 3 and with the material constituting the bonding face of the receiving substrate 4 which are stronger than those existing between the film 3 and the receiving substrate 4.

0082Thus, silicon oxide (also called silica or SiO₂) is a material that may be chosen for producing such a bonding layer, since it exhibits good adhesion with the silicon of the film 3. The silica may be formed on the film 3 and/or on the receiving substrate 4 by SiO₂ deposition or by thermal oxidation on the respective bonding surfaces.

0083Advantageously, the material constituting the bonding face of the receiving substrate 4 and/or the material of the bonding layer optionally formed is electrically insulating, so that there exists an insulating layer directly adjacent to the strained Si film 3: a conducting or semiconducting material directly adjacent to the film 3 could in fact impair the electrical effects desired here in a structure consisting of the combination of the two materials.

0084This advantageous choice of insulating material adjacent to the film 3 becomes particularly necessary when the structure 20 that it is desired to produce in the end is an SeOl structure, the semiconductor layer of the SeOl structure then being the transferred film 3 of strained Si.

0085Moreover, the receiving substrate 4 bonded to the strained Si film 3 makes it possible to retain substantially the strained structural state of the strained Si of the film 3, this being so even if the donor wafer 10 on which the strained Si film 3 has been grown epitaxially is removed, the strain within the film 3 being mainly ensured after transfer by the bonding forces existing between the film 3 and the receiving substrate 4.

0086Transfer of the strained film 3 from the donor wafer 10 to the receiving substrate 4 without relaxing the strain within the film 3 is thus made possible, thereby solving the abovementioned difficulty.

0087The receiving substrate 4 furthermore constitutes a mechanical support sufficiently rigid to sustain the strained Si film 3 and protect it from any mechanical stresses coming from the outside.

0088Once the receiving substrate 4 has been bonded, part of the donor wafer 10 is removed using one or more of the preferred techniques that will be explained later, in order to transfer the strained Si film 3 to the receiving substrate and to produce the desired structure 20.

0089In a first case, with reference to <figref idref="f0001">Figure 1d</figref>, substantially all that part of the donor wafer 10 on the matching layer 2 side in relation to the strained film 3 is removed.

0090Thus, a final strained Si-on-substrate structure, and in particular a strained Si-on-insulator structure (also called here an SOI structure), is obtained if the material subjacent to the strained Si film 3 is an electrical insulator.

0091In a second case which is not part of the invention, with reference to <figref idref="f0002">Figure 2d</figref>, the support substrate 1 and part of the matching layer 2 are removed.

0092Thus, a final SiGe-on-strained Si-on-substrate structure, and in particular an SiGe-on-strained Si-on-insulator structure (also called SiGe/SOI structure), is obtained if the material underlying the strained Si film 3 is an electrical insulator.

0093The removal of part of the matching layer 2 is advantageously carried out so as to preserve of the matching layer 2 on the structure 20, only at least part of the relaxed SiGe layer included in the matching layer 2 (and which had been epitaxially grown according to one particular method of producing the matching layer 2 explained above, on a buffer layer).

0094According to a second method of implementing the process, with reference to <figref idref="f0003">Figures 3c</figref> and <figref idref="f0004">4c</figref>, a relaxed SiGe layer 6 is grown on the strained Si film 3, by epitaxy (for example by CVD or MBE) advantageously before any bonding operation.

0095The Ge concentration in this layer 6 is advantageously and substantially the same as that of the SiGe present near the bonding face of the matching layer 2 so as to prevent this layer having an additional influence on the strain in the film 3.

0096In one particular method of implementation, further layers may be grown epitaxially on the SiGe layer, such as strained Si or SiC layers and SiGe or SiGeC layers respectively alternating in order to form a multilayer structure.

0097Referring to <figref idref="f0003">Figures 3d</figref> and <figref idref="f0004">4d</figref>, a receiving substrate 4 is bonded to the relaxed SiGe layer 6 in a manner substantially identical to that explained above in the first method of implementation and relating to a receiving substrate 4 bonded to the strained film 3.

0098The bonding face of the donor wafer 10 is then the free face of the relaxed SiGe layer 6.

0099It should be pointed out that, unlike the first method of implementation, the bonds do not necessarily constitute the only means of preserving the strain in the film 3: this is because, if the relaxed SiGe layer 6 is thick enough, it may participate in, or even guarantee, the preservation of the strain in the film 3 after these two layers have been transferred.

0100The thickness of the SiGe epilayer 6 may thus be judiciously chosen in this regard so as to preserve greater or lesser amounts of the strain in the Si layer.

0101As in the first method of implementation, once the receiving substrate 4 has been bonded, part of the donor wafer 10 is removed using one or more of the preferred techniques that will be explained below, in order to transfer the strained Si film 3 to the receiving substrate 4 and to produce the desired structure 20.

0102In a first case, with reference to <figref idref="f0003">Figure 3e</figref>, all that part of the donor wafer 10 on the matching layer 2 side in relation to the layer 6 is removed.

0103Thus, a final strained Si-on-relaxed SiGe-on-substrate structure, and in particular a strained Si-on-relaxed SiGe-on-insulator structure (also called an Si/SGOI structure), is obtained if the material underlying the relaxed SiGe layer 6 is an electrical insulator.

0104In a second case which is not part of the invention, with reference to <figref idref="f0004">Figure 4e</figref>, the Si support substrate 1 and part of the matching layer 2 are removed.

0105Thus, a final SiGe-on-strained Si-on-relaxed SiGe-on-substrate structure, and in particular an SiGe-on-strained Si-on-relaxed SiGe-on-insulator structure (also called an SiGe/Si/SGOI structure), is obtained if the material subjacent to the relaxed SiGe layer 6 is an electrical insulator.

0106Part of the matching layer 2 is advantageously removed so as to preserve of the matching layer 2 on the structure 20 only at least part of the relaxed SiGe layer present in the matching layer 2 (and which had been epitaxially grown, using one particular method of producing the matching layer 2 explained above, on a buffer layer).

0107Thus, by means of these processes several structures (shown for example in <figref idref="f0001">Figures 1d</figref>, <figref idref="f0002">2d</figref>, <figref idref="f0003">3e</figref> and <figref idref="f0004">4e</figref>) comprising a layer of strained material can be produced, each having very specific electrical properties.

0108With reference to <figref idref="f0001">Figures 1d</figref>, <figref idref="f0002">2d</figref>, <figref idref="f0003">3e</figref> and <figref idref="f0004">4e</figref>, removal of material constitutes the final step of producing such structures.

0109A first material removal operation consists in detachment the donor wafer in a region of the matching layer 2 that has previously been weakened therein.

0110Two known non-limiting techniques may thus perform such an operation.

0111A first technique, called the Smart-Detachment® technique, known to those skilled in the art (and descriptions of which may be found in a number of works dealing with wafer reduction techniques), consists in implanting atom species (such as hydrogen ions) and then in subjecting the implanted region, which then forms an embrittlement zone, to a heat treatment and/or mechanical treatment, or another supply of energy, in order to make the detachment in the embrittlement zone.

0112Detachment from an embrittlement zone thus formed in the matching layer 2 makes it possible to remove most of the wafer 10, in order to obtain a structure comprising the remainder of the matching layer 2, the strained Si film 3, optionally epitaxially grown overlayers such as the layer 6, the optional bonding layer and the receiving substrate 4.

0113A second technique consists in obtaining a weak interface by creating at least one porous layer, as described for example in document <patcit id="pcit0007" dnum="EP0849788A"><text>EP-A-0 849 788</text></patcit>, and then in subjecting the weak layer to a mechanical treatment, or another supply of energy, in order to make the detachment in the weakened layer.

0114The weakened layer made of porous silicon is formed between the support substrate 1 and the matching layer 2, in the matching layer 2 (for example between a buffer layer and a relaxed layer) or on the matching layer 2 (that is to say between the matching layer 2 and the strained Si film 3 or the optional relaxed SiGe layer 6).

0115Detachment a weakened layer makes it possible to remove at least some of the wafer 10, in order to obtain a structure comprising the optional remainder of the wafer 10, the strained Si film 3, optionally epitaxially grown overlayers such as the layer 6, optionally the inserted bonding layer and the receiving substrate 4.

0116A treatment of the wafer 10, in order to remove the porous silicon which remains after the detachment, is advantageously carried out, such as an etching operation or a thermal treatment.

0117If the porous layer lies within the support substrate 1, a lapping, chemical-mechanical polishing and/or selective chemical etching operations are then advantageously carried out in order to remove the remaining part of the support substrate 1.

0118These two non-limiting techniques make it possible to rapidly remove, en bloc, a substantial part of the wafer 10.

0119They also allow the possibility of reusing the removed part of the wafer 10 in another process, such as for example a process according to the invention.

0120Thus, if the part removed is the support substrate 1, an operation to reform a matching layer 2, a film 3 and an optional SiGe layer 6 and/or other layers may be carried out as described above, after the surface of the support substrate 1 has been polished.

0121If the removed part is the support substrate 1 and at least part of the matching layer 2, a possible reformation of another part of the matching layer 2, of a film 3 and of an SiGe layer 6 and/or other layers may be carried out as described above, after the surface of the remaining part of the matching layer 2 has been polished.

0122A second material removal operation after detachment the wafer 10 according, for example, to one of the above two techniques consists in correcting surface defects or in removing, if necessary, the remaining part of the matching layer 2.

0123According to the invention it is essential to remove all of the remaining part of the matching layer 2 (referring to <figref idref="f0001">Figures 1d</figref> and <figref idref="f0003">3e</figref>); this operation may be carried out by selective chemical etching so that the strained Si film 3 undergoes little or no etching, thus forming an etching stop layer.

0124The remaining part of the matching layer 2 is in this case etched by wet etching using etching solutions having substantial selectivities with respect to the strained Si film 3, such as a solution comprising HF/H₂O₂/CH₃COOH (approximately 1/1000 selectivity) or HNA (hydrofluoric-nitric-acetic solution).

0125Dry etching operations may also be carried out in order to remove material, such as plasma etching, or by sputtering.

0126This chemical method has the main advantage of being quite rapid for thin layers to be removed and of avoiding the use of chemical-mechanical polishing finishing operations usually employed after detachment the wafer.

0127It thus makes it possible to maintain good surface quality and good thickness homogeneity of the strained Si film 3 obtained during its epitaxy, it having been unnecessary to carry out a mechanical finishing step in the case in which the material removal is completed by a single chemical operation, thus preventing defects from appearing, such as strain-hardened regions, that such a mechanical finishing step is likely to cause.

0128In certain particular cases, soft polishing is, however, used in order to compensate for any small surface roughnesses.

0129However, the chemical etching operation may advantageously be preceded, especially in the case of a thicker layer to be removed, by mechanical or chemical-mechanical abrasion by lapping and/or chemical-mechanical polishing CMP of the remaining part of the matching layer 2.

0130If it is desired to maintain part of the matching layer 5 (referring to <figref idref="f0002">Figures 2d</figref> and <figref idref="f0004">4e</figref>), it will be advantageous to choose a thermal treatment or a polishing, preferably chemical-mechanical polishing CMP, in order to remove any roughnesses and thickness homogeneities that might have appeared during detachment of the wafer 10.

0131However, etching selectivity with respect to the Ge concentration present in the matching layer 2 (and which increases with the thickness of the matching layer 2) may also be employed, the etching slowing down or stopping on the relaxed layer lying within the matching layer 2.

0132Wet etching with a solution comprising TMAH may, for example, be very suitable for carrying out such selective etching, the relaxed layer of the matching layer 2 having in this case a germanium concentration of between 20% and 30%.

0133These techniques are proposed by way of an example in the present document, but they do not in any way constitute a limitation, the invention covering all types of techniques suitable for removing material from a donor wafer 10 in accordance with the process according to the invention.

0134In one particular embodiment of the structure 20, one or more epitaxial depositions may be carried out on the donor wafer 10, such as epitaxial deposition of an SiGe or SiGeC layer, or epitaxial deposition of a strained Si or SiC layer, or successive epitaxial depositions of SiGe or SiGeC layers and strained Si or SiC layers in alternation, in order to form a multilayer structure.

0135According to the invention, a growth of Si is operating on the film 3 to thicken it.

0136A first interest of doing a such growth of Si of re-finding the initial thickened of the film 3, which may nevertheless be thinned by soft polishing etching or event cleaning operation.

0137A second interest concerns the insulating layer underlying the film 3 and being of a viscous material, as for example SiO₂ or Si₃N₄, wherein the film 3 can be thickened so that its thickness becomes more important than the "standard Si critical thickness", without losing its elastic stress.

0138The "standard Si critical thickness" can be found from the stress ratio value of the film 3 and from the fact that this stress ratio can be directly associated with the Ge concentration of a Si_1-xGe_x substrate (i.e. the x value) on which the film 3 had been or would have been grown ; if the stress ratio of the film 3 has not changed since the growth of the film 3, the associated Ge concentration is those of the Si_1-xGe_x substrate on which the film 3 has been grown before transfer.

0139The "standard critical thickness" value of the film 3 can thus be directly associated with a Ge concentration of a Si_1-xGe_x substrate on which the film 3 had been or would have been grown. Some examples of "standard critical thickness" can then be found in "<nplcit id="ncit0004" npl-type="s"><text>High-Mobility Si and Ge structures" of Friedrich Schaffler ("Semiconductor Science Technology" 12 (1997) 1515-1549</text></nplcit>).

0140Thus, the applicant notices that, in a structure including a viscous material layer and a strained Si film 3 on the viscous material layer, the critical thickness of the film 3 (beyond which the film 3 is not mainly elastically strained) is typically more important than its standard critical thickness.

0141This property may result from the viscosity of the insulator layer which should accommodate with the Si internal stress.

0142Thus, experience shows that it is possible to increase the thickness of the film 3 about 60 nanometers, without substantial loss of stress.

0143The thick strained Si layer can then be used as an active layer (taking thus advantage of electrons high mobility that a such material exhibits).

0144Having completed the final structure, a finishing step may optionally be carried out, such as finishing treatments, for example like an annealing operation in order to further strengthen the bonding interface between the donor wafer 10 and the receiving substrate 4.

0145The present invention is not limited to a SiGe lattice parameter matching layer 2, but also extends to a constitution of the matching layer 2 from other types of type III-V materials or other materials capable of straining the material of the epitaxially overgrown film 3 or another semiconductor material.

0146Finally, the present invention does not relate only to transferring a strained silicon film 3, but in general relates to transferring a film of any type of semiconductor able to be strained and transferred according to a process of the invention.

0147In the semiconductor layers, other constituents may be added thereto, such as carbon with a carbon concentration in the layer in question substantially of less than or equal to 50% or more particularly with a concentration of less than or equal to 5%.