EP1524702A2

Thin film transistor with body contact region

Abstract

A thin film transistor of the present invention comprises, an active layer formed on an insulating substrate and having a channel region and source/drain regions; a gate electrode formed corresponding to the channel region of the active region; a body contact region separately formed with the source/drain regions in the active layer; source/drain electrodes each connected to the source/drain regions; and a conductive wiring for connecting the body contact region and the gate electrode.

EP1524702A2, drawing sheet 1
Sheet 1 of 9

Term

Term ended

Projected expiry passed 12 October 2024, 1.9 years ago.

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23 claims: 5 independent, 18 dependent

  1. 1
    A thin film transistor comprising:an active layer formed on an insulating substrate and having a channel region and source/drain regions;a gate electrode arranged in the channel region of the active layer;a body contact region separately formed with the source/drain regions on the active layer;source/drain electrodes each connected to the source/drain regions;and a conductive wiring for connecting the body contact region and the gate electrode.
  2. 13
    A thin film transistor for a flat panel display, the thin film transistor comprising:an active layer formed on an insulating substrate, and having a channel region and source/drain regions;a gate electrode formed corresponding to the channel region of the active layer;a body contact region separately formed with the source/drain regions in the active layer;source/drain electrodes each connected to the source/drain regions;and conductive wiring for connecting the body contact region and the gate electrode,    wherein the conductive wiring is formed in a configuration selected from the group consisting of: in a body with the gate electrode;and in a separate island-type bridge pattern, and    wherein the conductive wiring is made of the same material as at least one electrode of the gate electrode, the source/drain electrodes or the pixel electrode
  3. 14
    A thin film transistor comprising:an active layer formed on an insulating substrate and having a channel region and source/drain regions;a first insulating layer formed on the substrate to cover the active layer;a gate electrode formed corresponding to the channel region of the active layer;a second insulating layer formed to cover the gate electrode;a body contact layer separately formed with the source/drain regions on the active layer;source/drain electrodes each connected to the source/drain regions;a contact hole formed on the first insulating layer to expose a portion of the body contact region;and a conductive wiring for connecting the body contact region and the gate electrode through the contact hole.
  4. 17
    A thin film transistor comprising:an active layer formed on an insulating substrate and having a channel region and source/drain regions;a first insulating layer formed on the substrate to cover the active layer;a gate electrode formed corresponding to the channel region of the active region;a second insulating layer formed to cover the gate electrode;a body contact region separately formed with the source/drain regions in the active layer;source/drain electrodes each connected to the source/drain regions;a first contact hole formed on at least the second insulating layer of the first and second insulating layers to expose a portion of the gate electrode;a second contact hole formed on at least the first insulating layer of the first and second insulating layers to expose a portion of the body contact region;and a conductive wiring connecting the body contact region and the gate electrode through at least the second contact hole of the first contact hole and the second contact hole.
  5. 20
    A thin film transistor for a flat panel display comprising at least a pixel electrode, the thin film transistor comprising:an active layer formed on an insulating substrate and having a channel region and source/drain regions;a first insulating layer formed on the substrate to cover the active layer;a gate electrode formed corresponding to the channel region of the active layer;a second insulating layer formed to cover the gate electrode;a body contact region separately formed with the source/drain regions in the active layer;source/drain electrodes each connected to the source/drain regions;a third insulating layer formed below the pixel electrode;a first contact hole formed at least on the second insulating layer of the first to third insulating layers to expose a portion of the gate electrode;a second contact hole formed at least on the first insulating layer of the first to third insulating layers to expose a portion of the body contact region;and a conductive wiring for connecting the body contact region and the gate electrode through at least the second contact hole of the first contact hole and the second contact hole.