Method of manufacturing a group III nitride compound semiconductor device

BACKGROUND OF THE INVENTION

1. Field of the Invention

0001The present invention relates to a a group III nitride compound semiconductor device and a producing method therefor. Particularly, it relates to improvement in a buffer layer-forming method used when a group III nitride compound semiconductor device is produced by a metal organic chemical vapor deposition method (MOCVD method).

0002The present application is based on Japanese Patent Applications No. Hei. 11-222882 and 11-315193, which are incorporated herein by reference.

2. Description of the Related Art

0003Heretofore known is a group III nitride compound semiconductor device having a structure in which group III nitride compound semiconductors are laminated on a sapphire substrate through a buffer layer of Al_XGa_1-XN (0≦X≦1).

0004For example, Unexamined Japanese Patent Publication No. Sho. 62-119196 has described a buffer layer-forming method in which a buffer layer of Al_XGa_1-XN (0≦X≦1) is grown at a growth temperature of from 950 to 1150°C on a sapphire substrate heated to about 1000°C by the MOCVD method.

0005On the other hand, by the investigation thereafter, it has been found that the crystallinity of a GaN compound semiconductor layer grown on a buffer layer is improved when the buffer layer is grown at a lower temperature of about 400°C on a sapphire substrate heated to about 1000°C. See Unexamined Japanese Patent Publication No. Hei. 2-229476, etc. Any main group III nitride compound semiconductor light-emitting device (LED, etc.) currently put into practical use uses such a low-temperature grown buffer layer.

0006Incidentally, the growth temperature means the temperature of a substrate heated in execution of an MOCVD method.

0007The film-forming temperature of a semiconductor layer formed on a buffer layer is, however, generally about 1000°C. Hence, when the aforementioned low-temperature grown buffer layer is used, it is necessary that the substrate heated to about 1000°C is once cooled to about 400°C for the sake of surface cleaning and then heated to about 1000°C again. When the substrate temperature condition is changed in a sequence of high temperature low temperature high temperature in the aforementioned manner, it requires much time and labor to adjust the substrate temperature itself. Hence, the large change of the substrate temperature condition was a barrier against the improvement of efficiency in production of a semiconductor device in which a GaN compound semiconductor layer is grown through such a low-temperature grown buffer layer.

0008In order to solve the problem, a technique to form a buffer layer at a high temperature has been disclosed in Unexamined Japanese Patent Publications Nos. Hei.9-148626, 7-321374, 9-64477, and Sho. 59-57997, etc.

0009Further, with respect to nitriding of a surface of a sapphire substrate, see Unexamined Japanese Patent Publication No. Hei. 5-41541.

0010By the way, a general device structure of a group III nitride compound semiconductor device used for a light-emitting diode, or the like, is formed as follows. A thin buffer layer of AlN or GaN is formed on a sapphire substrate at a low temperature, and a group III nitride compound semiconductor layer, such as a GaN layer, constituting a device function is laminated on the buffer layer. In such a device, the buffer layer is guessed to be amorphous or polycrystalline. It is conceived that the buffer layer serves as a one-directionally oriented seed crystal at a high growth temperature (about 1000°C) for the formation of a device function layer and relaxes thermal distortion based on the difference in thermal expansivity between the device function layer and the sapphire substrate.

0011In opposition to such an amorphous or polycrystalline buffer layer, Unexamined Japanese Patent Publication No. Hei. 9-64477 has made a proposal that a single crystalline AlN buffer layer is formed on a sapphire substrate.

0012Unexamined Japanese Patent Publication No. Hei. 9-64477 has asserted that a single crystalline AlN layer good in crystallinity can be grown on the sapphire substrate when a condition is satisfied so that the buffer layer is grown up to a thickness of from 20 to 300 nm at a high temperature not lower than 1300°C and that the half-value width of an X-ray rocking curve of the buffer layer is set to be not longer than 90 sec.

0013AlN as a single crystal with good crystallinity can be surely grown on the sapphire substrate by the background-art method described in Unexamined Japanese Patent Publication No. Hei. 9-64477. If the crystallinity of the buffer layer is good, a device function layer of group III nitride compound semiconductors can be grown with good crystallinity on the buffer layer.

0014According to the present inventors' examination, however, the crystallinity of the buffer layer formed by the method described in Unexamined Japanese Patent Publication No. Hei. 9-64477 is insufficient to form such a device.

SUMMARY OF THE INVENTION

0015An object of the present invention is to provide an AlN single crystal layer excellent as a buffer layer for a device function layer of group III nitride compound semiconductors to thereby solve the aforementioned problem.

0016Another object of the present invention is to form a single crystal AlN layer good in crystallinity on a substrate directly. Such a single crystal AlN layer has both high electrical insulation characteristic and high thermal conduction characteristic. At the same time, the single crystal AlN layer can be used for forming various types of semiconductor functional devices such as a high-frequency conversion device which is an acoustic device utilizing piezoelectric characteristic.

0017Still another object of the present invention is to provide a preferred condition for formation of a group III nitride compound semiconductor layer on a high-temperature buffer layer as proposed in the background art.

0018The present inventors have made eagerly investigation and investigation to achieve the foregoing object. As a result, it has been found that a group III nitride compound semiconductor layer having a crystallinity equal to or better than that of the background-art layer can be grown directly on a sapphire substrate even at an ordinary temperature, that is, at a high temperature for growing a group III nitride compound semiconductor layer when the thickness of the layer is set to be a predetermined value under a predetermined condition.

0019The present invention is devised on the basis of such knowledge. That is, there is provided a method for producing a group III nitride compound semiconductor device, comprising the step of growing, at a growth temperature of from 1000 to 1180°C, a layer of a group III nitride compound semiconductor having a thickness of from 0.01 to 3.2 µm on a substrate having a surface nitride layer having a thickness of not larger than 300Å.

0020In the producing method according to the present invention, a series of production steps of from the step of heating a substrate to the step of forming a group III nitride compound semiconductor layer can be performed without any large temperature change. As a result, the time and labor required for adjusting the substrate temperature in the background art can be reduced, so that the efficiency in production of the semiconductor device can be improved.

0021Further, according to the inventors' observation, a second group III nitride compound semiconductor layer grown on a first group III nitride compound semiconductor layer formed in the aforementioned condition is excellent in morphology. Hence, the first group III nitride compound semiconductor layer is excellent as a buffer layer interposed between the second group III nitride compound semiconductor layer constituting a device function portion and the substrate.

0022Still further, the present invention is devised to achieve at least one of the aforementioned objects. According to the present invention, there is provided a group III nitride compound semiconductor device comprising a substrate, and an AlN single crystal layer formed on said substrate, the AlN single crystal layer having a thickness of from 0.5 to 3 µm and having a substantially flat surface, wherein the half-value width of an X-ray rocking curve of the AlN single crystal layer is not longer than 50 sec.

0023According to the group III nitride compound semiconductor device configured as described above, the crystallinity of the AlN single crystal layer formed on the substrate becomes very good. Hence, a device function can be built in the AlN single crystal layer itself. Moreover, also in the case where a device function layer of group III nitride compound semiconductors is formed on the AlN single crystal layer, the crystallinity of the device function layer becomes equal to or higher than the crystallinity of a device function layer formed on a low-temperature growth buffer layer used generally.

0024In the above description, the substrate is not specifically limited so long as an AlN single crystal can be grown on the substrate. Examples of the substrate material may include sapphire, materials with spinel structure, silicon, silicon carbide, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, group III nitride compound semiconductor single crystal, etc.

0025According to the inventors' examination, it is preferable that sapphire, especially the face <u>a</u> thereof, is used as the substrate material.

0026The thickness of the AlN single crystal layer is set to be in a range of from 0.5 to 3 µm. If the thickness is smaller than 0.5 µm, it is insufficient to form a device function. Contrariwise, the thickness need not be set to be larger than 3 µm.

0027This is because each of layers necessary for forming a semiconductor device is generally not thicker than 3 µm though the layers may be thicker than 3 µm in total. The reason why the AlN single crystal layer is thicker than that described in Unexamined Japanese Patent Publication No. Hei. 9-64477 is that the crystallinity of AlN itself appears. If the layer is too thin, the crystal is warped because of the influence of the substrate. Contrariwise, when the layer is thickened, the crystal's own nature can be utilized.

0028The half-value width of an X-ray rocking curve as an indicator for the crystallinity of the AlN single crystal is set to be not longer than 50 sec. If the half-value width is longer than 50 sec, crystallinity sufficiently adapted to a semiconductor device cannot be secured. Also when a group III nitride compound semiconductor layer is grown on the AlN single crystal layer, the half-value width of the AlN single crystal layer is preferably set to be not longer than 50 sec from the point of view of flattening a surface of the AlN single crystal layer substantially to secure the stable crystal growth of the group III nitride compound semiconductor layer.

0029Group III nitride compound semiconductors formed on the AlN single crystal layer are represented by the general formula Al_XGa_YIn_1-X-YN (0≦X≦1, 0≦Y≦1, 0≦X+Y≦1), which includes so-called binary compounds such as AlN, GaN and InN, and so-called ternary compounds such as Al_XGa_1-XN, Al_XIn_1-XN and Ga_XIn_1-XN (0≦X≦1 each). The group III elements may be partially replaced by boron (B), thallium (Tl), etc. The nitrogen (N) may be partially replaced by phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc.

0030The group III nitride compound semiconductors may contain any optional dopant. Si, Ge, Se, Te, C, etc. may be used as n-type impurities. Mg, Zn, Be, Ca, Sr, Ba, etc. may be used as p-type impurities. After doped with p-type impurities, the group III nitride compound semiconductor may be subjected to electron beam irradiation, plasma irradiation or heating by a furnace.

0031The method of forming the group III nitride compound semiconductor layer is not specifically limited but the layer may be formed by a metal organic chemical vapor deposition method (MOCVD method) or by a known method such as a molecular beam epitaxy method (MBE method), a halide vapor phase epitaxy method (HVPE method), a sputtering method, an ion-plating method, an electron shower method, or the like.

0032Examples of the device constituted by the group III nitride compound semiconductor layer include optical devices such as a light-emitting diode, a photodetector, a laser diode, a solar cell, etc., bipolar devices such as a rectifier, a thyristor, a transistor, etc., unipolar devices such as an FET, etc., and electronic devices such as a microwave device, etc. The present invention may be applied also to laminates as intermediates of these devices. Incidentally, a homostructure, a heterostructure or a double heterostructure having an MIS junction, a pin junction or a p-n junction may be used as the configuration of the light-emitting device. A quantum well structure (single quantum well structure or multiple quantum well structure) may be used as the configuration of the light-emitting layer.

0033Any of the aforementioned devices may be built in the AlN single crystal layer.

0034Features and advantages of the invention will be evident from the following detailed description of the preferred embodiments described in conjunction with the attached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

0035The file of this patent contains at least one drawing executed in color. Copies of this patent with color drawings will be provided by the Patent and Trademark Office upon request and payment of the necessary fee.

0036In the accompanying drawings: <ul id="ul0001" list-style="none" compact="compact"><li>Fig. 1 is a graph showing the relation between the growth rate of an AlN single crystal layer and the crystallinity thereof;</li><li>Fig. 2 shows an X-ray rocking curve in the case where the growth rate in Fig. 1 is 50 nm (500Å)/min;</li><li>Fig. 3 is a surface electron microscope photograph of the AlN single crystal layer likewise at the growth rate of 50 nm (500Å)/min;</li><li>Fig. 4 is a surface electron microscope photograph of the AlN single crystal layer likewise at the growth rate of 10 nm (100Å)/min;</li><li>Fig. 5 shows a light-emitting diode as an embodiment of the present invention;</li><li>Figs. 6A to 6F show photographs of the surfaces of each sample in table 2;</li><li>Figs. 7A to 7F show photographs of the surfaces of each sample in table 4;</li><li>Fig. 8 shows a light-emitting diode as another embodiment of the present invention; and</li><li>Figs. 9A to 9F show photographs of the surfaces of each sample in table 1.</li></ul>

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

0037The method of forming the AlN single crystal layer will be described below with reference to the drawings. Also the AlN single crystal layer can be formed by the same method as the aforementioned method of forming the group III nitride compound semiconductor layer.

0038Description will be made hereunder mainly about the MOCVD method.

0039A sapphire substrate is set in a general MOCVD apparatus so that its face <u>a</u> cleaned by a cleaning and heating process using organic solvent is located as a principal face. In the condition that the substrate temperature is set to be in a range of from 1000 to 1200°C, preferably in a range of from 1050 to 1150°C, 7×10^-5 to 4×10^-4 µmol/cm³ of trimethylaluminum (TMA) as an aluminum source gas and 0.02 to 0.08 µmol/cm³ of ammonia as a nitrogen material gas are almost simultaneously introduced into a reaction vessel. It is preferable from the point of view of temperature controllability that the temperature of the gases is equalized to the substrate temperature when a device function layer of group III nitride compound semiconductors is formed. Hydrogen is used as a carrier gas. The inside pressure of the reaction chamber is set to be, for example, in a range of from 4.0×10³ to 1.3×10⁴ Pa (from 30 to 100 Torr), preferably in a range of from 6.7×10³ to 1.2×10⁴ Pa (50 to 90 Torr). The flow rate of the carrier gas is set to be, for example, in a range of from 2 to 4 m/sec, preferably in a range of from 2.5 to 3.5 m/sec. The concentration of each of the material gases is adjusted so that the probability of collision on the substrate surface becomes highest with respect to the aforementioned gas flow rate. For example, TMA and ammonia are set to be 1×10^-4 µmol/cm³ and 0.05 µmol/cm³ respectively. Incidentally, it is preferable that the concentration of ammonia is set to be low enough to avoid nitriding of the substrate in the early stage of growth.

0040Fig. 1 shows the relation between growth rate (0.1 nm (1 Å)/min) and crystallinity (half-value width of rocking curve: sec) in the case where an AlN single crystal layer 0.5 µm thick is formed on the face <u>a</u> of the sapphire substrate by the aforementioned method. Viewing Fig. 1 along the guideline that the half-value width is set to be not longer than 50 sec, the growth rate is preferably set to be not lower than 20 nm (200Å)/min. The upper limit of the growth rate is not specifically restricted but, for example, the growth rate is preferably set to be not higher than 60 nm (600Å)/min. If the growth rate is higher than 60 nm (600Å)/min, the resulting film is hardly flattened.

0041More preferably, the growth rate is from 30 to 50 nm (300 to 500Å)/min.

0042Fig. 2 shows a rocking curve at the growth rate of 50 nm (500Å)/min in which the smallest half-value width is exhibited in Fig. 1.

0043Fig. 3 shows a surface electron microscope photograph of the AlN single crystal layer on this occasion. As shown in Fig. 3, the surface of the AlN single crystal layer is substantially flat.

0044On the other hand, Fig. 4 shows a surface electron microscope photograph of the AlN single crystal layer in the case where the growth rate is set to be 10 nm (100Å)/min. As shown in Fig. 4, the surface is not flattened when the half-value width is about 90 sec (the value in the background art). In such a surface structure, there is a possibility that doping may be unable to come up to the purpose also in the case where a device function is built in the AlN single crystal layer. Moreover, also when another device function layer constituted by a group III nitride compound semiconductor layer is to be grown on the AlN single crystal layer, the device function layer is hardly grown with good crystallinity.

0045An embodiment of the present invention will be described below.

0046A light-emitting diode 10 is used as this embodiment. The configuration of the light-emitting diode 10 is shown in Fig. 5. <tables id="tabl0001" num="0001"><table frame="all"><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="center">Layer</entry><entry namest="col2" nameend="col2" rowsep="0" align="center">Composition</entry><entry namest="col3" nameend="col3" rowsep="0" align="center">Dopant</entry><entry namest="col4" nameend="col4" rowsep="0" align="center">(Thickness)</entry></row><row><entry namest="col1" nameend="col1" align="center">light-transmissible electrode 19</entry><entry namest="col2" nameend="col2" /><entry namest="col3" nameend="col3" /><entry namest="col4" nameend="col4" /></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="left">p-type clad layer 18</entry><entry namest="col2" nameend="col2" align="left">p-GaN</entry><entry namest="col3" nameend="col3" align="left">Mg</entry><entry namest="col4" nameend="col4" align="char" char=".">(0.3 µm)</entry></row></tbody></tgroup><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="center">light-emitting layer 17</entry><entry namest="col2" nameend="col4" align="left">Superlattice structure</entry></row></thead><tbody valign="top"><row rowsep="0"><entry namest="col1" nameend="col1" align="left">quantum well layer</entry><entry namest="col2" nameend="col3" align="left">In_0.15Ga_0.85N</entry><entry namest="col4" nameend="col4" align="char" char=".">(3.5 nm)</entry></row><row><entry namest="col1" nameend="col1" align="left">barrier layer</entry><entry namest="col2" nameend="col3" align="left">GaN</entry><entry namest="col4" nameend="col4" align="char" char=".">(3.5 nm)</entry></row><row><entry namest="col1" nameend="col4" align="justify">the number of repeated quantum well and barrier layers: 1 to 10</entry></row><row><entry namest="col1" nameend="col1" align="left">n-type clad layer 16</entry><entry namest="col2" nameend="col2" align="left">n-GaN</entry><entry namest="col3" nameend="col3" align="left">Si</entry><entry namest="col4" nameend="col4" align="char" char=".">(4 µm)</entry></row><row><entry namest="col1" nameend="col1" align="left">AlN single crystal layer 15</entry><entry namest="col2" nameend="col2" align="left">AlN</entry><entry namest="col3" nameend="col3" /><entry namest="col4" nameend="col4" align="char" char=".">(0.5 µm)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">substrate 11</entry><entry namest="col2" nameend="col2" align="left">sapphire (face <u>a</u>)</entry><entry namest="col3" nameend="col3" /><entry namest="col4" nameend="col4" align="char" char=".">(300 µm)</entry></row></tbody></tgroup></table></tables>

0047The n-type clad layer 16 may be of a double-layered structure with an n^- layer of low electron density on the light-emitting layer 17 side and an n⁺ layer of high electron density on the undercoat layer 15 side.

0048The light-emitting layer 17 is not limited to the Superlattice structure. A single hetero type structure, a double hetero type structure, a homo-junction type structure, or the like, may be used as the configuration of the light-emitting layer.

0049A group III nitride compound semiconductor layer doped with an acceptor such as magnesium and having a wide band gap may be interposed between the light-emitting layer 17 and the p-type clad layer 18. This is for preventing electrons introduced into the light-emitting layer 17 from diffusing into the p-type clad layer 18.

0050The p-type clad layer 18 may be of a double-layered structure with a p^- layer of low hole density on the light-emitting layer 17 side and a p⁺ layer of high hole density on the electrode side.

0051In the light-emitting diode configured as described above, the growth rate of the AlN single crystal layer 15 is about 50 nm (500Å)/min. The other growth condition such as substrate temperature are in the aforementioned range.

0052The group III nitride compound semiconductor layers on the n-type clad layer 16 are formed by execution of an MOCVD method in a general condition.

0053Then, after a mask is formed, the p-type clad layer 18, the light-emitting layer (active layer) 17 and part of the n-type clad layer 16 are removed by reactive ion etching. Thus, a portion of the n-type clad layer 16 is exposed so that an n-type electrode pad 21 is formed.

0054After a photoresist is applied onto a semiconductor surface uniformly, the photoresist is partially removed from an electrode-forming portion on the p-type clad layer 18 by photolithography. Thus, a portion of the p-type clad layer 18 corresponding to the electrode-forming portion is exposed. The light-transmissible electrode layer 19 of Au-Co is formed on the exposed portion of the p-type clad layer 18 by an evaporation apparatus.

0055Then, a p-type electrode pad 20 and an n-type electrode pad 21 are vapor-deposited in the same manner as described above.

0056The following items will be disclosed hereunder. <ul id="ul0002" list-style="none" compact="compact"><li>(11) A laminate comprising a substrate, and an AlN single crystal layer formed on the substrate, the AlN single crystal layer having a thickness of from 0.5 to 3 µm and having a substantially flat surface, wherein the half-value width of an x-ray rocking curve of the AlN single crystal layer is not longer than 50 sec.</li><li>(12) A laminate according to the paragraph (11), wherein the AlN single crystal layer is formed by an MOCVD method.</li><li>(13) A laminate according to the paragraph (12), wherein sapphire face <u>a</u> heated to a temperature of from 1000 to 1200°C is used as the substrate.</li><li>(14) A laminate according to the paragraph (12) or (13), wherein a pressure of from 4.0×10³ to 1.3×10⁴ Pa, a carrier gas flow rate of from 2 to 4 m/sec, an aluminum material gas flow rate of from 7×10^-5 to 4×10^-4 µmol/cm³ and a nitrogen material gas flow rate of from 0.02 to 0.08 µmol/cm³ are used when the AlN single crystal layer is grown.</li><li>(15) A laminate according to any one of the paragraphs (12) through (14), wherein the speed of growth of the AlN single crystal layer is in a range of from 20 to 60 nm/min.</li><li>(16) A laminate according to any one of the paragraphs (11) through (15), wherein a group III nitride compound semiconductor layer constituting a device function is formed on the AlN single crystal layer.</li></ul>

0057Now the present invention will be described from the another aspect.

0058The material of the substrate is not specifically limited so long as it is adapted to a group III nitride compound semiconductor. Examples of the substrate material which can be used may include sapphire, materials with spinel structure, silicon, silicon carbide, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, etc.

0059A buffer layer is generally used so that a group III nitride compound semiconductor layer good in crystallinity is formed on a sapphire substrate. Al_XGa_1-XN (0≦X≦1), especially AlN, is suitably used as the material of the buffer layer.

0060In the present invention, a group III nitride compound semiconductor is preferably grown on a face <u>a</u> of the sapphire substrate.

0061A nitride layer is formed on a surface of the substrate. For execution of an MOCVD method, the nitride layer is formed by circulating a first gas (ammonia, hydrazine, organic amine, etc.) as a nitrogen material source of a group III nitride compound semiconductor with a hydrogen gas as a carrier gas while the temperature of the substrate is kept after heating the substrate is heated and the surface of the substrate is cleaned, under circulation of a hydrogen gas, etc. According to a first aspect of the present invention, the thickness (depth) of such a surface nitride layer is set to be in a range of from 10 to 300Å. Although it is possible to use a surface nitride layer having a thickness larger than 300Å, a long time is required for formation of the surface nitride layer in this case.

0062When, for example, a mixture gas consisting of a hydrogen gas (10 l/min) and an ammonia gas (3 l/min) is circulated for 30 minutes on the sapphire substrate heated to 1190°C, a surface nitride layer about 200Å thick is formed. The thickness of the surface nitride layer can be controlled by adjustment of the circulation time of the mixture gas consisting of the hydrogen gas and the ammonia gas. It is further conceived that the thickness of the surface nitride layer can be controlled also by adjustment Of the ammonia gas concentration and/or the substrate temperature.

0063According to a second aspect of the present invention, the thickness of the surface nitride layer is smaller than 10Å. After cleaning of the surface of the substrate is completed, a nitrogen material source gas such as an ammonia gas is first circulated. Then, a group III metal element material gas such as TMA is circulated immediately after the circulation of the nitrogen material source gas is stabilized. According to the inventors' experience, the circulation of the ammonia gas is stabilized 30-90 seconds (generally, shorter than 30-60 seconds) after a valve is opened for introducing the ammonia gas. As a result, a surface nitride layer having a thickness smaller than 10Å is formed. In this case, only the ammonia gas is supplied to the substrate surface for a short time. It is therefore conceived that the substrate surface is nitrided but it is difficult to measure the thickness of the nitrided layer.

0064In the second aspect of the present invention, the production step, itself, of circulating the group III metal element material gas immediately after the stabilization in the circulation of the ammonia gas is important.

0065Any group III nitride compound semiconductor is represented by the general formula Al_XGa_YIn_1-X-YN (0≦X≦1, 0≦ Y≦1, 0≦X+Y≦1), which includes so-called binary compounds such as AlN, GaN and InN, and so-called ternary compounds such as Al_XGa_1-XN, Al_XIn_1-XN and Ga_XIn_1-XN (0≦X≦1 each). The group III elements may be partially replaced by boron (B), thallium (Tl), etc. The nitrogen (N) may be partially replaced by phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc. The device function portion of the light-emitting device is preferably constituted by the binary or ternary group III nitride compound semiconductor described above.

0066Each of the group III nitride compound semiconductors may contain any optional dopant. Si, Ge, Se, Te, C, etc. may be used as n-type impurities. Mg, Zn, Be, Ca, Sr, Ba, etc. may be used as p-type impurities. In case that it is difficult to change the group III nitride compound semiconductor to a p-type semiconductor of low resistance only by doping the group III nitride compound semiconductor with such p-type impurities, after doped with p-type impurities, the group III nitride compound semiconductor is preferably subjected to electron beam irradiation, plasma irradiation or heating by a furnace.

0067In the present invention, the method of forming the first group III nitride compound semiconductor layer on the substrate is a metal organic chemical vapor deposition method (in this specification, referred to as "MOCVD method"). A ternary compound Al_XGa_1-XN (0≦X≦1) may be preferably used as the first group III nitride compound semiconductor. A binary compound such as AlN, GaN or InN may be also preferably used as the first group III nitride compound semiconductor.

0068The method of forming the second group III nitride compound semiconductor layer on the first group III nitride compound semiconductor layer is not specifically limited. In consideration of the effect of the present invention that the first group III nitride compound semiconductor layer can be grown at a high temperature by an MOCVD method, it is preferable from the point of view of improvement in production efficiency that the second group III nitride compound semiconductor layer is formed by an MOCVD method which can use a growth temperature substantially equal to the growth temperature of the first group III nitride compound semiconductor layer.

0069The second group III nitride compound semiconductor layer may be also formed by a known method such as a molecular beam epitaxy method (MBE method), a halide vapor phase epitaxy method (HVPE method), a liquid phase epitaxy method, etc.

0070The required condition for forming the first group III nitride compound semiconductor layer will be described below in detail in the first aspect of the present invention, that is, in the case of using a substrate provided with a surface nitride layer having a thickness of from 10 to 300Å. (Growth Temperature Condition of First Group III Nitride Compound Semiconductor Layer)

0071The inventors formed an AlN layer (thickness: 2.3 µm) on a face <u>a</u> of a sapphire substrate having a surface nitride layer 200Å thick, by an MOCVD method while changing the growth temperature. A GaN layer (thickness: 2 µm, growth temperature: the same as the AlN layer) was further formed on the AlN layer by an MOCVD method similarly. The surface of the GaN layer was observed under an optical microscope. Observation results were as follows. Figs. 9A to 9F show photographs of the surfaces of each sample (magnification: 400). <tables id="tabl0002" num="0002"><table frame="all"><title>Table 1</title><tgroup cols="7" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="22.50mm" /><colspec colnum="2" colname="col2" colwidth="22.50mm" /><colspec colnum="3" colname="col3" colwidth="22.50mm" /><colspec colnum="4" colname="col4" colwidth="22.50mm" /><colspec colnum="5" colname="col5" colwidth="22.50mm" /><colspec colnum="6" colname="col6" colwidth="22.50mm" /><colspec colnum="7" colname="col7" colwidth="22.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="left">Sample No.</entry><entry namest="col2" nameend="col2" align="center">#1</entry><entry namest="col3" nameend="col3" align="center">#2</entry><entry namest="col4" nameend="col4" align="center">#3</entry><entry namest="col5" nameend="col5" align="center">#4</entry><entry namest="col6" nameend="col6" align="center">#5</entry><entry namest="col7" nameend="col7" align="center">#6</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="left">AlN Growth Temperature (°C)</entry><entry namest="col2" nameend="col2" align="center">1050</entry><entry namest="col3" nameend="col3" align="center">1110</entry><entry namest="col4" nameend="col4" align="center">1130</entry><entry namest="col5" nameend="col5" align="center">1150</entry><entry namest="col6" nameend="col6" align="center">1170</entry><entry namest="col7" nameend="col7" align="center">1200</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">GaN Layer Surface Morphology</entry><entry namest="col2" nameend="col2" align="center">△</entry><entry namest="col3" nameend="col3" align="center">○</entry><entry namest="col4" nameend="col4" align="center">ⓞ</entry><entry namest="col5" nameend="col5" align="center">○</entry><entry namest="col6" nameend="col6" align="center">△</entry><entry namest="col7" nameend="col7" align="center">X</entry></row></tbody></tgroup><tgroup cols="7" colsep="0" rowsep="0"><colspec colnum="1" colname="col1" colwidth="22.50mm" /><colspec colnum="2" colname="col2" colwidth="22.50mm" /><colspec colnum="3" colname="col3" colwidth="22.50mm" /><colspec colnum="4" colname="col4" colwidth="22.50mm" /><colspec colnum="5" colname="col5" colwidth="22.50mm" /><colspec colnum="6" colname="col6" colwidth="22.50mm" /><colspec colnum="7" colname="col7" colwidth="22.50mm" /><tbody valign="top"><row><entry namest="col1" nameend="col7" align="justify">in which ⓞ: mirror surface</entry></row><row><entry namest="col1" nameend="col7" align="justify">○ : almost mirror surface</entry></row><row><entry namest="col1" nameend="col7" align="justify">△: not mirror surface but capable of forming the second group III nitride compound semiconductor layer thereon</entry></row><row><entry namest="col1" nameend="col7" align="justify">X: too bad morphology to form the second group III nitride compound semiconductor layer thereon</entry></row></tbody></tgroup></table></tables>

0072From the results in Table 1, the growth temperature of the AlN layer formed on the sapphire substrate by the MOCVD method is set to be preferably in a range of from 1000 to 1180°C, more preferably in a range of from 1050 to 1170°C, more and more preferably in a range of from 1100 to 1150°C, still more and more preferably in a range of from 1120 to 1140°C, most preferably 1130°C.

0073From the above description, the growth temperature of the group III nitride compound semiconductor layer formed on the substrate by the MOCVD method is set to be preferably in a range of from 1000 to 1180°C, more preferably in a range of from 1050 to 1170°C, more and more preferably in a range of from 1100 to 1150°C, still more and more preferably in a range of from 1120 to 1140°C, most preferably 1130°C.

(Thickness Condition of First Group III Nitride Compound Semiconductor Layer)

0074The inventors formed an AlN layer (growth temperature: 1130°C) on a face <u>a</u> of a sapphire substrate having a surface nitride layer 200Å thick, by an MOCVD method while changing the thickness of the AlN layer. A GaN layer (thickness: 2 µm, growth temperature: the same as the AlN layer) was further formed on the AlN layer by an MOCVD method similarly. The surface of the GaN layer was observed under an optical microscope. Observation results were as follows. Figs. 6A to 6F show photographs of the surfaces of each sample (magnification: 400). <tables id="tabl0003" num="0003"><table frame="all"><title>Table 2</title><tgroup cols="7" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="22.50mm" /><colspec colnum="2" colname="col2" colwidth="22.50mm" /><colspec colnum="3" colname="col3" colwidth="22.50mm" /><colspec colnum="4" colname="col4" colwidth="22.50mm" /><colspec colnum="5" colname="col5" colwidth="22.50mm" /><colspec colnum="6" colname="col6" colwidth="22.50mm" /><colspec colnum="7" colname="col7" colwidth="22.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="left">Sample No.</entry><entry namest="col2" nameend="col2" align="center">#7</entry><entry namest="col3" nameend="col3" align="center">#8</entry><entry namest="col4" nameend="col4" align="center">#9</entry><entry namest="col5" nameend="col5" align="center">#10</entry><entry namest="col6" nameend="col6" align="center">#11</entry><entry namest="col7" nameend="col7" align="center">#12</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="left">AlN Thickness (µm)</entry><entry namest="col2" nameend="col2" align="char" char=".">0.8</entry><entry namest="col3" nameend="col3" align="char" char=".">1.0</entry><entry namest="col4" nameend="col4" align="char" char=".">1.5</entry><entry namest="col5" nameend="col5" align="char" char=".">2.3</entry><entry namest="col6" nameend="col6" align="char" char=".">3.0</entry><entry namest="col7" nameend="col7" align="char" char=".">3.3</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">GaN Layer Surface Morphology</entry><entry namest="col2" nameend="col2" align="char" char=".">X</entry><entry namest="col3" nameend="col3" align="char" char=".">X</entry><entry namest="col4" nameend="col4" align="char" char=".">○</entry><entry namest="col5" nameend="col5" align="char" char=".">ⓞ</entry><entry namest="col6" nameend="col6" align="char" char=".">○</entry><entry namest="col7" nameend="col7" align="char" char=".">X</entry></row></tbody></tgroup><tgroup cols="7" colsep="0" rowsep="0"><colspec colnum="1" colname="col1" colwidth="22.50mm" /><colspec colnum="2" colname="col2" colwidth="22.50mm" /><colspec colnum="3" colname="col3" colwidth="22.50mm" /><colspec colnum="4" colname="col4" colwidth="22.50mm" /><colspec colnum="5" colname="col5" colwidth="22.50mm" /><colspec colnum="6" colname="col6" colwidth="22.50mm" /><colspec colnum="7" colname="col7" colwidth="22.50mm" /><tbody valign="top"><row><entry namest="col1" nameend="col7" align="justify">in which ⓞ: mirror surface</entry></row><row><entry namest="col1" nameend="col7" align="justify">○: almost mirror surface</entry></row><row><entry namest="col1" nameend="col7" align="justify">△ : not mirror surface but capable of forming the second group III nitride compound semiconductor layer thereon</entry></row><row><entry namest="col1" nameend="col7" align="justify">X: too bad morphology to form the second group III nitride compound semiconductor layer thereon</entry></row></tbody></tgroup></table></tables>

0075From the results in Table 2, the thickness of the AlN layer formed on the sapphire substrate at a growth temperature of 1130°C by the MOCVD method is set to be preferably in a range of from 1.2 to 3.2 µm, more preferably in a range of from 1.5 to 3.0 µm, more and more preferably in a range of from 2.0 to 2.7 µm, most preferably 2.3 µm.

0076From the above description, the thickness of the group III nitride compound semiconductor layer formed on the substrate by the MOCVD method under the same growth temperature condition as the first group III nitride compound semiconductor layer is set to be preferably in a range of from 1.2 to 3.2 µ m, more preferably in a range of from 1.5 to 3.0 µm, more and more preferably in a range of from 2.0 to 2.7 µm, most preferably 2.3 µm.

(Growth Rate Condition of First Group III Nitride Compound Semiconductor Layer)

0077From the point of view of mass production, at least 10 nm/min is required as the growth rate of the group III nitride compound semiconductor layer in order to form the group III nitride compound semiconductor layer having a thickness of not smaller than 1 µm. On the other hand, even in the case where the flow rate of the group III element material gas is increased so that the growth rate is improved, the growth rate of the group III nitride compound semiconductor layer does not increase monotonously so that the material utilizing efficiency is lowered. From the point of view of cost, therefore, the upper limit of the growth rate of the group III nitride compound semiconductor layer is set to be 250 nm/min.

(Pressure Condition of First Group III Nitride Compound Semiconductor Layer)

0078TMA which is a group III element material gas has high reactivity. Hence, if TMA is oversupplied into a chamber of an MOCVD apparatus, TMA reacts with an ammonia gas, etc. in the vapor phase (carrier gas) so as to hardly reach the substrate. Hence, the growth rate of the first group III nitride compound semiconductor layer is hardly increased by increase of the flow rate of TMA. To suppress the reaction in the vapor phase, therefore, the first group III nitride compound semiconductor layer was grown under reduced pressure. As a result, it became possible to form the second group III nitride compound semiconductor layer good in morphology.

0079According to the inventors' examination, the relation between the maximum growth rate of the AlN layer and the inside pressure of the chamber in the case where the MOCVD method was executed on a face <u>a</u> of a sapphire substrate having a surface nitride layer 200Å thick was as follows. <tables id="tabl0004" num="0004"><table frame="all"><title>Table 3</title><tgroup cols="2" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="78.75mm" /><colspec colnum="2" colname="col2" colwidth="78.75mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="center">Pressure at Reaction</entry><entry namest="col2" nameend="col2" align="center">Optimal Growth Rate</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">2500 Pa (18.8 Torr)</entry><entry namest="col2" nameend="col2" align="char" char=".">250 nm/min</entry></row><row><entry namest="col1" nameend="col1" align="center">20000 Pa (150 Torr)</entry><entry namest="col2" nameend="col2" align="char" char=".">100 nm/min</entry></row><row><entry namest="col1" nameend="col1" align="center">40000 Pa (300 Torr)</entry><entry namest="col2" nameend="col2" align="char" char=".">42 nm/min</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">101080 Pa (760 Torr)</entry><entry namest="col2" nameend="col2" align="char" char=".">0.6 nm/min</entry></row></tbody></tgroup></table></tables>

0080In other words, the optimal growth rate of the AlN layer is in a range surrounded by the aforementioned values when the pressure at the reaction and the growth rate are regarded as parameters.

0081From the above description, the pressure at the reaction is set to be preferably in a range of from 2500 to 4000 Pa in order to obtain a significant growth rate.

0082The relation between the pressure at the reaction and the growth rate applies also to any other group III nitride compound semiconductor than AlN.

0083The required condition for the first group III nitride compound semiconductor layer will be described below in the second aspect of the present invention, that is, in the case of using a substrate provided with a surface nitride layer having a thickness of from 0 to 10Å.

0084Incidentally, the growth temperature condition, the growth rate condition and the growth pressure condition are the same as in the first aspect of the present invention.

(Thickness Condition of First Group III Nitride Compound Semiconductor Layer)

0085In the second aspect of the present invention, the required thickness condition for the first group III nitride compound semiconductor layer is different (relatively thin) formed that in the first aspect.

0086After the face <u>a</u> of the sapphire substrate was cleaned, an ammonia gas was introduced into a hydrogen gas as a carrier gas while the substrate temperature was kept at 1130°C. After about 1 minute (because the state of circulation of the ammonia gas was stabilized), TMA was further introduced so that an AlN layer different in thickness was grown by an MOCVD method. A GaN layer (thickness: 2 µm, growth temperature: the same as the AlN layer) was further formed on the AlN layer by an MOCVD method similarly. The surface of the GaN layer was observed under an optical microscope. Observation Results were as follows. Figs. 7A to 7F show photographs of the surfaces of each sample (magnification: 400). <tables id="tabl0005" num="0005"><table frame="all"><title>Table 4</title><tgroup cols="7" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="22.50mm" /><colspec colnum="2" colname="col2" colwidth="22.50mm" /><colspec colnum="3" colname="col3" colwidth="22.50mm" /><colspec colnum="4" colname="col4" colwidth="22.50mm" /><colspec colnum="5" colname="col5" colwidth="22.50mm" /><colspec colnum="6" colname="col6" colwidth="22.50mm" /><colspec colnum="7" colname="col7" colwidth="22.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="left">Sample No.</entry><entry namest="col2" nameend="col2" align="center">#13</entry><entry namest="col3" nameend="col3" align="center">#14</entry><entry namest="col4" nameend="col4" align="center">#15</entry><entry namest="col5" nameend="col5" align="center">#16</entry><entry namest="col6" nameend="col6" align="center">#17</entry><entry namest="col7" nameend="col7" align="center">#18</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="left">AlN Thickness (µm)</entry><entry namest="col2" nameend="col2" align="char" char=".">0.015</entry><entry namest="col3" nameend="col3" align="char" char=".">0.30</entry><entry namest="col4" nameend="col4" align="char" char=".">0.45</entry><entry namest="col5" nameend="col5" align="char" char=".">0.90</entry><entry namest="col6" nameend="col6" align="char" char=".">1.90</entry><entry namest="col7" nameend="col7" align="char" char=".">2.30</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">GaN Layer Surface Morphology</entry><entry namest="col2" nameend="col2" align="char" char=".">○</entry><entry namest="col3" nameend="col3" align="char" char=".">ⓞ</entry><entry namest="col4" nameend="col4" align="char" char=".">ⓞ</entry><entry namest="col5" nameend="col5" align="char" char=".">○</entry><entry namest="col6" nameend="col6" align="char" char=".">△</entry><entry namest="col7" nameend="col7" align="char" char=".">△</entry></row></tbody></tgroup><tgroup cols="7" colsep="0" rowsep="0"><colspec colnum="1" colname="col1" colwidth="22.50mm" /><colspec colnum="2" colname="col2" colwidth="22.50mm" /><colspec colnum="3" colname="col3" colwidth="22.50mm" /><colspec colnum="4" colname="col4" colwidth="22.50mm" /><colspec colnum="5" colname="col5" colwidth="22.50mm" /><colspec colnum="6" colname="col6" colwidth="22.50mm" /><colspec colnum="7" colname="col7" colwidth="22.50mm" /><tbody valign="top"><row><entry namest="col1" nameend="col7" align="justify">in which ⓞ: mirror surface</entry></row><row><entry namest="col1" nameend="col7" align="justify">○: almost mirror surface</entry></row><row><entry namest="col1" nameend="col7" align="justify">△: not mirror surface but capable of forming the second group III nitride compound semiconductor layer thereon</entry></row><row><entry namest="col1" nameend="col7" align="justify">X: too bad morphology to form the second group III nitride compound semiconductor layer thereon</entry></row></tbody></tgroup></table></tables>

0087From the results in Table 4, the thickness of the AlN layer formed, by the MOCVD method, on the sapphire substrate provided with the surface nitride layer having a thickness of from 0 to 10Å is set to be preferably in a range of from 0.01 to 2.3 µ m at a growth temperature of 1130°C. If the thickness of the AlN layer is smaller than 0.01 µm, there is a disadvantage that the morphology of the GaN layer grown on the AlN layer is worsened. The thickness of the AlN layer is set to be more preferably in a range of from 0.1 to 1.5 µm, more and more preferably in a range of from 0.2 to 0.5 µm, most preferably about 0.45 µm.

0088From the above description, the thickness of the group III nitride compound semiconductor layer formed on the substrate by the MOCVD method in the aforementioned growth temperature condition of the first group III nitride compound semiconductor layer is set to be preferably in a range of from 0.01 to 2.3 µm, more preferably in a range of from 0.1 to 1.5 µm, more and more preferably in a range of from 0.2 to 0.5 µ m, most preferably about 0.45 µm.

0089An embodiment of the present invention will be described below.

0090A light-emitting diode 10 is used as this embodiment. The configuration of the light-emitting diode 10 is shown in Fig. 8.

0091Specifications of respective layers are as follows. <tables id="tabl0006" num="0006"><table frame="all"><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="left">Layer</entry><entry namest="col2" nameend="col2" align="left">Composition</entry><entry namest="col3" nameend="col3" align="center">Dopant</entry><entry namest="col4" nameend="col4" align="center">(Thickness)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="left">p-type layer 18</entry><entry namest="col2" nameend="col2" align="left">p-GaN</entry><entry namest="col3" nameend="col3" align="left">Mg</entry><entry namest="col4" nameend="col4" align="char" char=".">(0.3 µm)</entry></row></tbody></tgroup><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="center">Light-emitting layer 17</entry><entry namest="col2" nameend="col4" align="left">superlattice structure</entry></row></thead><tbody valign="top"><row rowsep="0"><entry namest="col1" nameend="col1" align="left">Quantum well layer</entry><entry namest="col2" nameend="col3" align="left">In_0.15Ga_0.85N</entry><entry namest="col4" nameend="col4" align="char" char=".">(35Å)</entry></row><row><entry namest="col1" nameend="col1" align="left">Barrier layer</entry><entry namest="col2" nameend="col3" align="left">GaN</entry><entry namest="col4" nameend="col4" align="char" char=".">(35Å)</entry></row><row><entry namest="col1" nameend="col4" align="justify">The number of repeated quantum well and barrier layers: 1 to 10</entry></row><row><entry namest="col1" nameend="col1" align="left">n-type layer 16</entry><entry namest="col2" nameend="col2" align="left">n-GaN</entry><entry namest="col3" nameend="col3" align="left">Si</entry><entry namest="col4" nameend="col4" align="char" char=".">(4 µm)</entry></row><row><entry namest="col1" nameend="col1" align="left">Buffer layer 15</entry><entry namest="col2" nameend="col2" align="left">AlN</entry><entry namest="col3" nameend="col3" /><entry namest="col4" nameend="col4" align="char" char=".">(2.3 µm)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">Substrate 11</entry><entry namest="col2" nameend="col3" align="left">sapphire (face <u>a</u>)</entry><entry namest="col4" nameend="col4" align="char" char=".">(300 µm)</entry></row></tbody></tgroup></table></tables>

0092The n-type layer 16 may be of a double-layered structure with an n^- layer of low electron density on the light-emitting layer 17 side and an n⁺ layer of high electron density on the buffer layer 15 side.

0093The light-emitting layer 17 is not limited to that which has such a superlattice structure. A single hetero type structure, a double hetero type structure, a homo-junction type structure, or the like, may be used as the configuration of the light-emitting layer. The light-emitting layer may be configured also by use of any other function such as MIS junction or PIN junction.

0094An Al_XIn_YGa_1-X-YN (inclusive of X=0, Y=0 and X=Y=0) layer doped with an acceptor such as magnesium and having a wide band gap may be interposed between the light-emitting layer 17 and the p-type layer 18. This is a technique for preventing electrons introduced into the light-emitting layer 17 from diffusing into the p-type layer 18.

0095The p-type layer 18 may be of a double-layered structure with a p^- layer of low hole density on the light-emitting layer 17 side and a p⁺ layer of high hole density on the electrode side.

0096Each of the n-type and p-type layers may be of the aforementioned double-layered structure (clad layer, contact layer), and at the same time may be of a superlattice structure to improve the function of the layer.

0097The light-emitting diode configured as described above is produced as follows.

0098First, while a hydrogen gas is circulated into a reactor of an MOCVD apparatus, the sapphire substrate is heated to 1000°C and kept at 1000°C for 5 minutes. Then, the substrate 11 is heated to 1130°C and only an ammonia gas is introduced first as a material gas for 15 minutes. Thus, a surface nitride layer 13 100Å thick (deep) is formed.

0099Then, while the substrate temperature of 1130°C is held, TMA is introduced so that a buffer layer 15 of AlN is grown by an MOCVD method. While the substrate temperature is further held, an n-type layer 16 is formed, and second group III nitride compound semiconductor layers 17 and 18 are formed on the n-type layer 16 by an ordinary method (MOCVD method). In the growth method, an ammonia gas and group III element alkyl compound gases such as trimethylgallium (TMG), trimethylaluminum (TMA) and trimethylindium (TMI) are supplied onto a substrate heated to a suitable temperature and are subjected to a thermal decomposition reaction so that a desired crystal is grown on the substrate.

0100The second group III nitride compound semiconductor layer thus formed in this embodiment is superior both in morphology and in crystallinity.

0101A light-transmissible electrode 19 is a thin film containing gold. The light-transmissible electrode 19 is laminated on the p-type layer 18 so as to cover the substantial whole upper surface of the p-type layer 18. A p-type electrode 20 is also constituted by a material containing gold. The p-type electrode 20 is formed on the light-transmissible electrode 19 by evaporation.

0102An n-type electrode 21 is formed by evaporation onto a surface of the n-GaN layer 16 exposed by etching.

0103The device to which the present invention is applied is not limited to the aforementioned light-emitting diode. The present invention may be applied also to optical devices such as a photodetector, a laser diode, a solar cell, etc., bipolar devices such as a rectifier, a thyristor, a transistor, etc., unipolar devices such as an FET, etc., and electronic devices such as a microwave device, etc.

0104The present invention may be applied further to laminates as intermediates of these devices.

0105The present invention is not limited to the mode for carrying out the invention and the embodiment thereof at all, and includes various modifications that can be conceived easily by those skilled in the art, without departing from the scope of claim.

0106The following items will be disclosed hereunder. <ul id="ul0003" list-style="none" compact="compact"><li>(21) A method for producing a group III nitride compound semiconductor device, comprising the steps of: <ul id="ul0004" list-style="none" compact="compact"><li>keeping a sapphire substrate at a temperature of from 1000 to 1180°C;</li><li>forming a surface nitride layer having a thickness of not larger than 300Å on a surface of the substrate by circulating a first gas as a nitrogen material source of a group III nitride compound semiconductor onto the substrate; and</li><li>forming a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm by circulating a second gas as a group III element material source of the group III nitride compound semiconductor together with the first gas.</li></ul></li><li>(22) A producing method according to the paragraph (21), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(23) A producing method according to the paragraph (21), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(24) A producing method according to any one of Claims 1 through 14 and the paragraphs (21) through (23), wherein the growth temperature is in a range of from 1050 to 1180°C.</li><li>(25) A producing method according to any one of Claims 1 through 14 and the paragraphs (21) through (23), wherein the growth temperature is in a range of from 1110 to 1150°C.</li><li>(26) A producing method according to any one of Claims 2 and 11 and the paragraph (22), wherein the thickness is in a range of from 1.5 to 3.0 µm.</li><li>(27) A producing method according to any one of Claims 2 and 11 and the paragraph (22), wherein the thickness is in a range of from 2.0 to 2.7 µm.</li><li>(28) A producing method according to any one of Claims 3 and 12 and the paragraph (23), wherein the thickness is in a range of from 0.01 to 1.7 µm.</li><li>(29) A producing method according to any one of Claims 3 and 12 and the paragraph (23), wherein the thickness is in a range of from 0.3 to 1.0 µm.</li><li>(31) A group III nitride compound semiconductor device, comprising a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm formed, on a substrate having a surface nitride layer having a thickness of not larger than 300Å, at a growth temperature of from 1000 to 1180°C.</li><li>(32) A device according to the paragraph (31), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(33) A device according to the paragraph (31), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(34) A device according to any one of the paragraphs (31) through (33), wherein the growth rate of the group III nitride compound semiconductor layer is in a range of from 10 to 250 nm/min.</li><li>(35) A device according to any one of the paragraphs (31) through (33), wherein pressure at the time of growth of the group III nitride compound semiconductor layer is in a range of from 2500 to 40000 Pa.</li><li>(36) A device according to any one of the paragraphs (31) through (35), wherein the group III nitride compound semiconductor layer is made of Al_XGa_1-XN (0≦X≦1).</li><li>(37) A device according to the paragraph (36), wherein the group III nitride compound semiconductor layer is made of AlN.</li><li>(38) A device according to the paragraph (37), wherein a GaN layer is formed on the AlN layer.</li><li>(39) A device according to any one of the paragraphs (31) through (38), wherein the substrate is sapphire.</li><li>(40) A device according to the paragraph (39), wherein the group III nitride compound semiconductor layer is formed on a face <u>a</u> of the sapphire substrate.</li><li>(41) A group III nitride compound semiconductor device comprising a first group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm and formed on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300Å, and a second group III nitride compound semiconductor layer formed on the first group III nitride compound semiconductor layer, wherein each of the first and second group III nitride compound semiconductor layers is formed at a growth temperature substantially equal to or higher than the growth temperature of the second group III nitride compound semiconductor layer by an MOCVD method.</li><li>(42) A device according to the paragraph (41), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(43) A device according to the paragraph (41), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(44) A group III nitride compound semiconductor device comprising a sapphire substrate nitrided for a time of from 30 to 90 sec, and a group III nitride compound semiconductor layer formed on the nitrided sapphire substrate at a temperature of from 1000 to 1180°C.</li><li>(45) A device according to the paragraph (44), wherein the time required for the nitriding is not shorter than 30 sec but shorter than 60 sec.</li><li>(51) A group III nitride compound semiconductor device obtained through the steps of: <ul id="ul0005" list-style="none" compact="compact"><li>keeping a sapphire substrate at a temperature of from 1000 to 1180°C;</li><li>forming a surface nitride layer having a thickness of not larger than 300Å on a surface of the substrate by circulating a first gas as a nitrogen material source of a group III nitride compound semiconductor onto the substrate; and</li><li>forming a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm by circulating a second gas as a group III element material source of the group III nitride compound semiconductor together with the first gas.</li></ul></li><li>(52) A device according to the paragraph (51), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(53) A device according to the paragraph (51), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(54) A device according to any one of the paragraphs (31) through (53), wherein the growth temperature is in a range of from 1050 to 1180°C.</li><li>(55) A device according to any one of the paragraphs (31) through (53), wherein the growth temperature is in a range of from 1110 to 1150°C.</li><li>(56) A device according to any one of the paragraphs (32), (41) and (52), wherein the thickness is in a range of from 1.5 to 3.0 µm.</li><li>(57) A device according to anyone of the paragraphs (32), (41) and (52), wherein the thickness is in a range of from 2.0 to 2.7 µm.</li><li>(58) A device according to any one of the paragraphs (33), (42) and (53), wherein the thickness is in a range of from 0.01 to 1.7 µm.</li><li>(59) A device according to any one of the paragraphs (33), (42) and (53), wherein the thickness is in a range of from 0.3 to 1.0 µm.</li><li>(61) A method for producing a laminate comprising the step of growing, at a growth temperature of from 1000 to 1180°C, a layer of a group III nitride compound semiconductor having a thickness of from 0.01 to 3.2 µm on a substrate having a surface nitride layer having a thickness of not larger than 300Å.</li><li>(62) A producing method according to the paragraph (61), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(63) A producing method according to the paragraph (61), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(64) A producing method according to any one of the paragraphs (61) through (63), wherein the growth rate of the group III nitride compound semiconductor layer is in a range of from 10 to 250 nm/min.</li><li>(65) A producing method according to any one of the paragraphs (61) through (63), wherein pressure at the time of growth of the group III nitride compound semiconductor layer is in a range of from 2500 to 40000 Pa.</li><li>(66) A producing method according to any one of the paragraphs (61) through (65), wherein the group III nitride compound semiconductor layer is made of Al_XGa_1-XN (0≦X≦1).</li><li>(67) A producing method according to the paragraph (66), wherein the group III nitride compound semiconductor layer is made of AlN.</li><li>(68) A producing method according to any one of the paragraphs (61) through (67), wherein the substrate is sapphire.</li><li>(69) A producing method according to the paragraph (68), wherein the group III nitride compound semiconductor layer is formed on a face <u>a</u> of the sapphire substrate.</li><li>(70) A method for producing a laminate, comprising the steps of: forming a first group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300Å; and forming a second group III nitride compound semiconductor layer on the first group III nitride compound semiconductor layer, wherein each of the first and second group III nitride compound semiconductor layers is formed at a growth temperature substantially equal to or higher than the growth temperature of the second group III nitride compound semiconductor layer by an MOCVD method.</li><li>(71) A producing method according to the paragraph (70), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(72) A producing method according to the paragraph (70), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(73) A method for producing a laminate, comprising the steps of: nitriding a sapphire substrate for a time of from 30 to 90 sec; and growing a group III nitride compound semiconductor layer on the nitrided sapphire substrate at a temperature of from 1000 to 1180°C.</li><li>(74) A producing method according to the paragraph (73), wherein the time required for the nitriding is not shorter than 30 sec but shorter than 60 sec.</li><li>(81) A method for producing a laminate, comprising the steps of: <ul id="ul0006" list-style="none" compact="compact"><li>keeping a sapphire substrate at a temperature of from 1000 to 1180°C;</li><li>forming a surface nitride layer having a thickness of not larger than 300Å on a surface of the substrate by circulating a first gas as a nitrogen material source of a group III nitride compound semiconductor onto the substrate; and</li><li>forming a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm by circulating a second gas as a group III element material source of the group III nitride compound semiconductor together with the first gas.</li></ul></li><li>(82) A producing method according to the paragraph (81), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(83) A producing method according to the paragraph (81), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(84) A producing method according to any one of the paragraphs (61) through (83), wherein the growth temperature is in a range of from 1050 to 1180°C.</li><li>(85) A producing method according to any one the paragraphs (61) through (83), wherein the growth temperature is in a range of from 1110 to 1150°C.</li><li>(86) A producing method according to any one the paragraph (62), (71) and (82), wherein the thickness is in a range of from 1.5 to 3.0 µm.</li><li>(87) A producing method according to any one of the paragraphs (62), (71) and (82), wherein the thickness is in a range of from 2.0 to 2.7 µm.</li><li>(88) A producing method according to any one of the paragraphs (63), (72) and (83), wherein the thickness is in a range of from 0.01 to 1.7 µm.</li><li>(89) A producing method according to any one of the paragraphs (63), (72) and (83), wherein the thickness is in a range of from 0.3 to 1.0 µm.</li><li>(91) A laminate comprising a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µ m formed, on a substrate having a surface nitride layer having a thickness of not larger than 300Å, at a growth temperature of from 1000 to 1180°C.</li><li>(92) A laminate according to the paragraph (91), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(93) A laminate according to the paragraph (91), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(94) A laminate according to any one of the paragraphs (91) through (93), wherein the growth rate of the group III nitride compound semiconductor layer is in a range of from 10 to 250 nm/min.</li><li>(95) A laminate according to any one of the paragraphs (91) through (93), wherein pressure at the time of growth of the group III nitride compound semiconductor layer is in a range of from 2500 to 40000 Pa.</li><li>(96) A laminate according to any one of the paragraphs (91) through (95), wherein the group III nitride compound semiconductor layer is made of Al_XGa_1-XN (0≦X≦1).</li><li>(97) A laminate according to the paragraph (96), wherein the group III nitride compound semiconductor layer is made of AlN.</li><li>(98) A laminate according to the paragraph (97), wherein a GaN layer is formed on the AlN layer.</li><li>(99) A laminate according to any one of the paragraphs (91) through (97), wherein the substrate is sapphire.</li><li>(100) A laminate according to the paragraph (99), wherein the group III nitride compound semiconductor layer is formed on a face <u>a</u> of the sapphire substrate.</li><li>(101) A laminate comprising a first group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µ m and formed on a sapphire substrate having a surface nitride layer having a thickness of not larger than 300Å, and a second group III nitride compound semiconductor layer formed on the first group III nitride compound semiconductor layer, wherein each of the first and second group III nitride compound semiconductor layers is formed at a growth temperature substantially equal to or higher than the growth temperature of the second group III nitride compound semiconductor layer by an MOCVD method.</li><li>(102) A laminate according to the paragraph (101), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(103) A laminate according to the paragraph (101), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(104) A laminate comprising a sapphire substrate nitrided for a time of from 30 to 90 sec, and a group III nitride compound semiconductor layer formed on the nitrided sapphire substrate at a temperature of from 1000 to 1180°C.</li><li>(105) A laminate according to the paragraph (104), wherein the time required for the nitriding is not shorter than 30 sec but shorter than 60 sec.</li><li>(111) A group III nitride compound semiconductor laminate obtained through the steps of: <ul id="ul0007" list-style="none" compact="compact"><li>keeping a sapphire substrate at a temperature of from 1000 to 1180°C;</li><li>forming a surface nitride layer having a thickness of not larger than 300Å on a surface of the substrate by circulating a first gas as a nitrogen material source of a group III nitride compound semiconductor onto the substrate; and</li><li>forming a group III nitride compound semiconductor layer having a thickness of from 0.01 to 3.2 µm by circulating a second gas as a group III element material source of the group III nitride compound semiconductor together with the first gas.</li></ul></li><li>(112) A laminate according to the paragraph (111), wherein the thickness of the surface nitride layer is in a range of from 10 to 300Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 1.2 to 3.2 µm.</li><li>(113) A laminate according to the paragraph (111), wherein the thickness of the surface nitride layer is smaller than 10Å whereas the thickness of the group III nitride compound semiconductor layer is in a range of from 0.01 to 2.3 µm.</li><li>(114) A laminate according to any one of the paragraphs (91) through (113), wherein the growth temperature is in a range of from 1050 to 1180°C.</li><li>(115) A laminate according to any one of the paragraphs (91) through (113), wherein the growth temperature is in a range of from 1110 to 1150°C.</li><li>(116) A laminate according to any one of the paragraphs (92). (101) and (112), wherein the thickness is in a range of from 1.5 to 3.0 µm.</li><li>(117) A laminate according to any one of the paragraphs (92), (101) and (112), wherein the thickness is in a range of from 2.0 to 2.7 µm.</li><li>(118) A laminate according to any one of the paragraphs (93), (102) and (113), wherein the thickness is in a range of from 0.01 to 1.7 µm.</li><li>(119) A laminate according to any one of the paragraphs (93), (102) and (113), wherein the thickness is in a range of from 0.3 to 1.0 µm.</li></ul>