Data resampler for data processing system

A data resampler for a data processing system for logically adjacent data samples includes a memory subsystem (120a) for storing samples to be rendered, a digital differential analyzer (401) for generating an interpolation corner address for a set of interpolation fractions. The resampler also includes a fetch unit (402) which receives the interpolation corner address and generates four source addresses of samples to be fetched from the memory subsystem (120a). The resampler also includes a first FIFO memory (90d) for holding the generated interpolation fractions and a second FIFO memory (90a) for holding pixel data. The resampler further includes an interpolation unit (403), which computes rendered result pixels, assembles the result pixels into memory words, and outputs the words via a third FIFO memory (90c).