EP0808069B1

A Quantizer for video signal encoding system

Abstract

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EP0808069B1, drawing sheet 1 — Sheet 1 of 6

Term

Term ended

Expired 13 May 2017, 9.4 years ago.

7 claims: 3 independent, 4 dependent

1
A quantizer for quantizing scanned DCT coefficients in a video encoder, comprising:a) a memory having a first bank with a plurality of areas for storing an inter quantization matrix;and a second bank with a plurality of areas for storing an intra quantization matrix;b) a memory controller for generating a write address for writing the inter quantization matrix and the intra quantization matrix in said memory in an order of a zigzag scanning manner, and a read address for reading a corresponding quantization matrix from said memory in an order of a scanning manner of the DCT coefficients, and controlling a write/read process of the inter quantization matrix and the intra quantization matrix in said memory according to the write address and the read address;c) an arithmetic controller for obtaining a reciprocal value of the corresponding quantization matrix provided from said memory via said memory controller and a reciprocal value of a quantization scale provided externally and outputting the obtained value;and d) an arithmetic unit for quantizing the scanned DCT coefficients by using the reciprocal values of the corresponding quantization matrix and the quantization scale supplied from said arithmetic controller.
2
A quantizer for quantizing scanned DCT coefficients in a video encoder, comprising:a) a RAM having a first bank with a first sub-RAM and a second sub-RAM for storing an identical inter quantization matrix, and a second bank with a third sub-RAM and a fourth sub-RAM for storing an identical intra quantization matrix;b) a RAM controller for generating a write address for writing the inter quantization matrix and the intra quantization matrix in corresponding sub-RAMs in an order of a zigzag scanning manner, and a read address for reading corresponding quantization matrix from said RAM in an order of scanned manner of the DCT coefficients, and combining the corresponding quantization matrix read from said RAM according to the read address in a predetermined format;c) an arithmetic controller for obtaining a reciprocal value of the corresponding quantization matrix provided from said RAM via said RAM controller and a reciprocal value of a quantization scale provided externally and outputting the obtained value;and d) an arithmetic unit for quantizing the scanned DCT coefficients by using the reciprocal values of the corresponding quantization matrix and the quantization scale provided from said arithmetic controller.
5
A quantizer for quantizing scanned DCT coefficients in a video encoder, comprising:a) a RAM having a first bank with a first, a second and a third sub-RAMs for storing an inter quantization matrix, and a second bank with a fourth, a fifth and a sixth sub-RAMs for storing an intra quantization matrix;b) a RAM controller for generating a write address for writing the inter quantization matrix of 16 bits unit in two sub-RAMs among said first to third sub-RAMs and the intra quantization matrix of 16 bits unit in two sub-RAMs among said fourth to sixth sub-RAMs in an order of zigzag scanning manner in unit of 8 bits, respectively, and a read address for reading a corresponding quantization matrix from said RAM in an order of scanning manner of the DCT coefficients, and combining the corresponding quantization matrix read from said RAM according to the read address in unit of 16 bits;c) an arithmetic controller for obtaining a reciprocal value of the corresponding quantization matrix provided from said RAM via said RAM controller and a reciprocal value of a quantization scale provided externally and outputting the obtained value;and d) an arithmetic unit for quantizing the scanned DCT coefficients by using the reciprocal values of the corresponding quantization matrix and the quantization scale provided from said arithmetic controller.

Independent claims3

53 paragraphs, as filed

0001The present invention relates to a quantizer and more particularly to a quantizer for quantizing scanned Discrete Cosine Transform (DCT) coefficients in a video signal encoding system.

0002Fig. 1 shows a block diagram of a conventional MPEG-2 video encoder comprising a frame memory, a subtracter (SUB), a Discrete Cosine Transform unit (DCT unit), a quantizer (Q), a scanning unit, a Variable Length Coding unit (VLC unit), an inverse quantizer (IQ), an Inverse Discrete Cosine Transform unit (IDCT unit), an adder (ADD), and a motion compensator (MC).

0003In Fig. 1, a differential video signal between a current video signal from the frame memory and a previous video signal motion-compensated in the motion compensator is calculated in the subtracter, and outputted to the DCT unit. In the DCT unit, the differential video signal is converted into DCT coefficients. The DCT coefficients are quantized in the quantizer, and the quantized DCT coefficients are outputted to the scanning unit and the inverse quantizer. In the scanning unit, the quantized two-dimension DCT coefficient series are converted into one-dimension coefficient series, and are outputted to the VLC unit or a Run Length Coding unit (RLC unit) for generating a final coded bit-stream.

0004As described above, in the conventional MPEG-2 video encoder, the scanning is performed after the video data have been quantized. However, due to the problem of latency caused by the structural restraint of the conventional video encoder, there has been a need for video encoder in which the scanning is performed prior to quantization of the video signals.

0005Fig. 2 shows a differential circuit except a motion compensator of a video encoder in which the scanning is performed prior to quantization. The video encoder comprises a orthogonal transform unit, a scanning unit, a quantizer, and a coding unit. In the orthogonal transform unit, input video signals are converted by DCT. In the scanning unit, the converted two dimension DCT coefficients are converted into one dimension coefficient series to be quantized. In the coding unit, the quantized one-dimension coefficient series are coded by a VLC or a RLC to generate a coded bit-stream. The video encoder similar to the above is disclosed in U.S. Pat. No. 5,369,439.

0006In the MPEG-1 video encoder, the DCT coefficients, as shown in Fig. 3A, are converted to the one dimension coefficient series by a zigzag scanning. An alternate scanning, as shown in Fig. 3B, or the zigzag scanning may be used selectively in picture units in the MPEG-2 video encoder. This alternate scanning can also be efficiently used in an interlaced scanning screen.

0007However, as shown in Fig.2, when the scanning is performed before quantization, the quantizer must provide quantization matrixes corresponding to the zigzag and alternate scanning manner of the scanning unit. In MPEG-2 video encoder, the quantization is of adaptive quantization, since a weighted value is changed according to a spatial frequency. Accordingly, a matrix for quantizing an intra block (intra quantization matrix) and a matrix for quantizing, an inter block (inter quantization matrix) are required according to the coding mode. In the quantizer, only the zigzag manner is required for an input order of the matrix, however, an input order of video data changes by the scanning manner. Accordingly, in order to quantize the scanned DCT coefficients, the order of quantization matrix should correspond with the order of input video data affected by the scanning manner. Particularly, input video data couples should match quantization matrix couples when processing two pixels by 16 bits for a fast video coding in the quantizer.

0008In view of the foregoing, it is an object of the present invention to provide a quantizer for quantizing scanned DCT coefficients, which reads in a zigzag order or an alternate order, according to a scanned manner of DCT coefficients, a quantization matrix stored in a memory in a zigzag order and quantizes one dimension DCT coefficients.

0009In order to achieve the above object, the present invention provides a quantizer for quantizing scanned DCT comprising: <ul id="ul0001" list-style="none" compact="compact"><li>a memory having a first bank, which is constructed with a plurality of areas for storing an inter quantization matrix; and a second bank, which is constructed with a plurality of areas for storing an intra quantization matrix;</li><li>a memory control unit for generating a write address for writing the inter quantization matrix and the intra quantization matrix in the memory in a zigzag order, and a read address for reading corresponding quantization matrix from the memory in accordance with the scanned manner of the DCT coefficients, and controlling a write/read process for the inter quantization matrix and the intra quantization matrix in the memory according to the write address and the read address;</li><li>an arithmetic controller for obtaining and outputting a reciprocal value of corresponding quantization matrix from the memory control unit and a reciprocal value of a quantization scale supplied externally; and</li><li>an arithmetic unit for quantizing the scanned DCT coefficients by using the quantization scale value and the quantization matrix value from the arithmetic controller.</li></ul>

0010The above and other objects, features, and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention in conjunction with the accompanying drawings, in which: <ul id="ul0002" list-style="none" compact="compact"><li>Fig. 1 is a block diagram illustrating an embodiment of the conventional video encoder;</li><li>Fig. 2 is a block diagram illustrating an another embodiment of the conventional video encoder;</li><li>Fig. 3A to 3B are views illustrating a zigzag scanned and an alternate scanned DCT coefficients;</li><li>Fig. 4 is a block diagram illustrating a quantizer in accordance with the present invention;</li><li>Fig. 5 is a detailed block diagram illustrating a RAM and a RAM controller in accordance with a first preferred embodiment of the present invention; and</li><li>Fig. 6 is a detailed block diagram illustrating a RAM and a RAM controller in accordance with a second preferred embodiment of the present invention.</li></ul>

0011Reference will now be made in detail to the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

0012Fig. 4 shows a block diagram of a quantizer in accordance with the present invention. The quantizer comprises a memory, namely a RAM 42 for storing an inter quantization matrix and an intra quantization matrix; a RAM controller 44 for generating a write address of a zigzag order and a read address in accordance with a scanned manner of DCT coefficients, and for controlling a read/write process of the quantization matrix from the RAM 42 according to the read/write address; an arithmetic controller 46 for obtaining and outputting a reciprocal value of a quantization scale and a reciprocal value of corresponding quantization matrix from the RAM 42; and an arithmetic unit 48 for quantizing the scanned DCT coefficients by using the quantization scale value and the quantization matrix value from the arithmetic controller 46.

0013Fig. 5 shows a detailed block diagram of a RAM 42 and a RAM controller 44 in accordance with the first preferred embodiment. In Fig. 5, the RAM 42 comprises a first bank BANK1 for storing the inter quantization matrix and a second bank BANK2 for storing the intra quantization matrix. The first bank BANK1 comprises a first sub-RAM BANK1A and a second sub-RAM bank BANK1B for storing the same inter quantization matrix. The second bank BANK2 comprises a third sub-RAM BANK2A and a fourth sub-RAM BANK2B for storing the same intra quantization matrix. The first sub-RAM to fourth sub-RAM BANK1A, BANK1B, BANK2A, BANK2B are 16 bits × 32 words in their size.

0014The RAM controller 44 comprises a write address generator, a first counter 50, for generating a write address to store the inter quantization matrix and the intra quantization matrix into the RAM 42; a read address generator comprising a second counter 51, a programmable logic array (PLA) 52, and a first multiplexer 53, for generating a read address to read a corresponding quantization matrix from the RAM 42 in accordance with the scanned manner of the DCT coefficients; a data combiner comprising a second multiplexer 54 and a packing unit 55, for combining the quantization matrix from the RAM 42 to form 16 bit data according to a coding mode or the scanning order.

0015Input/output signals into/from each block need to be defined and elaborated prior to describing each operation of the above quantizer.

0016Of input signals to the RAM controller 44, "CLK" and "RST" indicate a system clock and a reset signal for active low operation, respectively. In "ID_CD", identifier ID represents a quantization matrix (namely, inter quantization matrix or intra quantization matrix) and CD represents succeeding quantization matrix data. "FLAG_ID" indicates that the current input ID_CD is valid. For example, ID_CD is read and the succeeding quantization matrix data CD is read in two pixel units, namely 16 bit if FLAG_ID is a "high" logic level. "mbs" indicates a macro block start.

0017Of input signals to the arithmetic controller 46, "QUANT_SCALE_CODE" and "QUANT_SCALE_TYPE" are signals for indicating a quantization scale in MPEG-2. "DC_PREC" indicates a size (accuracy) of DC coefficient of an intra block defined in MPEG-2; for example, the DC coefficient is represented to 8bit if it is 0 and the coefficient is represented to 11 bit if it is 3.

0018Of input signals to the arithmetic unit 48, "DATA_EVEN" and "DATA_ODD" indicate even and odd data of two pixel units converted by the DCT, respectively. Of output signals from the arithmetic unit 48, "QUANT_EVEN" and "QUANT_ODD" are quantized output data of the input even and the odd data in two pixel units.

0019Referring to an operation of each block in Fig. 5, the inter quantization matrix data are stored in the first and the second sub-RAM BANK1A, BANK1B of the first bank BANK1 of the RAM 42 in 16 bit units. The intra quantization matrix data are stored in the third and the fourth sub-RAM BANK2A, BANK2B of the second bank BANK2 of the RAM 42 in 16 bit units. In the first sub-RAM BANK1A and the second sub-RAM BANK1B of the first bank BANK1, the same inter quantization matrix data are stored in 16 bit units in 32 areas that are indicated by a write address WADD0. In the third and the fourth sub-RAM BANK2A, BANK2B of the second bank BANK2, the same intra quantization matrix data are stored in 16 bit units in the 32 areas, which is indicated by a write address WADD0. The inter and the intra quantization matrix data are supplied from a system control unit (not shown), and they may be an user defined matrix or a default matrix defined in MPEG-2.

0020The RAM controller 44 is operated by a system clock CLK and a reset signal RST. The quantization matrix inputted through ID_CD is stored in an corresponding bank of the RAM 42 according to the write address WADD0. The quantization matrix in the RAM 42 is read by the read address RADD0 when the DCT coefficients are scanned in the zigzag order, whereas it is read by read addresses RADD1, RADD2 when the DCT coefficients are scanned in the alternate order. The read quantization matrix is outputted to the arithmetic controller 46. Namely, in the RAM controller 44, ID_CD is analyzed to identify the quantization matrix when FLAG_ID is a "high" logic level, and analyzed input quantization matrix is stored in corresponding sub-RAMs of banks of the RAM 42 according to the write address WADD0. Additionally, the quantization matrixes stored in the sub-RAMs are synchronized by the macro block start signal and they are read and outputted to the arithmetic controller 46 according to the read address RADD0 and the read addresses RADD1, RADD2 which correspond to the scanning manner. Each sub-RAM has a control signal for reading and writing (not shown), and a control signal for enabling an output (not shown). The control signals are supplied when the corresponding sub-RAM is selected by the RAM controller 44.

0021Referring to Fig. 5, the first counter 50 (5 bits counter) counts 00H to 3FH according to a clock signal CLK after clearing a count value by reset signal RST. 32 write addresses WADD0 are generated to store the quantization matrix data from the system control unit (not shown) in the first and second sub-RAMs BANK1A, BANK1B, and the third and the fourth sub-RAMs BANK2A, BANK2B in 16 bit units. Examples of the write address WADD0 is represented in the following table 1. <tables id="tabl0001" num="0001"><table frame="all"><title>Table 1 :</title><tgroup cols="2" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="78.75mm" /><colspec colnum="2" colname="col2" colwidth="78.75mm" /><thead valign="top"><row><entry namest="col1" nameend="col2" align="center">Write Address</entry></row><row><entry namest="col1" nameend="col1" align="center">count value of the first counter (50)</entry><entry namest="col2" nameend="col2" align="center">WADD0 address (data)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">00 (00, 01)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">01 (02, 03)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">02 (04, 05)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">03 (06, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">04 (08, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">05 (0A, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">06 (0C, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">07 (0E, 0F)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">08 (10, 11)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">09 (12, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">0A (14, 15)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">0B (16, 17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">0C (18, 19)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">0D (1A, 1B)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">0E (1C, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">0F (1E, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">10 (20, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">11 (22, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">12 (24, 25)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">13 (26, 27)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">14 (28, 29)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">15 (2A, 2B)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">16 (2C, 2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">17 (2E, 2F)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">18 (30, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">19 (32, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">1A (34, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">1B (36, 37)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">1C (38, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">1D (3A, 3B)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">1E (3C, 3D)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">1F (3E, 3F)</entry></row></tbody></tgroup></table></tables>

0022The above table 1 shows when the inter quantization matrix is stored in the first and the second sub-RAM BANK1A, BANK1B. The matrix data couple (00, 01) are stored in the area '00' indicated by the read address WADD0 when the count value is 0016. The matrix data couple (02, 03) are stored in the area 01 indicated by read address WADD0 when the count value is 0116. Namely, each inter quantization matrix couple is stored sequentially in the zigzag order, as shown in Fig. 3A, in the areas 0016 - 1F16 indicated by the write address. In the same manner, each intra quantization matrix couple is stored sequentially in the zigzag order in the areas 0016 - 1F16 of the third and the fourth sub-RAM BANK2A, BANK2B.

0023The second counter 51 (5 bit counter) counts 00H to 1FH according to the clock signal CLK after clearing the count value by the reset signal RST. After clearing, a rising edge of the macro block start signal mbs is detected in the second counter 51 and 32 count values are outputted to a PLA 52 and a packing unit 55.

0024As shown in the following tables 2 and 3, in the PLA 52, the read address RADD0 is generated according to the zigzag scanning of the DCT coefficients and the count value of the second counter 51. In addition, in the PLA 52, the read addresses RADD1, RADD2 are also generated according to the alternate scanning of the DCT coefficients and the count value of the second counter 51.<tables id="tabl0002" num="0002"><table frame="all"><title>Table 2:</title><tgroup cols="2" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="78.75mm" /><colspec colnum="2" colname="col2" colwidth="78.75mm" /><thead valign="top"><row><entry namest="col1" nameend="col2" align="center">Read Addresses (Zigzag Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">count value of the second counter (51)</entry><entry namest="col2" nameend="col2" align="center">RADD0 address (data)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">00 (00, 01)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">01 (02, 03)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">02 (04, 05)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">03 (06, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">04 (08, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">05 (0A, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">06 (0C, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">07 (0E, 0F)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">08 (10, 11)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">09 (12, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">0A (14, 15)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">0B (16, 17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">0C (18, 19)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">0D (1A, 1B)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">0E (1C, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">0F (1E, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">10 (20, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">11 (22, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">12 (24, 25)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">13 (26, 27)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">14 (28, 29)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">15 (2A, 2B)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">16 (2C, 2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">17 (2E, 2F)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">18 (30, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">19 (32, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">1A (34, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">1B (36, 37)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">1C (38, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">1D (3A, 3B)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">1E (3C, 3D)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">1F (3E, 3F)</entry></row></tbody></tgroup></table></tables>

0025The above table 2 shows examples of the inter quantization matrix read from the first and the second sub-RAMs BANK1A, BANK1B. In the first and the second sub-RAM BANK1A, BANK1B, the matrix data couple (00, 01) stored in the area '00' are read by the read address RADD0 when the count value is 0016. In the first and the second sub-RAM BANK1A, BANK1B, the matrix data couple (02, 03) stored in the area '01' are read by the read address RADD0 when the count value is 0116. Namely, each matrix data couples stored in the areas 0016 - 1F16 indicated by the read address RADD0 are read sequentially in the zigzag order as shown in Fig. 3A. In the same manner, each intra quantization matrix data couples stored in the areas 0016 - 1F16 of the third and the fourth sub-RAMs BANK2A, BANK2B are read sequentially in the zigzag order. Referring to the tables 1 and 2, the write address WADD0 correspond with the read address RADD0 when the DCT coefficients are scanned in the zigzag. <tables id="tabl0003" num="0003"><table frame="all"><title>Table 3:</title><tgroup cols="3" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="52.50mm" /><colspec colnum="2" colname="col2" colwidth="52.50mm" /><colspec colnum="3" colname="col3" colwidth="52.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col3" align="center">Read Address (Alternate Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">count value of the second counter (51)</entry><entry namest="col2" nameend="col2" align="center">RADD1 address (data)</entry><entry namest="col3" nameend="col3" align="center">RADD2 address (data)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">00 (00, 01)</entry><entry namest="col3" nameend="col3" align="center">01 (02, 03)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">01 (02, 03)</entry><entry namest="col3" nameend="col3" align="center">04 (08, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">02 (04, 05)</entry><entry namest="col3" nameend="col3" align="center">00 (00, 01)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">03 (06, 07)</entry><entry namest="col3" nameend="col3" align="center">02 (04, 05)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">04 (08, 09)</entry><entry namest="col3" nameend="col3" align="center">05 (0A, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">05 (0A, 0B)</entry><entry namest="col3" nameend="col3" align="center">0A (14, 15)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">0A (14, 15)</entry><entry namest="col3" nameend="col3" align="center">11 (22, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">11 (22, 23)</entry><entry namest="col3" nameend="col3" align="center">12 (24, 25)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">0B (16, 17)</entry><entry namest="col3" nameend="col3" align="center">09 (12, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">09 (12, 13)</entry><entry namest="col3" nameend="col3" align="center">06 (0C, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">06 (0C, 0D)</entry><entry namest="col3" nameend="col3" align="center">03 (06, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">07 (0E, 0F)</entry><entry namest="col3" nameend="col3" align="center">08 (10, 11)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">08 (10, 11)</entry><entry namest="col3" nameend="col3" align="center">0C (18, 19)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">10 (20, 21)</entry><entry namest="col3" nameend="col3" align="center">0B (16, 17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">12 (24, 25)</entry><entry namest="col3" nameend="col3" align="center">18 (30, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">13 (26, 27)</entry><entry namest="col3" nameend="col3" align="center">10 (20, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">18 (30, 31)</entry><entry namest="col3" nameend="col3" align="center">17 (2E, 2F)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">0C (18, 19)</entry><entry namest="col3" nameend="col3" align="center">0F (1E, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">0D (1A, 1B)</entry><entry namest="col3" nameend="col3" align="center">07 (0E, 0F)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">0E (1C, 1D)</entry><entry namest="col3" nameend="col3" align="center">0D (1A, 1B)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">0F (1E, 1F)</entry><entry namest="col3" nameend="col3" align="center">14 (28, 29)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">17 (2E, 2F)</entry><entry namest="col3" nameend="col3" align="center">13 (26, 27)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">19 (32, 33)</entry><entry namest="col3" nameend="col3" align="center">1C (38, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">16 (2C, 2D)</entry><entry namest="col3" nameend="col3" align="center">19 (32, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">1C (38, 39)</entry><entry namest="col3" nameend="col3" align="center">1D (3A, 3B)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">14 (28, 29)</entry><entry namest="col3" nameend="col3" align="center">16 (2C, 2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">15 (2A, 2B)</entry><entry namest="col3" nameend="col3" align="center">0E (1C, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">1A (34, 35)</entry><entry namest="col3" nameend="col3" align="center">15 (2A, 2B)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">1B (36, 37)</entry><entry namest="col3" nameend="col3" align="center">1A (34, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">1D (3A, 3B)</entry><entry namest="col3" nameend="col3" align="center">1F (3E, 3F)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">1E (3C, 3D)</entry><entry namest="col3" nameend="col3" align="center">1B (36, 37)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">1F (3E, 3F)</entry><entry namest="col3" nameend="col3" align="center">1E (3C, 3D)</entry></row></tbody></tgroup></table></tables>

0026The above table 3 shows the inter quantization matrix read from the first and the second sub-RAMs BANK1A, BANK1B. When the count value is 0016, the matrix data couple (00, 01) stored in the area '00' are read by the read address RADD1 in the first sub-RAM BANK1A, and the matrix data couple (02, 03) stored in the area '01' are read by the read address RADD2 in the second sub-RAM BANK1B. When the count value is 0116, the matrix data couple (02, 03) stored in the area '01' are read by the read address RADD1 in the first sub-RAM BANK1A, and the matrix data couple (08, 09) stored in the area '04' are read by the read address RADD2 in the second sub-RAM BANK1B. Namely, matrix data couples that are stored in the areas of the first and the second sub-RAM BANK1A, BANK1B indicated by each read address RADD1, RADD2, are read in the same order as shown in Fig. 3B according to the count values 0016 - 1F16 of the second counter 51. In the same manner, for the intra quantization matrix, matrix data couples that are stored in the areas of the third and the fourth sub-RAM BANK2A, BANK2B indicated by each read address RADD1, RADD2, are read in the same order as shown in Fig. 3B according to the count values 0016 - 1F16 of the second counter 51.

0027In the multiplexer 53, the read address of the zigzag order RADD0 or the read address of the alternate order RADD1, RADD2 from the PLA 52 is outputted selectively to the RAM 42 according to a scanning manner discriminating signal ZZ/ALTER from the system control unit (not shown). For example, the read address RADD0 of zigzag order, as shown in the table 2, from the PLA 52 is selected by the first multiplexer 53 when the DCT coefficients are scanned in the zigzag manner. The selected read address RADD0 is supplied to the corresponding bank in the RAM 42. Meanwhile, the read address RADD1, RADD2 of alternate order, as shown in table 3, from PLA 52 are selected by the first multiplexer 53 when the DCT coefficients are scanned in the alternate manner. The selected read address RADD1, RADD2 are supplied to the corresponding bank in the RAM 42.

0028In the second multiplexer 54, according to a coding mode discriminating signal INTER/INTRA from the system control unit (not shown), the output data DATA1A, DATA1B of the first and the second sub-RAMs BANK1A, BANK1B are selected for the inter mode coding, whereas the output data DATA2A, DATA2B of the third and the fourth sub-RAMs BANK2A, BANK2B are selected for the intra mode coding.

0029In the packing unit 55, upper and lower bits of two couples of 16 bit matrix data are combined selectively as 16 bit matrix couple data. The packed 16 bit matrix couple data are synchronized with the count value of the second counter 51 and they are outputted to the arithmetic controller 46. The following table 4 shows examples of data combination when the coding mode of the DCT coefficients is the inter coding and the scanning manner is the zigzag scanning. <tables id="tabl0004" num="0004"><table frame="all"><title>Table 4 :</title><tgroup cols="3" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="52.50mm" /><colspec colnum="2" colname="col2" colwidth="52.50mm" /><colspec colnum="3" colname="col3" colwidth="52.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col3" align="center">Examples of Data Combination (Zigzag scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">counter value of the second counter (51)</entry><entry namest="col2" nameend="col2" align="center">data combination (BANK1A & BANK1B)</entry><entry namest="col3" nameend="col3" align="center">output matrix data couple</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(00, 01)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(02, 03)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(04, 05)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(06, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(08, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(0A, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(0C, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(0E, 0F)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(10, 11)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(12, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(14, 15)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(16, 17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(18, 19)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(1A, 1B)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(1C, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(1E, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(20, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(22, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(24, 25)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">DATA I A(16∼8) & DATA I B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(26, 27)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">DATA 1A(16∼8) & DATA 1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(28, 29)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(2A, 2B)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA 1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(2C, 2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(2E, 2F)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(30, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(32, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(34, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(36, 37)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(38, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(3A, 3B)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(3C, 3D)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(3E, 3F)</entry></row></tbody></tgroup></table></tables>

0030Furthermore, the following table 5 shows examples when the coding mode of the DCT coefficients is the inter coding and the scanning manner is the alternate scanning. <tables id="tabl0005" num="0005"><table frame="all"><title>Table 5 :</title><tgroup cols="3" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="52.50mm" /><colspec colnum="2" colname="col2" colwidth="52.50mm" /><colspec colnum="3" colname="col3" colwidth="52.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col3" align="center">Examples of Data Combination (Alternate Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">The second counter (51) value of count</entry><entry namest="col2" nameend="col2" align="center">data combination (BANK1A & BANK1B)</entry><entry namest="col3" nameend="col3" align="center">output matrix data couple</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(00, 02)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(03, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(01, 04)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(05, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(08, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(0A, 14)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(15, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">DATA1B(16∼8) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(24, 22)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(16, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(12, 0C)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">DATA1B(16∼8) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(06, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(0E, 10)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(11, 18)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(17, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(25, 30)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">DATA1B(16∼8) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(30, 26)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(2F, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(19, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(0F, 1A)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(1B, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(1E, 28)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(27, 2E)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(32, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(2D, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">DATA1A(16∼8) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(38, 3A)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(29, 2C)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">DATA1B(16∼8) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(1C, 2A)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(2B, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">DATA1B(16∼8) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(34, 37)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">DATA1A(7∼0) & DATA1B(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(3B, 3E)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">DATA1B(16∼8) & DATA1A(16∼8)</entry><entry namest="col3" nameend="col3" align="center">(36, 3C)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">DATA1B(7∼0) & DATA1A(7∼0)</entry><entry namest="col3" nameend="col3" align="center">(3D, 3F)</entry></row></tbody></tgroup></table></tables>

0031The arithmetic controller 46 is operated according to the system clock CLK and the reset signal RST. The quantization matrix from the RAM controller 44 is inputted in the arithmetic controller 46 and its reciprocal value is calculated. Additionally, the quantization type QUANT_SCALE_TYPE and the quantization code QUANT_SCALE_CODE signal from the system control unit (not shown) are inputted from the RAM controller 44 to the arithmetic controller 46. A quantization scale value is obtained by calculating the quantization type QUANT_SCALE_TYPE and the quantization code QUANT_SCALE_CODE. Therefrom, a reciprocal number of the quantization scale value is obtained. A DC value is obtained by a DC_PREC value from the system control unit (not shown). A reciprocal number of the DC value is obtained therefrom. At this time. the quantization matrix value, the quantization scale value, and the DC value containing the reciprocal number, respectively from the arithmetic controller 46 are outputted to the arithmetic unit 48. Furthermore, for the 16 bit matrix couple data, its reciprocal number is obtained in 8 bit units.

0032In the arithmetic unit 48, DCT coefficients of 2 pixels DATA_EVEN, DATA_ODD are multiplied by the reciprocal number of the quantization scale value from the arithmetic controller 46. The calculated value is multiplied by the reciprocal number of the quantization matrix value and a round processing for the value is performed. The quantized data of 2 pixels QUANT_EVEN, QUANT_ODD are outputted therefrom. At this time, the calculation in the arithmetic unit 48 is performed by a pipe line manner. Hence, a processing speed can be improved. Furthermore, the input order of the DCT coefficients and the order of the quantization matrix can be matched to each other according to the scanning manner when quantizing.

0033Thus, according to the first embodiments of the present invention, the same inter quantization matrix is stored in two sub-RAMs and the same intra quantization matrix is stored in two sub-RAMs, respectively in order of the zigzag scanning manner, thus corresponding quantization matrix is read from a memory without data collision, according to the read address based on the scanned manner of DCT coefficients.

0034Fig. 6 shows a detailed block diagram of a RAM 42 and a RAM controller 44 in accordance with a second preferred embodiment. The RAM 42 comprises a first bank BANK1 for storing the inter quantization matrix and a second bank BANK2 for storing the intra quantization matrix. The first bank BANK1 comprises a first sub-RAM and a second sub-RAM BANK1A, BANK1B having 8 bits x 22 words, and a third sub-RAM BANK1C having 8 bits × 20 words. The second bank BANK2 comprises a fourth sub-RAM BANK2A and a fifth sub-RAM BANK2B having 8 bits X 22 words, and a sixth sub-RAM BANK2C having 8 bits X 20 words.

0035The RAM controller 44 comprises a write address generator, a first counter 60 and a first PLA 61, for generating a write address to store the inter quantization matrix and the intra quantization matrix into the RAM 42; a data divider 62 for dividing matrix data of ID_CD into a corresponding sub-RAM of each bank; a read address generator, a second counter 63, a second PLA 64, a third PLA 65, and a first multiplexer 66, for generating a read address to read a corresponding quantization matrix from the RAM 42 according to a scanning manner for DCT coefficients; a data combiner, a second multiplexer 67 and a packing unit 68, for combining the matrix data from the RAM 42 in 16 bits according to a coding mode or the scanning order.

0036Figs. 4 and Fig. 6 will be referred to describe a second embodiment of the present invention in detail. As input/output signals to each block are the same as discussed in the first preferred embodiment, they will be omitted from the following elaboration.

0037In the first bank BANK1 of the RAM 42, 64 inter quantization matrix data are divided and stored in 8 bit units in 22 areas of the first sub-RAM BANK1A, 22 areas of the second sub-RAM BANK1B, 20 areas of the third sub-RAM BANK1C, respectively. Each area of the first to the third sub-RAMs BANK1A, BANK1B, BANK1C is indicated by the write addresses WADD1, WADD2, WADD3, respectively. For the second bank BANK2, 64 intra quantization matrix data are divided and stored in 8 bit units in 22 areas of the fourth sub-RAM BANK2A, 22 areas of the fifth sub-RAM BANK2B, 20 areas of the sixth sub-RAM BANK2C, respectively. Each area of the fourth to the sixth sub-RAMs BANK2A, BANK2B, BANK2C is indicated by the write addresses WADD1, WADD2, WADD3, respectively. The inter and the intra quantization matrix are supplied from the system control unit (not shown), and they may be an user defined matrix or a default matrix defined by MPEG-2.

0038The RAM controller 44 is operated by a system clock CLK and a reset signal RST such that the quantization matrixes of ID_CD are stored in corresponding banks of the RAM 42 according to the write addresses WADD1, WADD2, WADD3. Additionally, the quantization matrixes in the RAM 42 are read by read addresses RADD1, RADD2, RADD3 according to the scanning manner of the DCT coefficients and they are outputted to the arithmetic controller 46. Namely, in the RAM controller 44, ID_CD is analyzed to identify the quantization matrix type when FLAG_ID is a "high" logic level. The analyzed input quantization matrix is stored in a corresponding sub-RAM of each bank of the RAM 42. Additionally, on being synchronized by a macro block start signal mbs, the quantization matrixes in each sub-RAM of the banks are read and outputted to the arithmetic controller 46. Each sub-RAM has a control signal for reading and writing (not shown), and a control signal for enabling an output (not shown). The control signals are supplied when the corresponding sub-RAM is selected by the RAM controller 44.

0039As illustrated in Fig. 6, the first counter 60 (5 bits counter) counts 00H to 1FH according to a clock signal CLK after clearing a count value by reset signal RST. ID_CD are analyzed to identify the inter/intra quantization matrix when FLAG_ID is a "high" logic level. 32 count values are outputted to the first PLA 61 and the data divider 62 once ID is identified.

0040In the first PLA 61, the writ addresses WADD1, WADD2, WADD3 are generated to store the quantization matrix from the system control unit (not shown) in 8bit units in the first to the third sub-RAM BANK1A, BANK1B, BANK3, or the fourth to the sixth sub-RAM BANK2A, BANK2B, BANK2C according to the count value from the first counter 60. The first PLA 61 also generates the read addresses RADD1, RADD2, RADD3 when the DCT coefficients are scanned in the zigzag order. The following table 6 illustrates the write addresses WADD1, WADD2, WADD3.<tables id="tabl0006" num="0006"><table frame="all"><title>Table 6 :</title><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col4" align="center">Write Address</entry></row><row><entry namest="col1" nameend="col1" align="center">Count value of the first counter (60)</entry><entry namest="col2" nameend="col2" align="center">WADD1 address (data)</entry><entry namest="col3" nameend="col3" align="center">WADD2 address (data)</entry><entry namest="col4" nameend="col4" align="center">WADD3 address (data)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">00(00)</entry><entry namest="col3" nameend="col3" align="center">00(01)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">-</entry><entry namest="col3" nameend="col3" align="center">01(03)</entry><entry namest="col4" nameend="col4" align="center">00(02)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">01(04)</entry><entry namest="col3" nameend="col3" align="center">02(05)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">02(06)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">01(07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">03(08)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">02(09)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">03(0B)</entry><entry namest="col4" nameend="col4" align="center">03(0A)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">04(0C)</entry><entry namest="col3" nameend="col3" align="center">04(0D)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">05(0F)</entry><entry namest="col4" nameend="col4" align="center">04(0E)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">05(10)</entry><entry namest="col3" nameend="col3" align="center">06(11)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">-</entry><entry namest="col3" nameend="col3" align="center">07(13)</entry><entry namest="col4" nameend="col4" align="center">05(12)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">06(14)</entry><entry namest="col3" nameend="col3" align="center">08(15)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">07(16)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">06(17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">08(18)</entry><entry namest="col3" nameend="col3" align="center">09(19)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">09(1A)</entry><entry namest="col3" nameend="col3" align="center">0A(1B)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">0A(1C)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">07(1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">0B(1E)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">08(1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0B(21)</entry><entry namest="col4" nameend="col4" align="center">09(20)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">0C(22)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">0A(23)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0C(25)</entry><entry namest="col4" nameend="col4" align="center">0B(24)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">0D(26)</entry><entry namest="col3" nameend="col3" align="center">0D(27)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0E(29)</entry><entry namest="col4" nameend="col4" align="center">0C(28)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0F(2B)</entry><entry namest="col4" nameend="col4" align="center">0D(2A)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">0E(2C)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">0E(2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">0F(2E)</entry><entry namest="col3" nameend="col3" align="center">10(2F)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">10(30)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">0F(31)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">11(32)</entry><entry namest="col3" nameend="col3" align="center">11(33)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">12(34)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">10(35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">12(37)</entry><entry namest="col4" nameend="col4" align="center">11(36)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">13(38)</entry><entry namest="col3" nameend="col3" align="center">13(39)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">-</entry><entry namest="col3" nameend="col3" align="center">14(3B)</entry><entry namest="col4" nameend="col4" align="center">12(3A)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">14(3C)</entry><entry namest="col3" nameend="col3" align="center">15(3D)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">15(3E)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">13(3F)</entry></row></tbody></tgroup></table></tables>

0041In the data divider 62, 16 bit quantization matrix data of the zigzag order as shown in Fig. 3A, are divided to store in two of 3 sub-RAMs in 8 bit units according to the count value from the first counter 60. In case of the inter quantization matrix, the 16 bit quantization matrix data are divided to store in the first to the third sub-RAMs BANK1A, BANK1B, BANK1C. In case of the intra quantization matrix, the 16 bit quantization matrix data are divided to store in the fourth to the sixth sub-RAMs BANK2A, BANK2B, BANK2C. The following table 7 illustrates the data division. <tables id="tabl0007" num="0007"><table frame="all"><title>Table 7 :</title><tgroup cols="2" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="78.75mm" /><colspec colnum="2" colname="col2" colwidth="78.75mm" /><thead valign="top"><row><entry namest="col1" nameend="col2" align="center">Data Division (Inter Quantization Matrix)</entry></row><row><entry namest="col1" nameend="col1" align="center">count value of the first counter (60)</entry><entry namest="col2" nameend="col2" align="center">Input</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK I B</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">BANK1C & BANK1B</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1B</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">BANK1A & BANK1C</entry></row></tbody></tgroup></table></tables>

0042The above tables 6 and 7 shows the inter quantization matrix stored in the first to the third sub-RAMs BANK1A, BANK1B, BANK1C. When the count value is 0016, the matrix data (00) are stored in the area of the write address WADD1 '00' of the first sub-RAM BANK1A and the matrix data (01) are stored in the area of the write address WADD2 '01' of the second sub-RAM BANK1B. When the counter value is 0116, the matrix data (03) are stored in the area of the write address WADD2 '01' of the second sub-RAM BANK1B and the matrix data (02) are stored in the area of the write address WADD3 '00' of the third sub-RAM BANK1C. Namely, the inter quantization matrix data of the zigzag order in 16 bit units, as in Fig. 3A, are stored in two sub-RAMs of the first to the third sub-RAMs as shown in table 7 in 8 bit units according to the write addresses WADD1, WADD2, WADD3. Similarly, the intra quantization matrix data of the zigzag order in 16 bit units, as in Fig. 3A, are stored in two sub-RAMs of the fourth to the six sub RAMs as shown in table 7 in 8 bit units according to the write addresses WADD1, WADD2, WADD3. At this time, the sub-RAM for allocating the address in the table 6 correspond to the sub-RAM for dividing the data in the table 7 when the count value is the same.

0043The second counter 63 (5 bit counter) counts 00H to 1FH according to the clock signal CLK after clearing the count signal by the reset signal RST. The 32 count values are outputted to the second PLA 64, the third PLA 65, and the packing unit 68 after detecting a rising edge of macro block signal mbs.

0044In the second PLA 64, the read addresses RADD1, RADD2, RADD3 are generated to read the corresponding quantization matrix from the RAM 42 when the DCT coefficients are scanned in the zigzag order. The second PLA 64 has the same construction as the first PLA 61. The read addresses RADD1, RADD2, RADD3 like in the following table 8 are generated in the second PLA 64 according to the count value from the second counter 63.<tables id="tabl0008" num="0008"><table frame="all"><title>Table 8 :</title><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col4" align="center">Read Address (Zigzag Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">Count value of the second counter (60)</entry><entry namest="col2" nameend="col2" align="center">RADD1 address (data)</entry><entry namest="col3" nameend="col3" align="center">RADD2 address (data)</entry><entry namest="col4" nameend="col4" align="center">RADD3 address (data)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">00(00)</entry><entry namest="col3" nameend="col3" align="center">00(01)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">-</entry><entry namest="col3" nameend="col3" align="center">01(03)</entry><entry namest="col4" nameend="col4" align="center">00(02)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">01(04)</entry><entry namest="col3" nameend="col3" align="center">02(05)</entry><entry namest="col4" nameend="col4" align="center">-</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">02(06)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">01(07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">03(08)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">02(09)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">03(0B)</entry><entry namest="col4" nameend="col4" align="center">03(0A)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">04(0C)</entry><entry namest="col3" nameend="col3" align="center">04(0D)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">05(0F)</entry><entry namest="col4" nameend="col4" align="center">04(0E)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">05(10)</entry><entry namest="col3" nameend="col3" align="center">06(11)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">07(13)</entry><entry namest="col4" nameend="col4" align="center">05(12)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">06(14)</entry><entry namest="col3" nameend="col3" align="center">08(15)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">07(16)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">06(17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">08(18)</entry><entry namest="col3" nameend="col3" align="center">09(19)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">09(1A)</entry><entry namest="col3" nameend="col3" align="center">0A(1B)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">0A(1C)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">07(1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">OF</entry><entry namest="col2" nameend="col2" align="center">0B(1E)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">08(1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0B(21)</entry><entry namest="col4" nameend="col4" align="center">09(20)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">0C(22)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">0A(23)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0C(25)</entry><entry namest="col4" nameend="col4" align="center">0B(24)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">0D(26)</entry><entry namest="col3" nameend="col3" align="center">0D(27)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0E(29)</entry><entry namest="col4" nameend="col4" align="center">0C(28)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">-</entry><entry namest="col3" nameend="col3" align="center">0F(2B)</entry><entry namest="col4" nameend="col4" align="center">0D(2A)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">0E(2C)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">0E(2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">0F(2E)</entry><entry namest="col3" nameend="col3" align="center">10(2F)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">10(30)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">0F(31)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">11(32)</entry><entry namest="col3" nameend="col3" align="center">11(33)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">12(34)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">10(35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">12(37)</entry><entry namest="col4" nameend="col4" align="center">11(36)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">13(38)</entry><entry namest="col3" nameend="col3" align="center">13(39)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">14(3B)</entry><entry namest="col4" nameend="col4" align="center">12(3A)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">14(3C)</entry><entry namest="col3" nameend="col3" align="center">15(3D)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">15(3E)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">13(3F)</entry></row></tbody></tgroup></table></tables>

0045In the third PLA 65, the read addresses RADD1, RADD2, RADD3 are generated to read the corresponding quantization matrix from the RAM 42 when the DCT coefficients are scanned in the alternate order. The read addresses RADD1, RADD2, RADD3 like the following table 9 are generated in the third PLA 65 according to the count value from the second counter 63.<tables id="tabl0009" num="0009"><table frame="all"><title>Table 9 :</title><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col4" align="center">Read Address (Alternate Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">Count value of the second counter (63)</entry><entry namest="col2" nameend="col2" align="center">RADD1 address (data)</entry><entry namest="col3" nameend="col3" align="center">RADD2 address (data)</entry><entry namest="col4" nameend="col4" align="center">RADD3 address (data)</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">00(00)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">00(02)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">01(03)</entry><entry namest="col4" nameend="col4" align="center">02(09)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">01(04)</entry><entry namest="col3" nameend="col3" align="center">00(01)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">02(05)</entry><entry namest="col4" nameend="col4" align="center">01(07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">03(08)</entry><entry namest="col3" nameend="col3" align="center">03(0B)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">06(14)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">03(0A)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">08(15)</entry><entry namest="col4" nameend="col4" align="center">0A(23)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">0C(22)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">0B(24)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">07(16)</entry><entry namest="col3" nameend="col3" align="center">07(13)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">04(0C)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">05(12)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">02(06)</entry><entry namest="col3" nameend="col3" align="center">04(0D)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">05(10)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">04(0E)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">08(18)</entry><entry namest="col3" nameend="col3" align="center">06(11)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0B(21)</entry><entry namest="col4" nameend="col4" align="center">06(17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">10(30)</entry><entry namest="col3" nameend="col3" align="center">0C(25)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">0D(26)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">09(20)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">10(2F)</entry><entry namest="col4" nameend="col4" align="center">0F(31)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">09(19)</entry><entry namest="col4" nameend="col4" align="center">08(1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">09(1A)</entry><entry namest="col3" nameend="col3" align="center">05(0F)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">-</entry><entry namest="col3" nameend="col3" align="center">0A(1B)</entry><entry namest="col4" nameend="col4" align="center">07(1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">0B(1E)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">0C(28)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">0F(2E)</entry><entry namest="col3" nameend="col3" align="center">0D(27)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">11(32)</entry><entry namest="col3" nameend="col3" align="center">13(39)</entry><entry namest="col4" nameend="col4" /></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">11(33)</entry><entry namest="col4" nameend="col4" align="center">0E(2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">13(38)</entry><entry namest="col3" nameend="col3" align="center">--</entry><entry namest="col4" nameend="col4" align="center">12(3A)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">0E(2C)</entry><entry namest="col3" nameend="col3" align="center">0E(29)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">0A(1C)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">0D(2A)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">0F(2B)</entry><entry namest="col4" nameend="col4" align="center">10(35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">12(34)</entry><entry namest="col3" nameend="col3" align="center">12(37)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">15(3E)</entry><entry namest="col3" nameend="col3" align="center">14(3B)</entry><entry namest="col4" nameend="col4" align="center">--</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">14(3C)</entry><entry namest="col3" nameend="col3" align="center">-</entry><entry namest="col4" nameend="col4" align="center">11(36)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">--</entry><entry namest="col3" nameend="col3" align="center">15(3D)</entry><entry namest="col4" nameend="col4" align="center">13(3F)</entry></row></tbody></tgroup></table></tables>

0046The above table 9 shows the inter quantization matrix data read from the first to the third sub-RAMs BANK1A, BANK1B, BANK1C. When the count value is 0016, the read address RADD1 is generated to read the data (00) stored in the write address '00' from the first sub-RAM BANK1A, and the read address RADD3 is generated to read the data (02) stored in the write address '00' from the third sub-RAM BANK1C. In addition, when the count value is 0116, the read address RADD2 is generated to read the data (03) stored in the write address '01' from the second sub-RAM BANK1B, and the read address RADD3 is generated to read the data (09) stored in the write address '02' from the third sub-RAM BANK1C. Namely, the matrix data, which are stored in the areas of the first to the third sub-RAMs BANK1A, BANK1B, BANK1C indicated respectively by the read addresses RADD1, RADD2, RADD3, are read in the order shown in Fig. 3B according to the count values 0016 - 1F16. In the same manner, in case of the intra quantization, the matrix data, which are stored in the areas of the fourth to the sixth sub-RAMs BANK2A, BANK2B, BANK2C indicated respectively by the read addresses RADD1, RADD2, RADD3, are read in the order shown in Fig. 3B according to the count values 0016 - 1F16. As described above, the read address from the third PLA 65 is not sequential for reading the matrix data of the zigzag order in 3 sub-RAMs in the alternate order. For this reason, a matrix data is distributed and stored in two of 3 sub-RAMs by write address generated in the first PLA 61 such that the data collision phenomenon does not occur when a couple of matrix data are read by the read address generated in the third PLA 65 according to a scanning manner.

0047In the first multiplexer 66, the read addresses RADD1, RADD2, RADD3 of the zigzag order, or the read addresses RADD1, RADD2, RADD3 of the alternate order are outputted selectively to the RAM 42 according to the scanned manner discriminating signal ZZ/ALTER from the system control unit (not shown). For example, in the first multiplexer 66, the read addresses RADD1, RADD2, RADD3 of the zigzag order from the second PLA 64 like the table 8 are supplied selectively to the corresponding bank of the RAM 42 when the DCT coefficients are scanned in the zigzag manner. Meanwhile, in the first multiplexer 66, the read addresses RADD1, RADD2, RADD3 of the alternate order from the third PLA 65 like the table 9 are supplied selectively to the corresponding bank of the RAM 42 when the DCT coefficients are scanned in the alternating manner.

0048In the second multiplexer 67, according to the code mode discriminating signal INTER/INTRA from the system control unit (not shown), the output data DATA1A, DATA1B, DATA1C of the first to the third sub-RAMs BANK1A, BANK1B, BANK1C are outputted selectively for the inter coding mode, and the output data DATA2A,DATA2B, DATA2C of the fourth to the sixth sub-RAMs BANK2A, BANK2B, BANK2C are outputted selectively for the intra coding mode.

0049In the packing unit 68, two couples of 8 bit matrix data from the second multiplexer 67 are combined as 16 bit matrix couple data. The data are synchronized to the count value of the second counter 63 and they are outputted to the arithmetic controller 46. The following table 10 shows the case that the coding mode of the DCT coefficients is the inter coding and its scanning manner is of zigzag scanning. <tables id="tabl0010" num="0010"><table frame="all"><title>Table 10 :</title><tgroup cols="3" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="52.50mm" /><colspec colnum="2" colname="col2" colwidth="52.50mm" /><colspec colnum="3" colname="col3" colwidth="52.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col3" align="center">Examples of Data Combination (Zigzag Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">counter value of the second counter (63)</entry><entry namest="col2" nameend="col2" align="center">data combination (BANK1A & BANK1B & BANK1C)</entry><entry namest="col3" nameend="col3" align="center">output matrix data couple</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(00, 01)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(02, 03)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(04, 05)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(06, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(08, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(0A, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(0C, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(0E, 0F)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(10, 11)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(12, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(14, 15)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(16, 17)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(18, 19)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(1A, 1B)</entry></row><row><entry namest="col1" nameend="col1" align="center">0</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(1C, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(1E, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(20, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(22, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(24, 25)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(26, 27)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(28, 29)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(2A, 2B)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(2C, 2D)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(2E, 2F)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(30, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(32, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(34, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(36, 37)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(38, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(3A, 3B)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(3C, 3D)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(3E, 3F)</entry></row></tbody></tgroup></table></tables>

0050Furthermore, the following table 11 shows the case that the coding mode of the DCT coefficients is the inter coding and its scanning manner is of alternate scanning. <tables id="tabl0011" num="0011"><table frame="all"><title>Table 11 :</title><tgroup cols="3" colsep="1" rowsep="1"><colspec colnum="1" colname="col1" colwidth="52.50mm" /><colspec colnum="2" colname="col2" colwidth="52.50mm" /><colspec colnum="3" colname="col3" colwidth="52.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col3" align="center">Examples of Data Combination (Alternate Scanning)</entry></row><row><entry namest="col1" nameend="col1" align="center">count value of the second counter (63)</entry><entry namest="col2" nameend="col2" align="center">data combination (BANK1A & BANK1B &BANK1C)</entry><entry namest="col3" nameend="col3" align="center">output matrix data couple</entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="center">00</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(00, 02)</entry></row><row><entry namest="col1" nameend="col1" align="center">01</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(03, 09)</entry></row><row><entry namest="col1" nameend="col1" align="center">02</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(01, 04)</entry></row><row><entry namest="col1" nameend="col1" align="center">03</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(05, 07)</entry></row><row><entry namest="col1" nameend="col1" align="center">04</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(08, 0B)</entry></row><row><entry namest="col1" nameend="col1" align="center">05</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(0A, 14)</entry></row><row><entry namest="col1" nameend="col1" align="center">06</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(15, 23)</entry></row><row><entry namest="col1" nameend="col1" align="center">07</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(24, 22)</entry></row><row><entry namest="col1" nameend="col1" align="center">08</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(16, 13)</entry></row><row><entry namest="col1" nameend="col1" align="center">09</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(12, 0C)</entry></row><row><entry namest="col1" nameend="col1" align="center">0A</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(06, 0D)</entry></row><row><entry namest="col1" nameend="col1" align="center">0B</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(0E, 10)</entry></row><row><entry namest="col1" nameend="col1" align="center">0C</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(11, 18)</entry></row><row><entry namest="col1" nameend="col1" align="center">0D</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(17, 21)</entry></row><row><entry namest="col1" nameend="col1" align="center">0E</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(25, 30)</entry></row><row><entry namest="col1" nameend="col1" align="center">0F</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(20, 26)</entry></row><row><entry namest="col1" nameend="col1" align="center">10</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(2F, 31)</entry></row><row><entry namest="col1" nameend="col1" align="center">11</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(19, 1F)</entry></row><row><entry namest="col1" nameend="col1" align="center">12</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(0F, 1A)</entry></row><row><entry namest="col1" nameend="col1" align="center">13</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(1B, 1D)</entry></row><row><entry namest="col1" nameend="col1" align="center">14</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(1E, 28)</entry></row><row><entry namest="col1" nameend="col1" align="center">15</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(27, 2E)</entry></row><row><entry namest="col1" nameend="col1" align="center">16</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(32, 39)</entry></row><row><entry namest="col1" nameend="col1" align="center">17</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(2D, 33)</entry></row><row><entry namest="col1" nameend="col1" align="center">18</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(38, 3A)</entry></row><row><entry namest="col1" nameend="col1" align="center">19</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(29, 2C)</entry></row><row><entry namest="col1" nameend="col1" align="center">1A</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(1C, 2A)</entry></row><row><entry namest="col1" nameend="col1" align="center">1B</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(2B, 35)</entry></row><row><entry namest="col1" nameend="col1" align="center">1C</entry><entry namest="col2" nameend="col2" align="center">DATA1A & DATA1B</entry><entry namest="col3" nameend="col3" align="center">(34, 37)</entry></row><row><entry namest="col1" nameend="col1" align="center">1D</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(3B, 3E)</entry></row><row><entry namest="col1" nameend="col1" align="center">1E</entry><entry namest="col2" nameend="col2" align="center">DATA1C & DATA1A</entry><entry namest="col3" nameend="col3" align="center">(36, 3C)</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="center">1F</entry><entry namest="col2" nameend="col2" align="center">DATA1B & DATA1C</entry><entry namest="col3" nameend="col3" align="center">(3D, 3F)</entry></row></tbody></tgroup></table></tables>

0051Here, the discussion of the arithmetic controller 46 and the arithmetic unit 48 is omitted since the operating procedures are same as described in the first embodiments.

0052Thus, according to the second embodiments of the present invention, 32 quantization matrix data of 16 bits unit are distributed and stored in two of 3 sub-RAMs in order of the zigzag scanning manner in unit of 8 bits, thus corresponding quantization matrix is read from a memory without data collision, according to the read address based on the scanned manner of DCT coefficients.

0053While this invention has been described in connection with what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiment, but, on the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the appended claims.

Every citation, both ways

Citations
Document	Relation	Office
EP0493136A	Cites	European Patent Office (EPO)
EP0680221A	Cites	European Patent Office (EPO)
US4774574A	Cites	United States of America
US4776030A	Cites	United States of America
US5369439A	Cites	United States of America

14 members in 6 offices; this record represents the family

This recordMember, by publication datePriority claim

Priority claims8

Priority claims
Document	Office	Kind	Date
19960016003	Republic of Korea	A	1996-05-14
19960016004	Republic of Korea	A	1996-05-14
9616003	Republic of Korea	–	1996-05-14
9616004	Republic of Korea	–	1996-05-14
KR19960016003	–	–	–
KR19960016004	–	–	–
9616003	–	–	–
9616004	–	–	–

Members14

Family members, oldest first
Document	Office	Kind
CN1165457A	China	A	1997-11-19
EP0808069A2	European Patent Office (EPO)	A2	1997-11-19
KR970078641A	Republic of Korea	A	1997-12-12
KR970078642A	Republic of Korea	A	1997-12-12
JPH1066080A	Japan	A	1998-03-06
EP0808069A3	European Patent Office (EPO)	A3	1998-05-06
US5881177A	United States of America	A	1999-03-09
KR100210383B1	Republic of Korea	B1	1999-07-15
KR100210384B1	Republic of Korea	B1	1999-07-15
EP0808069B1This record	European Patent Office (EPO)	B1	2003-05-02
DE69721373D1	Germany	D1	2003-06-05
CN1126375C	China	C	2003-10-29
DE69721373T2	Germany	T2	2004-04-15
JP4117044B2	Japan	B2	2008-07-09

34 legal events, as 5 offices reported them to INPADOC

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Point at a mark for the event

Events

Legal events, newest first
	Event	Code	Office
2016-05-31	Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25	PG25	EP
2016-04-29	Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25	PG25	EP
2016-04-29	Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25	PG25	EP
2016-04-29	Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25	PG25	EP
2016-02-26	Notification of lapseLapsedST	ST	FR
2016-02-03	Lapsed because of non-payment of the annual feeLapsedMM	MM	NL
2016-01-27	Gb: european patent ceased through non-payment of renewal feeCeasedGBPC	GBPC	EP
2015-12-01	Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal feeWithdrawnR119	R119	DE
2014-08-29	Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP	PGFP	EP
2014-08-29	Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP	PGFP	EP
2014-08-29	Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP	PGFP	EP
2014-07-31	Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP	PGFP	EP
2014-01-24	Transmission of propertyTP	TP	FR
2013-05-02	Change of applicant/patenteeR081	R081	DE
2013-05-02	Change of representativeR082	R082	DE
2013-05-02	Change of representativeR082	R082	DE
2013-05-01	Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)REGISTERED BETWEEN 20130404 AND 20130410732E	732E	GB
2013-03-13	Change of representativeR082	R082	DE
2004-04-21	No opposition filedOpposition26N	26N	EP
2004-03-05	No opposition filed within time limitOppositionORIGINAL CODE: 0009261PLBE	PLBE	EP
2004-03-05	Information on the status of an ep patent application or granted ep patentGrantedSTATUS: NO OPPOSITION FILED WITHIN TIME LIMITSTAA	STAA	EP
2004-02-27	Fr: translation filedET	ET	EP
2003-06-05	Corresponds to:REF	REF	EP
2003-05-07	European patent grantedGrantedFG4D	FG4D	GB
2003-05-02	Designated contracting statesAK	AK	EP
2003-03-19	Party data changed (applicant data changed or rights of an application transferred)RAP1	RAP1	EP
2003-03-14	(expected) grantORIGINAL CODE: 0009210GRAA	GRAA	EP
2003-03-10	Despatch of communication of intention to grant a patentORIGINAL CODE: EPIDOS IGRAGRAH	GRAH	EP
2002-10-14	Despatch of communication of intention to grant a patentORIGINAL CODE: EPIDOS IGRAGRAH	GRAH	EP
1998-12-23	Request for examination filed17P	17P	EP
1998-05-06	Designated contracting statesAK	AK	EP
1998-03-20	Search report despatchedORIGINAL CODE: 0009013PUAL	PUAL	EP
1997-11-19	Designated contracting statesAK	AK	EP
1997-10-03	Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI	PUAI	EP

A Quantizer for video signal encoding system

Abstract

Term

Priority claims8

Members14

Over the term

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Titles3

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Designated states4