Method and device for correcting synchronisation errors

The present invention relates to the display on a screen of television, for example, auxiliary information such as data Type TELETEXT, VPS (Video Programming System in English) or WSS (Wide Screen Signaling in English), transmitted on lines predefined VBI (Vertical Blanking Interval in English).

The invention particularly relates to a method and device error correction timing recovery operations sequences of ancillary data transmitted on the invisible lines of VBI of a video signal having a vertical synchronizing signal Vsync and Hsync a horizontal synchronizing signal. said signals Hsync and Vsync are used to synchronize the opening of windows time of recovery of the data.

The Vsync signal comprises a periodic succession of slots v each having a duration equal to the duration of a video frame while the Hsync signal comprises a periodic sequence of pulses of duration 4 h approximately microseconds.

It is well known in the field of communications TV programs using predefined lines for VBI transmitting data representing either of TELETEXT data type (Information of all kinds such as weather or news, or further information about the scholarship), or VPS type enabling timing for the start of recording of a program on a VCR or the time of automatic channel change, or even the type Closed caption (caption accompanying programs the attention of the hearing impaired).

The circuits used to extract this information from the video signal must be able to accurately detect the lines of VBI containing the auxiliary data and the time of occurrence said data on each line of the VBI detected. A known solution in the prior art is to use a line counter which is reset to zero at the beginning of each video frame and whose counting is synchronized with the beginning of each video line. A suitable decoder is used for generating time windows for recovering ancillary data. Generally, the instant of opening of a window is delayed from the start of a video line so prevent sinusoidal signals present on each line, such as for example signal synchronizer color (color burst in English) are recovered.

The recovery of the auxiliary data signal therefore requires vertical synchronizing for determining the line of the VBI to explore and a horizontal synchronizing signal for opening to the predetermined appropriate time, time windows recovery auxiliary data on the scanned line. Manner known per se, said synchronization signals are generally obtained from the line synchronizing signal and the synchronizing signal frame transmitted with the video signal. Obtaining the synchronization signal vertical Vsync is performed easily by a technical integration known digital, while the horizontal synchronizing signal Hsync is obtained, so as also known, the threshold detector means for example and therefore its quality is closely related to the signal quality transmitted video. Indeed, if the transmitted video signal is of poor quality, the synchronization signals may suffer damage which render their random detection. This can cause synchronization errors sequences recovery of auxiliary data. these errors may consist of either a lack of synchronization pulse horizontal or in a presence of one or more pulses Additional erroneous.

The object of the invention is to detect synchronization errors may cause the loss of auxiliary information and correct said errors quickly and automatically. The invention is protected defined in the appended claims 1 to 12.

According to the method of the invention, in the absence of a pulse horizontal synchronization after a period equal to H + .DELTA.h, where H is the period of the signal Hsync and .DELTA.h is a first predetermined time period, a ha artificial synchronization pulse is generated.

Thus, the auxiliary data recovery operation is less sensitive to any disturbance likely to deteriorate quality of the transmitted signal.

According to a first feature of the method of the invention, when detecting a horizontal synchronizing pulse h, generating a masking any signal liable signal to be detected during a length M equal H-ΔH1, ΔH1 which is a second predetermined time.

Thus, the effects of additional pulses may cause a timing error is systematically inhibited.

According to an essential characteristic of the process of the invention, in If artificial time synchronization is shifted now opening of the recovery window auxiliary data so to match said time with the beginning of the data sequence Auxiliary to recover.

This shift involves opening the time windows after of a duration of at least three times the time .DELTA.h microseconds. Good Naturally, this period may be chosen programmatically based the synchronization delay introduced by the absence of a pulse h.

The method according to the invention is implemented by means of a device comprising a threshold detector receiving a CVBS signal (Composite Video Baseband Signal English) and delivers a signal Csync composite sync to a digital computing unit for extracting the vertical synchronization Vsync signals and horizontal HSYNC said composite signal Csync.

According to the invention, the digital calculation unit further comprises, multiplexing means for selecting from at least two Nothing different, an opening time of a time window recovery of auxiliary data contained in a scanned line.

Other characteristics and advantages of the invention will emerge the description which follows, given by way of non limiting example, with reference to the appended figures in which:<ul><li>FIG 1 and FIG 2 show timing illustrating the extraction of a horizontal synchronizing signal Hsync from a composite signal Csync of the invention.</li><li>3 shows a timing diagram illustrating partially extracting a vertical synchronizing signal Vsync from the signal Csync composite of the invention.</li><li>4 shows block diagram of a device of auxiliary data recovery according to the invention.</li><li>5 schematically represents an embodiment preferred the device of Figure 4.</li><li>6 shows examples of temporal windows auxiliary data recovery obtained by the method according the invention.</li></ul>

Figure 1 shows a timing diagram illustrating partially a first step of a method for correcting errors synchronization auxiliary data recovery operations transmitted on invisible lines of the VBI of a video signal carrying an image to be displayed on a screen. This video signal comprises Vsync a signal comprises a periodic succession of slots vertical synchronizing signal Hsync and v formed by a succession periodic pulses of horizontal synchronizing h. said signals Hsync and Vsync are used to synchronize circuits performing the opening of time windows for recovery of said data auxiliary present on a scanned line.

As can be seen in Figure 1, the Hsync signal has a H period equal to the duration of a video line. The pulse h2, represented by dotted illustrates an undetected pulse. In this case, after a period equal to H + .DELTA.h, an artificial synchronization pulse ha is generated, where .DELTA.h is a first predetermined time period. In addition, once the detecting a horizontal synchronizing pulse h, generating a masking any signal liable signal to be detected during a length M equal H-ΔH1, ΔH1 which is a second predetermined time.

According to a preferred embodiment of the inventive method, the time .DELTA.h equals 4 microseconds and ΔH1 is equal to .DELTA.h / 2.

According to an essential characteristic of the process of the invention, in case of generation of an artificial synchronization pulse ha is shifts the opening moment of the data recovery window auxiliary so as to coincide said opening timing with the start of the auxiliary data sequence to recover.

Note that this step occurs in the case where a pulse timing h is absent, as illustrated by Figure 1, and where said h pulse is detected with a time delay.

As can be seen in Figure 1, the generation of h pulse is synchronized to the falling edge of the composite signal Csync. Thus, upon the occurrence of a falling edge of the signal Csync, a h1 pulse and a first SM1 masking slots are generated. In case of generation of an artificial synchronization pulse is reduced M SM1 duration of niche masking to avoid obscuring the correct horizontal synchronization pulse of the pulse h3 following missing horizontal sync. In the case illustrated by Figure 1, wherein said next pulse h2 is not detected, and where a pulse Artificial ha is generated, a second masking niche SM2 is generated synchronously with the rising edge of the artificial pulse ha. The duration of said SM2 slots is smaller than the first slot SM1 so as not to mask the following pulse h3.

In another step of the inventive process, we define a quality criterion of VBI lines pursuant to which the data auxiliary present on a given line of the VBI will be recovered or abandoned. According to said quality criterion, if more detection a h pulse during the masking period M, and if not h pulse detection during the period H + .DELTA.h, a pulse is generated BTL indicating an erroneous line. The number of pulses is BTL then sent to an acquisition unit, not represented, to count the number of detected incorrect lines. Note, however, that BTL pulse is generated at each detection of a pulse of half-line synchronization, although the line is not explored wrong as shown in Figure 2. The number of pulses thus BTL generated depends on the television standard used. The example of Figure 2 corresponds to the PAL standard in which the composite signal synchronization comprises nine half-line synchronization pulses I1, 12, I3, I4, I5, I6, I7, I8 and I9 for the odd field and nine pulses synchronization of half-lines P1, P2, P3, P4, P5, P6, P7, P8 and P9 for the even field. In effect, the pulses I3, I5, I7 and I9 are generated during the period of masking and thus produce pulses respectively BTL3, BTL5, BTL7 and BTL9. Similarly, the pulses P2, P4, P6 and P8 is also generated during the masking period and produce respectively B2 pulse, B4, B6 and B8. The appearance of the said Pulse BTL3, BTL5, BTL7 and BTL9 well as BTL2 pulses BTL4, BTL6 BTL8 and does not correspond to the detection of errors in sense of quality test in the process of the invention. By Therefore the number of said pulses is deducted by the unit acquisition, the total number of errors that is provided.

Note that the detection of a half-line during the VBI causes the loss of a HSYNC pulse and therefore a shift a line in the current frame. In this case, resynchronization correct automatically found after a number of video online which depends on the time .DELTA.h. By choosing .DELTA.h 4μs equal to the resynchronization is achieved after a period of eight video lines.

The method according to the invention is implemented by means of a device comprising a threshold detector 2 which receives a CVBS signal and delivers a Composite Sync Csync to a digital unit Calculation 4 for extracting the vertical synchronization signals Vsync and horizontal Hsync said composite signal Csync. said device further comprises a module 6 for detecting the VBI lines comprising auxiliary data. According to an essential characteristic of the device of the invention, said digital calculation unit 4 comprises further a 7 multiplexing means for selecting from at least two different times, an opening timing of a time slot recovery of auxiliary data contained in a scanned line.

The selected time is previously determined using the Module 6 line selection. The latter comprises a first counter 8 for pointing the line of VBI to explore, and a second counter 9 for determining the instant of opening of a time window in the dotted line. Said second counter 9 receives clock pulses a frequency dependent on the desired or required resolution and determines, by counting said clock pulse, a time after where a window should be opened. This frequency can be 1 MHz for example. The period after which a window is to be opened determined from the beginning of the explored VBI line. At the end of said line counter 8 is incremented by one line and the counter 9 is reset to zero.

As can be seen in Figure 5 showing a mode of preferred embodiment of the device implementing the method of the invention, the digital processing unit 4 has two operating units in parallel, a first block 12 dedicated to the extraction of the signal vertical synchronization Vsync and a second block dedicated to the extraction of the horizontal synchronizing signal Hsync, said first and second blocks are connected to an output S of the threshold detector 2, while the outputs said respective first and second blocks are connected to respectively a first input e1 and e2 to a second input of an AND logic gate bearing the reference 16.

The first block 12 includes a digital integrator having 20 an input connected to the output S of the threshold detector 2 and an output connected to CLR input resetting the first counter 8. The output of said first counter 8 is connected via a row decoder 22, the first e1 input of the logic gate 16.

The second block comprises a separation means 24 of the signal Hsync having an input connected to the output S of the threshold detector 2 and a first output 26 connected to a first input 28 of the means multiplexing 7 while a second output 30 is connected, firstly, to a input 32 of the first counter 8, and secondly, to a input CLR1 resetting the second counter 9. The latter receives pulses periodicals provided by a clock, not shown, and delivers through 7 multiplexing at least two numerical values ​​representing respectively a first time prior to a second instant WIN1 WIN2 opening of the auxiliary data recovery window.

multiplexing means 7 includes a decoder 40 to clean Nothing WIN1 decode and a decoder 42 own decoding the moment WIN2.

In operation, the threshold detector 2 receives the CVBS signal (Composite Video Baseband Signal) and outputs the synchronization signal Csync composite comprising the vertical synchronization signals Vsync and horizontal Hsync. Said Vsync and Hsync signals are then extracted the Csync signal respectively in the first block 12 and in the second block 14. As stated above, the extraction of Signal Vsync is performed, in known manner, by the integrator 20. The digital signal Vsync is then used to synchronize the resetting the first counter 8 line to each end of frame the transmitted image.

And when the first counter 8 detects a line of the VBI, the second counter 9 determines, by counting the clock pulses, the time at which a time window must be open. said instant is transmitted to the multiplexing means 7 which simultaneously receives a signal To command issued by the separation means 24 of the signal Hsync. In If an error due to the absence of pulse h after a period equal to 68 microseconds, the separation means 24 consignment by means of multiplexing July 1 To control signal for advancing the opening timing of the time window by activating a decoder 40. The latter decodes the first WIN1 moment and to take account of delay resulting from no pulse h and its replacement, 4μs later by a pulse ha. The digital value selected by means of multiplexing 7 is then sent to the second input e2 of the door logic 16. The output of the logic gate 16 provides a time window recovery of the auxiliary data that are on the line of the VBI which the number is provided by the line decoder 22 to the first entry e1 of the logic gate 16.

Figure 6 illustrates some examples of uses of the device according to the invention for generating time windows recoveries auxiliary data TXT-SW, VPS and WSS-SW-SW respectively of the type TELETEXT, VPS and WSS.