Information transmitting method and basestation for receiving information

p0001The invention relates to the contactless transmission of information from a passive transponder which does not contain its own energy source, to a base station via a single coil on each side. This coil, both the information and the energy for the operation of the transponder to be transmitted, it being assumed that the transponder contains a non-volatile memory. The transfer of information from the transponder to the base station occurs thereby characterized, that a switchable impedance is in the transponder connected to the coil, which is switched according to the information to be transmitted, and in the base station, the feedback of the connected impedance of the transponder is evaluated in the coil.

p0002A corresponding method is known from DE 32 42 551 C2. Advantageously, the coil is in the transponder part of a resonant circuit which is tuned to the radiated from the base station frequency, so that, inter alia, also takes place best possible energy transmission from the base station to the transponder. Due to the switchable impedance in the transponder enters an amplitude modulation of the signal to the base station, which thereby acts as both a transmitting and as a receiving antenna.

p0003It has now been found that in the base station depending on how well the resonant circuit is tuned in the transponder to the frequency of the base station, and depending on whether the transponder is moved during the information transfer relative to the base station, and depending on other influences in the base station not only occurs pure amplitude modulation of the signal in the antenna coil of the base station, but may additionally include a phase modulation occur and under certain conditions, the amplitude modulation practically disappear or be reversed. In the case of evaluation only of the amplitude modulation of the signal in the antenna coil of the base station thus a reliable transmission of information from the transponder to the base station is not possible under all circumstances.

p0004The object of the invention is to provide a method for transmitting information from a passive, working with load modulation transponder to a base station in which even under unfavorable circumstances reliable possible transmission of information is possible.

p0005This object is achieved by a process in which two different combinations of real and imaginary part of the antenna signal is demodulated separately from the antenna signal of the base station and these shares are digitized separately and is recovered by logically combining the two digitized shares the transmitted information of the transponder. Because under all circumstances either occurs at least an amplitude modulation or a phase modulation in the antenna coil of the base station, it is ensured that in the inventive method under virtually all circumstances a demodulated signal occurs in at least one of the two demodulated components, normally in two portions. By a logic combination of both parts, the transmitted information may then be recovered in practically every case.

p0006From DE 31 46 280 C2 discloses a demodulator for angle and amplitude modulated signals is known, in which also two different combinations of the real and imaginary part of the antenna signal are separately demodulated. Both shares are however squared analog and both squared shares algebraically summed to determine the envelope of the modulated signal or its square.

p0007The logical combination of the two digitized portions of the demodulated antenna signal can be formed in different ways. A particularly reliable and interference-free recovery of the transmitted information is achieved that from the flanks of both digitized demodulated portions of the antenna signal pulses are formed and the relative prior history of an edge of the demodulated signal pulse of a portion locks the following pulse of the other component, which from the non-locked pulse the transmitted information is derived. This avoids that, be wrongly recovered two pulses of a received pulse for a short time difference mutually shifted edges of both signals that may arise, for example, by different intensity of both demodulated shares. It is essential that at each received pulse always occurs first edge is evaluated, ie, that will automatically and dynamically switch between the two units. The evaluation of the flanks of the received demodulated pulses is particularly useful in a bi-phase encoding.

p0008The demodulation of two different combinations of the real and imaginary part of the antenna signal is carried out most simply by two against each other around a portion of an entire carrier oscillation mutually phase shifted carrier signals. Conveniently, the carrier signal itself and a 90 ° phase shifted signal on the other hand is used. In this way largely one hand only real part and the other part only imaginary part of the antenna signal is demodulated.

p0009A base station operating according to the principle of the method according to the invention comprises a carrier signal generator, an antenna coil and coupled thereto demodulator arrangement, and in the transponder antenna coil, coupled thereto controllable impedance and a control arrangement for controlling the impedance is also provided. Here, the demodulator for demodulating two branches of different combinations of real and imaginary parts of the antenna signal, a discriminator for generating a binary signal from the demodulated signal, and a decider for combining the binary signals from the two branches on.

p0010Embodiments of the invention are described with reference to the drawing. Show it:<ul><li>Fig. 1 shows schematically the principle of the contactless transmission of information from a passive transponder to a base station,</li><li>Fig. 2 shows schematically a basic structure of a demodulator with two branches,</li><li>Fig. 3, the production of edges from the demodulator signal and its evaluation in a decision,</li><li>Fig. 4 shows the basic construction of an arbiter with mutual locking of the edges of the two branches of the demodulator,</li><li>Fig. 5 is a detailed circuit diagram of an arbiter according to Fig. 4,</li><li>Fig. 6 is a timing diagram of various signals in the circuit in FIG. 5.</li></ul>

p0011In Fig. 1, a base station 10 and a transponder 20 are illustrated schematically, which are coils 12 and 22 coupled together. In the base station 10, a generator 16 is included for generating a carrier signal, from which a connection to the one end of the coil 12, and a reference terminal via a capacitor 14 to the other end of the coil 12 is connected. The coil 12 and the capacitor 14 form a Reihenreschwingkreis, which is tuned to the frequency of the carrier signal of the generator sixteenth

p0012The connection point between the coil 12 and the capacitor 14 is the same as the reference terminal of the generator 16 to inputs of a demodulator 18 which are evaluated in the changes of current in the series resonant circuit to deliver, at an output 19 the recovered information. Other facilities for processing the signal at the output 19 in the base station 10 are not shown for clarity.

p0013The coil 22 of the transponder 20 is connected in parallel with a capacitor 23, thereby forming a parallel resonant circuit is formed which is matched in the ideal case exactly to the frequency of the generator sixteenth This resonant circuit is connected via a switch 25 having an impedance 24, wherein the switch 25 is controlled by a control arrangement 26th The impedance 24 is suitably a resistor or a diode arrangement. The recovery of electrical energy for powering the control assembly 26 from the resultant at the resonant circuit voltage, when the transponder 20 is coupled to the base station 10, and the demodulation of the information that is transmitted from the base station 10 to the transponder 20, for example, by phase modulation, the not shown for clarity.

p0014Through the coupling of the two coils 12 and 22, the current flowing in the coil 12 and thus via the capacitor 14 current changes when the switch 25 is closed in the transponder 20th This change in the current, which produces a change in voltage on the capacitor 14 can be evaluated in the demodulator 18, so that in this way a the position of the switch 25 in the transponder indicative signal can be obtained at the output of the nineteenth In this way, information from the transponder, which does not contain its own power supply itself, transferred without contact to the base station 10th

p0015In FIG. 2, the basic structure of a demodulator of a demodulator with two branches 30 and 40 and a discriminator 50 is specified. The derived from the antenna coil of the base station signal 30 and 40 of a multiplier circuit 31, 41 supplied via line 13 in each of the branches, which are designed here as a sample and hold circuit. Each of these circuits includes a switch and the switch of circuit 31 is temporarily closed with a sampling pulse which occurs in synchronism with the carrier frequency ω, but is compared with this shifted by a first phase angle φ1. Accordingly, the switch circuit 41 is closed by a periodic sampling pulse which occurs in synchronism also with ω the carrier frequency, however, is shifted by a different phase angle φ2. In the simplest case, φ1 = 0 and φ2 = 90 °, so that is evaluated in the branch 30 of the real part and the imaginary part of the branch 40 of the antenna signal on line thirteenth

p0016Below only the branch 30 is explained in more detail, as the branch is 40 the same structure and operates accordingly. The signal of the circuit 31 is a band pass filter 32 is supplied on the one hand the DC component removed, because the signal generated by the load modulation by the transponder in the antenna coil 12 is superposed on a large, practically constant proportion. In addition, the signal component of the carrier frequency ω is substantially suppressed by the filter 32nd Since the modulation in the transponder is effected such that the position of the switch 25 is changed only by a plurality of carrier oscillations, so that the highest frequency of the modulated useful signal is much lower than the carrier frequency, the filter 32 is relatively easy to manufacture.

p0017The output signal of the filter 32 is supplied to a digitizer 33 is supplied, which is preferably designed as a Schmitt trigger circuit and generates a binary signal on line 35 from the analog signal of the filter 32nd This signal is, ideally, a pulse signal representing the switch position of the switch 25 in the trans ponder 20, albeit with a small, generated by the filter 32 time shift.

p0018Accordingly, the signal of the circuit 41 in the filter 42 is filtered and converted into the circuit 43 into a binary signal on line 45 in the branch 40th Ideally, the signals on lines 35 and 45 are nearly synchronous, but the amplitudes of 32 and 42 output signals from the filters are generally different, so that the Schmitt trigger 33 and 43 turn slightly different. The decider 50 must now be constructed so that from these most time something mutually shifted pulses, of which one of the two also may be absent altogether, a clear pulse signal is generated on line 19, the reliable, the position of the switch 25 and its control reproduces.

p0019A suitable circuit is shown in Fig. 3. The two branches 30 and 40 are extended by some elements that generate a short pulse at each edge of a pulse on the line 35 and 45th These additional elements include in each branch two D flip-flops, which are clocked at the carrier frequency, and an exclusive-OR circuit EXOR, which is coupled to the outputs of both flip-flops. In particular, in the branch 30, the pulse signal is supplied on line 35 to the D input of a D flip-flop 36, whose output is connected to the D-input of a further D flip-flop 37 and to an input of an EXOR 38th The other input of the EXOR 38 is connected to the output of the D flip-flops 37th The flip-flops 36 and 37 are edge-triggered clock, wherein the clock signal the sake of clarity not shown in Fig. 3.

p0020With the first clock signal after the appearance or disappearance of a pulse on line 35, the D flip-flop 36 is switched, so that the EXOR 38 receives two different signals at the inputs and outputs an output signal. With the next after the next clock signal and the D flip-flop 37 is switched, and the EXOR 38 receives two identical input signals, so that no output signal is generated. Similarly, the D flip-flops 46 and 47 and the EXOR 48 Own branch 40. Therefore Stepping lines 39 and 49 only short pulses with a duration of one clock period, which may be, however, played time shifted by one or more clock periods. From the decision maker must be 50 to regain a clear pulse signal.

p0021For that, the arbiter 50 includes an OR gate 51, whose two inputs connected to the lines 39 and 49 and its output connected to the one inputs of two AND gates 53 and 54th The outputs of the AND gates 53 and 54 si nd connected to the S-input and the R input of a RS flip-flop clocked 52nd The other inputs of the AND gates 53 and 54 are connected to an output and an inverting output of a delay circuit 55, whose input is connected to the output of flip-flop 52nd The delay device 55 consists for example of a chain of series-clocked flip-flops.

p0022For the function of the arbiter 50 in Fig. 3 will first be assumed that the flip-flop 52 produces a low signal at the output and thus on the line 19 and that the delay time of the delay circuit 55 is expired, so that the lower input of AND gate a high and to the lower input of aND gate 54, a low signal is supplied. If now the same time a pulse occurs on one of the two lines 39 and 49 or on both, of these 53 is supplied via the OR gate 51 and the AND gate to the S input of flip flop 52, so that with the next signal at the clock input this flip-flop changes state and the line 19 a high signal leads. During the delay time of the delay device 55, however, the output state is maintained so that pulses which are shifted from each other by less than the delay time on the lines 39 and 49 in time, 52 not change the state of the flip flop. Only after the delay time of the delay device 55 to their initial state, so that now the lower input of AND gate 53 is a low signal, and the lower input of AND gate 54 receives a high signal and changes a then occurring pulse on the lines 39 and 49 the flip-flop 52 switches again. The delay time of the delay device 55 is therefore selected to be approximately equal to half the minimum duration of the pulses, with the control device 26 in the transponder triggers the switch 25, said minimum pulse duration is set in numbers of carrier waves.

p0023However, this maximum time shift of pulses on lines 39 and 49 against each other at the same emitted by the transponder pulse can not be reliably maintained under certain conditions. In FIG. 4, a decision is therefore schematically shown in which the time shift of the pulses relative to one another virtually unlimited. For this purpose, each of the lines 39 and 49 on which the signal derived from the flanks of short pulses occur connected to an associated latch circuit 57 or 58 which are also coupled to one another. These latch circuits 57 and 58 are constructed such that a pulse 39 or 49 occurs first on one of the two lines, suppresses the subsequent pulse on the other line. Only the non-suppressed pulse appears at the output of respective latch circuit and an arrangement 59 is supplied with a memory member which its signal state changes each time the incoming pulse. Characterized the demodulated received pulses is also generated only a pulse edge on the output line 19 for each pulse edge.

p0024An example of a pair of such latches which lock each other is shown in Fig. 5. Therein, the elements 61 to 65, the latch circuit 57 in Fig. 4 and the elements 71 to 75, the latch circuit 58 in Fig. 4. Both latch circuits are therefore among themselves the same structure. These include an AND gate 61 and 71, of which an input is connected to the line 39 or 49 and of which a second input receives a disabling signal, as will be explained below. then appear at the output of gates 61 and 71 to the non-occluded pulses which are supplied via an OR gate 81 to a T-input of a clocked flip-flop T 82nd then enter the output of this flip-flop 82 and thus on the line 19 to the recovered received pulses. The elements 81 and 82 together realize the block 59 in Fig. 4.

p0025The output of AND gate 61 is further connected to an input of an AND gate 62, whose other input is connected through an inverter 73 to the line 49 for the pulses of the other Demodulatorzweiges. The output of the AND gate 62 is connected to an S input of a clocked RS flipflop 64th

p0026Further, an AND gate 65 is present, one input of which is directly connected to line 49 and another input via an inverter 63 to the line 39th The output of the AND gate 65 is connected via an OR gate 66 having an R-input of the RS flip-flop 64th

p0027In a corresponding manner the output of the AND gate 71 is further connected to an input of an AND gate 72, whose other input connected to the output of the inverter 63 and whose output is connected to an S input of an RS flip-flop 74th The one input of an AND gate 75 is directly connected to the line 39 and the other input of this AND gate 75 is connected to the output of inverter 73, and the output of this AND gate 75 via an OR gate 76 to the R input of flip-flop 74. the output 67 of flip-flop 64 provides the inhibit signal for the lower latch circuit and is connected to the one input of the aND gate 71, and accordingly provides the output 77 of flip-flop 74, the blocking signal for the upper latch circuit and is connected an input of the AND gate 61 is connected. The outputs 67 and 77 are further connected to the two inputs of a NOR gate 83, which leads to further inputs of the OR gates 66 and 76 to prevent both outputs 67 and 77 result in a low potential, because this signal state both latch circuits would otherwise be blocked.

p0028The function of in Fig. 5 circuit shown will be explained in more detail with reference to the time chart in Fig. 6, and that for different cases the time shift of the pulses on lines 39 and 49 and also for the case that one of the pulses fails completely , The numbers on the individual waveforms pass the items to, these signals appear at the output, or the outputs themselves.

p0029At the top in Fig. 6, the demodulated pulses are shown which occur on lines 35 and 45 in FIG. 2 or FIG. 3. Among the pulses are shown, which are derived from three in the left part of the circuit in Fig. And appear on the lines 39 and 49. Each of these pulses begins with the first clock signal edge that occurs on line 35 or 45 to the corresponding pulse edge, and takes exactly one clock cycle, as can be seen from the circuit in Fig. 3 and its previous description.

p0030At the time t1, at which the first illustrated pulse on line 39 occurs, both flip-flops 64 and 74 in the reset state, so that both outputs 67 and 77 have a high potential. In order for this first pulse appears at the output of the AND gate 61 and also at the output of the AND gate 62 since the signal on line 49 is low, and via inverter 73, the AND gate 62 releases. This lies at the S-input of the flipflop 64, a high potential, and with the next clock signal on the flip-flop 64 to, so that the output 67 will be low. Furthermore, the first pulse on line 39 at the output of the AND gate 75 appears as the line 49 at this time is low and the AND gate 75 releases, and reaches, via an OR gate 76 to the R input of a RS flip-flop 74. Since this flip-flop, however, was assumed to be reset, does not change with the next clock signal of the state of this flip-flop.

p0031The low signal at the output 67, the AND gate 71 is blocked so that at the output of the subsequently occurring on line 49 pulse is not transmitted. However, this pulse appears at the output of the AND gate 65, since now the signal on line 39 is low again and via the inverter 63, the AND gate releases 65th This lies at the R input of flip flop 64 is now a high signal, and with the next clock signal of this flip-flop is switched over again, so that at the output 67 again a high signal will appear.

p0032In this manner, the first occurring pulse has been transmitted, during the then following pulse is blocked, and the outputs 67 and 77 have again their original signal state, so that subsequently the first occurring pulse can be transmitted again.

p0033At time t2 occur in this example, on the lines 39 and 49 at the same time depending on a pulse. Both pulses are now transmitted by the AND gates 61 and 71, however, the AND gate are now 62 and 72 as well as the AND gates 65 and 75 locked via inverters 63 and 73 so that the flip-flops 64 and 74 now not change state. However, the fact that 61 and 71 pulses are transmitted simultaneously from the AND gates, is not disturbing since these pulses are combined by the OR gate 81 and appear at the output as a pulse, as shown below in FIG. 6 is , Since this pulse is supplied to the T input of flip flop 82, this switches to the next following clock signal so that a waveform appears on line 19, as is shown in Fig. 6 below.

p0034At time t3, first a pulse which is transmitted from the AND gate 71 and also even from the AND gate 72 appears on line 49, as is on the line 39 at this moment, a low signal through the inverter 63, the AND gate 72 releases. Thus is located at the S input of flip flop 74 is a high signal, and with the next clock signal switches to this flip-flop, so that the output 77 will be low and the AND gate 61 is blocked. The pulse also appears at the output of the AND gate 65 and hence the R input of flip-flop 64, but since this is still in the reset state, this state does not change after the next clock signal. Locking of the AND gate 61 of the next following pulse on line 39 can not appear at the output. However, this pulse appears at the output of the AND gate 75, since this is released via the inverter 73, so that at the R input of flip flop 74 a high signal is located, and the flip-flop switches, so that the signal at the output 77 again goes high.

p0035At the time t4 reenters pulse on line 49 which is passed by the AND gate 71 and also of the AND gate 72 so that the flip-flop 74 switches again and the output 77 is low again. The from the AND gate 65 is also transmitted pulse changes as in the previous case, the state of the Flipflos 64 is not, as it is still in the reset state.

p0036It is now assumed in this example that initially no pulse appears on line 39, because the signal on line 35 remains constant. This can happen if the modulation of the transponder effect by unfavorable conditions only in the real part or the imaginary part of the antenna signal. now by the lack of pulse on line 39 also is no pulse at the output of the AND gate 65 appears, and the flip-flop 74 remains in the set state, the signal at the output 77 is low.

p0037At the time t5 occurs on line 49 a pulse on again, which is transmitted from the AND gate 71 and also from the AND gate 72, however, whereby the state of flip-flop 74 is not influenced because it is still in the set condition. After an error occurring on the line 39 pulse is again assumed, which is not passed by the AND gate 61, however, occurs at the output of the AND gate 75th This flip-flop 74 is switched back to the next clock signal, and the output 77 goes back to a high signal. This is the same state as before time t1 is restored again, ie the next following after time t5 pulse on one of the two lines 39 or 49 is again transmitted in accordance with the explanations at times t1 to t3.

p0038Each transmitted pulse appears at the output of the OR gate 81 and thus at the T input of flip flop 82, so that at the output 19 of the data transmitted by the transponder signals are recovered, even if in one of the two branches of the demodulator no signal or no pulse edge is demodulated.