Device for in-process monitoring of transmission systems
9 claims: 1 independent, 8 dependent
- 1Einrichtung zur Fehlerortung und/oder In-Betrieb-Überwachung für Nachrichtenübertragungseinrichtungen, die wenigstens eine Übertragungsstrecke (4) mit zwei Leitungsendgeräten (1) enthalten, zwischen denen gegebenenfalls ein oder mehrere Zwischenstellen (2) vorgesehen sein können, mit einer Überwachungseinheit (7, 8), die mit Prozessoreinheiten (6), die überwachten Endstellen und/oder zwischenstellen zugeordnet sind, über wenigstens einen Telemetriekanal Informationen austauscht, dadurch gekennzeichnet, daß die Prozessoreinheiten (6) mit Adressen versehen sind und daß die Überwachungseinheit (7, 8) eine Vorrichtung zum Aussenden von Adressen enthaltenden Abfragetelegrammen an die Prozessoreinheiten (6) und eine Vorrichtung zum Empfangen eines Antworttelegrammes der jeweils aufgerufenen Prozessoreinheit (6) aufweist und daß die Nachrichtenübertragungseinrichtung an wenigstens einem Ort (A...H) mehrere Prozessoreinheiten (6) enthält, die über einen Datenbus (9;9A...9H) miteinander verbunden sind, der die Telemetriekanäle mehrerer Übertragungsstrecken (4a...4EG) miteinander verbindet.
- 2Einrichtung nach Anspruch 1, dadurch gekennzeichnet, daß der die Prozessoreinheiten (6) verbindende Datenbus ein bidirektionaler Bus (9) für Halbduplexbetrieb ist.
- 3Einrichtung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die Prozessoreinheit (6) wenigstens einen Ein-/Ausgang (K1, K2) zum Anschluß eines Vierdraht-Telemetriekanals und wenigstens einen Ein-/Ausgang (K3, K3a) zum Anschluß des Datenbusses und eine Koppelvorrichtung enthält, die in einem Ruhezustand bei Empfang von Daten am Eingang (E1...E3) eines der Ein-/Ausgänge die empfangenen Daten an die Ausgänge (A1...A3) der anderen Ein-/Ausgänge (K1, K2, K3, K3a) weitergibt.
- 4Einrichtung nach Anspruch 3, dadurch gekennzeichnet, daß bei jedem der Ein-/Ausgänge (K1, K2, K3, K3a) der Prozessoreinheit dem Ausgang ein ODER-Glied oder ein Exklusiv-Oder-Glied (12) vorgeschaltet ist und daß zwei Eingänge des ODER- bzw. Exklusiv-Oder-Gliedes (12) mit den Eingängen der beiden anderen Ein-/Ausgänge verbunden sind.
- 5Einrichtung nach Anspruch 3, dadurch gekennzeichnet, daß bei jedem der Ein-/Ausgänge (K1, K2, K3) der Prozessoreinheit (6) der Ausgang an einen Datenausgang des Mikroprozessors (35) angeschlossen ist und daß der Mikroprozessor (35) bei Empfang von Daten am Eingang eines der Ein-/Ausgänge (K1...K3) die empfangenen Daten an die Ausgänge (A1, A2, A3) der anderen Ein-/Ausgänge (K1...K3) weitergibt.
- 6Einrichtung nach Anspruch 3, dadurch gekennzeichnet, daß bei jedem der Ein/Ausgänge (K1...K3) der Prozessoreinheit (6) der Ausgang (A1...A3) an einen Datenausgang des Mikroprozessors (35) angeschlossen ist und daß der Mikroprozessor (35) bei Empfang von Daten an wenigstens zwei Eingängen (E1...E3) der Ein-/Ausgänge (K1...K3) die empfangenen Daten nicht an die Ausgänge (A1...A3) der anderen Ein-/Ausgänge (K1...K3) weitergibt.
- 7Einrichtung nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, daß bei der Prozessoreinheit (35) jedem der Ausgänge (A1...A3) ein Umschalter (13, 31 36) vorgeschaltet ist, der wahlweise die Koppelvorrichtung oder einen Datenausgang des Mikroprozessors (35) mit dem betreffenden Ausgang (A1...A3) verbindet.
- 8Einrichtung nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, daß wenigstens die mit dem Datenbus (9;9A...9H) verbundenen Prozessoreinheiten (6) jeweils eine Sende-Empfangseinheit (11) enthalten, und daß die Sende-Empfangseinheiten (11) durch den Mikroprozessor (35) der jeweiligen Prozessoreinheit (6) derart steuerbar sind, daß im Ruhezustand alle Sender der Sende-Empfangseinheiten (11) an ihrem Ausgang hochohmig sind und beim Aussenden von Daten vorgegebene Logikpegel abgeben.
- 9Einrichtung nach Anspruch 8, dadurch gekennzeichnet, daß die Sende-Empfangseinheit (11) durch eine Vorrichtung (14a) zur Flankenerkennung derart steuerbar ist, daß durch die Flanke eines Startbits der an einem der Telemetrieeingänge (E1...E3) ankommenden Daten ein Zeitglied (14b) gestartet wird, das den Sender (D) der Sende-Empfangseinheit (11) für die Dauer von mindestens zwei Zeichen aktiviert und gleichzeitig den Empfänger (R) der Sende-Empfangseinheit (11) sperrt und daß das weitere Halten und Ausschalten vom Mikroprozessor (35) übernommen wird, dem die Daten gleichzeitig zugeführt werden.
Independent claims9
49 paragraphs, as filed
p0001The invention relates to a device for the in-operation monitoring of message transmission devices, as indicated in the preamble of patent claim 1.
p0002Such a device is already known from Ewald Braun and Erhard Steiner: Monitoring and additional service of the digital transmission systems for optical fibers "telcom report 10 (1987) Special" Multiplex- und Leitungeinrichtungen ", pages 109-114.
p0003In the known device for the in-service monitoring of a message transmission device, useful signals are transmitted via an electro-optical transmission path and telemetry signals via an auxiliary channel. The device uses address-free telemetry telegrams so that the processor units provided in the line terminals and intermediate regenerators of a transmission section need not be addressed. However, the method is not readily applicable to message transmission devices having a star or tree structure.
p0004It is therefore an object of the invention to provide a device which makes it possible to monitor branched message transmission devices.
p0005According to the invention, the device for achieving this object is formed in the manner indicated in the characterizing part of patent claim 1. In this case, a structure corresponding to the useful signal network results for the telegram transmission network of the telemetry device. In this way, processor units can be provided in a message transmission network with a star or tree structure in the telegram transmission network of the associated telemetry device, which are called by the monitoring unit in a cyclic sequence, address-controlled.
p0006These measures result in the advantage that a telemetry network of the desired configuration can be created with the aid of similar devices in message transmission devices which form a communication network composed of line sections and in which the line sections each have a telemetry channel.
p0007Advantageous further developments of the invention are apparent from the dependent patent claims.
p0008The inputs / outputs can be four-wire connections or two-wire connections. In particular, a four-wire connection is provided for the telemetry signal channel, and a four-wire connection and / or a two-wire connection is provided for the data bus.
p0009In the further development of the device according to claim 5, the microprocessor can emit monitoring data from the relevant operating station or selectively transmit data in a secure mode or in a memory mode, the data transmission taking place via the relevant changeover device instead of via the OR or exclusive-OR elements.
p0010The invention is explained in more detail with reference to the exemplary embodiments shown in the figures.
p0011The figures show devices for the in-operation monitoring of message transmission devices, namely<dl id="dl0001"><dt>FIG</dt><dd>With a digital signal base line section,</dd><dt>FIG</dt><dd>Having a line network consisting of three digital signal base line sections,</dd><dt>FIG</dt><dd>With a star network containing several parallel lines,</dd><dt>FIG</dt><dd>With a branched star network</dd><dt>FIG</dt><dd>a processor unit</dd></dl>
p0012Line transceivers, intermediate regenerators and optical fibers are the basic elements of the digital signal transmission path shown in FIG. 1, their functional capability and transmission characteristics with the aid of devices of an in-operation monitoring system consisting of the locating module 7, the personal computer 8 and the in-service monitoring Processor units are hereinafter referred to as processor units 6.
p0013The location module can be dispensed with if the processor units 6 are designed such that they can be switched as master or slave. A processor unit 6 must then be switched as a master and the tasks of the location module must be accepted and the remaining processor units must be switched as slaves.
p0014The smallest unit of a digital signal transmission path is a digital signal base line section 4, hereinafter referred to as line section 4. In the transmission device according to FIG. 1, the line section consists of two line terminals 1 and one or more intermediate regenerators 2, which are inserted into the line if required.
p0015A processor unit 6, which receives the monitoring data from the main system to be monitored via an internal bus, is used in each line terminal 1 and in each intermediate regenerator 2.
p0016Depending on the requirements, the location area can consist of the following structures:<ul><li>A line which, according to FIG. 2, consists of one or more cascade-connected line section 4,</li><li>Corresponding to FIG. 3, a net with parallel lines,</li><li>According to FIG. 4, a star network provided with branches.</li></ul>
p0017Each process unit 6 is controlled by a microprocessor and is constructed according to FIG. 5. It has a connection K2 in the line terminal 1 and, in the intermediate regenerator 2, two connections K1 and K2, one for both directions, for the coupling in and out of the auxiliary channel superimposed on the useful signal. In addition, a connection K3 or K3a is provided for a network node.
p0018Depending on the application, the connection K3a is used with two unidirectional or the connection K3 with a bidirectional interface.
p0019The data of the processor units 6 are decoupled within a line section 4 via the connections K1, K2 and are transmitted in an auxiliary channel, which is preferably superimposed on the useful signal.
p0020Within a line, the data of the processor units 6 from line terminal 1 to line terminal 1 are coupled into the auxiliary channel via the four-wire connections K 1, K 2 and, if necessary, transmitted from one line section 4a to the next line section 4b via the connections K3 and K3a.
p0021In the arrangement shown in FIG. 2, the line sections 4a... 4c are connected in a chain. The locating module is connected to the processor unit 6 of the line terminal 1 in one of the two end points of the chain circuit. A personal computer 8 is connected to this location module 7. Further personal computers 8 are connected directly to the processor unit 6 of the first line terminal 1 and to two of the intermediate regenerators 2n.
p0022Within the line sections 4a... 4c, useful signals are transmitted from line terminal 1 to line terminal 1. The data of the processor units 6 are respectively connected to the RS 485 interface via an ISM bus (in-service monitoring bus) 9 within the line sections 4a... 4c via an auxiliary channel and between the line sections 4a.. K3 of the processor unit 6).
p0023All the processor units 6 additionally have a connection 90, in particular with the interface RS 232 C, to which a personal computer 8 can be connected. This possibility is used in a line terminal and two intermediate regenerators.
p0024FIG. 3 shows two of a plurality of lines terminating at the network node N (branch).
p0025At the network node N, the processor units of the line terminals 1 and the location module 7 are connected to one another via the ISM bus 9.
p0026According to FIG. 4, the locations A to G are connected to one another via a branched star network. Between the locations A and B are a line section 4AB without an intermediate regenerator, two line sections 4BC1, 4BC2 with an intermediate regenerator 2 between the location B and the location D, and between the locations D and F and D between the locations B and C And G is provided with a line section 4 DF and 4 GE, respectively. In addition, the location E is connected to the intermediate regenerator 2 of the line section 4BC2 via a line section 4E.
p0027At locations A and C, a personal computer 8 is connected to the processor unit of the line terminal 1. The personal computer 8 can optionally be connected to the ISM bus 9 with the RS 485 interface or to an additional connection of the processor unit with the RS 232 C interface. Connected to the ISM bus 9 at location D is, in addition to the line terminals 1 of the line sections terminating there, the location module 7, which is provided with a device for polling control. The location module 7 additionally has a terminal 70 for the connection of a signal collecting device, via which the monitoring data of the star network can be retrieved from the location module 7 by the signal collecting device.
p0028In the case of a branch, the data of the processor unit 6 are transmitted between the line terminals 1 via the connections K3 and K4, respectively, and via the network nodes.
p0029In the networks according to FIGS. 1 to 4, a device for sequence control, in particular a locating module 7 and / or a personal computer 8, is connected to one of the network nodes or at one of the processor units. The locating module 7 or a personal computer 8 calls the individual processor units 6 one after the other by means of a call telegram with their addresses, receives their monitoring data by means of a response telegram and evaluates this.
p0030As can be seen from the figures, a locating region can consist of a plurality of digital signal base line sections. The terminal K3 of the processor unit is provided for transferring the in-operation monitoring data from a digital signal signal line section to the next digital signal signal line section of a line network or to further digital signal signal line sections connected to a network node. This connector can consist of two unidirectional interfaces, a data input and a data output. In this case, the data of all the outputs are expediently fed into all the inputs at the branch points via known four-wire forks. On the other hand, for example, a coupler can be used for this purpose, as is known from DE-PS No. 20 48 140.
p0031With less effort, the distribution of the data in the network nodes can be performed via a bidirectional bus. However, to avoid data collisions, only one driver can be active on one bus at a time. When a bi-directional bus is used, the following sequence is therefore provided for switching on and turning on a bus driver: When idle, all drivers are inactive and have a high-impedance output. When data arrives at a terminal K1, K2, a timer is started by the edge of the start bit, which activates the driver for at least two characters. The microcomputer to which the data has been fed in parallel takes over the further holding and switching off. Only when a transmission error occurs - detected by parity or checksum violation or violation of a cyclic redundancy check or non-coincidence of a length byte - is switched to a mode in which all data are checked before passing and only correct data Be carried forward. This mode can be switched on and off by the remote control module.
p0032The advantage of this method is that the data are rapidly switched through in the case of undisturbed transmission, so that a short interrogation cycle results and, in the case of a disturbed transmission in the auxiliary channel, a location of the error is possible.
p0033The processor unit shown in FIG. 5 has an input E1 and output A1 for connecting a first four-wire data channel for transmitting telegrams, an input E2 and output A2 for connecting a second four-wire data channel, and a third input E3 and output A3 for connecting a third four-wire data signal Data channel.
p0034Each of the three outputs A1, A2 and A3 can be selectively connected to the output of an exclusive-OR element 37, 30 or 12 via a change-over switch 36, 31 or 13, which can be controlled by the microprocessor 35, or to the output of a parallel- Converter 23. This parallel-to-serial converter 23 is connected with its parallel input to the port PO of the microprocessor 35. In this case, the change-over switch 36 is controlled by the two-wire control line St5, the changeover switch 13 via the two-wire control line St3 and the change-over switch 31 via the two-wire control line St6 by the microprocessor 35.
p0035The exclusive-OR gates 12, 30 and 37, which each lead to an output of one of the three four-wire connections and possibly replaced by OR gates, connect the data arriving at the inputs of the two other four-wire connections.
p0036The series-parallel converters 20, 22, 24 and 25 as well as the parallel-series converters 21 and 23 are contained in UART devices or in HDLC devices. The series-parallel and parallel-series converters 20 to 25 are connected to the port PO of the microprocessor 35 via an 8-bit parallel bus and are selected by the chip select module 26 connected to the microprocessor 35. The interrupt module 27, which is likewise connected to the microprocessor 35, interrupts the microprocessor program if necessary.
p0037The coding switch 29 is also connected to the port PO of the microprocessor 35 via the switch 28, with the aid of which the processor unit can be set to an address and to the function of an addressing line terminal.
p0038The microprocessor 35 is also connected to the RAM 32 serving as data memory, the EPROM 33 serving as program memory, the EEPROM 34 serving as a non-volatile data memory, and the self-monitoring module 38.
p0039The output of the exclusive-OR element 12 is fed to the one input of the OR element 15 via the device 14a for edge detection and the device 14b connected in series to this circuit. The other input of the OR gate 15 is connected to the control line St2 coming from the microprocessor 35 together with a control input of the devices 14a and 14b.
p0040Between the four-wire connection pair E3, A3 and the bus connection K3 for the connection of a bidirectional bus is the transceiver module 11. The control input of this transceiver module 11, via which the transmitter D or the receiver R can be selectively activated , Is connected to the output of the OR gate 15.
p0041In normal operation, the telegrams from the data input E1 or E3 are passed directly to the output A2 via the exclusive-OR element 30 and the switch 31. From the input E2 or E3, the telegrams reach the output A1 via the exclusive OR gate 37 and the switch 36.
p0042The exclusive-OR element 12 or 30 or 37 ensures that no data is transmitted when data arrives simultaneously at the inputs E1 and E2 or E1 and E3 or E2 and E3.
p0043Since, in the case of error-free operation, no data may arrive simultaneously at the input E1, E2 and E3, data are only blocked in the event of an error by the exclusive OR gates 12, 37 and 30.
p0044Data arriving at the input E1 or E2 can also reach the transmitter D of the transceiver module 11 via the exclusive-OR element 12 and the switch 13 and from this to the bus terminal K3. For this purpose, the switch 13 must be in the normal position shown, and the transmitter D must be activated. This is the case when the device 14a detects a rising edge and the OR element 15 receives a corresponding control potential via the device 14b and / or via the control line St2.
p0045If, in normal operation, data is routed to the bus connection K3 via the exclusive-OR element 12, this data is also fed into the edge detection device 14a. If the edge recognition device 14a detects the rising edge of the first bit of a telegram, it starts the time circuit 14b. This time circuit outputs an output pulse which is independent of the bit sequence arriving at the input of the edge detection device 14a. The output pulse reaches the transceiver module 11 via the OR element 15 and immediately switches the driver module D and the receive module R off. Data arriving at one of the inputs E1 or E2 of the processor unit are thus immediately forwarded to the bus connection K3 by the detection of a rising edge.
p0046Simultaneously, the data is transferred to the microprocessor 35 for processing. Data arriving at input E1 passes through serial-parallel converter 22 to microprocessor 35, data from input E2 via series-parallel converter 25, and data from input E3 via series-parallel converter 24 to microprocessor 35. The serial-to-parallel converters 22, 24 and 25 receive the data byte byte, and then deliver an interrupt pulse to the microprocessor 35 whenever they have loaded one byte to deliver it to the port PO of the microprocessor 35. If the microprocessor 35 determines that the data meet predetermined requirements, then it activates the control line St2. As a result, the microprocessor 35 switches the driver block D of the interface module 11 via the OR element 15.
p0047If the microprocessor 35 determines, when evaluating a telegram, that predetermined requirements have not been fulfilled, it causes the processor unit to enter a memory mode. In the memory mode, the microprocessor 35 activates two of the three control lines St3, St5 and St6. Two of the three switches 13, 31 and 36 therefore switch so that all the data output by the parallel-to-serial converter 23 reach two of the three outputs A1, A2, K3 from whose direction the telegram was not received.
p0048The data arriving at the input E1 are processed in the series-parallel converter 22, the data arriving at the input E2 in the series-parallel converter 25. The microprocessor 35 thus recognizes the direction from which the data come. Therefore, in the memory mode, the control lines St6 and the control lines St5 are activated in such a way that the output A1 or A2 is not sent via the switch 31 or 36 and the pull-up resistor is set to high potential.
p0049The signal collector 18 is connected to the microprocessor 35 via the interface module 19 and the series-parallel converter 20 and the parallel-to-serial converter 21. The signal collector 18 supplies the monitoring data of the supervised intermediate point and, if appropriate, receives the control information contained in the calling telegram for transmission to a signal collecting device (not shown). The monitoring data of the supervised intermediate point are sent by the processor 35 via the parallel-to-serial converter 23, via the change-over switches 13, 31, 36 and via the outputs A1, A2, A3 in all three directions K1, K2 and K3. If several connections K3 are connected to one network node via a bidirectional bus at a network node, the following procedure results for the switching on and off of a bus driver: When idle, all drivers are inactive and have a high-impedance output. When data arrives at the terminal K1 or K2, the timing of the start bit initiates the timer 14b which activates the driver for at least two characters. Further holding and switching off then takes place by the microcomputer 35, to which the data were fed in parallel.
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| Document | Relation | Office |
|---|---|---|
| EP0240833A | Cites | European Patent Office (EPO) |
| DE2444558A | Cites | Germany |
30 members in 7 offices
Priority claims11
| Document | Office | Kind | Date |
|---|---|---|---|
| 3806947 | Germany | A | |
| 3806947 | Germany | A | |
| 3806947 | Germany | – | |
| 3806948 | Germany | A | |
| 3806948 | Germany | A | |
| 3806948 | Germany | – | |
| 3806947 | – | – | – |
| 3806948 | – | – | – |
| 89DE8900116 | – | – | – |
| DE19883806947 | – | – | – |
| DE19883806948 | – | – | – |
Members30
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| WO8908354A1 | World Intellectual Property Organization (WIPO) | A1 | |
| WO8908358A1 | World Intellectual Property Organization (WIPO) | A1 | |
| WO8908359A1 | World Intellectual Property Organization (WIPO) | A1 | |
| DE3806947A1 | Germany | A1 | |
| DE3806948A1 | Germany | A1 | |
| DE3806949A1 | Germany | A1 | |
| AU3187689A | Australia | A | |
| AU3187789A | Australia | A | |
| AU3190289A | Australia | A | |
| EP0395739A1 | European Patent Office (EPO) | A1 | |
| EP0408580A1 | European Patent Office (EPO) | A1 | |
| EP0408581A1 | European Patent Office (EPO) | A1 | |
| JPH03504662A | Japan | A | |
| JPH03504663A | Japan | A | |
| JPH03504664A | Japan | A | |
| AU623121B2 | Australia | B2 | |
| AU623122B2 | Australia | B2 | |
| AU624363B2 | Australia | B2 | |
| US5166673A | United States of America | A | |
| EP0395739B1 | European Patent Office (EPO) | B1 | |
| EP0408581B1 | European Patent Office (EPO) | B1 | |
| AT92692T | Austria | T | |
| AT93106T | Austria | T | |
| EP0408580B1This record | European Patent Office (EPO) | B1 | |
| DE58905171D1 | Germany | D1 | |
| AT93352T | Austria | T | |
| DE58905284D1 | Germany | D1 | |
| DE58905331D1 | Germany | D1 | |
| US5262771A | United States of America | A | |
| US5274367A | United States of America | A |
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|---|---|---|---|
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| Gb: patent revoked under art. 102 of the ep convention designating the uk as contracting stateRevoked941216GBPR | GBPR | EP | |
| Name/firm changedPHILIPS ELECTRONICS N.V.PFA | PFA | CH | |
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Numbers
- Publication
- 0408580
- Publication, DOCDB
- 0408580
- Publication, EPODOC
- EP0408580
- Application
- 89902743
- Application, DOCDB
- 89902743
- Application, EPODOC
- EP19890902743
Titles3
- German
- EINRICHTUNG ZUR IN-BETRIEB-ÜBERWACHUNG VON NACHRICHTENÜBERTRAGUNGSEINRICHTUNGEN
- English
- DEVICE FOR IN-PROCESS MONITORING OF TRANSMISSION SYSTEMS
- French
- DISPOSITIF POUR CONTROLE EN SERVICE DE SYSTEMES DE TRANSMISSION DE MESSAGES
Classification
- CPC, 2
- H04B3/46
- H04B17/406
- IPC, 3
- H04Q9 00
- H04B3 46
- H04B17 40
Designated states1
- Contracting states, 1
- Netherlands (Kingdom of the)
