Signal reading circuit for masked and overlapping linear image sensors.
6 claims: 6 independent, 0 dependent
- 1An image reading circuit comprising:a linear image sensor unit (10) having a plurality of linear image sensors (11-15) arranged in an overlapping manner along a main scanning direction of said image reading circuit, each linear image sensor (11,12,13,14,15) having a plurality of photoelements arranged along said main scanning direction and an opaque metalization mask (11M-15M) covering at least one photoelement at a first end of the linear image sensor;an A/D conversion unit (40) having a plurality of A/D converters (41-55) for digitizing the output signals of said linear image sensors (11-15);and a line memory (50 or 60) having a plurality of memory elements (51-55 or 61-65) each receiving output signals of a corresponding A/D converter (41-45) and consisting of a number of sequentially arranged storage elements, which number is at least equal to the number of photoelements of the corresponding linear image sensor (11-15) that are not covered by said opaque metalization mask, characterized in that a control unit (70) provides control signals to said A/D conversion unit (40) and to said line memory (50 or 60) for causing the output signals of the A/D converters to be written sequentially and in parallel into the storage elements of the corresponding memory elements, whereby the output signals corresponding to the masked portions of the sensor elements are written into the memory elements first, beginning with storage elements located in an intermediate portion of the memory elements and continuing with storage elements located in a direction towards second ends of the memory elements and whereby output signals of the A/D converter corresponding to unmasked portions of the sensor elements are then written in succession into the memory elements starting with storage elements located at first ends of the memory elements and continuing towards the second ends, thereby overwriting the stored output signals of the masked portions. Bildleseschaltkreis mit: einer linearen Bildsensoreinheit (10) mit einer Vielzahl von linearen Bildsensoren (11-15), die in überlappender Weise entlang einer Hauptabtastrichtung des Bildleseschaltkreises angeordnet sind, wobei jeder lineare Bildsensor (11, 12, 13, 14, 15) eine Vielzahl von Photoelementen aufweist, die entlang der Hauptabtastrichtung angeordnet sind und eine metallisierte undurchsichtige Maske (11M-15M) aufweist, welche mindest ein Photoelement an einem ersten Ende des linearen Bildsensors überdeckt;einer A/D-Wandlereinheit (40), die eine Vielzahl von A/D-Wandlern (41-55) aufweist zum Digitalisieren der Ausgangssignale der linearen Bildsensoren (11-15);und einem Zeilenspeicher (50 oder 60), der eine Vielzahl von Speicherelementen (51-55 oder 61-65) aufweist, von denen jedes Ausgangssignale eines damit korrespondierenden A/D-Wandlers (41-45) empfängt und aus einer Anzahl von sequentiell angeordneten Speicherplatzelementen besteht, wobei diese Anzahl zumindest gleich der Anzahl der Photoelemente des korrespondierenden linearen Bildsensors (11-15) ist, welche nicht von der metallisierten undurchsichtigen Maske bedeckt sind, dadurch gekennzeichnet, daß eine Steuereinheit (70) an die A/D-Wandlereinheit (40) und an den Zeilenspeicher (50 oder 60) Steuersignale zur Verfügung stellt, um zu bewirken, daß die Ausgangssignale der A/D-Wandler sequentiell und in paralleler Weise in die Speicherplatzelemente der korrespondierenden Speicherelemente gbeschrieben werden, wobei die Ausgangssignale, die mit den maskierten Abschnitten der Sensorelemente korrespondieren, zuerst in die Speicherelemente geschrieben werden, wobei mit den Speicherplatzelementen begonnen wird, die sich an einem mittleren Abschnitt der Speicherelemente befinden und mit Speicherplatzelementen fortgefahren wird, die sich in Richtung zu den zweiten Enden der Speicherelemente erstrecken und wobei die Ausgangssignale des A/D-Wandlers, die mit den unmaskierten Abschnitten der Sensorelemente korrespondieren, dann nacheinander in die Speicherelemente geschrieben werden, wobei mit den Speicherplatzelemente begonnen wird, die an ersten Enden der Speicherelemente vorhanden sind und wobei zu den zweiten Enden hin fortgefahren wird, so daß die gespeicherten Ausgangssignale der maskierten Abschnitte überschrieben werden. Circuit de lecture d'images comprenant : un dispositif capteur d'images linéaires (10) ayant une pluralité de capteurs d'images linéaires (11-15) disposés d'une manière chevauchante dans une direction principale de balayage dudit circuit de lecture d'images, chaque capteur d'images linéaires (11, 12, 13, 14, 15) ayant une pluralité de photo-éléments disposés dans ladite direction principale de balayage et un masque opaque de métallisation (11M-15M) couvrant au moins un photo-élément sur une première extrémité du capteur d'images linéaires;une unité de conversion analogique numérique (40) ayant une pluralité de convertisseurs analogiques-numériques (41-55) pour numériser les signaux de sortie desdits capteurs d'images linéaires (11-15);et une mémoire de ligne (50 ou 60) ayant une pluralité d'éléments mémoire (51-55 ou 61-65) recevant chacun des signaux de sortie d'un convertisseur analogique numérique correspondant (41-45) et se composant d'un nombre d'éléments de stockage disposé séquentiellement, lequel nombre est au moins égal au nombre de photo-éléments du capteur d'images linéaires correspondant (11-15) qui ne sont pas couverts par ledit masque opaque de métallisation, Caractérisé en ce que une unité de contrôle (70) fournit des signaux de commande à ladite unité de conversion analogique/numérique (40) et à ladite mémoire de ligne (50 ou 60) pour provoquer séquentiellement l'écriture des signaux de sortie des convertisseurs analogiques numériques et en parallèle dans l'élément de stockage des éléments mémoire correspondants, les signaux de sortie correspondant aux sorties masquées des éléments du capteur sont ainsi écrits dans des premiers éléments mémoire en commençant par l'élément de stockage situé dans une partie intermédiaire des éléments mémoire et en continuant par des éléments de stockage situés en direction des secondes extrémités des éléments mémoire et ainsi on écrit ensuite les signaux de sortie du convertisseur analogique numérique correspondant aux parties non masquées des éléments du capteur, successivement dans les éléments mémoire en commençant par des éléments de stockage situés sur les premières extrémités des éléments mémoire et en continuant en direction des secondes extrémités, écrasant ainsi les signaux de sortie stockés des parties masquées.
- 2An image reading circuit according to claim 1, characterized by means for sequentially reading out said storage elements. Bildleseschaltschreis nach Anspruch 1, gekennzeichnet durch eine Einrichtung zum sequentiellen Auslesen der Speicherplatzelemente. Circuit de lecture d'images selon la revendication 1, caractérisé par un moyen pour extraire séquentiellement lesdits éléments de stockage.
- 3An image reading circuit according to claim 2, characterized in that said sequential reading means reads out said storage element starting with said first end of a memory element. Bildleseschaltkreis nach Anspruch 2, dadurch gekennzeichnet, daß die Einrichtung zum sequentiellen Lesen die Speicherplatzelemente, vom ersten Ende eines Speicherelements beginnend, ausliest. Circuit de lecture d'images selon la revendication 2 caractérisé en ce que ledit dispositif de lecture séquentielle extrait ledit élément de stockage en commençant par ladite première extrémité de l'élément mémoire.
- 4An image reading circuit according to at least one of the preceding claims, characterized in that there are provided two line memories (50,60) and means for causing the reading of the first line memory while the second line memory is written and vice versa. Bildleseschaltkreis nach zumindest einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß zwei Zeilenspeicher (50, 60) vorgesehen sind und eine Einrichtung zum Bewirken des Lesens des ersten Zeilenspeichers während des Beschreibens des zweiten Zeilenspeicher und umgekehrt, vorgesehen ist. Circuit de lecture d'images selon au moins une des revendications précédentes caractérisé en ce qu'il y a deux mémoires de ligne (50,60) et un dispositif pour provoquer la lecture de la première mémoire de ligne alors que l'on écrit la seconde mémoire de ligne et vice versa.
- 5An image reading circuit according to claim 2, 3 or 4, characterized in that said reading means reads said plurality of memory elements in one sequence. Bildleseschaltkreis nach Anspruch 2, 3 oder 4, dadurch gekennzeichnet, daß die Leseeinrichtung in einer Sequenz eine Vielzahl von Speicherelementen erliest. Circuit de lecture d'images selon la revendication 2, 3 ou 4, caractérisé en ce que ledit dispositif de lecture lit ladite pluralité d'éléments mémoire en une séquence.
- 6Method for reading out signals from a plurality of linear image sensors (11-15), said linear sensors being arranged in an overlapping manner along a main scanning direction whereby each linear image sensor comprises a plurality of photoelements and an opaque metalization mask (11M-15M) covering at least one photoelement at a first end of the sensor, said method comprising the steps:A/D converting in parallel the outputs of said linear image sensors whereby each linear image sensor outputs sequentially signals from its photoelements beginning from said first end;writing the analog digital converted signals into a plurality of memory elements (51-55 or 61-65) corresponding to the linear image sensors, each said memory element consisting of a number of sequentially arranged storage elements, which number is at least equal to the number of photoelements of the corresponding linear image sensor (11-15) that are not covered by that opaque metalization mask, characterized in that the output signals corresponding to the masked photoelements are written in the memory elements first, beginning in each memory element with storage elements of an intermediate portion and continuing with storage elements towards a second end, and the output signals corresponding to unmasked photoelements are then written in succession into the memory elements, beginning in each memory element with storage elements located at a first end and continuing towards the second end, thereby overwriting the stored output signals of the masked portions. Procédé pour extraire des signaux d'une pluralité de capteurs d'images linéaires (11-15) lesdits capteurs d'images linéaires étant disposés d'une manière chevauchante dans une direction principale de balayage, chaque capteur d'images linéaire comprend une pluralité de photo-éléments et un masque opaque de métallisation (11M-15M) couvrant au moins un photo-élément sur une première extrémité du capteur, ledit procédé comprenant les étapes de : conversion analogique numérique en parallèle des sorties desdits capteurs d'images linéaires, chaque capteur d'images linéaires fournit séquentiellement des signaux à partir de ces photo-éléments en commençant à partir de ladite première extrémité;écriture des signaux analogiques numériques convertis en une pluralité d'éléments mémoire (51, 55 ou 61, 65) correspondant aux capteurs d'images linéaires, chaque éléments mémoire comprenant un nombre d'éléments de stockage disposés séquentiellement, lequel nombre est au moins égal au nombre de photo-éléments du capteur d'images linéaires correspondant (11-15) qui ne sont pas couverts par ce masque opaque de métallisation, caractérisé en ce que les signaux de sortie correspondant aux photo-éléments masqués sont écrits dans les éléments mémoire, en commençant d'abord par chaque élément mémoire avec des éléments de stockage d'une partie intermédiaire et en continuant avec des éléments de stockage en direction d'une seconde extrémité, et les signaux de sortie correspondant aux photo-éléments non masqués sont ensuite écrits successivement dans les éléments de stockage, en commençant par chaque élément mémoire avec les éléments de stockage situés sur une première extrémité et en continuant en direction de la seconde extrémité, écrasant ainsi les signaux de sortie stockés de la partie masquée. Verfahren zum Auslesen von Signalen von einer Vielzahl von Bildsensoren (11-15), wobei die Bildsensoren in überlappender Weise entlang einer Hauptabtastrichtung angeordnet sind und wobei jeder lineare Bildsensor eine Vielzahl von Photoelementen aufweist und eine metallisierte undurchsichtige Maske (11M-15M) aufweist, welche zumindest ein Photoelement an einem ersten Ende des Sensors bedeckt, wobei das Verfahren die folgenden Schritte aufweist: paralleles A/D-Wandeln der Ausgänge der linearen Bildsensoren, wobei jeder lineare Bildsensor sequentielle Signale von seinen Photoelementen ausgibt, beginnend von einem ersten Ende;Einschreiben der analog-digital gewandelten Signale in eine Vielzahl von Speicherelementen (51-55 oder 61-65), die mit den linearen Bildsensoren korrespondieren, wobei jedes Bildelement aus einer Anzahl von sequentiell angeordneten Speicherplatzelementen besteht, wobei diese Anzahl zumindest gleich der Anzahl der Photoelemente des korrespondierenden linearen Bildsensors, welche nicht von der metallisierten undurchsichtigen Maske bedeckt sind, ist, dadurch gekennzeichnet, daß die Ausgangssignale, die mit den maskierten Photoelementen korrespondieren, in die Speicherelemente zuerst eingeschrieben werden, wobei bei jedem Speicherelement mit den Speicherplatzelementen begonnen wird, die sich an einem mittleren Abschnitt befinden und mit denjenigen Speicherplatzelementen fortgefahren wird, die sich in Richtung eines zweiten Endes befinden, und wobei die Ausgangssignale, die mit den unmaskierten Photoelementen korrespondieren, dann hintereinander in die Speicherelemente eingeschrieben werden, wobei bei jedem Speicherelement mit den Speicherplatzelementen begonnen wird, die an einem ersten Ende angeordnet sind und wobei zu einem zweiten Ende hin fortgefahren wird, so daß die gespeicherten Ausgangssignale der maskierten Abschnitte überschrieben werden.
Independent claims6
17 paragraphs, as filed
The present invention relates to an image reading circuit according to the precharacterizing part of claim 1 and to a method for reading signals from a plurality of linear image sensors according to the precharacterizing part of claim 6.
The width of reading by a linear image sensor, such as a charge coupled device, is usually about 2 to 3 cm. That width of reading is too short for the linear image sensor to read a document of size B5 or A4. For example, as shown in Fig. 3, the reading width 3 of a document 2 is larger than the length of a linear image sensor 1. In order to read the document 2 by the linear image sensor 1, a reduced image of the document 2 is focused on the photoelements of the linear image sensor 1 through a lens unit 4 and then read. For that reason, there is a disadvantage that the optical path length for making the reduced image on the linear image sensor and the size of a reading apparatus are both large.
In order to eliminate the disadvantage, a plurality of linear image sensors 1A-1D, as shown in Fig. 4 are disposed in different reading positions so that the total length of the linear image sensors is equal to the reading width of the document. Since the photoresponse properties of the linear image sensors 1A-1D need to be set equal to each other, an opaque metalization mask 5 is provided on at least the first photoelement of each of the linear image sensors 1A-1D and the levels of the output signals of the opaque metalized light-intercepted portions of the sensors are made equal to each other to equalize the photoresponse properties of the sensors 1A-1D to each other. As a result, each of the linear image sensors 1A-1D sends out a normalizing signal S1, shown in Fig. 5, having a dark reference level for the linear image sensor pixel corresponding to the opaque metalization mask 5, and an effective image signal S2 for the remaining pixels. If the output signals of the linear image sensors 1A-1D are simply synthesized together, the document 2 cannot exactly be read since the masked pixels do not provide effective image signals.
For that reason, a linear image sensor unit 10 is shown by a dot and dash line in Fig. 1 has been developed. In the linear image sensor unit 10, five linear image sensors 11-15 are disposed so that their reading positions are different from each other not only in a main scanning direction but also in sub-scanning direction perpendicular to the principal linear image sensor direction, and opaque metalized portions 11M-15M of the linear image sensors 11-15 are overlapped with the rear portions of the preceding linear image sensors 11-15. The linear image sensor unit 10 sends out, as shown in Fig. 6, a signal S1 having a dark reference level corresponding to one of opaque metalization masks 11M-15M, an effective image signal S2, and a signal S3 corresponding to the overlap of the adjacent linear image sensors. It is a problem how to process the output signals of the linear image sensor unit 10.
From EP-A1-0 019 777 a circuit for electronically abutting parts of an electronic image is known. In this circuit, pixel data of two overlapping image sensors are stored into two associated memory areas whereby a controller assigns the addresses in the first and second memory areas at which the signals from the sensors are stored so that a correctly abutted electronic image can be obtained by successively reading out the contents of the first and second memory areas.
It is the object of the present invention to provide an apparatus and a method for precisely and rapidly processing the output signals of an overlapped masked linear image sensor unit.
This object is solved by the features of claims 1 and 6.
The invention is described in detail below with reference to drawings which illustrate preferred embodiments, in which <ul id="ul0001" list-style="none"><li>Fig. 1 shows a circuit diagram of an embodiment of the present invention,</li><li>Figs. 2(A), 2(B) and 2(C) are drawings for explaining an example of operation of the embodiment,</li><li>Fig. 3 shows a view of an example of reading the document by a linear image sensor,</li><li>Fig. 4 shows an example of a linear image sensor unit consisting of linear image sensors connected in series with each other, and</li><li>Figs. 5 and 6 are drawings for explaining the output of data from linear image sensors.</li></ul>
Fig. 1 shows an embodiment of the present invention. Linear image sensors 11-15, which constitute a linear image sensor unit 10, are driven by drive circuits 21-25. The output signals of the linear image sensors 11-15 are entered into sample-and-hold circuits 31-35. The sampled and held signals are entered into the A/D converters 41-45 of an A/D converter unit 40 so that the signals are converted into digital signals. Since the reading positions of the linear image sensors 11-15 are different from each other in sub-scanning direction (transverse to the linear image sensors 11-15) as well as in a main scanning direction, the unprocessed output signals of the linear image sensors would not be identical with signals generated by reading along a single scanned line. However, in reality, the output signals are delayed in the linear image sensors 11-15 or the sample-and-hold circuits 31-35 so that the output signals are made identical with the signals generated by reading along the single scanned line.
The A/D converted output of the A/D converter unit 40 is written into one of two line memories 50 and 60 switched by a control circuit not shown in the drawings. Serial image signals P1 or P2 are read out of the other of the line memories 60 and 50. The control circuit alternately interchanges the two line memories 50 and 60 for writing and reading so that the line memory 60 serves for reading and serial image signals PS2 are read out of the line memory 60 when the data from the A/D converter unit 40 are written into the line memory 50. Similarly, the line memory 50 serves for reading and the already written data are sent as image signals PS1 out of the line memory 50 when the data from the A/D converter unit 40 are written into the line memory 60. According to the present invention, the output signals of the linear image sensors 11-15 are sampled and held in parallel with each other by the sample-and-hold circuits 31-35. The sample-held values are subjected to A/D conversion by the A/D converters 41-45. The outputs of the A/D converters are written in parallel with each other into the corresponding storage elements of the line memory 50 or 60 so as to be stored as data therein. The image signals PS1 or PS2 are sent in series with each other out of the line memory 60 or 50 to which writing has been already finished.
An image is read by the linear image sensors 11-15, starting with the positions of opaque metalization masks 11M-15M provided at the left-hand (illustrated in the drawings) ends of the linear image sensors 11-15. The digital signals obtained through the sample-and-hole circuits 31-35 and the A/D converters 41-45 are sequentially written into the storage elements 51-55 or 61-65 of the line memory 50 or 60, starting with an intermediate portion of each storage element rearwards and thereafter returning from the rearmost portion of the storage element to its foremost portion. For example, assume that the storage element 51 has a storage capacity for the number of the effective (unmasked and non-overlapped with the following linear image sensor 12) photoelements of the linear image sensor 11 and the storage element 52 has a storage capacity for the number of the effective photoelements of the linear image sensor 12. As shown in Fig. 2(A) data obtained by digitizing the output signals of the linear image sensor 11 are written into the storage element 51 starting with a beginning address of P1 in the middle of the storage element 51, and data obtained by digitizing the output signals of the linear image sensor 12 are written into the storage element 52 starting with a beginning address of P2 in the middle of the storage element 52. For that reason, for the storage element 51, a signal having a dark reference level and corresponding to the opaque metalization mask 11M is written into the storage element 51 at the beginning address P1, and an effective image signal is thereafter written into the storage element 51.
In Fig. 1 is shown an example of the control circuitry required for the invention. A controller 70 provides the necessary control signals. Timing signals are provided on a line 71 to all the elements. A read/write select signal on a line 72 is provided to the two line memories 50 and 60 and affects them in opposite ways. In synchronism with the timing signal, address signals are provided on line 73 to the line memories 50 and 60.
Assume that each linear image sensor 11-15 has a total number N<sub>T</sub> of photoelements of which only a number N<sub>E</sub> are effective because of masking or overlap. Assume also that each of the storage elements 51-55 and 61-65 contain N<sub>E</sub> storage locations. A CCD is a serial read-out device so that N<sub>T</sub> pulses of the timing signal on line 71 will completely read out the linear image sensors 11-15 beginning with the masked element. In synchronism with these N<sub>T</sub> pulses, the address signals on the line 73 to the line memory 50 or 60 which has been write enabled begins at a value P₁ and continues to <maths id="math0001"><math display="inline"><mrow><msub><mrow><mtext>PE₁ = N</mtext></mrow><mrow><mtext>E</mtext></mrow></msub><mtext> - 1</mtext></mrow></math><img file="EP0223260B1_D0001.tif" /></maths> , then changes to 0 and increases to <maths id="math0002"><math display="inline"><mrow><msub><mrow><mtext>PE₁ = N</mtext></mrow><mrow><mtext>E</mtext></mrow></msub><mtext> - 1</mtext></mrow></math><img file="EP0223260B1_D0002.tif" /></maths> by the end of the reading cycle. Although the above description applies only to storage element 51 or 61, its extension to the other storage elements should be apparent.
The line memory 50 or 60, which has been read enabled, sequentially reads out its contents in synchronism with the timing signals as the image signals PS1 or PS2.
In Figs. 2(A), 2(B) and 2(C), single-hatched portions show the writing of the signal S1 having the dark reference level, and double-hatched portions show the writing of the effective image signal S2. After the writing into the rearmost portion PE1 of the storage element 51 is completed, the writing is returned to the foremost portion PS1 of the storage element 51, as shown In Fig. 2(B) . At that time, the address is adjusted so that the effective signal is written into the storage element 51 starting with the foremost portion thereof. After the effective image signal passes the beginning address P1, the effective image signal is still written so as to erase the old signal of the dark reference level, as shown in Fig. 2(C). Into each storage element having the storage capacity for the number of the effective photoelements of the linear image sensor, the effective image signal is written from the foremost portion of the storage element to its rearmost portion so that only the effective image signals are written into the line memory 50 or 60. For that reason, the unnecessary signals S1 of the dark reference level as shown in Fig. 5 are not included in the image signals PS1 or PS2 serially read out of the line memory 50 or 60.
Although five linear image sensors are connected in series with each other in the embodiment described above, the number of the linear image sensors is optional. The storage capacity of each of the storage elements of the line memory may exceed the number of the effective photoelements of the linear image sensor. In that case, reading is not performed out of the surplus storage portion of the storage element.
According to the present invention, a signal reading circuit is provided as described above, so that even if a plurality of linear image sensors are connected together in a long zigzag line, signals can be written into a memory while signals corresponding to the opaque metalization mask portions and overlapped portions of the linear image sensors are being removed. For that reason, serial image data corresponding to the document can be read out of a line memory. If line memories are alternately used for reading and writing, rapid image reading can be performed.
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| Document | Relation | Office |
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| DE3427659A | Cites | Germany |
| EP0019777A | Cites | European Patent Office (EPO) |
8 members in 4 offices
Priority claims5
| Document | Office | Kind | Date |
|---|---|---|---|
| 26297485 | Japan | – | |
| 26297485 | Japan | A | |
| 26297485 | Japan | A | |
| 26297485 | – | – | – |
| JP19850262974 | – | – | – |
Members8
| Document | Office | Kind | |
|---|---|---|---|
| EP0223260A2 | European Patent Office (EPO) | A2 | |
| JPS62122461A | Japan | A | |
| US4754338A | United States of America | A | |
| EP0223260A3 | European Patent Office (EPO) | A3 | |
| JPH0516781B2 | Japan | B2 | |
| EP0223260B1This record | European Patent Office (EPO) | B1 | |
| DE3689610D1 | Germany | D1 | |
| DE3689610T2 | Germany | T2 |
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Numbers
- Publication
- 0223260
- Publication, DOCDB
- 0223260
- Publication, EPODOC
- EP0223260
- Application
- 86116166
- Application, DOCDB
- 86116166
- Application, EPODOC
- EP19860116166
Titles3
- German
- Signalleseschaltungsanordnung für maskierte und überlappende lineare Bildsensoren
- English
- Signal reading circuit for masked and overlapping linear image sensors
- French
- Circuit de lecture de signaux pour capteurs d'images linéaires masqués et chevauchants
Classification
- CPC, 5
- H04N1/1934
- H04N1/19505
- H04N1/1951
- H04N25/7013
- H04N25/701
- IPC, 2
- H04N1 19
- H04N1 195
Designated states3
- Contracting states, 3
- Germany
- France
- United Kingdom
