Method and circuit arrangement for transcoding code words.

The invention relates to a recoding of codewords of a code with m-place code words into the corresponding code words of a different code, also with m-place code words.

In the digital communication technology as well as in the data processing art information is presented for the purpose of sharing vein and processing by up releasing from consequences of so-called .. codewords digital signal, wherein the codewords possibly derived from an underlying analog signal from repetitive sampling, quantization and coding can be and dam corresponding to each analog signal sample.

For the relationship between the analog signal values ​​of a telephone-to-analog signal, and the code words of a corresponding telephone digital signal there are two CCITT recommendations, which are usually referred to as A-law and μ-law and both a logarithmic Quantisierungsintervall- / analog signal value

Companding each approximated by a segment-wise linear buckling curve. Although this so-called the. A-law following buckling curve in a digital / analog converter in circuit engineering particularly favorable manner by means of a so-called fed with a constant current. R-2R network realize can, in some countries, but less easy to where realized μ characteristic preference. This has the consequence that, if necessary, for itself same but coming in different countries to use communication devices different encoder / decoder must be provided, resulting in an undesirable for large scale integration reduction of each of the quantities to be, or that, of a unified codec starting, additional recoding of the output or input bits, for example, must bring about by means of an arithmetic unit.

The invention has for its object to avoid such expenditure increases and instead show a different way to a recoding of the type outlined.

The invention relates to a method of recoding code words of a code having m-place code words into corresponding code words of a different code likewise having m-place code words; this method is according to the invention characterized in that the individual bits of umzucodierenden code word match each case via a relay circuit in accordance with the coincidence or non during which serial input into a m-digit shift register or during the serial output thereof from register stage to register stage of the individual bits be passed non negatived or negated by umzucodierendem codeword of a code and the corresponding code word of the other code in such a way that the continuous bits undergo a negation before and after with their position within the shift register of the position not coinciding bits within the two code words corresponding register stage ,

The invention, which is not tied to the recoding of A-law code words in μ-law codewords and vice versa, but also in another with a constant bit rate unfolding before transcoding, for example, when required in the course of an A-law encoding inversion of every second bits or even in a so-called. S.crambeln can be applied, allowing for the same bitrate setting right transcoding with very little circuit complexity, particularly inasmuch as in development of the invention as the beginning or end of a transmission path, for example, to buffering and / or to the parallel / series or series / parallel conversion already existing shift registers need only be supplemented with appropriate relay circuits and can be mitausgenutzt transcoding according to the invention; it can be transmitted and receiving in Nachrichtenseriell devices that use one and the same shift register for transmitting and receiving, which are the shift register stages associated Wieitergabeschaltungen also exploited twice.

Reference to the drawing, the invention is explained in more detail. It shows<ul><li>1 schematically shows an embodiment of a circuit arrangement for transcoding according to the invention;</li><li>2 shows further circuitry details of such circuitry.</li></ul>

1 shows an embodiment of a circuit arrangement for transcoding code words of a code with m-place code words into the corresponding code words of a different code, also with m-place code words according to the invention is shown schematically to the extent necessary for understanding the invention. In this circuit arrangement is an m-digit shift register with a respective set input D and a reset input D and in addition to an output Q a complementary output<o>Q</o> having register stages RmS, ..., RJS, RiS, ..., R1S provided. Before and behind the register stages are relaying circuits EWM, mWm-1, ..., Jwi, ..., 2W1, 1WA. In this wax response to a applied to the control input eum the relay circuit EWM control bits of the input e of the shift register with the set input D or the reset input D of the register stage RMS and the Komplemtäreingang e of the shift register to the reset input D or the set input D of the register stage RmS connected. According to the to the subsequent relay circuits ..., Jwi, ... applied control bit is always the output of a respective preceding register stage to the set input or the reset input of each subsequent register stage and each of the complementary output of the respective preceding register stage to the reset input or the reset input of each subsequent register stage connected; so, for example, according to the present at the control input of the relay circuit jui Jwi control bits of the Q output of the preceding register stage RJS to the set input D or the reset input<o>D</o> the subsequent register stage RiS connected and the complementary output Q of the register stage RJS with the reset input D or the set input D of the register stage RiS. Finally, in accordance with the control input of the relay circuit 1UA 1WA adjacent control bits, the output Q of the register stage R1S to the output a or the complementary output<o>a</o> connected the shift register and the complementary output <o>Q</o> the register stage R1S to the complementary output <o>a</o> or the output of a shift register.

The negation of bits of a umzucodierenden m-bit code word, and thus its recoding now occurs in such a way that during the serial input of the umzucodierenden code word before and after the one register stage whose position corresponds to the shift register of the position of the relevant bits in the code word, by switching concerned, this applied to their respective control bits Steuereirgängen with relay circuits each passing bits of the code word to be negated. Each actually be negated bit undergoes this just a negation (or an odd number of negations), during each not to be negated bit zero or two negations (or an even number of N_egationen) Experiences and therefore the result remains unchanged. Once the last bit of umzucodierenden codeword to the shift register RmS, ..., RJS, RiS, ..., R1S has been entered, thus is in the shift register instead of umzucodierenden codeword already the recoded codeword then, for example, parallel or even - at but now line crossing-free and therefore no negation causing relay circuits can be output serially. Alternatively, it is also possible to serially, ..., RJS, RiS, ..., R1S enter the umzucodierende codeword in parallel or in line crossing-free and therefore no negation causing relay circuits in the shift register RmS and make the recoding until the serial code word output, by then effected in the codeword output by appropriately switching the relay circuits that will turn non negatived or negated in accordance with the compliance or non Convention Stim drying of the individual bits of umzucodierendem codeword of a code and the corresponding code word of the other code in the manner disclosed that the passing bits respectively before and after a register stage whose position within the shift register corresponds to the position of non-coinciding bits within the two code words, experience a negation.

The relay circuits can, as can be seen in more detail from FIG 2, respectively by an X-circuit having four transistor switches 1, 2, 3, 4 may be formed with MOS transistors, in which any two each on separate input terminals and separate output terminals of X-circuit connected transistor switches to the respective control bit and the other two transistor switches are supplied to the negated control bit. In FIG 2 is indicated to the control electrodes of the two as it were uncrossed by switching transistor switch 1 and 2 directly connected to the respective control bit concerned control line leading, while the control electrodes of the two each as it were crossed by switching transistor switches 3 and 4 via an inverter NOT are connected to the respective control bit in question leading control line.

In the circuit arrangement according to FIG 2, the transcoding controller controlling information is applied in the form of a control byte in parallel representation to the control lines, wherein the individual control bits are ... are submitted by the individual cells of a control information register order, ..., Uj, Ui U1. It can be effected by introduction of a corresponding control byte any transcoding of m-digit code words of a code in the corresponding m-digit code words of a different code.

Alternatively - and without this being shown in the drawing - it is also possible to connect a tiny control bit so each directly or through an inverter to the control electrodes of the transistor switches of the individual relay circuits that the desired transcoding when pushing the contents of the shift register RmS, ..., RJS, RiS, ..., R1S done.

If, as shown in FIG 2, provided the control information in the form of a control byte in parallel representation, so it is, as seen in FIG 2 can also be seen, also possible to avoid the hassle of double negations between adjacent shift register stages in that the control bit of a between two register stages, for example, the register stages RJS and RiS, lying relay circuit in the example of the relay circuit Jwi, control line leading jui the output line of exclusive-OR gate EXOR is, the two inputs are applied to those two control whose positions within the control byte to corresponding positions of the two register stages (RJS and RiS) within the shift register.

Will now, for example, all bits are negated each codeword with the exception of the respective first bits as would be the case for example in an A-law / μ-law recoding, it is at the serial input or output of the thereby transcoded code word in the or from the shift register RmS, ..., RJS, RiS, ..., R1S of all control information cell order, ..., Uj, Ui ... - with the exception of a control bit "0"-providing control information cell U1 - a control bit "1 " provided. The control bits are in pairs connected to the exclusive-OR gates EXCR, so that when the relay circuits with their control lines connected to the exclusive-OR gates EXOR mWm-1, ..., Jwi, ..., 2W1 one crossed by circuit causing transistor switches 3 and 4, only the relay circuit 2W1 are controlled into conduction, while at the other relay circuits mWm-1, ..., JWI, ..., the transistor switches 3 and 4 remain in the off state and the transistor switches 1 and 2, there is in each case a uncrossed through-connection effect. Another difference is that of the control information cell order given control bit "1" in the relay circuit EWM, a crossed by circuit causing transistor switch 3 and 4 controlled into conduction; the output from the control information cell U1 control bit "O" holds finally in the relay circuit 1WA a uncrossed through circuit causing transistor switches 1 and 2 in the conduction state. This results in that series, ..., RJS, RiS, ..., R1S entered codeword only the R1S continuous first bit learns of all bits of via the input terminals e and e in the shift register RmS to shift register stage, a two-time negation, namely in the relay circuits EWM and 2W1, during the subsequent bits each learn only a negation, namely in the relay circuit EWM. This then is after complete serial input of umzucodierenden codeword to the shift register in this just the recoded codeword then parallel or - can also be read serially from the shift register - without further negations.