Low power programmable processor

A graphics piocessor has a programmable Arithmetic Logic Unit (.ALL ) capable of scalar arithmetic operations for processing pixel packets and pixel packets formatted in a S l 8 format to improve dynamic range or in a different data format (see figure 3) The graphic processor may be implemented as a configurable graphics pipeline, as distributors couple elements of a graphics pipeline to permit the process flow of pixel packets through to be reconfigured in response to a command from a host and a data packet triggers an element of the graphics pipeline to discover an identifier A configurable test point selector may be used to monitor a selected subset of tap points of the graphics pipeline and count statistics for at least one condition associated with each tap point ot the subset of tap points Pixels may be assigned even pixels or odd pixels and the pixel packets of odd and even pixels then interleaved to account for ALU latency.