AT433597T

Non-volatile memory and method with bit line to bit line coupled compensation

Abstract

The invention claims the device is equipped with a wire comprises a non-volatile memory and method for bit line and compensation. For programming to a memory memory cells inner sides; whenever the memory storage unit is achieved wherein target state and is forbidden to a or the block system is further un-re-changeable program, wherein the kettle is a programming state of the adjacent memory storage unit is provided with a micro variation. The invention claims programs as part of the circuit and method, and a displacement of perturbation to a to the kettle programming state wherein the adjacent memory storage unit. The displacement with a kettle programming of the adjacent position of memory storage unit is connected with the coupling to with the memory storage unit is forbidden to program. The groove; a process or made of the parallel high-density programming memory storage battery the internal device minimum.

Term

No projected expiry on record.

  1. Priority
  2. Filed
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20 members in 9 offices

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Priority claims
DocumentOfficeKindDate
66722203United States of AmericaA
2004029426United States of AmericaW

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US2005057965A1United States of AmericaA1
WO2005029502A1World Intellectual Property Organization (WIPO)A1
TW200529239ATaiwan Province of ChinaA
KR20060067970ARepublic of KoreaA
US7064980B2United States of AmericaB2
EP1671332A1European Patent Office (EPO)A1
US2006227614A1United States of AmericaA1
CN1883009AChinaA
JP2007506221AJapanA
US7269069B2United States of AmericaB2
US2007297234A1United States of AmericaA1
TWI295803BTaiwan Province of ChinaB
US7532514B2United States of AmericaB2
EP1671332B1European Patent Office (EPO)B1
AT433597TThis recordAustriaT
ATE433597T1AustriaT1
DE602004021493D1GermanyD1
CN100538906CChinaC
JP4658052B2JapanB2
KR101076239B1Republic of KoreaB1