Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
Abstract
When programming a contiguous page of memory storage units, memory storage unit has reached its targeted state and prohibited program or each time the closure from another program to generate a disturbance to the neighboring memory storage unit still under programming. The present invention provides a method for the offset and disturbance as part of the programming circuit is still being added to the neighboring memory storage units under programming. The offset is added to a voltage offset to the bit line of the storage unit under programming. The voltage offset is a predetermined function of whether the mode of generating a disturbance, as in none of the neighbors or one or both of the program inhibit mode. In this way, a high-density memory storage units is unique in parallel with a programming error is eliminated or minimized. A memory storage unit, page programming, the target state, the bit line voltage offset
Term
No projected expiry on record.
- Priority
- Filed
- Granted
- Today
18 members in 9 offices
Priority claims1
| Document | Office | Kind | Date |
|---|---|---|---|
| 66722303 | United States of America | A |
Members18
| Document | Office | Kind | |
|---|---|---|---|
| US2005057967A1 | United States of America | A1 | |
| WO2005029503A1 | World Intellectual Property Organization (WIPO) | A1 | |
| TW200529238A | Taiwan Province of China | A | |
| US6956770B2 | United States of America | B2 | |
| US2006034121A1 | United States of America | A1 | |
| TWI251238B | Taiwan Province of China | B | |
| EP1665284A1 | European Patent Office (EPO) | A1 | |
| KR20060115992A | Republic of Korea | A | |
| CN1875429A | China | A | |
| JP2007506222A | Japan | A | |
| US7215574B2 | United States of America | B2 | |
| EP1665284B1 | European Patent Office (EPO) | B1 | |
| AT387716TThis record | Austria | T | |
| DE602004012122D1 | Germany | D1 | |
| DE602004012122T2 | Germany | T2 | |
| CN1875429B | China | B | |
| KR101109458B1 | Republic of Korea | B1 | |
| JP4880464B2 | Japan | B2 |
1 legal event, as the office reported them to INPADOC
Events
| Event | Code | |
|---|---|---|
| Ceased as to paragraph 5 lit. 3 law introducing patent treatiesCeasedRER | RER |
Numbers
- Application
- 4784312
Titles2
- German
- NICHTFLÜCHTIGER SPEICHER UND VERFAHREN MIT VON BENACHBARTEN BETRIEBSARTEN ABHÄNGIGER BITLEITUNGSKOMPENSATION
- English
- NON-VOLATILE MEMORY AND METHOD WITH DEFINITIVE BIT CONTROL COMPENSATION DEPENDING ON NEIGHBORING OPERATING TYPES
Classification
- CPC, 2
- G11C16/3468
- G11C16/0483
- IPC, 2
- G11C16 04
- G11C16 34