AT137358T

Method for planarizing an integrated circuit structure

Abstract

This record has no abstract on file.

Term

No projected expiry on record.

  1. Priority
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34 members in 6 offices

This recordMember, by publication datePriority claim

Priority claims4

Priority claims
DocumentOfficeKindDate
26950888United States of AmericaA
26950888United States of AmericaA
269508
US19880269508

Members34

Family members, oldest first
DocumentOfficeKind
EP0368504A2European Patent Office (EPO)A2
JPH02199831AJapanA
EP0368504A3European Patent Office (EPO)A3
EP0386337A2European Patent Office (EPO)A2
US4962063AUnited States of AmericaA
JPH02266519AJapanA
EP0386337A3European Patent Office (EPO)A3
EP0422748A2European Patent Office (EPO)A2
EP0422748A3European Patent Office (EPO)A3
EP0423907A1European Patent Office (EPO)A1
EP0441653A2European Patent Office (EPO)A2
EP0441653A3European Patent Office (EPO)A3
US5112776AUnited States of AmericaA
US5204288AUnited States of AmericaA
US5244841AUnited States of AmericaA
JPH0774146AJapanA
EP0386337B1European Patent Office (EPO)B1
AT135140TAustriaT
EP0441653B1European Patent Office (EPO)B1
DE68925892D1GermanyD1
EP0423907B1European Patent Office (EPO)B1
DE69117999D1GermanyD1
EP0422748B1European Patent Office (EPO)B1
AT137358TThis recordAustriaT
AT137608TAustriaT
DE68926344D1GermanyD1
DE68926392D1GermanyD1
ES2087071T3SpainT3
DE68925892T2GermanyT2
DE69117999T2GermanyT2
DE68926392T2GermanyT2
DE68926344T2GermanyT2
ES2088957T3SpainT3
ES2088958T3SpainT3