AT104084T

An arithmetic unit for structure arithmetic.

Abstract

This invention involved application VLSI technology of super high-speed memory bit unit, many bit unit can high density to compression, the bit unit including: a unit circuit (T1, and T2, and L1, and L2, and D1, and D2;T1, and T2, and I1, and I2, and D1, and D2), which bit value is can storage of, the value not for "really" that for "fake"; a article continued imposed voltage of first Alliance line (VCC); combined second, Alliance line (ACC, and d, and d*), each line can in different control state Xia set; second, and Three or four-line so that each combination storage unit is a set of functional status of an independent State.

Term

No projected expiry on record.

  1. Priority
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9100512SwedenW

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