WO9905818A1

Split-key cryptographic system and method

Abstract

A method of operating a split-key cryptographic system having two or more co-operating microprocessors, i, linked via a communications channel, involving the generation of a public modulus, N, being the multiple of two integers, P, Q, where P=p1+p2...pn and Q=q1+q2...qn in such a way that none of the microprocessors i individually has the ability to decrypt encrypted data. Microprocessor i selects a temporary public modulus and the integers pi, qi, a function of which is transmitted to the other microprocessors, j. Every microprocessors j uses the function to generate a set of numbers which are dependent on integers pj, qj, which are secret to each microprocessor j. Each Microprocessor i then uses these numbers to co-operate to generate the public modulus N. N is thus generated without any party having full knowledge of the integers P and Q.

WO9905818A1, drawing sheet 1
Sheet 1 of 7

Term

No projected expiry on record.

  1. Priority and filed
  2. Published
  3. Today

9 claims: 3 independent, 6 dependent

  1. 1
    Claims 1. A method of operating a split-key cryptographic system having a plurality of cooperating microprocessors, /, linked via a communications channel, involving the generation of a public modulus, N, being the multiple of two integers, P,Q, where P=(pι+p + p n ) and Q=(qι+q2+—.q n ) characterised by the following steps:i) having each microprocessor, i, select integers p„ q, ii) having each microprocessor, /, determine a public modulus, M„ public key e, and private key d, such that d t e, ≡lmodΦ(M);iii) having each microprocessor, /, generate the quantities p, e ' mod M, and q, e ' mod M, and transmitting them to the other microprocessor or microprocessors, j, via the communications channel;iv) having each microprocessor / generate three numbers, z \ , z 2 , z 3 , which are respectively (p,q,) e -' mod M,, (p, q t ) ej mod M 7 and a, y 'mod M,, with a v for i≠j chosen to be random between 0 and the maximum desired public modulus N, subject to the constraint ∑ j a, j = 0, and generate a set of numbers, b /, *, for / = 1, 2, 3 and k = 1, 2, ..., K with b / ,* being chosen to be random modulo M,, subject to the constraints: ∑k^> ,k = ∑k^2,k = ∑k b 3jk = 1, having microprocessor i generate a set of numbers, xι,k = z/b;, ' ) mod M y and transmitting this set of numbers to each microprocessor j in a new order determined by microprocessor /;v) having microprocessor / calculate y^ k = xi. k ώ mod M„ for each term x^ received from each other microprocessor;' , and the public modulus N, = ∑ j ^yyk + 2 p,q, + a„;vi) having each microprocessor / broadcast N, to each of the other microprocessors j, and having all microprocessors calculate 2N = Σ, N, vii) testing that N is of a suitable form for use as an RSA modulus and repeating steps i) to vi) with a new set of integer values at step i) if test failed.
  2. 2
    A method of operating a split-key cryptographic system as claimed in Claim 1, having two co-operating microprocessors, wherein by prior agreement a 2 ,ι is selected to equal p 2 q 2 such that microprocessor 2 does not need to carry out step iii), microprocessor 1 does not need to carry out step iv) and microprocessor 1 can calculate directly the public modulus N = piqi +∑ι,kyι,ι,k mod Mi.
  3. 3
    A method of operating a split-key cryptographic system as claimed in Claim 2 characterised in that steps ii) - vi) are repeated substituting microprocessor 2 for microprocessor 1 and vice versa in the steps and using the same values pi, p 2 , qi, q 2 but changing the subscripts according to the substitution and in that microprocessor 1 and microprocessor 2 are further programmed to confirm the generation of identical values of N before N is made available to one or more further microprocessors.
  4. 4
    A method of operating a split-key cryptographic system as claimed in any of the preceding claims, characterised in that there is provided a further step of having the microprocessors / co-operate to test the likelihood, to a predetermined level, of P and Q being prime and rejecting values of N not being the product of two prime numbers to that level of likelihood.
  5. 5
    A method of operating a split-key cryptographic system as claimed in any preceding claim to provide a plaintext message, x, from an RSA cyphertext message, y, characterised in that there is provided further steps:i) ensuring the microprocessors / receive parameters N and a public encryption key, e;ii) having each microprocessor / generate the value (p, + q,) mod e and transmit it to each microprocessor^ ' , having all microprocessors calculate the values f = P + Q - N - 1 (mod e) and k = f _1 mod(e);iv) having each microprocessor i calculate d t = |_ (Vri) + (k/n)(N + D - kpi - kg,- J e vi) involving each microprocessor / to produce a partly decrypted a ciphertext message, x„ from a plain text message^ enciphered using a formula of the foτmy=x e mod N according to a formula of the form x;= y ώ mod N;viii) producing and outputting the plaintext message x y ' mod N . y c mod N, where c lies between 0 and n-\ and is known by all microprocessors.
  6. 6
    A split-key encryption system comprising a communications channel accessible by an encryption microprocessor and a plurality of decryption microprocessors operably coupled to exchange data and operably connectable to the communications channel characterised in that the decryption microprocessors are programmed to co-operate in the generation of a public modulus N according to the method claimed in any of the Claims 1 to 4.
  7. 7
    A split-key encryption system as claimed in Claim 6 characterised in that the plurality of decryption microprocessors are further programmed to operate according to the method of Claim 5.
  8. 8
    A split-key encryption system as claimed in Claim 7 characterised in that there is additionally provided a third microprocessor operably connectable to the decryption microprocessors and configured to receive and decrypt to plaintext a plurality of partly decrypted cyphertext messages output from the corresponding decryption microprocessors.
  9. 9
    A split-key encryption system as claimed in any of the claims 6 to 8 characterised in that the microprocessors comprise suitably programmed computers.