Design assistance device, design assistance method, program, and memory medium
Abstract
A design assistance device for designing a wiring substrate, said design assistance device being provided with a measure presentation unit which determines a measure representing the proportion of the section or sections of a differential signal line pair that satisfy a design criterion, relative to the entire differential signal line pair in terms of a certain parameter, and which causes a display to displaythe determined measure.

Term
No projected expiry on record.
- Priority and filed
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15 claims: 9 independent, 6 dependent
- 1配線基板を設計するための設計支援装置であって、 差動信号線対のうち設計基準を満たしている区間が前記差動信号線対の全体に対して占める度合を示す指標を求め、前記指標をディスプレイに表示させる指標提示部を備えることを特徴とする設計支援装置。
- 2前記指標提示部は、前記差動信号線対を構成する複数の区間のそれぞれが前記設計基準を満たしているか否かを前記ディスプレイに表示させる、 ことを特徴とする請求項1に記載の設計支援装置。
- 3前記指標提示部は、複数の差動信号線対のそれぞれについて前記指標を前記ディスプレイに表示させ、更に、前記複数の差動信号線対のうち選択された差動信号線対を構成する複数の区間のそれぞれが前記設計基準を満たしているか否かを示す情報を前記ディスプレイに表示させる、 ことを特徴とする請求項1に記載の設計支援装置。
- 4前記指標提示部は、前記複数の差動信号線対のそれぞれについて前記ディスプレイに表示された前記指標を含む情報をソートする機能を含む、 ことを特徴とする請求項3に記載の設計支援装置。
- 5前記ディスプレイに前記配線基板を表示させる配線基板表示部を更に備え、 前記配線基板表示部は、前記複数の差動信号線対のうち設計者によって選択された差動信号線対を前記ディスプレイに強調表示させる、 ことを特徴とする請求項3又は4に記載の設計支援装置。
- 6前記ディスプレイに前記配線基板を表示させる配線基板表示部を更に備え、 前記配線基板表示部は、前記複数の区間のうち設計者によって選択された区間を前記ディスプレイに強調表示させる、 ことを特徴とする請求項2乃至4のいずれか1項に記載の設計支援装置。
- 7前記度合は、前記差動信号線対のうち前記設計基準を満たしている区間が前記差動信号線対の全体に対して占める比率を含む、 ことを特徴とする請求項1乃至6のいずれか1項に記載の設計支援装置。
- 8前記度合は、前記差動信号線対を構成する2つの信号線のうち前記設計基準を満たす区間の総配線長が前記2つの信号線の総配線長に対して占める比率である、 ことを特徴とする請求項7に記載の設計支援装置。
- 9前記2つの信号線のうち前記設計基準を満たす区間の総配線長は、前記2つの信号線の一方における前記区間の配線長と前記2つの信号線の他方における前記区間の配線長との合計であり、 前記2つの信号線の総配線長は、前記2つの信号線の一方の配線長と前記2つの信号線の他方の配線長との合計である、 ことを特徴とする請求項8に記載の設計支援装置。
- 10前記設計基準は、前記差動信号線対を構成する2つの信号線が同一層に配置されるべきであるという基準と、前記2つの信号線が相互に平行に配置されるべきであるという基準と、前記2つの信号線の間の基準間隔と含む、 ことを特徴とする請求項1乃至9のいずれか1項に記載の設計支援装置。
- 11前記設計基準は、前記差動信号線対を構成する2つの信号線の差動インピーダンスの基準範囲を含む、 ことを特徴とする請求項1乃至10のいずれか1項に記載の設計支援装置。
- 12前記設計基準は、前記差動信号線対を構成する2つの信号線が同一層に配置されるべきであるという基準と、層ごとに定められた前記2つの信号線のそれぞれの基準幅と、層ごとに定められた前記2つの信号線の間の基準間隔とを含む、 ことを特徴とする請求項1乃至7のいずれか1項に記載の設計支援装置。
- 13配線基板を設計するための設計支援方法であって、 差動信号線対のうち設計基準を満たしている区間が前記差動信号線対の全体に対して占める度合を示す指標を求め、前記指標をディスプレイに表示させる指標提示工程を含むことを特徴とする設計支援方法。
- 14請求項1乃至12のいずれか1項に記載の設計支援装置が構成されるようにコンピュータを動作させるためのプログラム。
- 15請求項1乃至12のいずれか1項に記載の設計支援装置が構成されるようにコンピュータを動作させるためのプログラムを格納したメモリ媒体。
Independent claims15
43 paragraphs, as filed
A designing support device, a design supporting method, a program, and a memory medium
0001The present invention relates to a designing support device, a design supporting method, a program, and a memory medium.
0002A differential interface is known as an interface which cannot be easily subject to influence of a noise. Between semiconductor chips which have a differential interface, a differential signal wire pair which transmits a differential signal is used. In order to acquire sufficient noise tolerance, it is necessary to fill various restrictions with a design of a differential signal wire pair in a wiring board (printed-circuit board).
0003A substrate design program which has an error-checking function which checks an error part from which differential impedance separates from a reference interval in a circuit pattern of a differential pair wire way (differential signal wire pair) in patent documents 1 is indicated.
<p num="0004"><patcit num="1"><text>JP, 2013-93056, A</text></patcit></p>
<p num="0005">Design criteria which should certainly be met are established and a design of a differential signal wire pair in a wiring board is insufficient only by whether it is filled or not estimating a design. In a design of a differential signal wire pair, the section which deviates from an ideal design may produce like the section which cannot but change wiring width of two signal wires which constitute a differential signal wire pair, the section which cannot but change an interval of the two signal wires, and the section which cannot arrange the two signal wires in parallel. Superfluous generating of such the section could not be overlooked in a viewpoint of transmission quality of a signal, while a little generating of such the section is permissible.</p><p num="0006">A designing support device which shows a designer a degree by which a design of a differential signal wire pair is meeting design criteria did not exist conventionally, but a designer cannot but make experience and intuition a reliance, and cannot but advance a design, and it was easy to produce variation by a designer.</p><p num="0007">An object of the present invention is to provide art advantageous to support of a design of a differential signal wire pair.</p>
<p num="0008">The 1st side of the present invention starts a designing support device for designing a wiring board, and the designing support device asks for an index which shows a degree which the section which is meeting design criteria among differential signal wire pairs occupies to the differential whole signal wire pair, and it has an index presentation part which displays the index on a display.</p><p num="0009">The 2nd side of the present invention starts a design supporting method for designing a wiring board, and the design supporting method asks for an index which shows a degree which the section which is meeting design criteria among differential signal wire pairs occupies to the differential whole signal wire pair, and includes an index presentation process of displaying the index on a display.</p><p num="0010">The 3rd side of the present invention is related with a program for operating a computer so that a designing support device concerning the 1st side may be constituted.</p><p num="0011">The 4th side of the present invention is related with a memory medium which stored a program for operating a computer so that a designing support device concerning the 1st side may be constituted.</p>
<p num="0012">According to the present invention, art advantageous to support of a design of a differential signal wire pair is provided.</p>
0013<figref num="1">A figure showing composition of a designing support device of one embodiment of the present invention.</figref><figref num="2">A figure showing an example of a design.</figref><figref num="3">A figure showing typically an example of a design of a circuit pattern of a differential signal wire pair created by a designing support device.</figref><figref num="4">A figure showing an evaluation result of a circuit pattern of a differential signal wire pair.</figref><figref num="5">A figure showing an evaluation result of a circuit pattern of a differential signal wire pair.</figref><figref num="6">A figure showing an example of an emphasis display of the section which constitutes a differential wiring pair.</figref><figref num="7">A figure showing an example of an emphasis display of the section which constitutes a differential wiring pair.</figref><figref num="8">A figure showing an example of a flow of processing by an index presentation program.</figref><figref num="9">A figure showing an example of a circuit pattern of two signal wires which constitute a differential signal wire pair.</figref>
0014Hereinafter, the present invention is explained through the exemplary embodiment, referring to an accompanying drawing.
0015Composition of designing support device 100 of one embodiment of the present invention is shown in Drawing 1. Designing support device 100 may be constituted by including design support program 160 in computer 101. Designing support device 100 or computer 101 may comprise CPU110, memory 120, input devices (for example, a keyboard, a touch panel, a mouse, etc.) 130, display 140, hard disk (memory) 150, etc. Design support program 160 may be included in hard disk 150. Design support program 160 may be distributed with a form of a memory medium which stored it. Design data 170 created by execution of design support program 160 may be stored in hard disk 150.
0016Design support program 160 may include index presentation program 161. Index presentation program 161 operates computer 101 by performing it as designing support device 100 containing an index presentation part. Design support program 160 may contain wiring board display program 162. Wiring board display program 162 operates computer 101 by performing it as designing support device 100 containing a wiring board indicator.
0017Hereinafter, a design supporting method performed by designing support device 100 is explained exemplarily, referring to Drawing 1 - Drawing 8. Here, as shown in Drawing 2, an example which connects pin USBO-1P of semiconductor chip IC1, USBO-1N, and pin USBI-1P of semiconductor chip IC2 and USBI-1N by differential signal wire versus USB-1 is explained. Here, differential signal wire versus USB-1 comprises two signal wire USB-1P and USB-1N to which a signal of negative phase is impressed mutually.
0018An example of a circuit pattern of differential signal wire created by designing support device 100 (design support program 160) versus USB-1 (USB-1P, USB-1N) is typically shown in Drawing 3. Here, a circuit pattern of differential signal wire versus USB-1 follows directions given via input device 130 from a designer who operates designing support device 100, Or it may be created by automatic wiring functions included in design support program 160, or those both sides.
0019A flow of processing by index presentation program 161 (or index presentation part constituted by it) included in design support program 160 is shown in Drawing 8. In Step S810, index presentation program 161 divides a differential signal wire pair into a plurality of sections. For example, in an example shown in Drawing 3, a circuit pattern of differential signal wire versus USB-1 is divided into sections 1-9 and section A-F.
0020Do division of a differential signal wire pair according to index presentation program 161 here in a position where the feature of a circuit pattern of two signal wires which constitute a differential signal wire pair changes, for example, for example, the following positions.
0021- A position which changes from a state in which a circuit pattern of two signal wires is un-parallel to a parallel state, - A position which changes from a state with a parallel circuit pattern of two signal wires to an un-parallel state, - A position where a layer by which at least 1 side of a circuit pattern of two signal wires is arranged changes (position of beer), - A starting position and an end position of the section where width of a circuit pattern of two signal wires changes, - A starting position and an end position of the section where an interval of a circuit pattern of two signal wires changes, - A starting position and an end position of the section which cross a solid pattern (pattern which has the area beyond a predetermined value) arranged at another layer
0022In Step S820, index presentation program 161 calculates a rate of coupling by evaluating a plurality of sections divided at Step S810. Here, in Drawing 3, sections 1-9 are the sections where a circuit pattern of differential signal wire versus USB-1 fulfills coupling conditions as an example of design criteria, and section A-F is the section where a circuit pattern of differential signal wire versus USB-1 does not fulfill the coupling conditions. A standard (the following, standard 1) that two signal wires in which coupling conditions constitute a differential signal wire pair, for example should be arranged at the same layer, The two signal wires contain with a standard (the following, standard 2) that it should be arranged in parallel with mutual, and a standard interval (the following, standard 3) between the two signal wires. Since two circuit patterns, signal wire USB-1P and USB-1N, are not parallel to mutual, standard 2 is not met by section A-F. Standards 1, 2, and 3 are only illustration, and may be changed suitably.
0023A rate of coupling is an index which shows a degree which the section which fulfills coupling conditions as one of the design criteria among differential signal wire pairs occupies to the differential whole signal wire pair. In a more concrete example, the degree may be a ratio which the section which fulfills coupling conditions as one of the design criteria among differential signal wire pairs occupies to the differential whole signal wire pair.
0024A rate of coupling may be calculated according to the following formulas, for example.
0025(Rate of coupling) = (total wiring length of the section who fulfills coupling conditions between two signal wires which constitute differential signal wire pair) / (the total wiring length of two signal wires which constitute a differential signal wire pair)
0026In an example shown in Drawing 3, as mentioned above, sections 1-9 are the sections where a circuit pattern of differential signal wire versus USB-1 fulfills coupling conditions, and section A-F is the section where a circuit pattern of differential signal wire versus USB-1 does not fulfill coupling conditions. Therefore, "the total wiring length of the section who fulfills coupling conditions between two signal wires which constitute a differential signal wire pair" is the total wiring length of sections 1-9 among two signal wire USB-1P which constitutes differential signal wire versus USB-1, and USB-1N. "The total wiring length of two signal wires which constitute a differential signal wire pair" is the total wiring length of sections 1-9 and section A-F.
0027The total wiring length of the section who fulfills coupling conditions in an example here between two signal wires which constitute "differential signal wire pair", It may define as the sum total of wiring length of the section who fulfills coupling conditions of [one] the two signal wires, and wiring length of the section of another side of the two signal wires. "The total wiring length of two signal wires which constitute a differential signal wire pair" may be defined as the sum total of one wiring length of the two signal wires, and wiring length of another side of the two signal wires. Such a definition is convenient when the length of two signal wires which constitute a differential signal wire pair is treated as a mutually different thing. For example, as shown in Drawing 9, when each length of a circuit pattern of two signal wires DSPDSN which constitute a differential signal wire pair is defined as the length L1 and L2 of each center line, it becomes the length which differs in L1 and L2 mutually.
0028In Step S830, index presentation program 161 asks for the degree of differential impedance conformity of two signal wires which constitute a differential signal wire pair by evaluating a plurality of sections divided at Step S810. The degree of differential impedance conformity is an index which shows a degree which the section which is filling "a reference interval of differential impedance" as one of the design criteria among differential signal wire pairs occupies to the differential whole signal wire pair. In a more concrete example, the degree may be a ratio which the section which is filling "a reference interval of differential impedance" as one of the design criteria among differential signal wire pairs occupies to the differential whole signal wire pair. this reference interval is the minimum and the maximum -- it may be given.
0029The degree of differential impedance conformity may be calculated according to the following formulas, for example.
0030(The degree of differential impedance conformity) = (total wiring length of the section who is filling reference interval of differential impedance between two signal wires which constitute differential signal wire pair) / (the total wiring length of two signal wires which constitute a differential signal wire pair)
0031Here, differential impedance is arranged at a different layer from a layer in which a differential signal wire pair is arranged, and may be calculated in consideration of a solid pattern in which fixed potential, such as power supply potential or earth potentials, is given. The total wiring length of the section who is filling a reference interval of differential impedance in an example between two signal wires which constitute "differential signal wire pair", It may define as the sum total with the total wiring length of the section who is filling a reference interval of differential impedance of the total wiring length of the section who is filling a reference interval of differential impedance of [one] the two signal wires, and another side of the two signal wires.
0032In Step S840, index presentation program 161 asks for the degree of differential wiring rule conformity of a differential signal wire pair by evaluating a plurality of sections divided at Step S810. The degree of differential wiring rule conformity is an index which shows a degree which the section which is filling a differential wiring rule as one of the design criteria among differential signal wire pairs occupies to the differential whole signal wire pair. In a more concrete example, the degree may be a ratio which the section which is filling a differential wiring rule as one of the design criteria among differential signal wire pairs occupies to the differential whole signal wire pair.
0033A standard (the following, standard 4) that two signal wires in which a differential wiring rule constitutes a differential signal wire pair, for example should be arranged at the same layer, Each standard width (the following, standard 5) of the two signal wires defined for every layer and a standard interval (the following, standard 6) between the two signal wires defined for every layer are included.
0034The degree of differential wiring rule conformity may be calculated according to the following formulas, for example.
0035(The degree of differential wiring rule conformity) = (total wiring length of the section who is filling differential wiring rule between two signal wires which constitute differential signal wire pair) / (the total wiring length of two signal wires which constitute a differential signal wire pair)
0036The total wiring length of the section who is filling a differential wiring rule in an example between two signal wires which constitute "differential signal wire pair", It may define as the sum total with the total wiring length of the section who is filling a differential wiring rule of the total wiring length of the section who is filling a differential wiring rule of [one] the two signal wires which constitute a differential signal wire pair, and another side of the two signal wires.
0037In Step S850, index presentation program 161 is displayed on display 140 by making into an evaluation result a rate of coupling, the degree of differential impedance conformity, and the degree of differential wiring rule conformity for which it asked at Steps S820, S830, and S840. An evaluation result displayed on display 140 in Step S850 is exemplarily shown in Drawing 4. This evaluation result contains an evaluation result about a plurality of differential signal wire pairs. A "signal name" is a name of a differential signal wiring pair. "The total wiring length" is the sum total of one wiring length of two signal wires which constitute a differential signal wire pair, and wiring length of another side of the two signal wires, for example. "Coupling length" is the sum total with wiring length of the section who fulfills coupling conditions of wiring length of the section who fulfills coupling conditions of [one] the two signal wires which constitute a differential signal wire pair, for example, and another side of the two signal wires. "A rate of coupling", the "degree of differential impedance conformity", and the "degree of differential wiring rule conformity" can follow the above-mentioned definition.
0038As mentioned above, when the section which is meeting design criteria among differential signal wire pairs displays on a display an index which shows a degree occupied to the differential whole signal wire pair, the designer can make the index a reliance and can advance a design. Variation by a designer can be reduced by this.
0039The attribute (wiring length, wiring width, interval of a signal wire) of each section and an example of a display of differential impedance which were divided at Step S810 about differential signal wire versus USB-1 are shown in Drawing 5. For example, a detailed evaluation result shown in Drawing 5 may be displayed on display 140 through operation of input device 130 by choosing a signal name in an evaluation result illustrated in Drawing 4.
0040In an example shown in Drawing 5, sections 1 and 2 shown as the "coupling section" and 3 grades are the sections which fulfill coupling conditions, and section A, section B, etc. which were shown as the "non-coupling section" are the section which does not fulfill coupling conditions. That is, the section which fulfills coupling conditions, and the section which is not filled are shown in Drawing 5. A paraphrase will display information which shows whether each of a plurality of sections fulfills coupling conditions as design criteria on display 140.
0041In an example shown in Drawing 5, differential impedance of differential signal wire versus USB-1 in section 6 is 80ohms, and is less than a set-up lower limit (83ohms). Differential impedance of differential signal wire versus USB-1 in section 8 is 99ohms, and has exceeded set-up upper limit (97ohms). That is, sections 6 and 8 are the sections which are not filling a reference interval of differential impedance among differential signal wire versus USB-1. Here, sections 6 and 8 which are not filling a reference interval of differential impedance are displayed in distinction from other sections. That is, the section where differential impedance fills a reference interval, and the section which is not filled are shown in Drawing 5. A paraphrase will display information which shows whether each of a plurality of sections fills a reference interval of standard impedance as design criteria on display 140. In this example, "the total wiring length of the section who is filling a reference interval of differential impedance between two signal wires which constitute a differential signal wire pair" is the sum total of wiring length of sections 1, 2, 3, 4, 5, 7, and 9. In this example, differential impedance is not displayed about the "non-coupling section. "Like section A, when wiring width changes in the section, typical line width, such as the minimum wiring width, may be displayed, for example.
0042In an example shown in Drawing 5, two intervals, signal wire USB-1P and USB-1N, which constitute differential signal wire versus USB-1 in section 3 are 0.08 mm, and are less than an unillustrated standard interval. Two width, signal wire USB-1P and USB-1N, which constitutes differential signal wire versus USB-1 in section 6 is 0.12 mm, and has exceeded unillustrated standard width. That is, sections 3 and 6 are the sections which are not filling a differential wiring rule among differential signal wire versus USB-1. Here, sections 3 and 6 which are not filling a differential wiring rule are displayed in distinction from other sections. That is, the section which fills a differential wiring rule, and the section which is not filled are shown in Drawing 5. A paraphrase will display information which shows whether each of a plurality of sections fills a differential wiring rule on display 140. In this example, "the total wiring length of the section where a differential signal wire pair is filling a differential wiring rule" is the sum total of wiring length of sections 1, 2, 4, 5, 7, 8, and 9.
0043Index presentation program 161 may include a function which sorts information containing an index displayed on display 140 about a plurality of each of a differential signal wire pair. In Step S860, if index presentation program 161 receives directions of sorting from a designer via input device 130, it will set to Step S870, Index presentation program 161 sorts information containing an index displayed on display 140 about a plurality of each of a differential signal wire pair. For example, the designer can make the evaluation result sort in an evaluation result illustrated in Drawing 4 based on either a rate of coupling, differential impedance and the degree of differential wiring rule conformity.
0044Index presentation program 161 chooses all or a part of a plurality of differential signal wire pairs, and may have again the function to make wiring board display program 162 indicate the circuit pattern corresponding to them in a wiring board by emphasis. Index presentation program 161 chooses the arbitrary selected sections of a differential signal wire pair again, and may have the function to make wiring board display program 162 indicate the section corresponding also in a wiring board by emphasis. In Step S875, if index presentation program 161 receives directions of an emphasis display from a designer via input device 130, it will set to Step S880, Index presentation program 161 makes wiring board display program 162 indicate an applicable differential signal wire pair or the section by emphasis according to the directions.
0045For example, the designer can make display 140 indicate the differential signal wire pair which has the signal name by emphasis by choosing arbitrary signal names in an evaluation result illustrated in Drawing 4. If arbitrary signal names in a table illustrated in Drawing 4 are specifically chosen by designer, index presentation program 161 will pass the signal name to wiring board display program 162. According to this, wiring board display program 162 indicates the differential signal wire pair which has the signal name by emphasis.
0046The designer can make display 140 indicate the section corresponding to an item selected among the whole circuit pattern of a differential signal wiring pair by emphasis by choosing arbitrary items in a table illustrated in Drawing 5. If arbitrary items in a table illustrated in Drawing 5 are specifically chosen by designer, index presentation program 161 will pass information which identifies the section corresponding to the item to wiring board display program 162. According to this, wiring board display program 162 indicates the section corresponding to the information by emphasis. An item corresponding to sections 6 and 8 in Drawings 6 and 7 (for example, "80ohm which shows "differential impedance" of sections 6 and 8) When 99ohms" are chosen, signs that an emphasis indication of the section corresponding to sections 6 and 8 is given by wiring board display program 162 among differential signal wire pair SUB-1 are shown typically.
0047According to such an emphasis display function, the designer can find out immediately a differential signal wire pair or the section which should be corrected.
9 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9
Every citation, both ways
| Document | Relation | Office | Category | Cited during |
|---|---|---|---|---|
| JP2019121973A | Cited by | Japan | – | Search report |
| JP2005309873A | Cites | Japan | X | International search |
| JP2010128700A | Cites | Japan | Y | International search |
| JP2013093056A | Cites | Japan | – | Applicant |
| See also references of EP 3101562A4 | Non-patent | – | – | Applicant |
9 members in 5 offices
Members9
| Document | Office | Kind | |
|---|---|---|---|
| WO2015114677A1This record | World Intellectual Property Organization (WIPO) | A1 | |
| KR20160100381A | Republic of Korea | A | |
| US2016335388A1 | United States of America | A1 | |
| EP3101562A1 | European Patent Office (EPO) | A1 | |
| JPWO2015114677A1 | Japan | A1 | |
| EP3101562A4 | European Patent Office (EPO) | A4 | |
| JP6234483B2 | Japan | B2 | |
| KR101880714B1 | Republic of Korea | B1 | |
| US10198547B2 | United States of America | B2 |
Numbers
- Publication
- 2015/114677
- Application
- 427
Titles5
- English
- A designing support device, a design supporting method, a program, and a memory medium
- French
- DISPOSITIF D'AIDE À LA CONCEPTION, PROCÉDÉ D'AIDE À LA CONCEPTION, PROGRAMME ET SUPPORT MÉMOIRE
- Japanese
- 設計支援装置、設計支援方法、プログラムおよびメモリ媒体
- Unlabeled
- 設計支援装置、設計支援方法、プログラムおよびメモリ媒体
- Japanese
- A designing support device, a design supporting method, a program, and a memory medium
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- G06F30/394
- G06F30/398
- G06F30/39
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