Low-power passive transponder
Abstract
The invention concerns a radio-frequency transponder (12) for contact-free identification with a reader (10), comprising: an antenna (24), an analog circuit (25) including a capacitor (32) an AC-DC converter (34), a modulator (40) and a demodulator (38), a logic control circuit (26), a storage unit (27). Said transponder (12) is designed such that: the antenna (24) and the capacitor (32) form together a resonant circuit, the clock extractor (36) processes the first signal (Tx) to extract therefrom a clock signal addressed to said modulator (38) as long as the voltage of said signal (Tx) exceeds a first threshold value, the converter (34) transforms the first signal (Tx) into a rectified signal, to power the transponder (12). The performances of the transponder, and more particularly energy recuperation and data transmission rate, are improved by the fact that the analog circuit comprises two clock extractors, one of low level type (35), the other of the high level type (36).

Term
No projected expiry on record.
- Priority
- Filed
- Published
- Today
2 claims: 1 independent, 1 dependent
- 1REVENDICATIONS 1. Transpondeur (12) radio-fréquence, pour une identification sans contact au moyen d'un lecteur (10), comprenant:une antenne (24), un circuit analogique (25) qui comporte un condensateur (32), un convertisseur de courant alternatif en courant continu (34), un modulateur (40) et un démodulateur (38), un circuit logique de commande (26), et une mémoire (27), ledit transpondeur (12) étant agencé de manière à ce que: l'antenne (24) et le condensateur (32) forment, ensemble, un circuit résonnant, l'antenne (24) reçoit un premier signal (Tx) provenant dudit lecteur (10) et de type sinusoïdal, présentant une tension de crête (Tx ma χ), modulé et porteur de commandes, et émet un deuxième signal (Rx), porteur d'une réponse auxdites commandes, ledit convertisseur (34) transforme le premier signal (Tx) en un signal redressé, pour assurer l'alimentation du transpondeur (12), caractérisé en ce que ledit circuit analogique (25) comporte, en outre, deux extracteurs d'horloge, l'un de type haut (36), l'autre de type bas (35), agencés de manière à ce que l'extracteur de type haut (36) traite le premier signal (Tx) pour en extraire un signal d'horloge adressé au démodulateur (38) tant que la tension de crête de ce signal (Tx) dépasse une première valeur de seuil, et que l'extracteur de type bas (35) définit une seconde valeur de seuil, lesdits extracteurs étant agencés de manière à ce que le signal d'horloge soit interrompu dès que la tension de crête du premier signal chute en dessous de ladite première valeur de seuil, caractéristique du premier extracteur, et qu'il soit rétabli dès que ladite tension dépasse ladite deuxième valeur de seuil, caractéristique du deuxième extracteur.
- 2Transpondeur selon la revendication 1 , caractérisé en ce que l'extracteur de type haut (36) comporte:un transistor d'entrée (44) de type PMOS et relié à l'antenne (24) un inverseur polarisé (52) comportant deux transistors l'un de type PMOS (52c) et l'autre de type NMOS (52d), muni d'une entrée (52a) et d'une sortie (52b), et commandé par le transistor d'entrée, un redresseur de valeur de crête (46), formé d'une diode (46a) et d'un condensateur (46b), deux sources de courant (48, 50) alimentant respectivement le transistor d'entrée (44) et l'inverseur polarisé (52), et un inverseur simple (53), dans lequel le redresseur de valeur de crête (46), comporte une entrée (33a) reliée à l'antenne (24) et une sortie (46c) reliée à l'inverseur polarisé (52) pour lui appliquer une tension d'alimentation (VData) égale à la tension de crête (Txmax) du premier signal (Tx) et dans lequel l'entrée (52a) de l'inverseur polarisé (52) est reliée à l'antenne (24) au travers du transistor d'entrée (44) qui décale le signal (Tx) vers le bas, l'extracteur de type haut (36) étant agencé de manière à ce que son seuil de détection (Uh) est défini par la tension d'alimentation (VData) décalée vers le bas d'une valeur égale à la différence de tension définie par les tensions de seuils des deux transistors PMOS (52c) et (44), de telle sorte que ledit signal d'horloge est interrompu dès que la tension de crête (Tx max ) du premier signal (Tx) chute en dessous du seuil de détection (Uh).
Independent claims2
48 paragraphs in 1 section, as filed
PASSIVE TRANSPONDER LOW CONSUMPTION
The present invention relates to passive transponders electromagnetic coupling, especially the type with low consumption. It relates more particularly to a radio-frequency transponder for contactless identification by means of a drive. This transponder comprises:
• an antenna,
• an analog circuit which includes a capacitor, an alternating current converter DC, a modulator and a demodulator,
• a control logic circuit, and
• a memory.
This transponder is arranged so that: • the antenna and the capacitor together form a resonant circuit,
• the antenna receives a first signal from the reader, sinusoidal, with a peak voltage modulated carrier and controls, and outputs a second signal carrying a response to these commands,
• the converter converts the first signal into a rectified signal, to ensure the transponder power.
In the known transponders, the analog circuitry further comprises a clock extractor type low or high level type. When the extractor is of low type, threshold value is constant. It is chosen low enough so that the connection between reader and transponder can be done even when the transmission conditions are difficult. It must, however, be sufficiently high, as described in EP 0732663, so that the damping time required to reach the threshold value, it is not too long when the transmission conditions are good. This results in a compromise which implies that the pause time between two bits must at least be equal to ten periods of the sinusoidal signal.
With a high extractor type, break time can be shortened, while retaining flexibility of use, since the threshold value is variable, defined with reference to ia signal peak voltage received by the transponder. In this way, the time between the end of the signal transmitted by the reader and its detection by the clock extractor is of the order of the period.
The time between the beginning of a break of the signal transmitted by the reader and its detection by the clock extractor is therefore greatly reduced. This may, for cons, increase the time between the start of the signal transmitted by the reader and its detection by the clock extractor. Therefore, to further reduce the pause time, the analog circuit further comprises two clock extractors, one tall guy, the other kind of low, arranged so that the type extractor above processes the first signal received by the transponder to extract a clock signal to the demodulator as the peak of the signal voltage exceeds a first threshold value, and the low level type extractor sets a second threshold value, the two extractors being arranged such that the clock signal is interrupted as soon as the first peak signal voltage falls below the first threshold value, characteristic of the first extractor, and that it is restored as soon as the voltage exceeds the second threshold value, the second feature extractor.
Advantageously, the top type extractor includes:
• a PMOS type input transistor and connected to the antenna,
• a polarized inverter including two transistors one PMOS and one NMOS type having an input and an output, and controlled by the input transistor, • a peak value rectifier, formed of a diode and a capacitor,
• two current sources respectively powering the input transistor and the polarized inverter, and "a simple inverter,
In this extractor, the peak value rectifier, has an input connected to the antenna and an output connected to the polarized inverter to apply thereto a supply voltage equal to the first peak voltage signal and wherein the input of the polarized inverter is connected to the antenna through the input transistor which shifts the signal down, the high level type extractor being arranged such that its detection threshold is defined by the voltage 'offset-fed downwards by a value equal to the voltage difference defined by the threshold voltages of the two PMOS transistors such that said clock signal is interrupted as soon as the first signal peak voltage drops below the detection limit.
Other advantages and features of the invention emerge from the description which follows, given in light of the accompanying drawing, in which:
• Figure 1 shows schematically a transponder according to the invention and a reader for identifying the transponder;
• Figure 2 shows a part of the transponder of Figure 1, more particularly its analog circuit;
• Figure 3 shows respectively at a and b, extractors patterns high and low,
• Figure 4 shows, respectively, on lines a to d, the voltage curves measured at the terminals of the antenna of the reader, the transponder antenna and the high and low clock signals.
• Figure 5 shows, schematically, a reader for the transponders according to the invention, a part thereof being illustrated in more detail in Figure 6. The assembly shown in Figure 1, comprises a reader 10 and a transponder 12. The reader 10 comprises an antenna 14 more precisely transmitting an electromagnetic signal Lx, an electronic control unit 16, advantageously a microcontroller and a computer 18 connected to a keyboard 20 and a screen 22.
The transponder 12 is formed of an antenna 24, an analog circuit 25, a control logic circuit 26 and a memory 27. The analog circuit 25, which will be described in more detail below, is connected to the antenna, for receiving the signal which is received by the latter. This signal provides three functions:
• The power supply of the transponder,
• The provision of a clock signal, and
• The transmission of commands.
After processing, the signal is transmitted from analogue circuit 25 to logic circuit 26, by three connections 28a, 28b and 28c, respectively ensuring the transmission of energy, the clock and the serial input function. The logic circuit 26 addresses data to analogue circuit 25, via connection 29 type "serial output". He introduced and will seek information in the memory 27, respectively by the connections 30a and 30b. Orders are processed by the logic circuit 26 based on information received and those contained in the memory 27. A response is sent by the logic circuit 26, the analog circuit 25 to send a signal back to the reader 10.
As shown in Figure 2, the analog circuit 25 comprises a capacitor 32, an alternating current converter DC 34, a low clock extractor 35 and a high level clock extractor 36, a demodulator 38 and a modulator 40.
The capacitor 32 forms, with the antenna 24, a resonant circuit whose natural frequency is adjusted to the frequency of signal Lx transmitted by the reader 10, and the terminals of which are connected by the connections 33a and 33b, the inputs the converter 34, extractors 35 and 36, and the outputs of the modulator 40, so that the signal received by the transponder is applied to each of them and that the signal transmitted by the transponder is applied to the antenna. The demodulator 38 receives, from the antenna 24, its energy through converter 34, and the clock and commands through extractors 35 and 36.
Found in this figure, binding of supply 28a, 28b link clock and the link 28c of the serial inputs, forming the outputs of the analog circuit 25. Note also the link 29, serial inputs, which allows the contact information of logic circuit 26 to the analog circuit 25 and particularly to its modulator 40.
The converter 34 is so well known in the art, formed of a double rectifier to vibrations with a large energy capacitor, powering a voltage stabilizer. It provides power to all parts of the transponder 12.
The low level type extractor is made by means of two simple inverters 42 and 43 in series, as shown in Figure 3a. Inverter 42 is formed of a PMOS transistor 42a and NMOS transistor 42b. It is powered by a stabilized voltage VDD provided by converter 34. The antenna 24 applies signal Tx to its input 42c. The dimensions of the transistors 42a and 42b are calculated such that the threshold voltage Ub at which switches the circuit or close to 1 V.
An extractor generates a clock signal each time Tx is greater than 1V, this signal being interrupted when Tx falls below this level. Accordingly, the clock signal is interrupted.
Under normal operating conditions, the peak voltage Tx<sub>max</sub> is generally of the order of ten volts. With an antenna quality factor of between 15 and 30, it takes about 3-6 cycles after the break for voltage Tx to be permanently below 1V. While it would be possible to dimension the transistors so that the threshold voltage Ub is higher. In this case, however, the transponder can not normally react when the received signal is close to Ub. This reduces accordingly sensitivity. 3b shows, in more detail, the high level type extractor 36. It consists of an input transistor 44, of PMOS type and a rectifier peak value of 46, both connected to the antenna by 33a, two current sources 48 and 50 and two inverters 52 and 53, one 52 being polarized, the other 53 simple. Specifically, the rectifier peak value 46 is formed of a diode 46a and a capacitor 46b. Its input is connected to antenna 24 by connection 33a and its output 46c to the inverter 52 to apply a voltage VData equal to the peak voltage Tx<sub>my</sub>χ of the signal received by the antenna through connection 33a. Inverter 52 has an input 52a and 52b output, and two PMOS 52c and NMOS 52d. The inlet 52a is connected to the antenna 24 through the transistor 44 which shifts the voltage of the antenna down to a value equal to its threshold voltage. Uh the detection threshold of the high level extractor is offset downwards relative to VData a value equal to the difference of the threshold voltages of the PMOS transistors 44 and 52c. These are dimensioned such that the threshold voltage of the transistor 52c is several hundred mV greater than the transistor threshold voltage 44. Thus, the clock signal is interrupted as soon as the voltage of the signal Tx received by the antenna fall from a value equal to the difference between the two threshold voltages, regardless of the value of the peak voltage Txm<sub>ax</sub>.
To understand the operation of the clock extractors, 4 shows respectively on lines a, b, c and d, the signal Lx transmitted by the antenna 14 of the reader, the Tx received by transponder 12, and high clock signals and low CLKh CLKb. On the line, we find that the reader antenna transmits a sinusoidal signal, which is periodically interrupted when the voltage is maximum.
When the voltage of signal Lx becomes constant, the Tx signal across the antenna 24 of transponder 12 decreases, as can be seen on line b, more or less rapidly, the rate being lower as the factor quality is high. The peak voltage TXm<sub>at</sub>x is even higher than the received signal is high. However, when the voltage exceeds a limit value, the signal is saturated.
At the start of a signal Lx transmitted by the reader, extractors of high clock signals 36 and bottom 35 both respond very quickly, as seen on lines and ç. By cons, in poor reception conditions, the high clock signal CLKh can appear after many periods of signal Lx transmitted by the reader. When the reader 10 interrupts the transmission of the sinusoidal signal, we find that the Tx signal received by the antenna 24 is damped slowly. This is because the quality factor of the resonant circuit that it forms with the capacitor 32 must be high.
Because of this slow sinking, it takes several times before the bottom extractor 35 does not react, while CLKh signal from the high level extractor 36 is interrupted in synchronism.
It is thus clear that in cases where the received signal is regular and intense, just to have a high level extractor in the transponder in order to significantly reduce the time to break. For against, when the received signal does not saturate, then it is desirable to have high and low extractors, thereby making it possible to ensure a pause of short duration. It is thus possible to transmit the maximum amount of energy and a large amount of information even when the carrier frequency is low.
Figures 5 and 6 show, in more detail the electronics control structure 16 fitted to the reader 10. The electronic control device 16 is formed of a time base 54, a modulator 56, a demodulator 58, a decoder 60, a communication interface 62 and a control circuit 64.
The time base 54 is connected to the control circuit 64, by a link 54a, through which it delivers a sinusoidal signal of constant frequency, preferably between 9 and 150 kHz, which serves as a carrier. The control circuit 64 receives the modulator 56, by a link 56a, information which enable it to modulate the carrier signal to send data to a transponder disposed in the vicinity of the reader, via the antenna 14 which is connected to control circuit 64 by means of a link 64a.
The antenna 14 is connected to the demodulator 58 by a connection 14a. Thus, when the transponder replies to the reader data, the signal that address, detected by the antenna 14, is received by demodulator 58, through connection 14a. This signal is processed by the demodulator 58 and the information it contains is addressed to decoder 60 through a link 58a. The decoder 60 interprets the information on the memory database and transmits them to the interface 62 through a link 60a. The interface 62 is connected to the outside by a connection 62a, formed such a RS 232 line, for the transmission of commands and data to man-machine interfaces. It is also connected to the modulator 56 by a link 62b.
Thus, when an operator wishes to identify an object equipped with a transponder and arranged in the field of the reader 10, it gives an order via the keyboard 20. This order is managed by 18 and sent to the electronic computer controller 16 through the connection 62a. The interface 62 address this to the modulator 56. The latter cooperates with the control circuit 64 to modulate the carrier signal from the time base 54.
As has already been noted above, it is difficult to read the signals received by the antenna 14, as they are very low. The demodulator 58, shown in detail in Figure 6, ensures efficient playback. It comprises first and second channels 66 and 68, arranged in parallel, an adder 70 connected to the outputs of channels 66 and 68, a filter amplifier 72 and a comparator 74 arranged in series to the output of the adder 70.
The channel 66 is formed of a multiplier 76. The channel 68 comprises an inverter type multiplier 78, a low-pass filter 80 and a sampling circuit 82.
The two channels 66 and 68 are connected to the antenna by connection 14a. They therefore receive both the signal UR (t) from the antenna 14. This modulated signal comprises two components, one corresponding to the transmitted signal and the other sensed signal from the transponder. Decoder 58 has the function of extracting the signal X (t) which correspond to the component originating from the transponder. In a first operation, the signal is multiplied by itself by the multipliers 76 and 78, the latter further inverting the resulting signal. In other words, the US signal (t) from the multiplier 76 is equal to the square of UR (t), while that derived from multiplier 78 is equal, but of opposite sign. -US (T) derived from multiplier 78, is then treated in a conventional manner, using the low-pass filter. 80, then by the sampling circuit 82.
In the device described, the drive 16 is the master as regards the transponder. In other words, the reader can know at any time when a transponder is likely to respond to a query. Just before the start of the response signal, the sampling circuit 82 memorizes the mean value of -US (t - At) provided by the filter 80. It is this stored signal that is added to signal US (t) . The result of this addition allows, after filtering and amplification by the amplifier-filter 72 and then compared by the comparator 74, to extract X (t), which includes all the information from the transponder, while the signal from the carrier was removed.
It is obvious that the transponder as described may be many variations without departing from the scope of the invention. Thus, thanks to the fact that the transponders of the invention are provided with a high level extractor, moreover associated with a low extractor it is possible to minimize interruptions of the signal emitted by the antenna 14, bearing information to transmitted, and thus ensure optimal conditions for transmitting information and energy between the reader and the transponders, even in particularly adverse conditions, for example in the presence of a metal screen between the antennas 14 and 24.
5 sheets
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Every citation, both ways
| Document | Relation | Office | Category | Cited during | Relevant claims |
|---|---|---|---|---|---|
| US8847737B2 | Cited by | United States of America | – | Applicant | – |
| EP1986136A1 | Cited by | European Patent Office (EPO) | – | Search report | – |
| US8195100B2 | Cited by | United States of America | – | Applicant | – |
| EP1818858A2 | Cited by | European Patent Office (EPO) | – | Search report | – |
| CN100405385C | Cited by | China | – | Search report | – |
| EP1818858A3 | Cited by | European Patent Office (EPO) | – | Search report | – |
| EP1818858A2 | Cited by | European Patent Office (EPO) | – | Applicant | – |
| US9076933B2 | Cited by | United States of America | – | Applicant | – |
| EP0732663A2 | Cites | European Patent Office (EPO) | A | International search | 1 |
| US5313198A | Cites | United States of America | A | International search | 1 |
25 members in 8 offices
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 0009625 | France | A | |
| 0009625 | France | A | |
| 0009625 | – | – | – |
| FR20000009625 | – | – | – |
Members25
| Document | Office | Kind | |
|---|---|---|---|
| FR2812142A1 | France | A1 | |
| WO0209021A1 | World Intellectual Property Organization (WIPO) | A1 | |
| WO0209028A1This record | World Intellectual Property Organization (WIPO) | A1 | |
| AU7041501A | Australia | A | |
| AU7041601A | Australia | A | |
| EP1301898A1 | European Patent Office (EPO) | A1 | |
| EP1312032A1 | European Patent Office (EPO) | A1 | |
| JP2004505476A | Japan | A | |
| JP2004518376A | Japan | A | |
| US2004155755A1 | United States of America | A1 | |
| US2004178265A1 | United States of America | A1 | |
| US6891475B2 | United States of America | B2 | |
| US7014111B2 | United States of America | B2 | |
| US2006091213A1 | United States of America | A1 | |
| EP1301898B1 | European Patent Office (EPO) | B1 | |
| AT330291T | Austria | T | |
| ATE330291T1 | Austria | T1 | |
| DE60120703D1 | Germany | D1 | |
| EP1312032B1 | European Patent Office (EPO) | B1 | |
| AT341796T | Austria | T | |
| ATE341796T1 | Austria | T1 | |
| DE60123638D1 | Germany | D1 | |
| DE60120703T2 | Germany | T2 | |
| US7240838B2 | United States of America | B2 | |
| DE60123638T2 | Germany | T2 |
9 legal events, as 2 offices reported them to INPADOC
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Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| Wipo information: grant in national officeWWG | WWG | WO | |
| Wipo information: entry into national phaseWWE | WWE | WO | |
| Procedure relating to pct application: ceased to have effect for deCeased8642 | 8642 | DE | |
| Wipo information: published in national officeWWP | WWP | WO | |
| Wipo information: entry into national phaseWWE | WWE | WO | |
| Ep: the epo has been informed by wipo that ep was designated in this application121 | 121 | WO | |
| Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)DFPE | DFPE | WO | |
| Designated statesAK | AK | WO | |
| Designated countries for regional patentsAL | AL | WO |
Numbers
- Publication
- 02/09028
- Publication, DOCDB
- 0209028
- Publication, EPODOC
- WO0209028
- Application
- 100446
- Application, DOCDB
- 0100446
- Application, EPODOC
- WO2001CH00446
Titles2
- English
- LOW-POWER PASSIVE TRANSPONDER
- French
- TRANSPONDEUR PASSIF A FAIBLE CONSOMMATION
Classification
- CPC, 2
- G06K7/0008
- G06K19/0723
- IPC, 6
- G06K7 00
- G06K17 00
- G06K19 07
- H02J17 00
- H04B1 59
- H04B5 48
Designated states4
- Regional, 4
- Zimbabwe
- Turkmenistan
- Sweden
- Togo