Semiconductor device with oxide semiconductor layer

CROSS-REFERENCE TO RELATED APPLICATIONS

0001This application is a continuation of U.S. application Ser. No. 13/870,027, filed Apr. 25, 2013, now allowed, which is a continuation of U.S. application Ser. No. 12/872,823, filed Aug. 31, 2010, now U.S. Pat. No. 8,541,780, which claims the benefit of a foreign priority application filed in Japan as Serial No. 2009-205222 on Sep. 4, 2009, all of which are incorporated by reference.

TECHNICAL FIELD

0002The present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.

0003In this specification, a semiconductor device generally means a device which can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

BACKGROUND ART

0004In recent years, a technique for forming a thin film transistor (TFT) by using a semiconductor thin film (having a thickness of approximately several nanometers to several hundred nanometers) formed over a substrate having an insulating surface has attracted attention. Thin film transistors are applied to a wide range of electronic devices such as ICs or electro-optical devices, and prompt development of thin film transistors that are to be used as switching elements in image display devices, in particular, is being pushed. Various metal oxides are used for a variety of applications.

0005Some metal oxides have semiconductor characteristics. Examples of such metal oxides having semiconductor characteristics include tungsten oxide, tin oxide, indium oxide, and zinc oxide. Thin film transistors in which channel formation regions are formed of such metal oxides having semiconductor characteristics are known (Patent Documents 1 and 2).

REFERENCE

Patent Document

0000[Patent Document 1]

0006Japanese Published Patent Application No. 2007-123861

0000[Patent Document 2]

0007Japanese Published Patent Application No. 2007-096055

DISCLOSURE OF INVENTION

0008It is an object to manufacture a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable.

0009In a thin film transistor, an insulating layer which covers an oxide semiconductor layer is made to contain a boron element or an aluminum element. The insulating layer containing a boron element or an aluminum element is formed by a sputtering method using a silicon target or a silicon oxide target containing a boron element or an aluminum element.

0010The concentration of boron in the insulating layer containing a boron element is 1×10¹⁸cm⁻³to 1×10²²cm⁻³inclusive, preferably 1×10²⁰cm⁻³to 5×10²⁰cm⁻³inclusive. In addition, the concentration of aluminum in the insulating layer containing an aluminum element is 3×10¹⁹cm⁻³to 1×10²²cm⁻³inclusive, preferably 1×10²⁰cm⁻³to 5×10²⁰cm⁻³inclusive.

0011Such a concentration range can be obtained by secondary ion mass spectrometry (SIMS) or on the basis of data of SIMS.

0012Before the insulating layer containing a boron element or an aluminum element is formed, plasma treatment using a gas such as N₂O, N₂, or Ar is performed. The plasma treatment using a gas such as N₂O, N₂, or Ar removes adsorbed water or hydrogen on the oxide semiconductor layer and reduces moisture or the like entering an interface between the oxide semiconductor layer and the insulating layer containing a boron element or an aluminum element.

0013Alternatively, an insulating layer containing an antimony (Sb) element or a phosphorus (P) element instead of a boron element may cover the oxide semiconductor layer of the thin film transistor. Further alternatively, an insulating layer containing a plurality of elements selected from a boron element, an antimony element, an aluminum element, and a phosphorus element, for example, an insulating layer containing both a boron element and a phosphorus element may cover the oxide semiconductor layer of the thin film transistor. The concentration of antimony in the insulating layer containing an antimony (Sb) element is 1×10¹⁹cm⁻³to 3×10²¹cm⁻³inclusive. The concentration of phosphorus in the insulating layer containing a phosphorus (P) element is 1×10¹⁹cm⁻³to 3×10²¹cm⁻³inclusive.

0014An insulating layer formed of silicon oxide which contains a boron element, an antimony element, an aluminum element, or a phosphorus element is more likely to be vitrified, compared to an insulating layer formed of silicon oxide which does not contain any of the above elements. Therefore, water is not adsorbed easily under the humid condition from room temperature to 150° C., and moisture, hydrogen, or the like can be prevented from entering the interface between the oxide semiconductor layer and the insulating layer. Note that in this specification, vitrification means hardening of silicon oxide without crystallization.

0015In addition, the oxide semiconductor layer of the thin film transistor may be sandwiched between the insulating layers each formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element, whereby entry of water or the like is prevented so as to improve the reliability of the thin film transistor. When the insulating layer containing a boron element, an antimony element, an aluminum element, or a phosphorus element is placed below the oxide semiconductor layer, one of or both a base insulating layer in contact with a substrate and a gate insulating layer covering a gate electrode layer is/are used as this insulating layer.

0016Further, a single insulating layer deposited by changing deposition conditions of a sputtering method or insulating layers stacked by changing deposition conditions of a sputtering method may be used. For example, an insulating layer formed of silicon oxide in which the concentration of a boron element has a gradient may be used. In addition, a two-layer structure of an insulating layer formed of silicon oxide which contains a boron element and an insulating layer formed of silicon oxide which does not contain a boron element may be employed. Furthermore, a layered structure including three or more layers may be employed in which an insulating layer formed of silicon oxide which contains a boron element and an insulating layer formed of silicon oxide which does not contain a boron element are repeatedly arranged.

0017According to an embodiment of the present invention disclosed in this specification, a semiconductor device includes a first insulating layer over a substrate, an oxide semiconductor layer over the first insulating layer, and a second insulating layer over the oxide semiconductor layer. The first insulating layer and the second insulating layer each contain a boron element or an aluminum element at 1×10¹⁸cm⁻³to 1×10²²cm⁻³inclusive.

0018In addition, according to another embodiment of the present invention, a semiconductor device includes a first insulating layer over a substrate, an oxide semiconductor layer over the first insulating layer, and a second insulating layer over the oxide semiconductor layer. The first insulating layer and the second insulating layer each contain a phosphorus element or an antimony element at 1×10¹⁹cm⁻³to 3×10²¹cm⁻³inclusive.

0019In each of the above structures, the second insulating layer is in contact with the oxide semiconductor layer.

0020In addition, in each of the above structures, the semiconductor device further includes a third insulating layer formed of silicon oxide between the second insulating layer and the oxide semiconductor layer, and the third insulating layer does not contain a boron element, an aluminum element, a phosphorus element, or an antimony element.

0021With the above structures, at least one of the objects can be achieved.

0022In order to achieve the above structure, according to another embodiment of the present invention, a method for manufacturing a semiconductor device includes the steps of: forming a gate electrode layer over a substrate; forming an oxide semiconductor layer over the gate electrode layer; subjecting the oxide semiconductor layer to dehydration or dehydrogenation, wherein water or hydrogen is prevented from entering the oxide semiconductor layer without exposure to the air after the dehydration or the dehydrogenation; subjecting the oxide semiconductor layer to plasma treatment using N₂O, N₂, or Ar; and forming an insulating layer in contact with at least part of the oxide semiconductor layer after the plasma treatment.

0023The above manufacturing method further includes the step of forming a second insulating layer containing a boron element, an aluminum element, a phosphorus element, or an antimony element over the insulating layer by a sputtering method. With the second insulating layer which contains a boron element, an aluminum element, a phosphorus element, or an antimony element, water is not adsorbed easily under the humid condition from room temperature to 150° C., and moisture, hydrogen, or the like can be prevented from entering the interface with the oxide semiconductor layer.

0024According to another embodiment of the present invention, a method for manufacturing a semiconductor device includes the steps of: forming a gate electrode layer over a substrate; forming a first insulating layer over the gate electrode layer by a sputtering method; forming an oxide semiconductor layer over the first insulating layer; subjecting the oxide semiconductor layer to dehydration or dehydrogenation, wherein water or hydrogen is prevented from entering the oxide semiconductor layer without exposure to the air after the dehydration or the dehydrogenation; subjecting the oxide semiconductor layer to plasma treatment using N₂O, N₂, or Ar; and forming a second insulating layer over the oxide semiconductor layer by a sputtering method. The first insulating layer and the second insulating layer are each formed by a sputtering method using a silicon target and each contain a boron element, an aluminum element, a phosphorus element, or an antimony element.

0025The above manufacturing method further includes the step of forming a third insulating layer in contact with at least part of the oxide semiconductor layer after the plasma treatment, and the third insulating layer is formed of silicon oxide by a sputtering method using a silicon target. Note that in the third insulating layer, the concentration of each of a boron element, an aluminum element, a phosphorus element, and an antimony element is lower than that in the first and second insulating layers, or the concentrations of these elements are set to be less than the lower limit of measurement.

0026The oxide semiconductor layer is a thin film of InMO₃(ZnO)_m(m>0). This thin film is used as the oxide semiconductor layer to fabricate the thin film transistor. Note that M denotes one metal element or a plurality of metal elements selected from Ga, Fe, Ni, Mn, and Co. For example, M may be Ga or may include the above metal element in addition to Ga, for example, M may be Ga and Ni or Ga and Fe. Moreover, in the above oxide semiconductor, in some cases, a transition metal element such as Fe or Ni or an oxide of the transition metal is contained as an impurity element in addition to a metal element contained as M. In this specification, as for the oxide semiconductor layers whose composition formulas are represented by InMO₃(ZnO)_m(m>0), an oxide semiconductor which includes Ga as M is referred to as an In—Ga—Zn—O-based oxide semiconductor, and a thin film thereof is referred to as an In—Ga—Zn—O-based film.

0027As a metal oxide applied to the oxide semiconductor layer, any of the following metal oxides can be used besides the above: an In—Sn—O based metal oxide, an In—Sn—Zn—O-based metal oxide, an In—Al—Zn—O-based metal oxide, a Sn—Ga—Zn—O-based metal oxide, an Al—Ga—Zn—O-based metal oxide, a Sn—Al—Zn—O-based metal oxide, an In—Zn—O-based metal oxide, a Sn—Zn—O-based metal oxide, an Al—Zn—O-based metal oxide, an In—O-based metal oxide, a Sn—O-based metal oxide, and a Zn—O-based metal oxide. Silicon oxide may be contained in the oxide semiconductor layer formed using any of the above metal oxides.

0028Dehydration or dehydrogenation is heat treatment which is performed in an atmosphere of an inert gas such as nitrogen or a rare gas (such as argon or helium) at a temperature greater than or equal to 400° C. and less than or equal to 750° C., preferably greater than or equal to 425° C. and less than the strain point of the substrate, with which an impurity such as moisture contained in the oxide semiconductor layer is reduced.

0029Further, a heating method using an electric furnace, a rapid heating method such as a gas rapid thermal annealing (GRTA) method using a heated gas or a lamp rapid thermal annealing (LRTA) method using lamp light, or the like can be used for the heat treatment for dehydration or dehydrogenation.

0030The above heat treatment is performed under such a condition that two peaks of water or at least one peak of water at around 300° C. is not detected even if TDS is performed at up to 450° C. on the oxide semiconductor layer subjected to dehydration or dehydrogenation. Therefore, even when TDS is performed at up to 450° C. on a thin film transistor using the dehydrated or dehydrogenated oxide semiconductor layer, at least a peak of water at around 300° C. is not detected.

0031In addition, when the temperature is lowered from a heating temperature T at which dehydration or dehydrogenation is performed on the oxide semiconductor layer, it is important to prevent entry of water or hydrogen by keeping the substrate in the furnace that has been used for the dehydration or dehydrogenation so that the oxide semiconductor layer is not exposed to the air. By performing dehydration or dehydrogenation, the oxide semiconductor layer is changed into an n-type (e.g., n⁻-type or n⁺-type) oxide semiconductor layer, i.e., a lower-resistance oxide semiconductor layer, and then, the n-type oxide semiconductor layer is changed into an i-type semiconductor layer to be a higher-resistance oxide semiconductor layer. When a thin film transistor is formed using such an oxide semiconductor layer, the threshold voltage of the thin film transistor can be positive, so that a so-called normally-off switching element can be realized. It is preferable in a display device that a channel be formed with a positive threshold voltage which is as close to 0 V as possible in a thin film transistor. If the threshold voltage of the thin film transistor is negative, it tends to be normally on; in other words, current flows between a source electrode and a drain electrode even when the gate voltage is 0 V. In an active-matrix display device, electric characteristics of thin film transistors included in a circuit are important and performance of the display device is dependent on the electric characteristics of the thin film transistors. Among the electric characteristics of the thin film transistors, in particular, a threshold voltage (Vth) is important. When the threshold voltage value is high or negative even when the field effect mobility is high, it is difficult to control the circuit. When the thin film transistor has a high threshold voltage and a large absolute value of its threshold voltage, the thin film transistor cannot perform a switching function as a TFT when the thin film transistor is driven at low voltage and may be a load. In the case of an re-channel thin film transistor, it is preferable that a channel be formed and drain current begins to flow after the positive voltage is applied as a gate voltage. A transistor in which a channel is not formed unless the driving voltage is increased and a transistor in which a channel is formed and drain current flows even in the case of the negative voltage state are unsuitable for a thin film transistor used in a circuit.

0032In this specification, heat treatment which is performed in an atmosphere of an inert gas such as nitrogen or a rare gas (such as argon or helium) is referred to as heat treatment for dehydration or dehydrogenation. In this specification, “dehydrogenation” does not indicate only elimination of H₂by the heat treatment. For convenience, elimination of H, OH, or the like is also referred to as “dehydration or dehydrogenation”.

0033In addition, a thin film transistor including an oxide semiconductor layer can be used for an electronic device or an optical device. For example, a thin film transistor including an oxide semiconductor layer can be used for a switching element of a liquid crystal display device, a switching element of a light-emitting device, a switching element of an electronic paper, and the like.

0034In addition, without limitation to a display device, an insulated-gate semiconductor device for controlling a large amount of electric power, in particular, a semiconductor device called a power MOS device can be manufactured with the use of a thin film transistor including an oxide semiconductor layer. Examples of the power MOS device include a MOSFET and an IGBT.

0035An insulating layer formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element is provided above or below an oxide semiconductor layer of a thin film transistor, whereby entry of water or the like is prevented so as to improve the reliability of the thin film transistor.

BRIEF DESCRIPTION OF DRAWINGS

0036<figref idref="DRAWINGS">FIGS. 1A to 1D</figref> are cross-sectional views illustrating an embodiment of the present invention.

0037<figref idref="DRAWINGS">FIGS. 2A to 2D</figref> are cross-sectional views illustrating an embodiment of the present invention.

0038<figref idref="DRAWINGS">FIGS. 3A to 3D</figref> are cross-sectional views illustrating an embodiment of the present invention.

0039<figref idref="DRAWINGS">FIG. 4</figref> is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.

0040<figref idref="DRAWINGS">FIGS. 5A to 5C</figref> are cross-sectional views each illustrating a display device according to an embodiment of the present invention.

0041<figref idref="DRAWINGS">FIG. 6A</figref> is a top view and <figref idref="DRAWINGS">FIG. 6B</figref> is a cross-sectional view illustrating a display device according to an embodiment of the present invention.

0042<figref idref="DRAWINGS">FIGS. 7A and 7C</figref> are top views and <figref idref="DRAWINGS">FIG. 7B</figref> is a cross-sectional view illustrating a display device according to an embodiment of the present invention.

0043<figref idref="DRAWINGS">FIG. 8</figref> is a cross-sectional view illustrating an embodiment of the present invention.

0044<figref idref="DRAWINGS">FIG. 9</figref> is a top view illustrating an embodiment of the present invention.

0045<figref idref="DRAWINGS">FIG. 10</figref> is a top view illustrating an embodiment of the present invention.

0046<figref idref="DRAWINGS">FIG. 11</figref> is an equivalent circuit diagram illustrating a pixel according to an embodiment of the present invention.

0047<figref idref="DRAWINGS">FIG. 12</figref> is a cross-sectional view illustrating an embodiment of the present invention.

0048<figref idref="DRAWINGS">FIGS. 13A and 13B</figref> are views each illustrating an example of an electronic device.

0049<figref idref="DRAWINGS">FIGS. 14A and 14B</figref> are views each illustrating an example of an electronic device.

0050<figref idref="DRAWINGS">FIG. 15</figref> is a view illustrating an example of an electronic device.

0051<figref idref="DRAWINGS">FIG. 16</figref> is a view illustrating an example of an electronic device.

0052<figref idref="DRAWINGS">FIG. 17</figref> is a view illustrating an example of an electronic device.

0053<figref idref="DRAWINGS">FIG. 18</figref> is a graph showing the concentration of a boron element in a silicon oxide film.

BEST MODE FOR CARRYING OUT THE INVENTION

0054Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the description below, and it is easily understood by those skilled in the art that modes and details thereof can be modified in various ways. Therefore, the present invention is not construed as being limited to the description of the embodiments below.

Embodiment 1

0055<figref idref="DRAWINGS">FIG. 1D</figref> illustrates an example of a cross-sectional structure of a thin film transistor formed over a substrate, which is one kind of bottom gate thin film transistor.

0056A thin film transistor <b>410</b> illustrated in <figref idref="DRAWINGS">FIG. 1D</figref> is a channel-etched thin film transistor and includes, over a substrate <b>400</b> having an insulating surface, a gate electrode layer <b>411</b>; a first gate insulating layer <b>402</b><i>a</i>; a second gate insulating layer <b>402</b><i>b</i>; an oxide semiconductor layer including at least a channel formation region <b>413</b>, a high-resistance source region <b>414</b><i>a</i>, and a high-resistance drain region <b>414</b><i>b</i>; a source electrode layer <b>415</b><i>a</i>; and a drain electrode layer <b>415</b><i>b</i>. Moreover, an oxide insulating layer <b>416</b> which covers the thin film transistor <b>410</b> and is in contact with the channel formation region <b>413</b> is provided, and a protective insulating layer <b>403</b> is provided over the oxide insulating layer <b>416</b>.

0057As the protective insulating layer <b>403</b>, an insulating layer formed of silicon oxide which contains a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method is used. The protective insulating layer formed of silicon oxide which contains a boron element, an antimony element, an aluminum element, or a phosphorus element is more likely to be vitrified, compared to an insulating layer formed of silicon oxide which does not contain any of the above elements. Therefore, water is not adsorbed easily under the humid condition from room temperature to 150° C., and moisture, hydrogen, or the like can be prevented from entering the interface with the oxide semiconductor layer.

0058Further, the first gate insulating layer <b>402</b><i>a </i>may be formed using an insulating layer formed of silicon oxide which contains a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method so that the oxide semiconductor layer of the thin film transistor may be sandwiched between the insulating layers each formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element, whereby entry of water or the like can be prevented so as to improve the reliability of the thin film transistor.

0059The thin film transistor <b>410</b> is described using a single-gate thin film transistor; a multi-gate thin film transistor including a plurality of channel formation regions can be formed when needed.

0060A process for forming the thin film transistor <b>410</b> over the substrate is described below with reference to <figref idref="DRAWINGS">FIGS. 1A to 1D</figref>.

0061First, a conductive film is formed over the substrate <b>400</b> having an insulating surface, and then, the gate electrode layer <b>411</b> is formed through a first photolithography step. Note that a resist mask may be formed by an ink-jet method. A photomask is not used when the resist mask is formed by an ink jet method, which results in reducing manufacturing costs.

0062Although there is no particular limitation on a substrate which can be used as the substrate <b>400</b> having an insulating surface, it is necessary that the substrate have at least a heat resistance high enough to resist heat treatment to be performed later. As the substrate <b>400</b> having an insulating surface, a glass substrate formed of barium borosilicate glass, aluminoborosilicate glass, or the like can be used.

0063In the case where the temperature of the heat treatment to be performed later is high, a glass substrate whose strain point is greater than or equal to 730° C. is preferably used. As the glass substrate, a substrate of a glass material such as aluminosilicate glass, aluminoborosilicate glass, or barium borosilicate glass is used, for example. Note that by containing a larger amount of barium oxide (BaO) than boric acid, a glass substrate that is heat-resistant and of more practical use can be obtained. Therefore, a glass substrate containing BaO and B₂O₃so that the amount of BaO is larger than that of B₂O₃is preferably used.

0064Note that a substrate formed of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used instead of the above glass substrate. Alternatively, crystallized glass or the like can be used.

0065As the material of the gate electrode layer <b>411</b>, there are an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy containing any of the above elements as a component, an alloy containing any of the above elements in combination, and the like.

0066Next, a gate insulating layer is formed over the gate electrode layer <b>411</b>.

0067The gate insulating layer can be formed with a single layer or stacked layers using one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon nitride oxide layer by a plasma CVD method, a sputtering method, or the like. For example, a silicon oxynitride layer may be formed using SiH₄, oxygen, and nitrogen as a deposition gas by a plasma CVD method.

0068In this embodiment, the gate insulating layer is a stack of the first gate insulating layer <b>402</b><i>a </i>with a thickness of 50 nm to 200 nm inclusive and the second gate insulating layer <b>402</b><i>b </i>with a thickness of 50 nm to 300 nm inclusive. As the first gate insulating layer <b>402</b><i>a</i>, a silicon oxide film with a thickness of 100 nm is formed by deposition in an oxygen atmosphere using a sputtering method in which a columnar-like polycrystalline silicon target containing a boron element (resistivity: 1 Ωcm to 10 Ωcm) is used. The silicon oxide film used as the first gate insulating layer <b>402</b><i>a </i>contains a boron element. Without limitation to a boron element, an aluminum element, a phosphorus element, or an antimony element may be used.

0069Further, for the second gate insulating layer <b>402</b><i>b</i>, a 100-nm-thick silicon oxide film is formed by a PCVD method.

0070Further, an insulating film serving as a base film may be provided between the substrate <b>400</b> and the gate electrode layer <b>411</b>. The base film has a function of preventing diffusion of an impurity element from the substrate <b>400</b>, and can be formed to have a single-layer structure or a layered structure using one or more of a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film. In addition, a silicon oxide film obtained by being deposited in an oxygen atmosphere using a sputtering method in which a silicon target containing a boron element is used may be formed as the base film.

0071An oxide semiconductor film <b>430</b> with a thickness of 2 nm to 200 nm inclusive is formed over the second gate insulating layer <b>402</b><i>b</i>. The oxide semiconductor film <b>430</b> preferably has a small thickness of less than or equal to 50 nm so as to remain in an amorphous state even when heat treatment for dehydration or dehydrogenation is performed after the oxide semiconductor film <b>430</b> is formed. Small thickness of the oxide semiconductor film can prevent the oxide semiconductor layer from being crystallized when heat treatment is performed after the formation of the oxide semiconductor layer.

0072Note that before the oxide semiconductor film <b>430</b> is formed by a sputtering method, dust attached to a surface of the second gate insulating layer <b>402</b><i>b </i>is preferably removed by reverse sputtering in which plasma is generated by introduction of an argon gas. The reverse sputtering refers to a method in which, without application of a voltage to a target side, an RF power source is used for application of a voltage to a substrate side in an argon atmosphere to generate plasma in the vicinity of the substrate and modify a surface. Note that instead of an argon atmosphere, nitrogen, helium, oxygen, or the like may be used.

0073In this embodiment, the oxide semiconductor film <b>430</b> is formed by a sputtering method with the use of an In—Ga—Zn—O-based oxide semiconductor deposition target. <figref idref="DRAWINGS">FIG. 1A</figref> is a cross-sectional view of this stage. In addition, the oxide semiconductor film <b>430</b> can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or an atmosphere containing a rare gas (typically, argon) and oxygen. When a sputtering method is employed, it is preferable that deposition be performed using a target containing SiO₂of 2 wt % to 10 wt % inclusive and SiOx (x>0) which inhibits crystallization be contained in the oxide semiconductor film <b>430</b> so as to prevent crystallization at the time of the heat treatment for dehydration or dehydrogenation in a later step.

0074Then, the oxide semiconductor film <b>430</b> is processed into an island-like oxide semiconductor layer through a second photolithography step. A resist mask for forming the island-like oxide semiconductor layer may be formed by an ink-jet method. A photomask is not used when the resist mask is formed by an ink-jet method, which results in reducing manufacturing costs.

0075Then, the oxide semiconductor layer is subjected to dehydration or dehydrogenation. The temperature of first heat treatment for dehydration or dehydrogenation is greater than or equal to 400° C. and less than or equal to 750° C., preferably greater than or equal to 400° C. and less than the strain point of the substrate. Here, the substrate is put in an electric furnace which is a kind of heat treatment apparatus and heat treatment is performed on the oxide semiconductor layer at 450° C. for one hour in a nitrogen atmosphere, and then, water or hydrogen is prevented from entering the oxide semiconductor layer without exposure to the air; thus, an oxide semiconductor layer <b>431</b> is obtained (see <figref idref="DRAWINGS">FIG. 1B</figref>).

0076The heat treatment apparatus is not limited to an electric furnace and may be provided with a device that heats an object to be processed by thermal conduction or thermal radiation from a heater such as a resistance heater or the like. For example, a rapid thermal annealing (RTA) apparatus such as a gas rapid thermal annealing (GRTA) apparatus or a lamp rapid thermal annealing (LRTA) apparatus can be used. An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus for performing heat treatment by using a high-temperature gas. As the gas, an inert gas which does not react with an object to be processed by heat treatment, like nitrogen or a rare gas such as argon is used.

0077For example, as the first heat treatment, GRTA may be performed as follows. The substrate is transferred and put in an inert gas which has been heated to a high temperature of 650° C. to 700° C., heated for several minutes, and transferred and taken out of the inert gas which has been heated to a high temperature. GRTA enables a high-temperature heat treatment for a short time.

0078Note that in the first heat treatment, it is preferable that water, hydrogen, or the like be not contained in an atmosphere of nitrogen or a rare gas such as helium, neon, or argon. Alternatively, it is preferable that nitrogen or a rare gas such as helium, neon, or argon introduced into the heat treatment apparatus have a purity of greater than or equal to 6N (99.9999%), preferably greater than or equal to 7N (99.99999%); that is, the impurity concentration be set to less than or equal to 1 ppm, preferably less than or equal to 0.1 ppm.

0079In accordance with conditions of the first heat treatment or a material of the oxide semiconductor layer, the oxide semiconductor layer may be crystallized and changed to a microcrystalline film or a polycrystalline film. For example, the oxide semiconductor layer may be crystallized to be a microcrystalline oxide semiconductor film in which the degree of crystallization is greater than or equal to 90% or greater than or equal to 80%. Further, in accordance with conditions of the first heat treatment or a material of the oxide semiconductor layer, the oxide semiconductor layer may be an amorphous oxide semiconductor film which does not contain crystalline components.

0080The first heat treatment of the oxide semiconductor layer may be performed on the oxide semiconductor film <b>430</b> before being processed into the island-like oxide semiconductor layer. In that case, after the first heat treatment, the substrate is taken out of the heat treatment apparatus and a photolithography step is performed.

0081Next, a metal conductive film is formed over the second gate insulating layer <b>402</b><i>b </i>and the oxide semiconductor layer <b>431</b>, and then, a resist mask is formed through a third photolithography step and the metal conductive film is selectively etched to form an island-like metal electrode layer. Examples of the material for the metal conductive film include an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W; an alloy containing any of these elements as a component; and an alloy containing any of these elements in combination.

0082The metal conductive film preferably has a three-layer structure in which an aluminum layer is stacked over a titanium layer and a titanium layer is stacked over the aluminum layer, or a three-layer structure in which an aluminum layer is stacked over a molybdenum layer and a molybdenum layer is stacked over the aluminum layer. Needless to say, the metal conductive film may have a single-layer structure or a layered structure of two or more layers.

0083Then, the resist mask is removed, another resist mask is formed through a fourth photolithography step, and etching is performed selectively to form the source electrode layer <b>415</b><i>a </i>and the drain electrode layer <b>415</b><i>b</i>; after that, the resist mask is removed (see <figref idref="DRAWINGS">FIG. 1C</figref>). Note that in the fourth photolithography step, in some cases, only part of the oxide semiconductor layer <b>431</b> is etched, whereby an oxide semiconductor layer having a groove (a depression portion) is formed. In addition, the resist mask for forming the source electrode layer <b>415</b><i>a </i>and the drain electrode layer <b>415</b><i>b </i>may be formed by an ink-jet method. A photomask is not used when the resist mask is formed by an ink-jet method, which results in reducing manufacturing costs.

0084In order to reduce the number of photomasks and steps in a photolithography step, etching may be performed with the use of a resist mask formed using a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. Since a resist mask formed using a multi-tone mask has a plurality of thicknesses and can be further changed in shape by performing etching, the resist mask can be used in a plurality of etching steps to provide different patterns. Therefore, a resist mask corresponding to at least two kinds of different patterns can be formed by using a multi-tone mask. Thus, the number of light-exposure masks can be reduced and the number of corresponding photolithography steps can also be reduced, whereby simplification of a process can be realized.

0085Then, plasma treatment using a gas such as N₂O, N₂, or Ar is performed. This plasma treatment removes water or the like adsorbed on a surface of the oxide semiconductor layer which is exposed. In addition, plasma treatment may be performed using a mixed gas of oxygen and argon.

0086After the plasma treatment, the oxide insulating layer <b>416</b> which serves as a protective insulating film and is in contact with part of the oxide semiconductor layer is formed without exposure to the air.

0087The oxide insulating layer <b>416</b> has a thickness of at least 1 nm and can be formed by a method by which an impurity such as water or hydrogen does not enter the oxide insulating layer <b>416</b>, such as a sputtering method, as appropriate. In this embodiment, a 200-nm-thick silicon oxide film is deposited as the oxide insulating layer <b>416</b> by a sputtering method. The substrate temperature in film formation may be room temperature to 300° C. inclusive and is 100° C. in this embodiment. The silicon oxide film can be formed by a sputtering method in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or an atmosphere containing a rare gas (typically argon) and oxygen. Further, a silicon oxide target or a silicon target can be used as a target. For example, the silicon oxide film can be formed by a sputtering method using a silicon target in an atmosphere containing oxygen and nitrogen. The oxide insulating layer <b>416</b> is formed in contact with the oxide semiconductor layer which has been an oxygen-deficient oxide semiconductor layer at the same time as the heat treatment for dehydration or dehydrogenation and become an n-type (lower-resistance) oxide semiconductor layer. As this oxide insulating layer <b>416</b>, an inorganic insulating film which does not contain an impurity such as moisture, a hydrogen ion, or OH⁻and blocks entry of such an impurity from the outside is used. Specifically, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, or an aluminum oxynitride film is used.

0088Next, second heat treatment (preferably at 200° C. to 400° C. inclusive, for example, 250° C. to 350° C. inclusive) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, the second heat treatment is performed at 250° C. for one hour in a nitrogen atmosphere. When the second heat treatment is performed, heat is applied while part of the oxide semiconductor layer (a channel formation region) is in contact with the oxide insulating layer <b>416</b>.

0089Through the above steps, the oxide semiconductor film after being deposited becomes the oxygen-deficient oxide semiconductor film to be the n-type (lower-resistance) oxide semiconductor film at the same time as the heat treatment for dehydration or dehydrogenation, and then, part of the oxide semiconductor film is selectively made to be in an oxygen excess state. As a result, the channel formation region <b>413</b> overlapping with the gate electrode layer <b>411</b> becomes i-type, and the high-resistance source region <b>414</b><i>a </i>overlapping with the source electrode layer <b>415</b><i>a </i>and the high-resistance drain region <b>414</b><i>b </i>overlapping with the drain electrode layer <b>415</b><i>b </i>are formed in a self-aligned manner. Though the above-described steps, the thin film transistor <b>410</b> is formed.

0090The high-resistance drain region <b>414</b><i>b </i>(or the high-resistance source region <b>414</b><i>a</i>) is formed in a portion of the oxide semiconductor layer which overlaps with the drain electrode layer <b>415</b><i>b </i>(or the source electrode layer <b>415</b><i>a</i>), so that the reliability of the thin film transistor can be increased. Specifically, with the formation of the high-resistance drain region <b>414</b><i>b</i>, the conductivity can be gradually varied from the drain electrode layer <b>415</b><i>b </i>to the high-resistance drain region <b>414</b><i>b </i>and the channel formation region <b>413</b>. Thus, in the case where the transistor is operated with the drain electrode layer <b>415</b><i>b </i>connected to a wiring for supplying a high power supply potential VDD, the high-resistance drain region <b>414</b><i>b </i>serves as a buffer, and thus, local concentration of an electric field is not easily caused even when a high voltage is applied between the gate electrode layer <b>411</b> and the drain electrode layer <b>415</b><i>b</i>, which leads to an increase in the withstand voltage of the transistor.

0091Next, a resist mask is formed through a fifth photolithography step and etching is selectively performed, so that part of the oxide insulating layer <b>416</b> is removed and part of the second gate insulating layer <b>402</b><i>b </i>is exposed.

0092Next, the protective insulating layer <b>403</b> is formed over the oxide insulating layer <b>416</b>. The protective insulating layer <b>403</b> is provided to be in contact with the region of the second gate insulating layer <b>402</b><i>b </i>which is exposed. The protective insulating layer <b>403</b> is formed using an insulating layer formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method using a silicon target. In this embodiment, as the protective insulating layer <b>403</b>, a silicon oxide film with a thickness of 100 nm is formed using a columnar-like polycrystalline silicon target containing a boron element (resistivity: 0.01 Ωcm) in an oxygen atmosphere.

0093Note that an insulating film formed of silicon oxide containing a boron element was formed with a thickness of 300 nm over a silicon wafer and the concentration of a boron element was measured by secondary ion mass spectrometry (SIMS). The insulating film was formed by a pulsed DC sputtering method in which a bias is applied in a pulsed manner using a columnar-like polycrystalline silicon target containing a boron element (resistivity: 0.01 Ωcm) in an oxygen atmosphere (the flow rate of oxygen was 100%) under the following conditions: the pressure was 0.4 Pa, the DC power source was 6 kW, the distance between the substrate and the target was 89 mm, and the substrate temperature was 100° C. <figref idref="DRAWINGS">FIG. 18</figref> shows the measurement results. As shown in <figref idref="DRAWINGS">FIG. 18</figref>, the average value or the peak value of the concentration of a boron element in the silicon oxide film was 1×10¹⁸cm⁻³to 1×10¹⁹cm⁻³inclusive. The measurement results in <figref idref="DRAWINGS">FIG. 18</figref> include results of analyzing not only a boron element but also an iron element, a chromium element, and an aluminum element.

0094With the structure of the thin film transistor <b>410</b> illustrated in <figref idref="DRAWINGS">FIG. 1D</figref>, entry of moisture from the outside can be prevented in a manufacturing process after the formation of the protective insulating layer <b>403</b> containing a boron element. Further, also after a device is completed as a semiconductor device including the thin film transistor using the protective insulating layer <b>403</b> containing a boron element such as a liquid crystal display device, entry of moisture from the outside can be prevented in the long term; therefore, the long-term reliability of the device can be improved. Furthermore, a silicon nitride film may be formed so as to cover the protective insulating layer <b>403</b> containing a boron element so that entry of moisture from the outside can further be prevented.

0095In addition, this embodiment describes a structure in which the oxide semiconductor layer of one thin film transistor is sandwiched between the silicon oxide films each containing a boron element (the first gate insulating layer <b>402</b><i>a </i>and the protective insulating layer <b>403</b>) but is not limited thereto; a structure in which oxide semiconductor layers of a plurality of thin film transistors are sandwiched between silicon oxide films each containing a boron element may be employed.

0096Further, this embodiment is not limited to the structure in which the oxide semiconductor layer of the thin film transistor is sandwiched between the silicon oxide films each containing a boron element; a structure in which a silicon oxide film containing a boron element is at least provided over the oxide semiconductor layer may be employed. For example, when the substrate <b>400</b> is a glass substrate containing a boron element, since the main component of the glass substrate is silicon oxide, the oxide semiconductor layer of the thin film transistor is sandwiched by silicon oxide containing a boron element by providing the silicon oxide film containing a boron element over the oxide semiconductor layer of the thin film transistor.

Embodiment 2

0097In this embodiment, an example of a thin film transistor having a structure which is different from that of Embodiment 1 will be described below. <figref idref="DRAWINGS">FIG. 2D</figref> illustrates an example of a cross-sectional structure of the thin film transistor.

0098A thin film transistor <b>460</b> illustrated in <figref idref="DRAWINGS">FIG. 2D</figref> is an inverted coplanar thin film transistor (also referred to as a bottom contact thin film transistor) and includes, over a substrate <b>450</b> having an insulating surface, a gate electrode layer <b>451</b>, a first gate insulating layer <b>452</b><i>a</i>, a second gate insulating layer <b>452</b><i>b</i>, an oxide semiconductor layer which includes at least a channel formation region <b>454</b>, a source electrode layer <b>455</b><i>a</i>, and a drain electrode layer <b>455</b><i>b</i>. Moreover, an oxide insulating layer <b>456</b> which covers the thin film transistor <b>460</b> and is in contact with the channel formation region <b>454</b> is provided. Further, in the thin film transistor <b>460</b> illustrated in <figref idref="DRAWINGS">FIG. 2D</figref>, a protective insulating layer <b>457</b> is provided over the oxide insulating layer <b>456</b>.

0099The protective insulating layer <b>457</b> is formed using an insulating layer that is formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method. In this embodiment, a silicon oxide film containing a boron element is used for the oxide insulating layer <b>456</b> and the protective insulating layer <b>457</b>.

0100Hereinafter, manufacturing steps of the thin film transistor <b>460</b> over the substrate will be described with reference to <figref idref="DRAWINGS">FIGS. 2A to 2D</figref>.

0101As in Embodiment 1, the gate electrode layer <b>451</b> is provided over the substrate <b>450</b> having an insulating surface. In addition, an insulating film serving as a base film may be provided between the substrate <b>450</b> and the gate electrode layer <b>451</b>.

0102Then, as in Embodiment 1, the first gate insulating layer <b>452</b><i>a </i>and the second gate insulating layer <b>452</b><i>b </i>are formed over the gate electrode layer <b>451</b>. As the first gate insulating layer <b>452</b><i>a</i>, a silicon oxide film with a thickness of 50 nm is formed by a sputtering method using a columnar-like polycrystalline silicon target containing a boron element (resistivity: 1 Ωcm to 10 Ωcm) in an oxygen atmosphere. The silicon oxide film used as the first gate insulating layer <b>452</b><i>a </i>contains a boron element. As the second gate insulating layer <b>452</b><i>b</i>, a 100-nm-thick silicon oxynitride film is formed by a PCVD method.

0103Next, a metal conductive film is formed over the second gate insulating layer <b>452</b><i>b</i>. After that, a resist mask is formed through a second photolithography step, and the metal conductive film is selectively etched to form the source electrode layer <b>455</b><i>a </i>and the drain electrode layer <b>455</b><i>b</i>. Examples of the material for the metal conductive film include an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W; an alloy containing any of these elements as a component; and an alloy containing any of these elements in combination.

0104Then, the resist mask is removed, and an oxide semiconductor film <b>459</b> is formed over the second gate insulating layer <b>452</b><i>b</i>, the source electrode layer <b>455</b><i>a</i>, and the drain electrode layer <b>455</b><i>b. </i>

0105In this embodiment, the oxide semiconductor film <b>459</b> is formed by a sputtering method using an In—Ga—Zn—O based oxide semiconductor deposition target. The cross-sectional view of this stage corresponds to <figref idref="DRAWINGS">FIG. 2A</figref>. In addition, the oxide semiconductor film <b>459</b> can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or an atmosphere containing a rare gas (typically, argon) and oxygen. In addition, in the case where a sputtering method is used, it is preferable that deposition be performed using a target containing SiO₂at 2 wt % to 10 wt % inclusive, and SiO_x(x>0), which inhibits crystallization, be contained in the oxide semiconductor film <b>459</b> so that crystallization can be suppressed when the heat treatment for dehydration or dehydrogenation is performed in a later step.

0106Note that before the oxide semiconductor film <b>459</b> is formed by a sputtering method, dust attached to a surface of the second gate insulating layer <b>452</b><i>b </i>is preferably removed by reverse sputtering in which plasma is generated by introduction of an argon gas. The reverse sputtering refers to a method in which without application of a voltage to the target side, an RF power source is used for application of a voltage to the substrate side in an argon atmosphere to generate plasma in the vicinity of the substrate so that the surface is modified. Note that instead of an argon atmosphere, nitrogen, helium, oxygen, or the like may be used.

0107Next, the oxide semiconductor film <b>459</b> is processed into an island-like oxide semiconductor layer <b>453</b> through a third photolithography step. A resist mask for forming the island-like oxide semiconductor layer may be formed by an ink-jet method. A photomask is not used when the resist mask is formed by an ink jet method, which results in reducing manufacturing costs.

0108Then, the oxide semiconductor layer is subjected to dehydration or dehydrogenation. The temperature of first heat treatment for dehydration or dehydrogenation is greater than or equal to 400° C. and less than or equal to 750° C., preferably greater than or equal to 400° C. and less than the strain point of the substrate. Here, after the substrate is put in an electric furnace which is a kind of heat treatment apparatus and heat treatment is performed on the oxide semiconductor layer at 450° C. for one hour in a nitrogen atmosphere, water or hydrogen is prevented from entering the oxide semiconductor layer without exposure to the air; thus, the oxide semiconductor layer <b>453</b> is obtained (see <figref idref="DRAWINGS">FIG. 2B</figref>).

0109For example, as the first heat treatment, GRTA may be performed as follows. The substrate is transferred and put in an inert gas which has been heated to a high temperature of 650° C. to 700° C., heated for several minutes, and transferred and taken out of the inert gas which has been heated to a high temperature. GRTA enables a high-temperature heat treatment for a short time.

0110In accordance with conditions of the first heat treatment or a material of the oxide semiconductor layer, the oxide semiconductor layer is crystallized and changed to a microcrystalline film or a polycrystalline film in some cases.

0111The first heat treatment of the oxide semiconductor layer may be performed on the oxide semiconductor film <b>459</b> before being processed into the island-like oxide semiconductor layer. In that case, after the first heat treatment, the substrate is taken out of the heat treatment apparatus and a photolithography step is performed.

0112Then, plasma treatment using a gas such as N₂O, N₂, or Ar is performed. This plasma treatment removes water or the like adsorbed on a surface of the oxide semiconductor layer which is exposed. In addition, plasma treatment may be performed using a mixed gas of oxygen and argon.

0113After the plasma treatment, the oxide insulating layer <b>456</b> which serves as a protective insulating film and is in contact with the oxide semiconductor layer is formed without exposure to the air (see <figref idref="DRAWINGS">FIG. 2C</figref>). The oxide insulating layer <b>456</b> can be formed to a thickness at least 1 nm by a sputtering method or the like as appropriate, which is a method with which an impurity such as water or hydrogen does not enter the oxide insulating layer <b>456</b>.

0114Examples of a sputtering method include an RF sputtering method in which a high-frequency power source is used for a sputtering power source, a DC sputtering method using a DC power source, and a pulsed DC sputtering method in which a bias is applied in a pulsed manner.

0115In addition, there is also a multi-source sputtering apparatus in which a plurality of targets of different materials can be set. With the multi-source sputtering apparatus, films of different materials can be formed to be stacked in the same chamber, or a film of plural kinds of materials can be formed by electric discharge at the same time in the same chamber.

0116In addition, there are a sputtering apparatus provided with a magnet system inside the chamber and used for a magnetron sputtering method, and a sputtering apparatus used for an ECR sputtering method in which plasma generated with the use of microwaves is used without using glow discharge.

0117Furthermore, as a deposition method using a sputtering method, there are also a reactive sputtering method in which a target substance and a sputtering gas component are chemically reacted with each other during deposition to form a thin compound film thereof, and a bias sputtering method in which a voltage is also applied to a substrate during deposition.

0118Then, the protective insulating layer <b>457</b> is formed over the oxide insulating layer <b>456</b> (see <figref idref="DRAWINGS">FIG. 2D</figref>). The protective insulating layer <b>457</b> is formed using an insulating layer that is formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method using a silicon target.

0119In this embodiment, the oxide insulating layer <b>456</b> and the protective insulating layer <b>457</b> are stacked as follows. Two targets, a first silicon target containing a boron element and a second silicon target containing a larger amount of a boron element than the first silicon target, are put in the same chamber, and the oxide insulating layer <b>456</b> and the protective insulating layer <b>457</b> are successively formed in the same chamber by switching the targets used with a shutter in an oxygen atmosphere.

0120In this embodiment, a 200-nm-thick silicon oxide film containing a boron element and a 100-nm-thick silicon oxide film containing a boron element are formed as the oxide insulating layer <b>456</b> and the protective insulating layer <b>457</b>, respectively. Note that the concentration of a boron element contained in the protective insulating layer <b>457</b> is higher than that in the oxide insulating layer <b>456</b>. The substrate temperature in deposition of these insulating layers may be in the range of room temperature to 300° C. inclusive, and is 100° C. in this embodiment. The silicon oxide film can be formed by a sputtering method in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or an atmosphere containing a rare gas (typically argon) and oxygen. Further, a silicon oxide target or a silicon target can be used as a target.

0121In addition, the targets used may be switched plural times with the use of a shutter in an oxygen atmosphere, and the protective insulating layer <b>457</b> may have a layered structure including four or more layers, including insulating layers with a high concentration of a boron element and insulating layers with a low concentration of a boron element.

0122Furthermore, so-called co-sputtering is used to form the protective insulating layer <b>457</b> in which the concentration of a boron element has a gradient. In the co-sputtering, two targets, a silicon target which does not contain a boron element and a silicon target which contains a boron element, are placed in the same chamber, and sputtering using these targets is performed at the same time.

0123Next, second heat treatment (preferably at 200° C. to 400° C. inclusive, for example, 250° C. to 350° C. inclusive) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, the second heat treatment is performed at 250° C. for one hour in a nitrogen atmosphere. With the second heat treatment, heat is applied while the oxide semiconductor layer is in contact with the oxide insulating layer <b>456</b>.

0124Through the above steps, the thin film transistor <b>460</b> is formed.

0125With the structure of the thin film transistor <b>460</b> illustrated in <figref idref="DRAWINGS">FIG. 2C</figref>, entry of moisture from the outside can be prevented in a manufacturing process after formation of the protective insulating layer <b>457</b> containing a boron element. In addition, it is possible to prevent entry of moisture from the outside in the long term even after a device is completed as a semiconductor device including the thin film transistor using the protective insulating layer <b>457</b> containing a boron element, for example, as a liquid crystal display device; thus, the long-term reliability of the device can be improved.

0126In addition, this embodiment describes a structure in which the oxide semiconductor layer of one thin film transistor is sandwiched between the silicon oxide films each containing a boron element (the first gate insulating layer <b>452</b><i>a </i>and the protective insulating layer <b>457</b>) but is not limited thereto; a structure in which oxide semiconductor layers of a plurality of thin film transistors are sandwiched between silicon oxide films each containing a boron element may be employed.

0127This embodiment can be freely combined with Embodiment 1.

Embodiment 3

0128In this embodiment, an example of a thin film transistor having a structure which is different from that of Embodiment 1 will be described below. <figref idref="DRAWINGS">FIG. 3D</figref> illustrates an example of a cross-sectional structure of the thin film transistor.

0129A thin film transistor <b>310</b> illustrated in <figref idref="DRAWINGS">FIG. 3D</figref> is a channel stop thin film transistor and includes, over a substrate <b>300</b> having an insulating surface, a gate electrode layer <b>311</b>, a first gate insulating layer <b>302</b><i>a</i>, a second gate insulating layer <b>302</b><i>b</i>, an oxide semiconductor layer which includes at least a channel formation region <b>313</b><i>c</i>, a source electrode layer <b>315</b><i>a</i>, and a drain electrode layer <b>315</b><i>b</i>. Moreover, an oxide insulating layer <b>316</b> which is on and in contact with the channel formation region <b>313</b><i>c </i>is provided, and a protective insulating layer <b>307</b> is provided over the oxide insulating layer <b>316</b>.

0130The protective insulating layer <b>307</b> is formed using an insulating layer formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method. In this embodiment, an insulating layer formed of silicon oxide containing a phosphorus element is used.

0131A process for forming the thin film transistor <b>310</b> over the substrate is described below with reference to <figref idref="DRAWINGS">FIGS. 3A to 3D</figref>.

0132As in Embodiment 1, the gate electrode layer <b>311</b> is provided over the substrate <b>300</b> having an insulating surface. Further, an insulating film serving as a base film may be provided between the substrate <b>300</b> and the gate electrode layer <b>311</b>.

0133Then, as in Embodiment 1, the first gate insulating layer <b>302</b><i>a </i>and the second gate insulating layer <b>302</b><i>b </i>are formed over the gate electrode layer <b>311</b>. As the first gate insulating layer <b>302</b><i>a</i>, a silicon oxide film with a thickness of 50 nm is formed by a sputtering method using a columnar-like polycrystalline silicon target containing a boron element (resistivity: 1 Ωcm to 10 Ωcm) in an oxygen atmosphere. The silicon oxide film used as the first gate insulating layer <b>302</b><i>a </i>contains a boron element. As the second gate insulating layer <b>302</b><i>b</i>, a 100-nm-thick silicon oxynitride film is formed by a PCVD method

0134Next, an oxide semiconductor film <b>330</b> is formed over the second gate insulating layer <b>302</b><i>b. </i>

0135In this embodiment, the oxide semiconductor film <b>330</b> is formed by a sputtering method with the use of an In—Ga—Zn—O-based oxide semiconductor deposition target. A cross-sectional view of this stage corresponds to <figref idref="DRAWINGS">FIG. 3A</figref>. In addition, the oxide semiconductor film <b>330</b> can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or an atmosphere containing a rare gas (typically, argon) and oxygen.

0136Then, plasma treatment using a gas such as N₂O, N₂, or Ar is performed. This plasma treatment removes water or the like adsorbed on a surface of the oxide semiconductor film <b>330</b> which is exposed. In addition, plasma treatment may be performed using a mixed gas of oxygen and argon.

0137After the plasma treatment, the oxide insulating layer <b>316</b> which serves as a channel protective insulating film and is in contact with the oxide semiconductor film <b>330</b> is formed without exposure to the air. The oxide insulating layer <b>316</b> can be formed to a thickness at least 1 nm by a sputtering method or the like as appropriate, which is a method with which an impurity such as water or hydrogen does not enter the oxide insulating layer <b>316</b>. In this embodiment, a silicon oxide film is formed by a sputtering method using a silicon target and then selectively etched through a photolithography step to form the oxide insulating layer <b>316</b>.

0138Next, the oxide semiconductor film <b>330</b> is processed into an island-like oxide semiconductor layer through a photolithography step (see <figref idref="DRAWINGS">FIG. 3B</figref>).

0139Next, an oxide conductive film and a metal conductive film are stacked over the island-like oxide semiconductor layer and the oxide insulating layer <b>316</b>, and a resist mask <b>334</b> is formed through a photolithography step. Then, etching is performed selectivity to form oxide conductive layers <b>314</b><i>a </i>and <b>314</b><i>b</i>, the source electrode layer <b>315</b><i>a</i>, and the drain electrode layer <b>315</b><i>b </i>(see <figref idref="DRAWINGS">FIG. 3C</figref>). Examples of the material of the oxide conductive film include zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, and zinc gallium oxide. Examples of the material for the metal conductive film include an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W; an alloy containing any of these elements as a component; and an alloy containing any of these elements in combination.

0140The oxide conductive layer <b>314</b><i>a </i>is formed below and in contact with the source electrode layer <b>315</b><i>a</i>, and the oxide conductive layer <b>314</b><i>b </i>is formed below and in contact with the drain electrode layer <b>315</b><i>b</i>. By providing the oxide conductive layer <b>314</b><i>a </i>between the source electrode layer <b>315</b><i>a </i>and the oxide semiconductor layer, contact resistance can be decreased, which leads to a resistance reduction, so that a thin film transistor which can operate at high speed can be formed.

0141Next, the resist mask <b>334</b> is removed, and second heat treatment (preferably at 200° C. to 400° C. inclusive, for example, 250° C. to 350° C. inclusive) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, the second heat treatment is performed at 250° C. for one hour in a nitrogen atmosphere. With the second heat treatment, heat is applied while part of the oxide semiconductor layer (the channel formation region) is in contact with the oxide insulating layer <b>316</b>.

0142Next, the protective insulating layer <b>307</b> is formed over the source electrode layer <b>315</b><i>a </i>and the drain electrode layer <b>315</b><i>b</i>. In addition, the protective insulating layer <b>307</b> is provided to be in contact with a region of the second gate insulating layer <b>302</b><i>b </i>which is exposed. The protective insulating layer <b>307</b> is formed using an insulating layer formed of silicon oxide containing a boron element, an antimony element, an aluminum element, or a phosphorus element by a sputtering method using a silicon target. In this embodiment, as the protective insulating layer <b>307</b>, a silicon oxide film with a thickness of 100 nm is formed using a columnar-like polycrystalline silicon target containing a phosphorus element (resistivity: less than or equal to 5 Ωcm) in an oxygen atmosphere.

0143Through the above steps, the thin film transistor <b>310</b> is formed.

0144With the structure of the thin film transistor <b>310</b> illustrated in <figref idref="DRAWINGS">FIG. 3D</figref>, entry of moisture from the outside can be prevented in a manufacturing process after formation of the protective insulating layer <b>307</b> containing a phosphorus element. In addition, it is possible to prevent entry of moisture from the outside in the long term even after a device is completed as a semiconductor device including the thin film transistor using the protective insulating layer <b>307</b> containing a phosphorus element, for example, as a liquid crystal display device; thus, the long-term reliability of the device can be achieved.

0145This embodiment can be freely combined with any of other embodiments.

0146For example, an oxide conductive layer may be provided between the oxide semiconductor layer and the source electrode layer (or the drain electrode layer) in the structure of Embodiment 1. By providing the oxide conductive layer, contact resistance can be decreased, which leads to a resistance reduction, so that a thin film transistor which can operate at high speed can be formed.

Embodiment 4

0147In this embodiment, an example of manufacturing an active matrix light-emitting display device using a plurality of the thin film transistors described in Embodiment 2 and a light-emitting element using electroluminescence will be described.

0148Light-emitting elements utilizing electroluminescence are classified according to whether a light-emitting material is an organic compound or an inorganic compound. In general, the former is referred to as an organic EL element, and the latter is referred to as an inorganic EL element.

0149In the organic EL element, by application of voltage to a light-emitting element, electrons and holes are separately injected from a pair of electrodes into a layer containing a light-emitting organic compound, and current flows. The carriers (electrons and holes) are recombined, and thus, the light-emitting organic compound is excited. The light-emitting organic compound returns to a ground state from the excited state, thereby emitting light. Owing to such a mechanism, such a light-emitting element is referred to as a current-excitation light-emitting element.

0150The inorganic EL elements are classified according to their element structures into a dispersion-type inorganic EL element and a thin-film inorganic EL element. A dispersion-type inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and its light emission mechanism is donor-acceptor recombination type light emission that utilizes a donor level and an acceptor level. A thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers, which are further sandwiched between electrodes, and its light emission mechanism is localized type light emission that utilizes inner-shell electron transition of metal ions. Note that an example of an organic EL element as a light-emitting element is described here.

0151<figref idref="DRAWINGS">FIG. 4</figref> illustrates an example of a pixel structure to which digital time grayscale driving can be applied, as an example of a semiconductor device.

0152A structure and operation of a pixel to which digital time grayscale driving can be applied are described. Here, one pixel includes two n-channel transistors each of which includes an oxide semiconductor layer as a channel formation region.

0153A pixel <b>6400</b> includes a switching transistor <b>6401</b>, a driving transistor <b>6402</b>, a light-emitting element <b>6404</b>, and a capacitor <b>6403</b>. A gate of the switching transistor <b>6401</b> is connected to a scan line <b>6406</b>, a first electrode (one of a source electrode and a drain electrode) of the switching transistor <b>6401</b> is connected to a signal line <b>6405</b>, and a second electrode (the other of the source electrode and the drain electrode) of the switching transistor <b>6401</b> is connected to a gate of the driving transistor <b>6402</b>. The gate of the driving transistor <b>6402</b> is connected to a power supply line <b>6407</b> via the capacitor <b>6403</b>, a first electrode of the driving transistor <b>6402</b> is connected to the power supply line <b>6407</b>, and a second electrode of the driving transistor <b>6402</b> is connected to a first electrode (pixel electrode) of the light-emitting element <b>6404</b>. A second electrode of the light-emitting element <b>6404</b> corresponds to a common electrode <b>6408</b>. The common electrode <b>6408</b> is electrically connected to a common potential line provided over the same substrate.

0154The second electrode (the common electrode <b>6408</b>) of the light-emitting element <b>6404</b> is set to a low power supply potential. Note that the low power supply potential is a potential satisfying the low power supply potential&lt;a high power supply potential with reference to the high power supply potential that is set for the power supply line <b>6407</b>. As the low power supply potential, GND, 0 V, or the like may be employed, for example. A potential difference between the high power supply potential and the low power supply potential is applied to the light-emitting element <b>6404</b> and current is supplied to the light-emitting element <b>6404</b>, so that the light-emitting element <b>6404</b> emits light. Here, in order to make the light-emitting element <b>6404</b> emit light, each potential is set so that the potential difference between the high power supply potential and the low power supply potential is greater than or equal to a forward threshold voltage of the light-emitting element <b>6404</b>.

0155Note that gate capacitance of the driving transistor <b>6402</b> may be used as a substitute for the capacitor <b>6403</b> so that the capacitor <b>6403</b> can be omitted. The gate capacitance of the driving transistor <b>6402</b> may be formed between the channel region and the gate electrode.

0156In the case of a voltage-input voltage driving method, a video signal is input to the gate of the driving transistor <b>6402</b> so that the driving transistor <b>6402</b> is in either of two states of being sufficiently turned on and turned off. That is, the driving transistor <b>6402</b> operates in a linear region. Since the driving transistor <b>6402</b> operates in a linear region, a voltage higher than the voltage of the power supply line <b>6407</b> is applied to the gate of the driving transistor <b>6402</b>. Note that a voltage greater than or equal to (voltage of the power supply line+Vth of the driving transistor <b>6402</b>) is applied to the signal line <b>6405</b>.

0157In the case of performing analog grayscale driving instead of digital time grayscale driving, the same pixel structure as that in <figref idref="DRAWINGS">FIG. 4</figref> can be used by changing signal input.

0158In the case of performing analog grayscale driving, a voltage greater than or equal to (forward voltage of the light-emitting element <b>6404</b>+Vth of the driving transistor <b>6402</b>) is applied to the gate of the driving transistor <b>6402</b>. The forward voltage of the light-emitting element <b>6404</b> indicates a voltage at which a desired luminance is obtained, and includes at least forward threshold voltage. A video signal by which the driving transistor <b>6402</b> operates in a saturation region is input, so that current can be supplied to the light-emitting element <b>6404</b>. In order to operate the driving transistor <b>6402</b> in a saturation region, the potential of the power supply line <b>6407</b> is set higher than the gate potential of the driving transistor <b>6402</b>. When an analog video signal is used, it is possible to feed current to the light-emitting element <b>6404</b> in accordance with the video signal and perform analog grayscale driving.

0159Note that a pixel structure of the present invention is not limited to that illustrated in <figref idref="DRAWINGS">FIG. 4</figref>. For example, a switch, a resistor, a capacitor, a transistor, a logic circuit, or the like may be added to the pixel illustrated in <figref idref="DRAWINGS">FIG. 4</figref>.

0160Next, structures of a light-emitting element are described with reference to <figref idref="DRAWINGS">FIGS. 5A to 5C</figref>. Here, a cross-sectional structure of a pixel is described by taking an n-channel driving TFT as an example. Driving TFTs <b>7011</b>, <b>7021</b>, and <b>7001</b> used in semiconductor devices illustrated in <figref idref="DRAWINGS">FIGS. 5A, 5B, and 5C</figref>, respectively can be formed in a manner similar to that of the thin film transistor described in Embodiment 2 and are highly reliable thin film transistors each including an oxide semiconductor layer.

0161In order to extract light emitted from a light-emitting element, at least one of an anode and a cathode may be transparent. A thin film transistor and a light-emitting element are formed over a substrate. The light-emitting element can have a top emission structure in which light emission is extracted through a surface opposite to the substrate; a bottom emission structure in which light emission is extracted through a surface on the substrate side; or a dual emission structure in which light emission is extracted through the surface opposite to the substrate and the surface on the substrate side. The pixel structure can be applied to a light-emitting element having any of these emission structures.

0162A light-emitting element having the bottom-emission structure is described with reference to <figref idref="DRAWINGS">FIG. 5A</figref>.

0163<figref idref="DRAWINGS">FIG. 5A</figref> illustrates a cross-sectional view of a pixel in the case where the driving TFT <b>7011</b> is an n-channel transistor and light is emitted from a light-emitting element <b>7012</b> to a first electrode <b>7013</b> side. In <figref idref="DRAWINGS">FIG. 5A</figref>, the first electrode <b>7013</b> of the light-emitting element <b>7012</b> is formed over a light-transmitting conductive film <b>7017</b> which is electrically connected to a drain electrode layer of the driving TFT <b>7011</b>, and an EL layer <b>7014</b> and a second electrode <b>7015</b> are stacked in this order over the first electrode <b>7013</b>.

0164As the light-transmitting conductive film <b>7017</b>, a light-transmitting conductive film of indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, indium tin oxide to which silicon oxide is added, or the like can be used.

0165The first electrode <b>7013</b> of the light-emitting element can be formed using a variety of materials; it is preferable to use a material having a low work function, specifically, an alkali metal such as Li or Cs, an alkaline-earth metal such as Mg, Ca, or Sr, an alloy containing any of these (Mg:Ag, Al:Li, or the like), or a rare-earth metal such as Yb or Er when the first electrode <b>7013</b> is used as a cathode. In <figref idref="DRAWINGS">FIG. 5A</figref>, the thickness of the first electrode <b>7013</b> is a thickness with which light can be transmitted (preferably, about 5 nm to 30 nm). For example, an aluminum film with a thickness of 20 nm can be used as the first electrode <b>7013</b>.

0166Note that the light-transmitting conductive film and the aluminum film may be stacked and then selectively etched, so that the light-transmitting conductive film <b>7017</b> and the first electrode <b>7013</b> may be formed. In this case, the etching can be performed using the same mask, which is preferable.

0167Further, the periphery of the first electrode <b>7013</b> is covered with a partition <b>7019</b>. The partition <b>7019</b> is formed using a film of an organic resin such as polyimide, acrylic, polyamide, or epoxy, an inorganic insulating film, or organic polysiloxane. It is particularly preferable that the partition <b>7019</b> be formed using a photosensitive resin material to have an opening portion over the first electrode <b>7013</b> so that a sidewall of the opening portion is formed as a tilted surface with continuous curvature. When a photosensitive resin material is used for the partition <b>7019</b>, a step of forming a resist mask can be omitted.

0168In addition, the EL layer <b>7014</b> formed over the first electrode <b>7013</b> and the partition <b>7019</b> needs to include at least a light-emitting layer, and the EL layer <b>7014</b> may be formed of a single layer or a plurality of layers stacked. When the EL layer <b>7014</b> is formed using a plurality of layers, an electron-injection layer, an electron-transport layer, a light-emitting layer, a hole-transport layer, and a hole-injection layer are stacked in this order over the first electrode <b>7013</b> functioning as a cathode. However, it is not necessary to form all of these layers.

0169In addition, the EL layer <b>7014</b> is not limited to have the above layered structure; the first electrode <b>7013</b> may be made to function as an anode, and a hole-injection layer, a hole-transport layer, a light-emitting layer, an electron-transport layer, and an electron-injection layer may be stacked in this order over the first electrode <b>7013</b>. However, considering power consumption, it is preferable that the first electrode <b>7013</b> be made to function as a cathode and an electron-injection layer, an electron-transport layer, a light-emitting layer, a hole-transport layer, and a hole-injection layer be stacked in this order over the first electrode <b>7013</b> so that the voltage of a driver circuit portion can be prevented from increasing and the power consumption can be reduced.

0170In addition, the second electrode <b>7015</b> formed over the EL layer <b>7014</b> can be formed using a variety of materials. For example, when the second electrode <b>7015</b> is used as an anode, a material with a high work function such as ZrN, Ti, W, Ni, Pt, or Cr, or a transparent conductive material such as ITO, IZO, or ZnO is preferable. Further, a light-blocking film <b>7016</b>, e.g., a metal which blocks light, a metal which reflects light, or the like is formed over the second electrode <b>7015</b>. In this embodiment, the second electrode <b>7015</b> is formed using an ITO film, and the light-blocking film <b>7016</b> is formed using a Ti film.

0171The light-emitting element <b>7012</b> corresponds to a region where the first electrode <b>7013</b> and the second electrode <b>7015</b> sandwich the EL layer <b>7014</b> including a light-emitting layer. In the case of the element structure illustrated in <figref idref="DRAWINGS">FIG. 5A</figref>, light is emitted from the light-emitting element <b>7012</b> to the first electrode <b>7013</b> side as indicated by an arrow.

0172Note that <figref idref="DRAWINGS">FIG. 5A</figref> illustrates an example in which a light-transmitting conductive film is used as the gate electrode layer, and light is emitted from the light-emitting element <b>7012</b> through a color filter layer <b>7033</b> and a substrate.

0173The color filter layer <b>7033</b> is formed by a droplet discharge method such as an ink-jet method, a printing method, an etching method with the use of a photolithography technique, or the like.

0174The color filter layer <b>7033</b> is covered with an overcoat layer <b>7034</b>, and also covered with a protective insulating layer <b>7035</b>. Note that the overcoat layer <b>7034</b> with a small thickness is illustrated in <figref idref="DRAWINGS">FIG. 5A</figref>; however, the overcoat layer <b>7034</b> has a function to planarize a surface with unevenness due to the color filter layer <b>7033</b>.

0175A contact hole which is formed in the protective insulating layer <b>7035</b>, an insulating layer <b>7032</b>, and an insulating layer <b>7031</b> and reaches the drain electrode layer is provided in a portion which overlaps with the partition <b>7019</b>.

0176Next, a light-emitting element with a dual-emission structure is described with reference to <figref idref="DRAWINGS">FIG. 5B</figref>.

0177In <figref idref="DRAWINGS">FIG. 5B</figref>, a first electrode <b>7023</b> of a light-emitting element <b>7022</b> is formed over a light-transmitting conductive film <b>7027</b> which is electrically connected to a drain electrode layer of the driving TFT <b>7021</b>, and an EL layer <b>7024</b> and a second electrode <b>7025</b> are stacked in this order over the first electrode <b>7023</b>.

0178As the light-transmitting conductive film <b>7027</b>, a light-transmitting conductive film of indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, indium tin oxide to which silicon oxide is added, or the like can be used.

0179In addition, the first electrode <b>7023</b> can be formed using a variety of materials. When the first electrode <b>7023</b> is used as a cathode, for example, it is preferable to use a material having a low work function, specifically, an alkali metal such as Li or Cs, an alkaline-earth metal such as Mg, Ca, or Sr, an alloy containing any of these (Mg:Ag, Al:Li, or the like), a rare-earth metal such as Yb or Er, or the like. In this embodiment, the first electrode <b>7023</b> is used as a cathode and has a thickness with which light can be transmitted (preferably, approximately 5 nm to 30 nm). For example, an aluminum film with a thickness of 20 nm is used as the first electrode <b>7023</b>.

0180Note that the light-transmitting conductive film and the aluminum film may be stacked and then selectively etched, so that the light-transmitting conductive film <b>7027</b> and the first electrode <b>7023</b> may be formed. In that case, etching can be performed with the use of the same mask, which is preferable.

0181The periphery of the first electrode <b>7023</b> is covered with a partition <b>7029</b>. The partition <b>7029</b> is formed using a film of an organic resin such as polyimide, acrylic, polyamide, or epoxy, an inorganic insulating film, or organic polysiloxane. It is particularly preferable that the partition <b>7029</b> be formed using a photosensitive resin material to have an opening portion over the first electrode <b>7023</b> so that a sidewall of the opening portion is formed as a tilted surface with continuous curvature. When a photosensitive resin material is used for the partition <b>7029</b>, a step of forming a resist mask can be omitted.

0182In addition, the EL layer <b>7024</b> formed over the first electrode <b>7023</b> and the partition <b>7029</b> needs to include at least a light-emitting layer, and the EL layer <b>7024</b> may be formed of a single layer or a plurality of layers stacked. When the EL layer <b>7024</b> is formed using a plurality of layers, an electron-injection layer, an electron-transport layer, a light-emitting layer, a hole-transport layer, and a hole-injection layer are stacked in this order over the first electrode <b>7023</b> functioning as a cathode. However, it is not necessary to form all of these layers.

0183In addition, the EL layer <b>7024</b> is not limited to have the above layered structure; the first electrode <b>7023</b> may be used as an anode, and a hole-injection layer, a hole-transport layer, a light-emitting layer, an electron-transport layer, and an electron-injection layer may be stacked in this order over the anode. However, considering power consumption, it is preferable that the first electrode <b>7023</b> be used as a cathode and an electron-injection layer, an electron-transport layer, a light-emitting layer, a hole-transport layer, and a hole-injection layer be stacked in this order over the cathode so that the power consumption can be reduced.

0184In addition, the second electrode <b>7025</b> formed over the EL layer <b>7024</b> can be formed using a variety of materials. For example, when the second electrode <b>7025</b> is used as an anode, a material with a high work function or a transparent conductive material such as ITO, IZO, or ZnO is preferable. In this embodiment, the second electrode <b>7025</b> is used as an anode and formed using an ITO film containing silicon oxide.

0185The light-emitting element <b>7022</b> corresponds to a region where the first electrode <b>7023</b> and the second electrode <b>7025</b> sandwich the EL layer <b>7024</b> including a light-emitting layer. In the case of the element structure illustrated in <figref idref="DRAWINGS">FIG. 5B</figref>, light is emitted from the light-emitting element <b>7022</b> to both the second electrode <b>7025</b> side and the first electrode <b>7023</b> side as indicated by arrows.

0186Note that <figref idref="DRAWINGS">FIG. 5B</figref> illustrates an example in which a light-transmitting conductive film is used as a gate electrode layer, and light emitted from the light-emitting element <b>7022</b> to the first electrode <b>7023</b> side passes through a color filter layer <b>7043</b> and a substrate.

0187The color filter layer <b>7043</b> is formed by a droplet discharge method such as an ink-jet method, a printing method, an etching method with the use of a photolithography technique, or the like.

0188The color filter layer <b>7043</b> is covered with an overcoat layer <b>7044</b>, and also covered with a protective insulating layer <b>7045</b>.

0189A contact hole which is formed in the protective insulating layer <b>7045</b>, an insulating layer <b>7042</b>, and an insulating layer <b>7041</b> and reaches the drain electrode layer is provided in a portion which overlaps with the partition <b>7029</b>.

0190Note that when a light-emitting element having a dual emission structure is used and full color display is performed on both display surfaces, light from the second electrode <b>7025</b> side does not pass through the color filter layer <b>7043</b>; therefore, a sealing substrate provided with another color filter layer is preferably provided over the second electrode <b>7025</b>.

0191Next, a light-emitting element having a top emission structure is described with reference to <figref idref="DRAWINGS">FIG. 5C</figref>.

0192<figref idref="DRAWINGS">FIG. 5C</figref> is a cross-sectional view of a pixel in the case where the driving TFT <b>7001</b> is an n-channel transistor and light is emitted from a light-emitting element <b>7002</b> to the second electrode <b>7005</b> side. In <figref idref="DRAWINGS">FIG. 5C</figref>, a first electrode <b>7003</b> of the light-emitting element <b>7002</b> which is electrically connected to a drain electrode layer of the driving TFT <b>7001</b> is formed, and an EL layer <b>7004</b> and the second electrode <b>7005</b> are stacked in this order over the first electrode <b>7003</b>.

0193The first electrode <b>7003</b> can be formed using a variety of materials. For example, when the first electrode <b>7003</b> is used as a cathode, a material with a low work function, specifically, an alkali metal such as Li or Cs; an alkaline-earth metal such as Mg, Ca, or Sr; an alloy containing any of these (Mg:Ag, Al:Li, or the like); a rare-earth metal such as Yb or Er; or the like is preferable.

0194The periphery of the first electrode <b>7003</b> is covered with a partition <b>7009</b>. The partition <b>7009</b> is formed using a film of an organic resin such as polyimide, acrylic, polyamide, or epoxy, an inorganic insulating film, or organic polysiloxane. It is particularly preferable that the partition <b>7009</b> be formed using a photosensitive resin material to have an opening portion over the first electrode <b>7003</b> so that a sidewall of the opening portion is formed as a tilted surface with continuous curvature. When a photosensitive resin material is used for the partition <b>7009</b>, a step of forming a resist mask can be omitted.

0195The EL layer <b>7004</b> formed over the first electrode <b>7003</b> and the partition <b>7009</b> needs to include at least a light-emitting layer, and the EL layer <b>7004</b> may be formed of a single layer or a plurality of layers stacked. When the EL layer <b>7004</b> is formed using a plurality of layers, an electron-injection layer, an electron-transport layer, a light-emitting layer, a hole-transport layer, and a hole-injection layer are stacked in this order over the first electrode <b>7003</b> functioning as a cathode. However, it is not necessary to form all of these layers.

0196In addition, the EL layer <b>7004</b> is not limited to have the above layered structure; a hole-injection layer, a hole-transport layer, a light-emitting layer, an electron-transport layer, and an electron-injection layer may be stacked in this order over the first electrode <b>7003</b> used as an anode.

0197In <figref idref="DRAWINGS">FIG. 5C</figref>, a hole-injection layer, a hole-transport layer, a light-emitting layer, an electron-transport layer, and an electron-injection layer are stacked in this order over a stacked film in which a Ti film, an aluminum film, and a Ti film are stacked in this order, and thereover, a stacked layer of a Mg:Ag alloy thin film and ITO is formed.

0198Note that, when the TFT <b>7001</b> is an n-channel transistor, it is preferable that an electron-injection layer, an electron-transport layer, a light-emitting layer, a hole-transport layer, and a hole-injection layer be stacked in this order over the first electrode <b>7003</b> so that the voltage of a driver circuit can be prevented from increasing and the power consumption can be reduced.

0199The second electrode <b>7005</b> is formed using a light-transmitting conductive film such as a film of indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added.

0200A region where the EL layer <b>7004</b> including a light-emitting layer is sandwiched between the first electrode <b>7003</b> and the second electrode <b>7005</b> corresponds to the light-emitting element <b>7002</b>. In the case of the pixel illustrated in <figref idref="DRAWINGS">FIG. 5C</figref>, light is emitted from the light-emitting element <b>7002</b> to the second electrode <b>7005</b> side as indicated by an arrow.

0201In <figref idref="DRAWINGS">FIG. 5C</figref>, an example in which the thin film transistor <b>460</b> is used as the TFT <b>7001</b> is illustrated; however, there is no particular limitation, and the thin film transistor <b>410</b> can be used. When the thin film transistor <b>410</b> is used as the TFT <b>7001</b>, the first electrode <b>7003</b> and the drain electrode layer are electrically connected so as to be in contact with each other.

0202In <figref idref="DRAWINGS">FIG. 5C</figref>, the drain electrode layer of the TFT <b>7001</b> is electrically connected to the first electrode <b>7003</b> through a contact hole provided in an oxide insulating layer <b>7051</b>, a protective insulating layer <b>7052</b>, and an insulating layer <b>7055</b>. A planarization insulating layer <b>7053</b> is formed using a resin material such as polyimide, acrylic, benzocyclobutene, polyamide, or epoxy. In addition to such a resin material, it is possible to use a low-dielectric constant material (a low-k material), a siloxane-based resin, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), or the like. Note that the planarization insulating layer <b>7053</b> may be formed by stacking a plurality of insulating films formed using these materials. There is no particular limitation on the method for forming the planarization insulating layer <b>7053</b>. The planarization insulating layer <b>7053</b> can be formed, depending on the material, by a method such as a sputtering method, an SOG method, a spin coating method, a dipping method, a spray coating method, or a droplet discharge method (e.g., an ink-jet method, screen printing, or offset printing), or a tool (equipment) such as a doctor knife, a roll coater, a curtain coater, or a knife coater.

0203The partition <b>7009</b> is provided so as to insulate the first electrode <b>7003</b> and a first electrode of an adjacent pixel. The partition <b>7009</b> is formed using a film of an organic resin such as polyimide, acrylic, polyamide, or epoxy, an inorganic insulating film, or organic polysiloxane. It is particularly preferable that the partition <b>7009</b> be formed using a photosensitive resin material to have an opening portion over the first electrode <b>7003</b> so that a sidewall of the opening portion is formed as a tilted surface with continuous curvature. When a photosensitive resin material is used for the partition <b>7009</b>, a step of forming a resist mask can be omitted.

0204In the structure of <figref idref="DRAWINGS">FIG. 5C</figref>, when full color display is performed, for example, the light-emitting element <b>7002</b> is used as a green light-emitting element, one of adjacent light-emitting elements is used as a red light-emitting element, and the other is used as a blue light-emitting element. Alternatively, a light-emitting display device capable of full color display may be manufactured using four kinds of light-emitting elements, which include a white light-emitting element as well as three kinds of light-emitting elements.

0205In the structure of <figref idref="DRAWINGS">FIG. 5C</figref>, a light-emitting display device capable of full color display may be manufactured in such a way that all of a plurality of light-emitting elements which are arranged are white light-emitting elements and a sealing substrate having a color filter or the like is arranged over the light-emitting element <b>7002</b>. When a material which exhibits a single color such as white is formed and combined with a color filter or a color conversion layer, full color display can be performed.

0206Needless to say, display of monochromatic light emission can be performed. For example, a lighting system may be formed with the use of white light emission, or an area-color light-emitting device may be formed with the use of monochromatic light emission.

0207If necessary, an optical film such as a polarizing film including a circularly polarizing plate may be provided.

0208Note that, although the organic EL elements are described here as the light-emitting elements, an inorganic EL element can be provided as a light-emitting element.

0209Note that the example is described in which the thin film transistor (the driving TFT) which controls the driving of the light-emitting element is electrically connected to the light-emitting element; however, a structure may be employed in which a TFT for current control is connected between the driving TFT and the light-emitting element.

Embodiment 5

0210In this embodiment, the appearance and the cross section of a light-emitting display panel (also referred to as a light-emitting panel) will be described with reference to <figref idref="DRAWINGS">FIGS. 6A and 6B</figref>. <figref idref="DRAWINGS">FIG. 6A</figref> is a plan view of a panel in which a thin film transistor and a light-emitting element formed over a first substrate are sealed between the first substrate and a second substrate with a sealant. <figref idref="DRAWINGS">FIG. 6B</figref> is a cross-sectional view taken along line H-I of <figref idref="DRAWINGS">FIG. 6A</figref>.

0211A sealant <b>4505</b> is provided so as to surround a pixel portion <b>4502</b>, signal line driver circuits <b>4503</b><i>a </i>and <b>4503</b><i>b</i>, and scan line driver circuits <b>4504</b><i>a </i>and <b>4504</b><i>b </i>which are provided over a first substrate <b>4501</b>. In addition, a second substrate <b>4506</b> is provided over the pixel portion <b>4502</b>, the signal line driver circuits <b>4503</b><i>a </i>and <b>4503</b><i>b</i>, and the scan line driver circuits <b>4504</b><i>a </i>and <b>4504</b><i>b</i>. Accordingly, the pixel portion <b>4502</b>, the signal line driver circuits <b>4503</b><i>a </i>and <b>4503</b><i>b</i>, and the scan line driver circuits <b>4504</b><i>a </i>and <b>4504</b><i>b </i>are sealed together with a filler <b>4507</b>, by the first substrate <b>4501</b>, the sealant <b>4505</b>, and the second substrate <b>4506</b>. It is preferable that the panel be packaged (sealed) with a protective film (such as a laminate film or an ultraviolet curable resin film) or a cover material with high air-tightness and little degasification so that the panel is not exposed to the outside air, in this manner.

0212The pixel portion <b>4502</b>, the signal line driver circuits <b>4503</b><i>a </i>and <b>4503</b><i>b</i>, and the scan line driver circuits <b>4504</b><i>a </i>and <b>4504</b><i>b </i>formed over the first substrate <b>4501</b> each include a plurality of thin film transistors. A thin film transistor <b>4510</b> included in the pixel portion <b>4502</b> and a thin film transistor <b>4509</b> included in the signal line driver circuit <b>4503</b><i>a </i>are illustrated as an example in <figref idref="DRAWINGS">FIG. 6B</figref>.

0213As for the thin film transistors <b>4509</b> and <b>4510</b>, the highly reliable thin film transistor <b>410</b> including the oxide semiconductor layer described in Embodiment 1 can be employed for the thin film transistor <b>4510</b> for a pixel, and the thin film transistor <b>4509</b> for a driver circuit has a conductive layer in a position overlapping with the channel formation region of the oxide semiconductor layer in the thin film transistor described in Embodiment 1. In this embodiment, the thin film transistors <b>4509</b> and <b>4510</b> are n-channel thin film transistors.

0214A conductive layer <b>4540</b> is provided over part of an insulating layer <b>4544</b>, which overlaps with the channel formation region of the oxide semiconductor layer, in the thin film transistor <b>4509</b> for the driver circuit. When the conductive layer <b>4540</b> is provided at the position overlapping with the channel formation region of the oxide semiconductor layer, the amount of change in threshold voltage of the thin film transistor <b>4509</b> before and after the BT test can be reduced. A potential of the conductive layer <b>4540</b> may be the same as or different from that of a gate electrode layer in the thin film transistor <b>4509</b>. The conductive layer <b>4540</b> can also function as a second gate electrode layer. In addition, the potential of the conductive layer <b>4540</b> may be GND or 0 V, or the conductive layer <b>4540</b> may be placed in a floating state.

0215Further, the thin film transistor <b>4510</b> is electrically connected to a first electrode <b>4517</b>. Further, an oxide insulating layer <b>4542</b> covering the oxide semiconductor layer of the thin film transistor <b>4510</b> is formed.

0216The oxide insulating layer <b>4542</b> can be formed using a material and a method which are similar to those of the oxide insulating layer <b>416</b> described in Embodiment 1. In addition, an insulating layer <b>4547</b> which covers the oxide insulating layer <b>4542</b> is formed. The insulating layer <b>4547</b> may be formed using a silicon oxide film containing a boron element by a sputtering method, in a manner similar to that of the protective insulating layer <b>403</b> described in Embodiment 1.

0217A color filter layer <b>4545</b> is formed over the thin film transistor <b>4510</b> so as to overlap with a light-emitting region of a light-emitting element <b>4511</b>.

0218Further, in order to reduce the surface roughness of the color filter layer <b>4545</b>, the color filter layer <b>4545</b> is covered with an overcoat layer <b>4543</b> functioning as a planarization insulating film.

0219Further, an insulating layer <b>4544</b> is formed over the overcoat layer <b>4543</b>.

0220Moreover, reference numeral <b>4511</b> denotes a light-emitting element. The first electrode <b>4517</b> which is a pixel electrode included in the light-emitting element <b>4511</b> is electrically connected to a source or drain electrode layer of the thin film transistor <b>4510</b>. Note that although the light-emitting element <b>4511</b> has a layered structure of the first electrode <b>4517</b>, an electroluminescent layer <b>4512</b>, and a second electrode <b>4513</b>, the structure of the light-emitting element <b>4511</b> is not limited to the structure described in this embodiment. The structure of the light-emitting element <b>4511</b> can be changed as appropriate depending on the direction in which light is extracted from the light-emitting element <b>4511</b>, or the like.

0221A partition <b>4520</b> is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. It is particularly preferable that the partition <b>4520</b> be formed using a photosensitive material to have an opening portion over the first electrode <b>4517</b> so that a sidewall of the opening portion is formed as a tilted surface with continuous curvature.

0222The electroluminescent layer <b>4512</b> may be formed with a single layer or a plurality of layers stacked.

0223In order to prevent entry of oxygen, hydrogen, moisture, carbon dioxide, or the like into the light-emitting element <b>4511</b>, a protective film may be formed over the second electrode <b>4513</b> and the partition <b>4520</b>. As the protective film, a silicon nitride film, a silicon nitride oxide film, a DLC film, or the like can be formed.

0224In addition, a variety of signals and potentials are supplied to the signal line driver circuits <b>4503</b><i>a </i>and <b>4503</b><i>b</i>, the scan line driver circuits <b>4504</b><i>a </i>and <b>4504</b><i>b</i>, or the pixel portion <b>4502</b> from FPCs <b>4518</b><i>a </i>and <b>4518</b><i>b. </i>

0225A connection terminal electrode <b>4515</b> is formed using the same conductive film as the first electrode <b>4517</b> included in the light-emitting element <b>4511</b>, and a terminal electrode <b>4516</b> is formed using the same conductive film as the source and drain electrode layers included in the thin film transistor <b>4509</b>.

0226The connection terminal electrode <b>4515</b> is electrically connected to a terminal included in the FPC <b>4518</b><i>a </i>via an anisotropic conductive film <b>4519</b>.

0227The second substrate <b>4506</b> located in the direction in which light is extracted from the light-emitting element <b>4511</b> should have a light-transmitting property. In that case, a light-transmitting material such as a glass plate, a plastic plate, a polyester film, or an acrylic film is used for the second substrate <b>4506</b>.

0228As the filler <b>4507</b>, an ultraviolet curable resin or a thermosetting resin can be used, in addition to an inert gas such as nitrogen or argon. For example, PVC (polyvinyl chloride), acrylic, polyimide, an epoxy resin, a silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. For example, nitrogen is used for the filler.

0229In addition, if needed, an optical film, such as a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate (a quarter-wave plate or a half-wave plate), or a color filter, may be provided as appropriate on a light-emitting surface of the light-emitting element. Further, the polarizing plate or the circularly polarizing plate may be provided with an anti-reflection film. For example, anti-glare treatment by which reflected light can be diffused by projections and depressions on the surface so as to reduce the glare can be performed.

0230The signal line driver circuits <b>4503</b><i>a </i>and <b>4503</b><i>b </i>and the scan line driver circuits <b>4504</b><i>a </i>and <b>4504</b><i>b </i>may be mounted as driver circuits formed using a single crystal semiconductor film or a polycrystalline semiconductor film over a substrate which is separately prepared. Alternatively, only the signal line driver circuits or part thereof, or only the scan line driver circuits or part thereof may be separately formed and mounted. This embodiment is not limited to the structure illustrated in <figref idref="DRAWINGS">FIGS. 6A and 6B</figref>.

0231Through the above process, a highly reliable light-emitting display device (display panel) can be manufactured as a semiconductor device.

Embodiment 6

0232The appearance and the cross section of a liquid crystal display panel, which is an embodiment of a semiconductor device, will be described with reference to <figref idref="DRAWINGS">FIGS. 7A to 7C</figref>. <figref idref="DRAWINGS">FIGS. 7A and 7C</figref> are plan views of panels in each of which thin film transistors <b>4010</b> and <b>4011</b> and a liquid crystal element <b>4013</b> are sealed between a first substrate <b>4001</b> and a second substrate <b>4006</b> with a sealant <b>4005</b>. <figref idref="DRAWINGS">FIG. 7B</figref> is a cross-sectional view taken along line M-N in <figref idref="DRAWINGS">FIGS. 7A and 7C</figref>.

0233The sealant <b>4005</b> is provided so as to surround a pixel portion <b>4002</b> and a scan line driver circuit <b>4004</b> which are provided over the first substrate <b>4001</b>. The second substrate <b>4006</b> is provided over the pixel portion <b>4002</b> and the scan line driver circuit <b>4004</b>. Therefore, the pixel portion <b>4002</b> and the scan line driver circuit <b>4004</b> are sealed together with a liquid crystal layer <b>4008</b>, by the first substrate <b>4001</b>, the sealant <b>4005</b>, and the second substrate <b>4006</b>. A signal line driver circuit <b>4003</b> that is formed using a single crystal semiconductor film or a polycrystalline semiconductor film over a substrate separately prepared is mounted in a region that is different from the region surrounded by the sealant <b>4005</b> over the first substrate <b>4001</b>.

0234Note that a connection method of a driver circuit which is separately formed is not limited to a particular method, and a COG method, a wire bonding method, a TAB method, or the like can be used. <figref idref="DRAWINGS">FIG. 7A</figref> illustrates an example of mounting the signal line driver circuit <b>4003</b> by a COG method, and <figref idref="DRAWINGS">FIG. 7C</figref> illustrates an example of mounting the signal line driver circuit <b>4003</b> by a TAB method.

0235The pixel portion <b>4002</b> and the scan line driver circuit <b>4004</b> provided over the first substrate <b>4001</b> each include a plurality of thin film transistors. <figref idref="DRAWINGS">FIG. 7B</figref> illustrates, as an example, the thin film transistor <b>4010</b> included in the pixel portion <b>4002</b> and the thin film transistor <b>4011</b> included in the scan line driver circuit <b>4004</b>. Insulating layers <b>4041</b>, <b>4042</b>, and <b>4021</b> are provided over the thin film transistors <b>4010</b> and <b>4011</b>.

0236Any of the highly reliable thin film transistors including the oxide semiconductor layers which are described in Embodiments 1 to 3 can be used as the thin film transistors <b>4010</b> and <b>4011</b>. Any of the thin film transistors <b>410</b>, <b>460</b>, and <b>310</b> which are described in Embodiments 1 to 3 can be used as the thin film transistor <b>4011</b> for a driver circuit and the thin film transistor <b>4010</b> for a pixel. In this embodiment, the thin film transistors <b>4010</b> and <b>4011</b> are n-channel thin film transistors.

0237A conductive layer <b>4040</b> is provided over part of the insulating layer <b>4021</b>, which overlaps with a channel formation region of an oxide semiconductor layer in the thin film transistor <b>4011</b> for the driver circuit. The conductive layer <b>4040</b> is provided at the position overlapping with the channel formation region of the oxide semiconductor layer, whereby the amount of change in threshold voltage of the thin film transistor <b>4011</b> before and after the BT test can be reduced. A potential of the conductive layer <b>4040</b> may be the same as or different from that of a gate electrode layer of the thin film transistor <b>4011</b>. The conductive layer <b>4040</b> can also function as a second gate electrode layer. In addition, the potential of the conductive layer <b>4040</b> may be GND or 0 V, or the conductive layer <b>4040</b> may be placed in a floating state.

0238A pixel electrode layer <b>4030</b> included in the liquid crystal element <b>4013</b> is electrically connected to the thin film transistor <b>4010</b>. A counter electrode layer <b>4031</b> of the liquid crystal element <b>4013</b> is provided on the second substrate <b>4006</b>. A portion where the pixel electrode layer <b>4030</b>, the counter electrode layer <b>4031</b>, and the liquid crystal layer <b>4008</b> overlap with each other corresponds to the liquid crystal element <b>4013</b>. Note that the pixel electrode layer <b>4030</b> and the counter electrode layer <b>4031</b> are provided with an insulating layer <b>4032</b> and an insulating layer <b>4033</b> respectively which each function as an alignment film, and the liquid crystal layer <b>4008</b> is sandwiched between the pixel electrode layer <b>4030</b> and the counter electrode layer <b>4031</b> with the insulating layers <b>4032</b> and <b>4033</b> therebetween.

0239Note that a light-transmitting substrate can be used as the first substrate <b>4001</b> and the second substrate <b>4006</b>; glass, ceramics, or plastics can be used. As plastics, a fiberglass-reinforced plastic (FRP) plate, a polyvinyl fluoride (PVF) film, a polyester film, or an acrylic resin film can be used.

0240Reference numeral <b>4035</b> denotes a columnar spacer obtained by selectively etching an insulating film and is provided to control the distance between the pixel electrode layer <b>4030</b> and the counter electrode layer <b>4031</b> (a cell gap). Alternatively, a spherical spacer may be used. In addition, the counter electrode layer <b>4031</b> is electrically connected to a common potential line formed over the same substrate as the thin film transistor <b>4010</b>. With the use of a common connection portion, the counter electrode layer <b>4031</b> and the common potential line can be electrically connected to each other by conductive particles arranged between a pair of the substrates. Note that the conductive particles are included in the sealant <b>4005</b>.

0241Alternatively, liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used. A blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase when the temperature of cholesteric liquid crystal is increased. Since the blue phase is generated only within a narrow range of temperature, a liquid crystal composition containing a chiral agent at greater than or equal to 5 wt % so as to widen the temperature range is used for the liquid crystal layer <b>4008</b>. The liquid crystal composition which contains liquid crystal exhibiting a blue phase and a chiral agent has a short response time of less than or equal to 1 msec, has optical isotropy, which makes the alignment process unneeded, and has small viewing angle dependence.

0242An embodiment of the present invention can be applied to a semi-transmissive liquid crystal display device in addition to a transmissive liquid crystal display device.

0243An example of the liquid crystal display device is described in which a polarizing plate is provided on the outer surface of the substrate (on the viewer side) and a coloring layer and an electrode layer used for a display element are provided on the inner surface of the substrate in this order; however, the polarizing plate may be provided on the inner surface of the substrate. Moreover, the layered structure of the polarizing plate and the coloring layer is not limited to that in this embodiment and may be set as appropriate depending on materials of the polarizing plate and the coloring layer or conditions of the manufacturing process. Further, a light-blocking film serving as a black matrix may be provided in a portion other than the display portion.

0244Over the thin film transistors <b>4011</b> and <b>4010</b>, the insulating layer <b>4041</b> is formed in contact with the oxide semiconductor layers. The insulating layer <b>4041</b> can be formed using a material and a method which are similar to those of the oxide insulating layer <b>416</b> described in Embodiment 1. Here, as the insulating layer <b>4041</b>, a silicon oxide film is formed by a sputtering method. Further, the protective insulating layer <b>4042</b> is formed on and in contact with the insulating layer <b>4041</b>. The protective insulating layer <b>4042</b> is an insulating layer formed of silicon oxide containing a boron element like the protective insulating layer <b>403</b> described in Embodiment 1. In order to reduce the surface roughness caused by the thin film transistors, the insulating layer <b>4021</b> serving as a planarization insulating film is formed over the protective insulating layer <b>4042</b>.

0245As the insulating layer <b>4021</b>, an organic material having heat resistance such as polyimide, acrylic, benzocyclobutene, polyamide, or epoxy can be used. Other than such organic materials, it is possible to use a low-dielectric constant material (a low-k material), a siloxane-based resin, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), or the like. Note that the insulating layer <b>4021</b> may be formed by stacking a plurality of insulating films formed of these materials.

0246There is no particular limitation on the method for forming the insulating layer <b>4021</b>. The insulating layer <b>4021</b> can be formed, depending on the material, by a method such as a sputtering method, an SOG method, a spin coating method, a dipping method, a spray coating method, or a droplet discharge method (e.g., an ink jet method, screen printing, or offset printing), or a tool (equipment) such as a doctor knife, a roll coater, a curtain coater, or a knife coater. A baking step of the insulating layer <b>4021</b> also serves as annealing of the semiconductor layer, whereby a semiconductor device can be manufactured efficiently.

0247The pixel electrode layer <b>4030</b> and the counter electrode layer <b>4031</b> can be formed from a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (ITO), indium zinc oxide, or indium tin oxide to which silicon oxide is added.

0248A conductive composition containing a conductive high molecule (also referred to as a conductive polymer) can be used for the pixel electrode layer <b>4030</b> and the counter electrode layer <b>4031</b>. The pixel electrode formed using the conductive composition preferably has a sheet resistance of less than or equal to 10000 ohms per square and a transmittance of greater than or equal to 70% at a wavelength of 550 nm. Further, the resistivity of the conductive high molecule contained in the conductive composition is preferably less than or equal to 0.1 Ω·cm.

0249As the conductive high molecule, a so-called m-electron conjugated conductive polymer can be used. For example, polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, a copolymer of two or more kinds of them, and the like can be given.

0250Further, a variety of signals and potentials are supplied to the signal line driver circuit <b>4003</b> which is formed separately, the scan line driver circuit <b>4004</b>, or the pixel portion <b>4002</b> from an FPC <b>4018</b>.

0251A connection terminal electrode <b>4015</b> is formed from the same conductive film as the pixel electrode layer <b>4030</b> included in the liquid crystal element <b>4013</b>, and a terminal electrode <b>4016</b> is formed from the same conductive film as source and drain electrode layers of the thin film transistors <b>4010</b> and <b>4011</b>.

0252The connection terminal electrode <b>4015</b> is electrically connected to a terminal included in the FPC <b>4018</b> via an anisotropic conductive film <b>4019</b>.

0253Note that <figref idref="DRAWINGS">FIGS. 7A to 7C</figref> illustrate an example in which the signal line driver circuit <b>4003</b> is formed separately and mounted on the first substrate <b>4001</b>; however, the present invention is not limited to this structure. The scan line driver circuit may be separately formed and then mounted, or only part of the signal line driver circuit or part of the scan line driver circuit may be separately formed and then mounted.

0254Further, for the liquid crystal display module, a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, an axially symmetric aligned micro-cell (ASM) mode, an optically compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, or the like can be used.

0255An example of a VA liquid crystal display device is described below.

0256The VA liquid crystal display device has a kind of form in which alignment of liquid crystal molecules of a liquid crystal display panel is controlled. In the VA liquid crystal display device, liquid crystal molecules are aligned in a vertical direction with respect to a panel surface when no voltage is applied. In this embodiment, in particular, a pixel is divided into some regions (subpixels), and molecules are aligned in different directions in their respective regions. This is referred to as multi-domain or multi-domain design. Hereinafter, a liquid crystal display device of multi-domain design is described.

0257<figref idref="DRAWINGS">FIG. 8</figref> and <figref idref="DRAWINGS">FIG. 9</figref> illustrate a pixel structure of a VA liquid crystal display panel. <figref idref="DRAWINGS">FIG. 9</figref> is a plane view of a substrate <b>600</b>. <figref idref="DRAWINGS">FIG. 8</figref> illustrates a cross-sectional structure along line Y-Z in <figref idref="DRAWINGS">FIG. 9</figref>. Description below will be given with reference to both the drawings.

0258In this pixel structure, a plurality of pixel electrodes are provided in one pixel, and a TFT is connected to each pixel electrode. The plurality of TFTs are constructed so as to be driven by different gate signals. That is, signals that are applied to individual pixel electrodes in a multi-domain pixel are controlled independently of each other.

0259Via a contact hole <b>623</b>, a pixel electrode <b>624</b> is connected to a TFT <b>628</b> through a wiring <b>618</b>. Further, via a contact hole <b>627</b> formed in an insulating layer <b>620</b>, a protective insulating layer <b>621</b> which covers the insulating layer <b>620</b>, and an insulating layer <b>622</b> which covers the protective insulating layer <b>621</b>, a pixel electrode <b>626</b> is connected to a TFT <b>629</b> through a wiring <b>619</b>. A gate wiring <b>602</b> of the TFT <b>628</b> is separated from a gate wiring <b>603</b> of the TFT <b>629</b> so that different gate signals can be supplied to these gate wirings. On the other hand, a wiring <b>616</b> serving as a data line is shared by the TFTs <b>628</b> and <b>629</b>. The thin film transistor described in any of Embodiments 1 to 3 can be used as the TFTs <b>628</b> and <b>629</b> as appropriate.

0260A first gate insulating layer <b>606</b><i>a </i>of the thin film transistor is a silicon oxide film containing a boron element obtained by a sputtering method and a second gate insulating layer <b>606</b><i>b </i>is a silicon oxide film obtained by a PCVD method. The insulating layer <b>620</b> which is in contact with the wiring <b>618</b> and the oxide semiconductor layer is a silicon oxide film obtained by a sputtering method, and the protective insulating layer <b>621</b> provided thereover is a silicon oxide film containing a boron element obtained by a sputtering method. Via the contact hole <b>623</b> formed in the insulating layer <b>620</b>, the protective insulating layer <b>621</b> which covers the insulating layer <b>620</b>, and the insulating layer <b>622</b> which covers the protective insulating layer <b>621</b>, the pixel electrode <b>624</b> is electrically connected to the wiring <b>618</b>.

0261Further, a storage capacitor is formed using a capacitor wiring <b>690</b>, a stacked layer of the first gate insulating layer <b>606</b><i>a </i>and the second gate insulating layer <b>606</b><i>b </i>as a dielectric, and the pixel electrode or a capacitor electrode electrically connected to the pixel electrode.

0262The shape of the pixel electrode <b>624</b> is different from that of the pixel electrode <b>626</b>, and the pixel electrodes are separated by slits <b>625</b>. The pixel electrode <b>626</b> surrounds the pixel electrode <b>624</b> which has a V-shape. The TFTs <b>628</b> and <b>629</b> make the timing of applying voltages to the pixel electrodes 624 and 626 different from each other, thereby controlling alignment of liquid crystals. <figref idref="DRAWINGS">FIG. 11</figref> shows an equivalent circuit of this pixel structure. The TFT <b>628</b> is connected to the gate wiring <b>602</b>, and the TFT <b>629</b> is connected to the gate wiring <b>603</b>. If different gate signals are supplied to the gate wirings <b>602</b> and <b>603</b>, operation timing of the TFTs <b>628</b> and <b>629</b> can be different.

0263A counter substrate <b>601</b> is provided with a light blocking film <b>632</b>, a coloring film <b>636</b>, and a counter electrode <b>640</b>. In addition, a planarization film <b>637</b> which is also referred to as an overcoat film is formed between the coloring film <b>636</b> and the counter electrode <b>640</b> to prevent alignment disorder of liquid crystals. <figref idref="DRAWINGS">FIG. 10</figref> illustrates a structure of the counter substrate side. The counter electrode <b>640</b> is shared by plural pixels, and slits <b>641</b> are formed in the counter electrode <b>640</b>. The slits <b>641</b> and the slits on the pixel electrode layers <b>624</b> and <b>626</b> side are alternately arranged so that an oblique electric field is effectively generated, whereby the alignment of the liquid crystals can be controlled. Accordingly, the alignment of the liquid crystals can be varied in different places, so that the viewing angle is widened.

0264The pixel electrode <b>624</b>, a liquid crystal layer <b>650</b>, and the counter electrode <b>640</b> overlap with each other, so that a first liquid crystal element is formed. Further, the pixel electrode <b>626</b>, the liquid crystal layer <b>650</b>, and the counter electrode <b>640</b> overlap with each other, so that a second liquid crystal element is formed. The multi-domain structure is employed in which the first liquid crystal element and the second liquid crystal element are provided for one pixel.

0265This embodiment can be implemented in appropriate combination with the structure described in any of Embodiments 1 to 3.

Embodiment 7

0266In this embodiment, an example of an electronic paper will be described as a semiconductor device of an embodiment of the present invention.

0267<figref idref="DRAWINGS">FIG. 12</figref> illustrates an active matrix electronic paper as an example of a semiconductor device to which an embodiment of the present invention is applied. A thin film transistor <b>581</b> used for the semiconductor device can be manufactured in a manner similar to that of the thin film transistor <b>410</b> described in Embodiment 1 and is a thin film transistor with high electric characteristics including an oxide semiconductor layer covered with a protective insulating layer <b>584</b> formed of silicon oxide containing a boron element.

0268The electronic paper in <figref idref="DRAWINGS">FIG. 12</figref> is an example of a display device using a twisting ball display system. The twisting ball display system refers to a method in which spherical particles each colored in black and white are used for a display element and arranged between a first electrode layer and a second electrode layer which are electrode layers, and a potential difference is generated between the first electrode layer and the second electrode layer to control orientation of the spherical particles, so that display is performed.

0269The thin film transistor <b>581</b> formed over a substrate <b>580</b> has a bottom-gate structure in which source and drain electrode layers are electrically connected to a first electrode layer <b>587</b> via an opening formed in an oxide insulating layer <b>583</b>, the protective insulating layer <b>584</b> and an insulating layer <b>585</b>. Between the first electrode layer <b>587</b> and a second electrode layer <b>588</b>, spherical particles are provided. Each spherical particle includes a black region <b>590</b><i>a </i>and a white region <b>590</b><i>b</i>, and a cavity <b>594</b> filled with liquid around the black region <b>590</b><i>a </i>and the white region <b>590</b><i>b</i>. The circumference of the spherical particles is filled with a filler <b>595</b> such as a resin (see <figref idref="DRAWINGS">FIG. 12</figref>). In this embodiment, the first electrode layer <b>587</b> corresponds to a pixel electrode and the second electrode layer <b>588</b> provided on a counter substrate <b>596</b> corresponds to a common electrode.

0270Further, instead of the twisting ball, an electrophoretic element can be used. A microcapsule having a diameter of about 10 μm to 200 μm in which transparent liquid, positively charged white microparticles, and negatively charged black microparticles are encapsulated, is used. In the microcapsule provided between the first electrode layer and the second electrode layer, when an electric field is applied by the first electrode layer and the second electrode layer, the white microparticles and the black microparticles move in opposite directions to each other, so that white or black can be displayed. A display element using this principle is an electrophoretic display element and is generally called an electronic paper. The electrophoretic display element has higher reflectance than a liquid crystal display element, and thus, an auxiliary light is unnecessary, power consumption is low, and a display portion can be recognized in a dim place. In addition, even when power is not supplied to the display portion, an image which has been displayed once can be maintained. Accordingly, a displayed image can be stored even if a semiconductor device having a display function (which may be referred to simply as a display device or a semiconductor device provided with a display device) is distanced from an electric wave source.

0271Through this process, a highly reliable electronic paper as a semiconductor device can be manufactured.

0272This embodiment can be implemented in appropriate combination with the thin film transistor described in any one of Embodiments 1 to 3.

Embodiment 8

0273In this embodiment, an example in which an insulated-gate semiconductor device, in particular, a semiconductor device called a power MOS device is formed is described. In general, a power MOS device means a semiconductor device (a semiconductor element) used as a switching element of an electronic device or the like. High-speed MOS power devices such as a power MOS FET and an IGBT are known.

0274Instead of the thin film transistor described in any of Embodiments 1 to 3, a transistor having a much thicker oxide semiconductor layer is manufactured, and thereby a power MOS device is formed. Further, a silicon oxide film containing a boron element is used as one layer of a gate insulating layer which is a stacked layer.

0275The power MOS device thus formed is used for controlling an inverter of lighting, as part of an integrated circuit incorporated in the lighting, for example. Besides, the power MOS device may be used for products in various fields such as a vehicle control system and a vehicle body device for an automobile, a television, a camera, a power supply for a computer, an air conditioner, and a programmable logic controller.

Embodiment 9

0276A semiconductor device disclosed in this specification can be applied to a variety of electronic devices (including amusement machines). Examples of the electronic devices are a television set (also referred to as a television or a television receiver), a monitor of a computer or the like, a camera such as a digital camera or a digital video camera, a digital photo frame, a mobile phone (also referred to as a mobile telephone or a mobile phone device), a portable game console, a portable information terminal, an audio reproducing device, a large-sized game machine such as a pachinko machine, and the like.

0277<figref idref="DRAWINGS">FIG. 13A</figref> illustrates an example of a mobile phone. A mobile phone <b>1100</b> is provided with an operation button <b>1103</b>, an external connection port <b>1104</b>, a speaker <b>1105</b>, a microphone <b>1106</b>, and the like, in addition to a display portion <b>1102</b> incorporated in a housing <b>1101</b>.

0278Data can be input to the mobile phone <b>1100</b> illustrated in <figref idref="DRAWINGS">FIG. 13A</figref> by touching the display portion <b>1102</b> with a finger or the like. Further, operations such as making calls and composing mails can be performed by touching the display portion <b>1102</b> with a finger or the like.

0279There are mainly three screen modes of the display portion <b>1102</b>. The first mode is a display mode mainly for displaying images. The second mode is an input mode mainly for inputting data such as text. The third mode is a display-and-input mode in which two modes of the display mode and the input mode are combined.

0280For example, in the case of making a call or composing a mail, a text input mode mainly for inputting text is selected for the display portion <b>1102</b> so that characters displayed on a screen can be input. In this case, it is preferable to display a keyboard or number buttons on almost the entire screen of the display portion <b>1102</b>.

0281When a detection device including a sensor for detecting inclination, such as a gyroscope or an acceleration sensor, is provided inside the mobile phone <b>1100</b>, display on the screen of the display portion <b>1102</b> can be automatically switched by determining the orientation of the mobile phone <b>1100</b> (whether the mobile phone <b>1100</b> is placed horizontally or vertically for a landscape mode or a portrait mode).

0282The screen mode is switched by touching the display portion <b>1102</b> or operating the operation button <b>1103</b> of the housing <b>1101</b>. Alternatively, the screen modes may be switched depending on the kind of the image displayed on the display portion <b>1102</b>. For example, when a signal of an image displayed on the display portion is a signal of moving image data, the screen mode is switched to the display mode. When the signal is a signal of text data, the screen mode is switched to the input mode.

0283Further, in the input mode, when input by touching the display portion <b>1102</b> is not performed for a certain period while a signal detected by an optical sensor in the display portion <b>1102</b> is detected, the screen mode may be controlled so as to be changed from the input mode to the display mode.

0284The display portion <b>1102</b> may function as an image sensor. For example, an image of a palm print, a fingerprint, or the like is taken when the display portion <b>1102</b> is touched with a palm or a finger, whereby personal identification can be performed. Further, by providing a backlight or a sensing light source which emits a near-infrared light in the display portion, an image of a finger vein, a palm vein, or the like can be taken.

0285In the display portion <b>1102</b>, a plurality of the thin film transistors <b>410</b> described in Embodiment 1 are provided as switching elements of pixels.

0286<figref idref="DRAWINGS">FIG. 13B</figref> illustrates an example of a portable information terminal. A portable information terminal whose example is illustrated in <figref idref="DRAWINGS">FIG. 13B</figref> can have a plurality of functions. For example, in addition to a telephone function, such a portable information terminal can have a function of processing a variety of pieces of data by incorporating a computer.

0287The portable information terminal illustrated in <figref idref="DRAWINGS">FIG. 13B</figref> has two housings, a housing <b>1800</b> and a housing <b>1801</b>. The housing <b>1801</b> includes a display panel <b>1802</b>, a speaker <b>1803</b>, a microphone <b>1804</b>, a pointing device <b>1806</b>, a camera lens <b>1807</b>, an external connection terminal <b>1808</b>, and the like. The housing <b>1800</b> includes a keyboard <b>1810</b>, an external memory slot <b>1811</b>, and the like. In addition, an antenna is incorporated in the housing <b>1801</b>.

0288The display panel <b>1802</b> is provided with a touch panel. A plurality of operation keys <b>1805</b> which are displayed as images are illustrated by dashed lines in <figref idref="DRAWINGS">FIG. 13B</figref>.

0289Further, in addition to the above structure, a contactless IC chip, a small memory device, or the like may be incorporated.

0290A light-emitting device can be used for the display panel <b>1802</b> and the direction of display is changed appropriately depending on the application mode. Further, the portable information terminal is provided with the camera lens <b>1807</b> on the same surface as the display panel <b>1802</b>, and thus it can be used for videophone calls. The speaker <b>1803</b> and the microphone <b>1804</b> can be used for videophone calls, recording, and playing sound, etc. as well as voice calls. Moreover, the housings <b>1800</b> and <b>1801</b> in a state where they are developed as illustrated in <figref idref="DRAWINGS">FIG. 13B</figref> can shift so that one is lapped over the other by sliding; therefore, the size of the portable information terminal can be reduced, which makes the portable information terminal suitable for being carried.

0291The external connection terminal <b>1808</b> can be connected to an AC adapter and various types of cables such as a USB cable, and charging and data communication with a personal computer or the like are possible. Moreover, a storage medium can be inserted into the external memory slot <b>1811</b> so that a large amount of data can be stored and moved.

0292Further, in addition to the above functions, an infrared communication function, a television reception function, or the like may be provided.

0293<figref idref="DRAWINGS">FIG. 14A</figref> illustrates an example of a television set. In a television set <b>9600</b>, a display portion <b>9603</b> is incorporated in a housing <b>9601</b>. The display portion <b>9603</b> can display images. Here, the housing <b>9601</b> is supported by a stand <b>9605</b>.

0294The television set <b>9600</b> can be operated with an operation switch of the housing <b>9601</b> or a separate remote controller <b>9610</b>. Channels and volume can be controlled with an operation key <b>9609</b> of the remote controller <b>9610</b> so that an image displayed on the display portion <b>9603</b> can be controlled. Furthermore, the remote controller <b>9610</b> may be provided with a display portion <b>9607</b> for displaying data output from the remote controller <b>9610</b>.

0295Note that the television set <b>9600</b> is provided with a receiver, a modem, and the like. With the use of the receiver, general television broadcasting can be received. Moreover, when the display device is connected to a communication network with or without wires via the modem, one-way (from a sender to a receiver) or two-way (between a sender and a receiver or between receivers) data communication can be performed.

0296In the display portion <b>9603</b>, a plurality of the thin film transistors <b>410</b> described in Embodiment 1 are provided as switching elements of pixels.

0297<figref idref="DRAWINGS">FIG. 14B</figref> illustrates an example of a digital photo frame. For example, in a digital photo frame <b>9700</b>, a display portion <b>9703</b> is incorporated in a housing <b>9701</b>. The display portion <b>9703</b> can display a variety of images. For example, the display portion <b>9703</b> can display data of an image taken with a digital camera or the like and function as a normal photo frame.

0298In the display portion <b>9703</b>, a plurality of the thin film transistors <b>410</b> described in Embodiment 1 are provided as switching elements of pixels.

0299Note that the digital photo frame <b>9700</b> is provided with an operation portion, an external connection portion (a USB terminal, a terminal that can be connected to various cables such as a USB cable, or the like), a recording medium insertion portion, and the like. Although these components may be provided on the surface on which the display portion is provided, it is preferable to provide them on the side surface or the back surface for the design of the digital photo frame <b>9700</b>. For example, a memory storing data of an image taken with a digital camera is inserted into the recording medium insertion portion of the digital photo frame, whereby the image data can be transferred and then displayed on the display portion <b>9703</b>.

0300The digital photo frame <b>9700</b> may be configured to transmit and receive data wirelessly. The structure may be employed in which desired image data is transferred wirelessly to be displayed.

0301<figref idref="DRAWINGS">FIG. 15</figref> illustrates a portable amusement machine including two housings, a housing <b>9881</b> and a housing <b>9891</b> which are jointed with a connector <b>9893</b> so as to be able to open and close. A display portion <b>9882</b> and a display portion <b>9883</b> are incorporated in the housing <b>9881</b> and the housing <b>9891</b>, respectively.

0302In the display portion <b>9883</b>, a plurality of the thin film transistors <b>410</b> described in Embodiment 1 are provided as switching elements of pixels.

0303In addition, the portable amusement machine illustrated in <figref idref="DRAWINGS">FIG. 15</figref> includes a speaker portion <b>9884</b>, a recording medium insertion portion <b>9886</b>, an LED lamp <b>9890</b>, an input means (an operation key <b>9885</b>, a connection terminal <b>9887</b>, a sensor <b>9888</b> (a sensor having a function of measuring force, displacement, position, speed, acceleration, angular velocity, rotational frequency, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electric power, radiation, flow rate, humidity, gradient, oscillation, odor, or infrared rays), and a microphone <b>9889</b>), and the like. It is needless to say that the structure of the portable amusement machine is not limited to the above and other structures provided with at least a thin film transistor disclosed in this specification can be employed. The portable amusement machine may include other accessory equipment as appropriate. The portable amusement machine illustrated in <figref idref="DRAWINGS">FIG. 15</figref> has a function of reading a program or data stored in a recording medium to display it on the display portion, and a function of sharing information with another portable amusement machine by wireless communication. Note that the portable amusement machine illustrated in <figref idref="DRAWINGS">FIG. 15</figref> is not limited to having these functions, and can have various functions.

0304<figref idref="DRAWINGS">FIG. 16</figref> is an example in which the light-emitting device formed in accordance with the above embodiments is used as an indoor lighting device <b>3001</b>. Since the light-emitting device described in Embodiment 4 or 5 can be increased in area, the light-emitting device can be used as a lighting device having a large area. Further, the light-emitting device described in Embodiment 4 can be used as a desk lamp <b>3000</b>. Note that a lighting device includes, in its category, a wall light, a light for an inside of a car, an evacuation light, and the like in addition to a ceiling light and a desk lamp.

0305In this manner, the thin film transistor described in any of Embodiments 1 to 3 can be provided in a display panel of a variety of electronic devices as described above. A highly reliable electronic device can be provided by using the thin film transistor <b>410</b> as a switching element of the display panel.

Embodiment 10

0306A semiconductor device disclosed in this specification can be applied to an electronic paper. The electronic paper can be used for electronic devices of a variety of fields as long as they can display data. For example, the electronic paper can be applied to an e-book reader (electronic book), a poster, an advertisement in a vehicle such as a train, or displays of various cards such as a credit card. An example of the electronic devices is illustrated in <figref idref="DRAWINGS">FIG. 17</figref>.

0307<figref idref="DRAWINGS">FIG. 17</figref> illustrates an example of an e-book reader. For example, an e-book reader <b>2700</b> includes two housings, a housing <b>2701</b> and a housing <b>2703</b>. The housing <b>2701</b> and the housing <b>2703</b> are combined with a hinge <b>2711</b> so that the e-book reader <b>2700</b> can be opened and closed with the hinge <b>2711</b> as an axis. With such a structure, the e-book reader <b>2700</b> can operate like a paper book.

0308A display portion <b>2705</b> and a display portion <b>2707</b> are incorporated in the housing <b>2701</b> and the housing <b>2703</b>, respectively. The display portion <b>2705</b> and the display portion <b>2707</b> may display one image or different images. In the case where the display portion <b>2705</b> and the display portion <b>2707</b> display different images, for example, text can be displayed on a display portion on the right side (the display portion <b>2705</b> in <figref idref="DRAWINGS">FIG. 17</figref>) and graphics can be displayed on a display portion on the left side (the display portion <b>2707</b> in <figref idref="DRAWINGS">FIG. 17</figref>).

0309<figref idref="DRAWINGS">FIG. 17</figref> illustrates an example in which the housing <b>2701</b> is provided with an operation portion and the like. For example, the housing <b>2701</b> is provided with a power switch <b>2721</b>, an operation key <b>2723</b>, a speaker <b>2725</b>, and the like. With the operation key <b>2723</b>, pages can be turned. Note that a keyboard, a pointing device, and the like may be provided on the same surface as the display portion of the housing. Furthermore, an external connection terminal (an earphone terminal, a USB terminal, a terminal that can be connected to various cables such as an AC adapter and a USB cable, or the like), a recording medium insertion portion, and the like may be provided on the back surface or the side surface of the housing. Moreover, the e-book reader <b>2700</b> may have a function of an electronic dictionary.

0310The e-book reader <b>2700</b> may have a configuration capable of wirelessly transmitting and receiving data. Through wireless communication, desired book data or the like can be purchased and downloaded from an electronic book server.

0311This embodiment can be implemented in appropriate combination with the thin film transistor described in any one of Embodiments 1 to 3.

0312This application is based on Japanese Patent Application serial no. 2009-205222 filed with Japan Patent Office on Sep. 4, 2009, the entire contents of which are hereby incorporated by reference.

EXPLANATION OF REFERENCE

0313<b>300</b>: substrate, <b>302</b><i>a</i>: gate insulating layer, <b>302</b><i>b</i>: gate insulating layer, <b>307</b>: protective insulating layer, <b>310</b>: thin film transistor, <b>311</b>: gate electrode layer, <b>313</b><i>c</i>: channel formation region, <b>314</b><i>a</i>: oxide conductive layer, <b>314</b><i>b</i>: oxide conductive layer, <b>315</b><i>a</i>: source electrode layer, <b>315</b><i>b</i>: drain electrode layer, <b>316</b>: oxide insulating layer, <b>330</b>: oxide semiconductor film, <b>334</b>: resist mask, <b>400</b>: substrate, <b>402</b><i>a</i>: gate insulating layer, <b>402</b><i>b</i>: gate insulating layer, <b>403</b>: protective insulating layer, <b>410</b>: thin film transistor, <b>411</b>: gate electrode layer, <b>413</b>: channel formation region, <b>414</b><i>a</i>: high-resistance source region, <b>414</b><i>b</i>: high-resistance drain region, <b>415</b><i>a</i>: source electrode layer, <b>415</b><i>b</i>: drain electrode layer, <b>416</b>: oxide insulating layer, <b>430</b>: oxide semiconductor film, <b>431</b>: oxide semiconductor layer, <b>450</b>: substrate, <b>451</b>: gate electrode layer, <b>452</b><i>a</i>: gate insulating layer, <b>452</b><i>b</i>: gate insulating layer, <b>453</b>: oxide semiconductor layer, <b>454</b>: channel formation region, <b>455</b><i>a</i>: source electrode layer, <b>455</b><i>b</i>: drain electrode layer, <b>456</b>: oxide insulating layer, <b>457</b>: protective insulating layer, <b>459</b>: oxide semiconductor film, <b>460</b>: thin film transistor, <b>580</b>: substrate, <b>581</b>: thin film transistor, <b>583</b>: oxide insulating layer, <b>584</b>: protective insulating layer, <b>585</b>: insulating layer, <b>587</b>: electrode layer, <b>588</b>: electrode layer, <b>590</b><i>a</i>: black region, <b>590</b><i>b</i>: white region, <b>594</b>: cavity, <b>595</b>: filler, <b>596</b>: counter substrate, <b>600</b>: substrate, <b>601</b>: counter substrate, <b>602</b>: gate wiring, <b>603</b>: gate wiring, <b>606</b><i>a</i>: gate insulating layer, <b>606</b><i>b</i>: gate insulating layer, <b>616</b>: wiring, <b>618</b>: wiring, <b>619</b>: wiring, <b>620</b>: insulating layer, <b>621</b>: protective insulating layer, <b>622</b>: insulating layer, <b>623</b>: contact hole, <b>624</b>: pixel electrode, <b>625</b>: slit, <b>626</b>: pixel electrode, <b>627</b>: contact hole, <b>628</b>: TFT, <b>629</b>: TFT, <b>632</b>: light-blocking film, <b>636</b>: coloring film, <b>637</b>: planarization film, <b>640</b>: counter electrode, <b>641</b>: slit, <b>650</b>: liquid crystal layer, <b>690</b>: capacitor wiring, <b>1100</b>: mobile phone, <b>1101</b>: housing, <b>1102</b>: display portion, <b>1103</b>: operation button, <b>1104</b>: external connection port, <b>1105</b>: speaker, <b>1106</b>: microphone, <b>1800</b>: housing, <b>1801</b>: housing, <b>1802</b>: display panel, <b>1803</b>: speaker, <b>1804</b>: microphone, <b>1805</b>: operation key, <b>1806</b>: pointing device, <b>1807</b>: camera lens, <b>1808</b>: external connection terminal, <b>1810</b>: keyboard, <b>1811</b>: external memory slot, <b>2700</b>: e-book reader, <b>2701</b>: housing, <b>2703</b>: housing, <b>2705</b>: display portion, <b>2707</b>: display portion, <b>2711</b>: hinge, <b>2721</b>: power switch, <b>2723</b>: operation key, <b>2725</b>: speaker, <b>3000</b>: desk lamp, <b>3001</b>: lighting device, <b>4001</b>: substrate, <b>4002</b>: pixel portion, <b>4003</b>: signal line driver circuit, <b>4004</b>: scan line driver circuit, <b>4005</b>: sealant, <b>4006</b>: substrate, <b>4008</b>: liquid crystal layer, <b>4010</b>: thin film transistor, <b>4011</b>: thin film transistor, <b>4013</b>: liquid crystal element, <b>4015</b>: connection terminal electrode, <b>4016</b>: terminal electrode, <b>4018</b>: FPC, <b>4019</b>: anisotropic conductive film, <b>4021</b>: insulating layer, <b>4030</b>: pixel electrode layer, <b>4031</b>: counter electrode layer, <b>4032</b>: insulating layer, <b>4040</b>: conductive layer, <b>4041</b>: insulating layer, <b>4042</b>: protective insulating layer, <b>4501</b>: substrate, <b>4502</b>: pixel portion, <b>4503</b><i>a</i>: signal line driver circuit, <b>4503</b><i>b</i>: signal line driver circuit, <b>4504</b><i>a</i>: scan line driver circuit, <b>4504</b><i>b</i>: scan line driver circuit, <b>4505</b>: sealant, <b>4506</b>: substrate, <b>4507</b>: filler, <b>4509</b>: thin film transistor, <b>4510</b>: thin film transistor, <b>4511</b>: light-emitting element, <b>4512</b>: electroluminescent layer, <b>4513</b>: second electrode, <b>4515</b>: connection terminal electrode, <b>4516</b>: terminal electrode, <b>4517</b>: first electrode, <b>4518</b><i>a</i>: FPC, <b>4518</b><i>b</i>: FPC, <b>4519</b>: anisotropic conductive film, <b>4520</b>: partition, <b>4540</b>: conductive layer, <b>4542</b>: oxide insulating layer, <b>4543</b>: overcoat layer, <b>4544</b>: insulating layer, <b>4545</b>: color filter layer, <b>4547</b>: insulating layer, <b>6400</b>: pixel, <b>6401</b>: switching transistor, <b>6402</b>: driver transistor, <b>6403</b>: capacitor, <b>6404</b>: light-emitting element, <b>6405</b>: signal line, <b>6406</b>: scan line, <b>6407</b>: power supply line, <b>6408</b>: common electrode, <b>7001</b>: TFT, <b>7002</b>: light-emitting element, <b>7003</b>: electrode, <b>7004</b>: EL layer, <b>7005</b>: electrode, <b>7009</b>: partition, <b>7011</b>: driving TFT, <b>7012</b>: light-emitting element, <b>7013</b>: electrode, <b>7014</b>: EL layer, <b>7015</b>: electrode, <b>7016</b>: light-blocking film, <b>7017</b>: conductive film, <b>7019</b>: partition, <b>7021</b>: driving TFT, <b>7022</b>: light-emitting element, <b>7023</b>: electrode, <b>7024</b>: EL layer, <b>7025</b>: electrode, <b>7026</b>: electrode, <b>7027</b>: conductive film, <b>7029</b>: partition, <b>7031</b>: insulating layer, <b>7032</b>: insulating layer, <b>7033</b>: color filter layer, <b>7034</b>: overcoat layer, <b>7035</b>: protective insulating layer, <b>7041</b>: insulating layer, <b>7042</b>: insulating layer, <b>7043</b>: color filter layer, <b>7044</b>: overcoat layer, <b>7045</b>: protective insulating layer, <b>7051</b>: oxide insulating layer, <b>7052</b>: protective insulating layer, <b>7053</b>: planarization insulating layer, <b>7055</b>: insulating layer, <b>9600</b>: television set, <b>9601</b>: housing, <b>9603</b>: display portion, <b>9605</b>: stand, <b>9607</b>: display portion, <b>9609</b>: operation key, <b>9610</b>: remote controller, <b>9700</b>: digital photo frame, <b>9701</b>: housing, <b>9703</b>: display portion, <b>9881</b>: housing, <b>9882</b>: display portion, <b>9883</b>: display portion, <b>9884</b>: speaker portion, <b>9885</b>: input means, <b>9886</b>: recording medium insertion portion, <b>9887</b>: connection terminal, <b>9888</b>: sensor, <b>9889</b>: microphone, <b>9890</b>: LED lamp, <b>9891</b>: housing, <b>9893</b>: connector