Sigma delta RF modulator having capacitive coupling, analog/digital converter and apparatus including such a modulator

BACKGROUND

The invention relates to a continuous-time sigma delta radio frequency modulator. It also relates to an analogue-to-digital radio frequency converter comprising such a modulator as well as an electronic device, such as for example a software-defined radio receiver, comprising such a modulator and/or such a converter.

The field of the invention is the field of processing of radio frequency (RF) signals, and more particularly the field of analogue-to-digital conversion of radio frequency signals, and even more particularly in software-defined radio applications, and in cognitive and opportunistic radio applications.

There is currently an increasing need for RF analogue-to-digital converters having a frequency band, called frequency band of interest, of several tens of megahertz (MHz) centred around a frequency of the order of one gigahertz (GHz). This need is met for example by the development of new radiocommunications techniques based on software-defined radio.

Existing RF analogue-to-digital converters are intended to convert the entire band of frequencies received (from DC to several GHz). These converters have the drawback of having a very high power consumption (several watts) and as a result are not suitable for portable electronic devices.

Analogue-to-digital converters of the bandpass Sigma Delta (SD) type constitute a promising response to this need, since the latter are capable of converting a limited frequency band around a certain central frequency. In order to achieve central frequencies of several GHz, the bandpass filter of this type of modulator is most often produced using passive LC resonators. However, the performance of this type of converters is inadequate, in particular in terms of signal-to-noise ratio (SNR).

A method of increasing the SNR, and therefore the performance of a bandpass SD converter, consists of increasing the order of the bandpass LC filter used in the loop of the modulator of an RF SD converter.

The standard solution for producing high-order LC SD modulators is to couple several LC resonators using a Gm transconductor.

<figref idref="DRAWINGS">FIG. 1</figref> shows an example of such a 4^th-order SD modulator. The modulator <b>1</b> comprises a processing chain <b>2</b> and a current feedback loop <b>3</b>, not shown in detail. The feedback loop could also be a voltage feedback loop. Processing chain <b>2</b> receives an analogue current X(s) at an input <b>21</b> and delivers a digital signal Y(z) at an output <b>22</b>. Processing chain <b>2</b> comprises, connected in series, a first LC resonator <b>23</b>, a G_mtransconductor <b>24</b>, a second LC resonator <b>25</b>, and a threshold comparator <b>26</b> working at a sampling frequency f_s. The first LC resonator <b>23</b> is produced by connecting in parallel a capacitor C₁and an inductor L₁. A first terminal of this LC resonator <b>23</b> is connected to an input terminal <b>27</b> of G_mtransconductor <b>24</b>, and a second terminal is connected to a reference voltage V_ref. Similarly, second LC resonator <b>25</b> is produced by connecting in parallel a capacitor C₂and an inductor L₂. A first terminal of LC resonator <b>25</b> is connected to an output terminal <b>28</b> of G_mtransconductor <b>24</b>. A second terminal of LC resonator <b>25</b> is connected to the reference voltage V_ref.

LC resonators <b>23</b> and <b>25</b> and G_mtransconductor <b>24</b> form a loop filter for the SD modulator. In the embodiment in <figref idref="DRAWINGS">FIG. 1</figref>, the transfer function of this loop filter can be described by the following equation:

<maths id="MATH-US-00001" num="00001"><math overflow="scroll"><mrow><mrow><mi>H</mi><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mrow><msub><mi>G</mi><mi>m</mi></msub><mo>⁢</mo><msubsup><mi>ω</mi><mn>0</mn><mn>2</mn></msubsup><mo>⁢</mo><msubsup><mi>ω</mi><mn>1</mn><mn>2</mn></msubsup><mo>⁢</mo><msup><mi>L</mi><mn>2</mn></msup><mo>⁢</mo><msup><mi>s</mi><mn>2</mn></msup></mrow><mrow><mrow><mo>(</mo><mrow><msup><mi>s</mi><mn>2</mn></msup><mo>+</mo><msubsup><mi>ω</mi><mn>0</mn><mn>2</mn></msubsup></mrow><mo>)</mo></mrow><mo>⁢</mo><mrow><mo>(</mo><mrow><msup><mi>s</mi><mn>2</mn></msup><mo>+</mo><msubsup><mi>ω</mi><mn>1</mn><mn>2</mn></msubsup></mrow><mo>)</mo></mrow></mrow></mfrac></mrow></math></maths><img file="US9306594B2_D0001.tif" />

This transfer function contains two pairs of complex conjugate poles with the following angular frequencies:

<maths id="MATH-US-00002" num="00002"><math overflow="scroll"><mrow><msub><mi>ω</mi><mn>0</mn></msub><mo>=</mo><mrow><mrow><mfrac><mn>1</mn><msqrt><mrow><msub><mi>L</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>1</mn></msub></mrow></msqrt></mfrac><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>and</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><msub><mi>ω</mi><mn>1</mn></msub></mrow><mo>=</mo><mfrac><mn>1</mn><msqrt><mrow><msub><mi>L</mi><mn>2</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow></msqrt></mfrac></mrow></mrow></math></maths><img file="US9306594B2_D0002.tif" />

This transfer function contains two zeros in DC, i.e. at zero frequency.

The performance of the SD modulators obtained with architectures based on a coupling with a transconductor is limited. This is due to the large number of active components which increase the noise level and the non-linearity, and therefore degrade the SNR. Moreover, these components increase the power consumption of the modulator.

With the aim of eliminating this coupling transconductor, it was proposed in U.S. Pat. No. 7,057,541 to produce high-order LC filters by connecting several LC resonators in series.

<figref idref="DRAWINGS">FIG. 2</figref> represents an example of an SD modulator comprising a loop filter formed by two LC resonators in series. Modulator <b>4</b> comprises a processing chain <b>5</b> and a current feedback loop <b>3</b>, not shown in detail. Processing chain <b>5</b> receives an analogue signal X(s) at an input <b>51</b> and delivers a digital signal Y(z) at an output <b>52</b>. In this modulator <b>4</b>, processing chain <b>5</b> comprises a loop filter <b>6</b> formed by a first LC resonator <b>61</b> and a second LC resonator <b>62</b>. Each LC resonator <b>61</b>, <b>62</b> is formed by connecting in parallel a capacitor C₁or C₂, and an inductor L₁or L₂, respectively. A first terminal of LC resonator <b>61</b> is connected to input <b>51</b>, upstream of threshold comparator <b>26</b>, a second terminal of LC resonator <b>61</b> is connected to a first terminal of LC resonator <b>62</b>, and a second terminal of LC resonator <b>62</b> is connected to a reference voltage V_ref.

In this embodiment, the transfer function of loop filter <b>6</b> of modulator <b>4</b> can be described by the following equation:

<maths id="MATH-US-00003" num="00003"><math overflow="scroll"><mrow><mrow><mi>H</mi><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mrow><mi>s</mi><mo>⁡</mo><mrow><mo>(</mo><mrow><mrow><msub><mi>L</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub><mo>⁢</mo><msub><mi>L</mi><mn>2</mn></msub><mo>⁢</mo><msup><mi>s</mi><mn>2</mn></msup></mrow><mo>+</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>L</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>L</mi><mn>2</mn></msub><mo>⁢</mo><msup><mi>s</mi><mn>2</mn></msup></mrow><mo>+</mo><msub><mi>L</mi><mn>2</mn></msub><mo>+</mo><msub><mi>L</mi><mn>1</mn></msub></mrow><mo>)</mo></mrow></mrow><mrow><mrow><mo>(</mo><mrow><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>L</mi><mn>1</mn></msub><mo>⁢</mo><msup><mi>s</mi><mn>2</mn></msup></mrow><mo>+</mo><mn>1</mn></mrow><mo>)</mo></mrow><mo>⁢</mo><mrow><mo>(</mo><mrow><mrow><msub><mi>C</mi><mn>2</mn></msub><mo>⁢</mo><msub><mi>L</mi><mn>2</mn></msub><mo>⁢</mo><msup><mi>s</mi><mn>2</mn></msup></mrow><mo>+</mo><mn>1</mn></mrow><mo>)</mo></mrow></mrow></mfrac></mrow></math></maths><img file="US9306594B2_D0003.tif" />

This transfer function contains, as in the case of the LC resonators coupled by a G_mtransconductor, two pairs of complex conjugate poles having the following angular frequencies:

<maths id="MATH-US-00004" num="00004"><math overflow="scroll"><mrow><msub><mi>ω</mi><mn>0</mn></msub><mo>=</mo><mrow><mrow><mfrac><mn>1</mn><msqrt><mrow><msub><mi>L</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>1</mn></msub></mrow></msqrt></mfrac><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>and</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><msub><mi>ω</mi><mn>1</mn></msub></mrow><mo>=</mo><mfrac><mn>1</mn><msqrt><mrow><msub><mi>L</mi><mn>2</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow></msqrt></mfrac></mrow></mrow></math></maths><img file="US9306594B2_D0004.tif" />

This transfer function contains a zero in DC and a pair of complex conjugate zeros at the following angular frequency:

<maths id="MATH-US-00005" num="00005"><math overflow="scroll"><mrow><msub><mi>ω</mi><mi>Z</mi></msub><mo>=</mo><msqrt><mfrac><mrow><msub><mi>L</mi><mn>2</mn></msub><mo>+</mo><msub><mi>L</mi><mn>1</mn></msub></mrow><mrow><msub><mi>L</mi><mn>1</mn></msub><mo>⁢</mo><mrow><msub><mi>L</mi><mn>2</mn></msub><mo>⁡</mo><mrow><mo>(</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>+</mo><msub><mi>C</mi><mn>2</mn></msub></mrow><mo>)</mo></mrow></mrow></mrow></mfrac></msqrt></mrow></math></maths><img file="US9306594B2_D0005.tif" />

This pair of complex conjugate zeros creates anti-resonance at a frequency close to the resonance frequency of the two LC resonators <b>61</b>, <b>62</b>. This anti-resonance frequency in the transfer function of feedback filter <b>6</b> makes the following design stages very difficult: <ul id="ul0001" list-style="none"><li id="ul0001-0001" num="0000"><ul id="ul0002" list-style="none"><li id="ul0002-0001" num="0024">stabilizing the feedback loop of the Sigma-Delta modulator;</li><li id="ul0002-0002" num="0025">designing the noise transfer function so as to maximize the signal-to-noise ratio;</li><li id="ul0002-0003" num="0026">designing the signal transfer function so as to avoid changing the bandwidth of interest and to maximize the attenuation outside the bandwidth. <br /> U.S. Pat. No. 7,057,541 does not mention these difficulties and does not offer any technique for overcoming them. </li></ul></li></ul>

The purpose of the invention is to overcome the aforementioned drawbacks. Thus, it aims to improve performance in terms of noise and non-linearity of standard architectures using LC resonators coupled via transconductors, while still avoiding the introduction of problems of stabilization of the feedback loop and difficulties of design of the noise and signal transfer functions.

Another purpose of the invention is to propose a low-consumption continuous-time sigma delta radio frequency modulator.

Another purpose of the invention is to propose a continuous-time sigma delta radio frequency modulator having a simple design while offering improved performance in terms of signal-to-noise ratio and linearity.

Finally, another purpose of the present invention is to propose a continuous-time sigma delta radio frequency modulator that is easier to tune.

SUMMARY

The invention makes it possible to achieve at least one of the aforementioned purposes via a continuous-time sigma delta radio frequency modulator comprising at least two LC resonators producing a bandpass filter, and coupled to one another by at least one capacitive coupling element, called coupling element.

The resonators coupled to one another make it possible to obtain an at least 4^th-order bandpass filter and therefore to obtain a modulator having a performance similar to the 4^th-order modulators of the state of the art.

The LC resonators are coupled to one another in parallel.

Furthermore, the two LC resonators are coupled to one another capacitively, in contrast to modulators of the state of the art which use transconductors denoted G_mfor coupling the LC resonators. In fact, the bandpass filter obtained by capacitive coupling of at least two LC resonators consumes less than the modulators of the state of the art.

Moreover, the design of a bandpass filter obtained by capacitive coupling of two resonators is simpler and less restrictive in terms of linearity. Indeed, a coupling capacitive element that has a simpler design introduces less noise and degrades the linearity of the modulator much less than a transconductor.

According to an advantageous embodiment, the modulator according to the invention comprises exactly two LC resonators producing a bandpass filter coupled to one another in parallel by at least one capacitive element, called coupling capacitive element.

Thus, a 4^th-order bandpass filter is obtained that is easier to design and to tune than higher-order filters while still having adequate performance for current applications, for example software-defined radio, cognitive and opportunistic radio.

According to the invention, the coupling capacitive element can comprise at least one, and in particular exactly one capacitor, called coupling capacitor. A capacitor is a low-cost electronic component commonly used in the field of electronics.

In a preferred embodiment, the at least one coupling capacitor can be a variable capacitor, the value of which can be adjusted, thus adding a degree of additional freedom for adjusting the frequency response of the filter. It is therefore simpler in an LC filter with capacitive coupling to modify the transfer function of the bandpass filter produced by the two resonators and to obtain a noise transfer function (NTF) which maximizes the signal-to-noise ratio in the frequency band of interest. More precisely, the proposed bandpass LC SD architecture makes it possible to easily modify the frequency position of the poles produced by each of the LC resonators of the bandpass filter, in the transfer function of the bandpass filter, in order to place them at the same frequency position as the zeros of the noise transfer function of the modulator, and thus minimize the power of the quantization noise in the desired bandwidth. It is important to note that, despite the fact that the frequency response of the LC filter with capacitive coupling contains significant peaks, the signal transfer function (STF) of the SD modulator is flat in the bandwidth of the signal.

In a preferred version of the modulator according to the invention, at least one LC resonator, preferentially each of the LC resonators, can comprise at least one variable capacitor, the value of which can be adjusted, in order to optimize the position of the zeros in the noise transfer function and as a result minimize the power of the quantization noise in the bandwidth of the bandpass filter.

According to the invention, each LC resonator can comprise at least one capacitive element and at least one inductive element arranged in parallel.

Each capacitive element and/or each inductive element of at least one resonator, or of each of the resonators, can be variable so as to modify, for a given modulator, the frequency band of interest according to the applications and the frequencies concerned for each of the applications.

The modulator according to the invention can also comprise: <ul id="ul0003" list-style="none"><li id="ul0003-0001" num="0000"><ul id="ul0004" list-style="none"><li id="ul0004-0001" num="0044">a feedback loop, and</li><li id="ul0004-0002" num="0045">an adder configured for receiving: <ul id="ul0005" list-style="none"><li id="ul0005-0001" num="0046">at one of its inputs an analogue signal, and</li><li id="ul0005-0002" num="0047">at its other input a signal provided by said feedback loop and the output of which is linked to the input of the bandpass filter.</li></ul></li></ul></li></ul>

The modulator according to the invention can also comprise: <ul id="ul0006" list-style="none"><li id="ul0006-0001" num="0000"><ul id="ul0007" list-style="none"><li id="ul0007-0001" num="0049">a delay compensation loop of the feedback loop, and</li><li id="ul0007-0002" num="0050">another adder, called second adder, configured for receiving: <ul id="ul0008" list-style="none"><li id="ul0008-0001" num="0051">at one of its inputs a signal provided by the bandpass filter, and</li><li id="ul0008-0002" num="0052">at its other input a feedback loop delay compensation signal provided by said compensation loop.</li></ul></li></ul></li></ul>

Advantageously, at least one of the feedback or compensation loops can comprise a finite impulse response (FIR) filter.

The coefficients of these filters are determined by techniques known in the state of the art.

The modulator according to the invention can moreover comprise at least one means for setting the loop-delay value, at a predetermined value in order to reduce the number of coefficients of the finite impulse response filter(s).

Indeed, it is possible, by adjusting the loop-delay value, to cancel the value of certain coefficients of each of the FIR filters used in the feedback or compensation loop.

Thus, for a 4^th-order bandpass filter i.e. a filter comprising two LC resonators with capacitive coupling, it is possible to obtain a feedback FIR filter and a compensation FIR filter, each comprising only two non-zero coefficients. As a result, the design of the modulator is simplified and the power consumed is reduced.

In order to identify the appropriate loop-delay value, i.e. the value that must be applied by the means for setting the loop-delay value, it is possible to: <ul id="ul0009" list-style="none"><li id="ul0009-0001" num="0000"><ul id="ul0010" list-style="none"><li id="ul0010-0001" num="0059">scan the loop-delay value, for example from 0 to 2 Ts, with Ts corresponding to the sampling period, and</li><li id="ul0010-0002" num="0060">calculate the corresponding values of each of the coefficients of the FIR filters.</li></ul></li></ul>

It is possible then to identify an optimum loop-delay value for which one or more coefficients of each of the FIR filters is cancelled.

The device according to the invention can moreover comprise: <ul id="ul0011" list-style="none"><li id="ul0011-0001" num="0000"><ul id="ul0012" list-style="none"><li id="ul0012-0001" num="0063">at least one sampling means, and</li><li id="ul0012-0002" num="0064">at least one quantization means or at least one comparison means;</li><li id="ul0012-0003" num="0065">a digital-to-analogue converter with a finite impulse response filter called FIRDAC (for Finite Impulse Response Digital-to-Analog Converter) arranged in series between the output of the quantizer and the different feedback nodes and providing an analogue signal.</li></ul></li></ul>

The sampling means can be arranged to achieve a sampling at a sampling frequency fs such that fs˜4*fc with fc being the central frequency of the frequency band of interest.

According to another aspect of the invention a continuous-time analogue-to-digital sigma delta radio frequency converter is proposed comprising at least one modulator according to the invention and at least one digital means of processing the digital signal provided by said modulator in order to provide a digital signal over several bits.

Such digital means can be for example a digital signal processor (DSP).

According to the invention, a modulator or a converter according to the invention is advantageously produced partly or entirely in integrated form within an integrated circuit, more particularly within an electronic chip, for example.

According to another aspect of the invention a wireless communication device is proposed, comprising a modulator and/or a converter according to the invention.

Such a communication device can be presented in the form of an autonomous device or in the form of a module integrated in an assembly.

Such a communication device can for example be a radio frequency wave receiver.

According to a preferred embodiment, a modulator according to the invention and/or a converter according to the invention can be used for producing a receiver for software-defined radio, cognitive and opportunistic radio.

BRIEF DESCRIPTION OF THE DRAWINGS

Other advantages and characteristics will become apparent on examination of the detailed description of an embodiment which is in no way limitative, and the attached diagrams, in which:

<figref idref="DRAWINGS">FIG. 1</figref>, already described, is a representation of the standard architecture for producing a bandpass Sigma-Delta modulator using LC resonators coupled by a G_mtransconductor;

<figref idref="DRAWINGS">FIG. 2</figref>, already described, is a representation of a bandpass Sigma-Delta modulator using LC resonators linked in series;

<figref idref="DRAWINGS">FIG. 3</figref> is a representation of a first example of a bandpass Sigma-Delta modulator according to the invention;

<figref idref="DRAWINGS">FIG. 4</figref> is a mathematical representation of a second embodiment of a modulator according to the invention containing FIRDACs in a feedback loop;

<figref idref="DRAWINGS">FIG. 5</figref> shows, for the example modulator in <figref idref="DRAWINGS">FIG. 4</figref>, the transfer function of the loop filter, the noise transfer function and the signal transfer function;

<figref idref="DRAWINGS">FIG. 6</figref> is a diagrammatic representation of a simulation result obtained for the modulator in <figref idref="DRAWINGS">FIG. 4</figref> showing the power spectral density;

<figref idref="DRAWINGS">FIG. 7</figref> is a diagrammatic representation of an RF receiver architecture according to the invention;

<figref idref="DRAWINGS">FIG. 8</figref> is a diagrammatic representation of a practical embodiment adapted for on-chip integration of the Sigma-Delta modulator according to the invention; and

<figref idref="DRAWINGS">FIG. 9</figref> is a diagrammatic representation of a differential embodiment adapted for on-chip integration of the loop filter of the Sigma-Delta modulator according to the invention.

DETAILED DESCRIPTION

It is understood that the embodiments which will be described below are in no way limitative. In particular, variants of the invention can be envisaged comprising only a selection of the features described hereinafter in isolation from the other described features, if this selection of features is sufficient to provide a technical advantage or to differentiate the invention from the state of the prior art. This selection comprises at least one preferably functional feature without structural details, or with only a part of the structural details if this part is sufficient on its own to provide a technical advantage or to differentiate the invention from the state of the prior art.

In particular, all the variants and all the described embodiments can be combined with one another if there is nothing which prevents this combination from a technical point of view.

In the Figures, elements common to several figures retain the same references.

<figref idref="DRAWINGS">FIG. 3</figref> represents a first example of a bandpass Sigma-Delta modulator according to the invention. Sigma-Delta modulator <b>7</b> comprises a processing chain <b>8</b> and a feedback loop <b>3</b>. Processing chain <b>8</b> is arranged to receive an analogue signal X(s) at an input <b>81</b> of a line <b>82</b> processing the signal, and to deliver a digital signal Y(z) at an output <b>83</b>. The processing chain <b>8</b> comprises, connected in series from input <b>81</b> to output <b>83</b>, a first LC resonator <b>84</b>, a coupling capacitor C_c<b>85</b>, a second LC resonator <b>86</b>, and a threshold comparator <b>87</b> working at a sampling frequency f_s. LC resonators <b>84</b>, <b>86</b> and coupling capacitor C_c<b>85</b> form a loop filter <b>9</b>. First LC resonator <b>84</b> comprises a capacitor C₁and an inductor L₁connected in parallel. A first terminal of LC resonator <b>84</b> is connected to line <b>82</b> and, more precisely, to a first terminal (or electrode) of coupling capacitor C_c<b>85</b>. A second terminal of LC resonator <b>84</b> is connected to a reference voltage V_ref. Similarly, second LC resonator <b>86</b> comprises a capacitor C₂and an inductor L₂connected in parallel. A first terminal of LC resonator <b>86</b> is connected to line <b>82</b> and, more precisely, to a second terminal (or electrode) of coupling capacitor C_c<b>85</b>. A second terminal of LC resonator <b>86</b> is connected to reference voltage V_ref. Feedback loop <b>3</b> is based on a technique well known to a person skilled in the art and is not detailed here. It can consist of any feedback loop capable of shaping the quantization noise introduced by threshold comparator <b>87</b>.

The capacitor C₁, C₂of each LC resonator <b>84</b>, <b>86</b> can be a variable capacitor.

According to a specific embodiment, each LC resonator <b>84</b>, <b>86</b> is only constituted of a capacitor and an inductor connected in parallel.

The sampling frequency f_sof threshold comparator <b>87</b> can be chosen to be less than the Nyquist frequency.

<figref idref="DRAWINGS">FIG. 4</figref> is a mathematical representation of a second embodiment of a modulator according to the invention.

The modulator <b>100</b> represented in <figref idref="DRAWINGS">FIG. 4</figref> comprises an input <b>102</b> for receiving an analogue signal X(s) and an output <b>104</b> providing a digital signal Y(z).

Modulator <b>100</b> comprises a bandpass filter <b>106</b> produced by two identical LC resonators <b>108</b> and <b>110</b>, coupled to one another by a variable coupling capacitor C_c<b>112</b>, the value of which can be adjusted. Each LC resonator <b>108</b> and <b>110</b> is produced by a capacitor, which is also variable, denoted C, and an inductor, denoted L, arranged in parallel.

Modulator <b>100</b> also comprises a sampler <b>114</b> working at a sampling frequency 1/T, and a quantizer <b>116</b>. Quantizer <b>116</b> introduces into modulator <b>100</b> a quantization noise symbolized by the arrow denoted E(z). Sampler <b>114</b> and quantizer <b>116</b> are arranged in series next to output <b>104</b> of modulator <b>100</b>, positioned such that sampler <b>114</b> is located between bandpass filter <b>106</b> and quantizer <b>116</b>.

Modulator <b>100</b> comprises a first adder <b>118</b> arranged between input <b>102</b> of modulator <b>100</b> and bandpass filter <b>106</b>, the first adder <b>118</b> comprising two inputs and one output.

Modulator <b>100</b> also comprises a feedback loop <b>120</b> comprising a digital-to-analogue converter with a finite impulse response (FIR) filter, denoted FIRDAC_U, <b>122</b>. The input of feedback loop <b>120</b> is linked to output <b>104</b> of modulator <b>100</b>.

The adder <b>118</b> is arranged such that: <ul id="ul0013" list-style="none"><li id="ul0013-0001" num="0000"><ul id="ul0014" list-style="none"><li id="ul0014-0001" num="0098">one of its inputs is linked to input <b>102</b> of modulator <b>100</b>,</li><li id="ul0014-0002" num="0099">its other input is linked to the output of feedback loop <b>120</b>, more particularly to the output of the digital-to-analogue converter with a FIR filter <b>122</b>, and</li><li id="ul0014-0003" num="0100">its output is linked to the input of bandpass filter <b>106</b>.</li></ul></li></ul>

Modulator <b>100</b> comprises a second adder <b>124</b> arranged between bandpass filter <b>106</b> and sampler <b>114</b>, the second adder <b>124</b> also comprising two inputs and one output.

Modulator <b>100</b> also comprises a delay compensation loop <b>126</b> of the feedback loop comprising a digital-to-analogue converter with a FIR filter, denoted FIRDAC_C, <b>128</b>. The input of compensation loop <b>126</b> is linked to output <b>104</b> of modulator <b>100</b>.

The second adder <b>124</b> is arranged such that: <ul id="ul0015" list-style="none"><li id="ul0015-0001" num="0000"><ul id="ul0016" list-style="none"><li id="ul0016-0001" num="0104">one of its inputs is linked to the output of bandpass filter <b>106</b>,</li><li id="ul0016-0002" num="0105">its other input is linked to the output of compensation loop <b>126</b>, more particularly to the output of the digital-to-analogue converter with a FIR filter <b>128</b>, and</li><li id="ul0016-0003" num="0106">its output is linked to the input of sampler <b>114</b>.</li></ul></li></ul>

Feedback loop <b>120</b> and compensation loop <b>126</b> comprise a common part <b>130</b> at their inputs.

Modulator <b>100</b> comprises a means <b>132</b> for setting the loop-delay value, arranged on common part <b>130</b> and making possible an adjustment of the loop-delay value for each of the feedback and compensation loops.

The functioning of modulator <b>100</b> is as follows: <ul id="ul0017" list-style="none"><li id="ul0017-0001" num="0000"><ul id="ul0018" list-style="none"><li id="ul0018-0001" num="0110">an analogue signal enters modulator <b>100</b> by its input <b>102</b>;</li><li id="ul0018-0002" num="0111">the analogue signal provided by the bandpass filter is sampled at a sampling frequency fs by sampler <b>114</b>;</li><li id="ul0018-0003" num="0112">each sample of signal is provided to quantizer <b>116</b>, which provides therefrom a one-bit digital signal.</li></ul></li></ul>

The role of feedback loop <b>120</b> is to shape the quantization noise with a certain noise transfer function (NTF). The NTF is designed so as to minimize the power of the quantization noise in the bandwidth and as a result maximize the signal-to-noise ratio in this band.

The loop delay is due to the response time of the quantizer and the propagation time of FIRDACs <b>122</b> and <b>128</b>. This unwanted delay modifies the NTF and degrades the signal-to-noise ratio (SNR) and can cause feedback loop instability.

The role of compensation loop <b>126</b> is to compensate for the effect of the loop delay in order to obtain the required NTF.

Assuming an LC filter with 4^th-order capacitive coupling with LC resonators having ideal quality factors, the transfer function of bandpass filter <b>106</b> in <figref idref="DRAWINGS">FIG. 4</figref> is given by the following relationships:

<maths id="MATH-US-00006" num="00006"><math overflow="scroll"><mtable><mtr><mtd><mrow><mrow><msub><mi>H</mi><mi>cc</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mrow><msup><mi>s</mi><mn>3</mn></msup><mo>⁢</mo><mfrac><msub><mi>C</mi><mi>c</mi></msub><mrow><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow><mo>+</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mi>c</mi></msub></mrow><mo>+</mo><mrow><msub><mi>C</mi><mi>c</mi></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow></mrow></mfrac></mrow><mrow><msup><mi>s</mi><mn>4</mn></msup><mo>+</mo><mrow><msup><mi>s</mi><mn>2</mn></msup><mo>⁢</mo><mfrac><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>+</mo><msub><mi>C</mi><mn>2</mn></msub><mo>+</mo><mrow><mn>2</mn><mo>⁢</mo><msub><mi>C</mi><mi>c</mi></msub></mrow></mrow><mrow><mrow><mo>(</mo><mrow><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow><mo>+</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mi>c</mi></msub></mrow><mo>+</mo><mrow><msub><mi>C</mi><mi>c</mi></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow></mrow><mo>)</mo></mrow><mo>⁢</mo><mi>L</mi></mrow></mfrac></mrow><mo>+</mo><mfrac><mn>1</mn><mrow><mrow><mo>(</mo><mrow><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow><mo>+</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>⁢</mo><msub><mi>C</mi><mi>c</mi></msub></mrow><mo>+</mo><mrow><msub><mi>C</mi><mi>c</mi></msub><mo>⁢</mo><msub><mi>C</mi><mn>2</mn></msub></mrow></mrow><mo>)</mo></mrow><mo>⁢</mo><msup><mi>L</mi><mn>2</mn></msup></mrow></mfrac></mrow></mfrac></mrow></mtd><mtd><mrow><mo>(</mo><mn>1</mn><mo>)</mo></mrow></mtd></mtr><mtr><mtd><mrow><msub><mi>ω</mi><mn>0</mn></msub><mo>=</mo><mrow><msqrt><mn>2</mn></msqrt><mo>⁢</mo><msqrt><mrow><mo>-</mo><mfrac><mn>1</mn><mrow><mrow><mo>(</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>+</mo><msub><mi>C</mi><mn>2</mn></msub><mo>+</mo><mrow><mn>2</mn><mo>⁢</mo><msub><mi>C</mi><mi>c</mi></msub></mrow><mo>-</mo><msqrt><mrow><msup><mrow><mo>(</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>-</mo><msub><mi>C</mi><mn>2</mn></msub></mrow><mo>)</mo></mrow><mn>2</mn></msup><mo>+</mo><mrow><mn>4</mn><mo>⁢</mo><msubsup><mi>C</mi><mi>c</mi><mn>2</mn></msubsup></mrow></mrow></msqrt></mrow><mo>)</mo></mrow><mo>⁢</mo><mi>L</mi></mrow></mfrac></mrow></msqrt></mrow></mrow></mtd><mtd><mrow><mo>(</mo><mn>2</mn><mo>)</mo></mrow></mtd></mtr><mtr><mtd><mrow><msub><mi>ω</mi><mn>1</mn></msub><mo>=</mo><mrow><msqrt><mn>2</mn></msqrt><mo>⁢</mo><msqrt><mrow><mo>-</mo><mfrac><mn>1</mn><mrow><mrow><mo>(</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>+</mo><msub><mi>C</mi><mn>2</mn></msub><mo>+</mo><mrow><mn>2</mn><mo>⁢</mo><msub><mi>C</mi><mi>c</mi></msub></mrow><mo>+</mo><msqrt><mrow><msup><mrow><mo>(</mo><mrow><msub><mi>C</mi><mn>1</mn></msub><mo>-</mo><msub><mi>C</mi><mn>2</mn></msub></mrow><mo>)</mo></mrow><mn>2</mn></msup><mo>+</mo><mrow><mn>4</mn><mo>⁢</mo><msubsup><mi>C</mi><mi>c</mi><mn>2</mn></msubsup></mrow></mrow></msqrt></mrow><mo>)</mo></mrow><mo>⁢</mo><mi>L</mi></mrow></mfrac></mrow></msqrt></mrow></mrow></mtd><mtd><mrow><mo>(</mo><mn>3</mn><mo>)</mo></mrow></mtd></mtr></mtable></math></maths><img file="US9306594B2_D0006.tif" /><br /> where s is the Laplace variable, w₀and w₁being the oscillation frequencies of the 2 LC resonators. Equations (1), (2) and (3) show that there are 3 parameters which make it possible to control the position of w₁and w₂. These 3 parameters are: C₁, C₂the capacitance of the 1^stand 2^ndLC resonators respectively, and coupling capacitance C_C.

The transfer functions of FIRDAC filters <b>122</b> and <b>128</b> are given respectively by the following relationships:

<maths id="MATH-US-00007" num="00007"><math overflow="scroll"><mtable><mtr><mtd><mrow><mrow><mrow><msub><mi>H</mi><msub><mi>FIRDAC</mi><mi>U</mi></msub></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mrow><mrow><msub><mi>H</mi><mi>DAC</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>⁢</mo><mrow><munderover><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>0</mn></mrow><mrow><msub><mi>M</mi><mi>U</mi></msub><mo>-</mo><mn>1</mn></mrow></munderover><mo>⁢</mo><mrow><msub><mi>α</mi><mi>i</mi></msub><mo>⁢</mo><msup><mi>ⅇ</mi><mrow><mrow><mo>-</mo><mi>ⅈ</mi></mrow><mo>⁢</mo><mstyle><mspace width="0.3em" height="0.3ex" /></mstyle><mo>⁢</mo><mi>T</mi></mrow></msup><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>for</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>FIR</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>filter</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mn>122</mn></mrow></mrow></mrow></mrow><mo>,</mo><mi>and</mi></mrow></mtd><mtd><mrow><mo>(</mo><mn>4</mn><mo>)</mo></mrow></mtd></mtr><mtr><mtd><mrow><mrow><msub><mi>H</mi><msub><mi>FIRDAC</mi><mi>C</mi></msub></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mrow><mrow><msub><mi>H</mi><mi>DAC</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>⁢</mo><mrow><munderover><mo>∑</mo><mrow><mi>i</mi><mo>=</mo><mn>0</mn></mrow><mrow><msub><mi>M</mi><mi>C</mi></msub><mo>-</mo><mn>1</mn></mrow></munderover><mo>⁢</mo><mrow><msub><mi>β</mi><mi>i</mi></msub><mo>⁢</mo><msup><mi>ⅇ</mi><mrow><mrow><mo>-</mo><mi>ⅈ</mi></mrow><mo>⁢</mo><mstyle><mspace width="0.3em" height="0.3ex" /></mstyle><mo>⁢</mo><mi>T</mi></mrow></msup><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>for</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>FIR</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>filter</mi><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mn>128</mn><mo>⁢</mo><mstyle><mspace width="0.8em" height="0.8ex" /></mstyle><mo>⁢</mo><mi>with</mi></mrow></mrow></mrow></mrow></mtd><mtd><mrow><mo>(</mo><mn>5</mn><mo>)</mo></mrow></mtd></mtr><mtr><mtd><mrow><mrow><msub><mi>H</mi><mi>DAC</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mrow><mn>1</mn><mo>-</mo><msup><mi>ⅇ</mi><mrow><mo>-</mo><mi>sT</mi></mrow></msup></mrow><mi>s</mi></mfrac></mrow></mtd><mtd><mrow><mo>(</mo><mn>6</mn><mo>)</mo></mrow></mtd></mtr></mtable></math></maths><img file="US9306594B2_D0007.tif" /><br /> where M_Uand M_Care respectively the order of FIRDAC filters <b>122</b> and <b>128</b>, which in the present case is equal to four.

The loop gain is given by: <br /><i>G</i>_cc(<i>z</i>)=<i>Z{H</i>_cc(<i>s</i>)<i>H</i>_FIRDAC_{<sub2>U</sub2>}(<i>s</i>)+<i>H</i>_FIRDAC_{<sub2>C</sub2>}(<i>s</i>)}  (7)

The noise transfer function of modulator <b>100</b> is given by:

<maths id="MATH-US-00008" num="00008"><math overflow="scroll"><mtable><mtr><mtd><mrow><mrow><msub><mi>NTF</mi><mi>c</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>z</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mn>1</mn><mrow><mn>1</mn><mo>-</mo><mrow><msub><mi>G</mi><mi>cc</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>z</mi><mo>)</mo></mrow></mrow></mrow></mfrac></mrow></mtd><mtd><mrow><mo>(</mo><mn>8</mn><mo>)</mo></mrow></mtd></mtr></mtable></math></maths><img file="US9306594B2_D0008.tif" /><br /> The signal transfer function of modulator <b>100</b> is given by:

<maths id="MATH-US-00009" num="00009"><math overflow="scroll"><mtable><mtr><mtd><mrow><mrow><mrow><msub><mi>STF</mi><mi>c</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mrow><msub><mi>H</mi><mi>cc</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mrow><mn>1</mn><mo>-</mo><mrow><msub><mi>G</mi><mi>cc</mi></msub><mo>⁡</mo><mrow><mo>(</mo><msup><mi>ⅇ</mi><mi>sT</mi></msup><mo>)</mo></mrow></mrow></mrow></mfrac></mrow><mo>⁢</mo><mstyle><mtext></mtext></mstyle><mo>⁢</mo><mrow><mrow><msub><mi>STF</mi><mi>c</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mo>=</mo><mfrac><mrow><msub><mi>H</mi><mi>cc</mi></msub><mo>⁡</mo><mrow><mo>(</mo><mi>s</mi><mo>)</mo></mrow></mrow><mrow><mn>1</mn><mo>-</mo><mrow><msub><mi>G</mi><mi>cc</mi></msub><mo>⁡</mo><mrow><mo>(</mo><msup><mi>ⅇ</mi><mi>s</mi></msup><mo>)</mo></mrow></mrow></mrow></mfrac></mrow></mrow></mtd><mtd><mrow><mo>(</mo><mn>9</mn><mo>)</mo></mrow></mtd></mtr></mtable></math></maths><img file="US9306594B2_D0009.tif" />

The coefficients of the FIRDACs are calculated in order to obtain a certain NTF which maximizes the SNR in the bandwidth of the signal while ensuring the stability of the system. An additional delay can be added to the unwanted loop delay in order to cancel certain coefficients of FIRDAC filters <b>122</b> and <b>128</b>. In order to do this, the loop-delay values are scanned and the values of each of the coefficients are calculated for each loop-delay value. An optimum loop-delay value can then be identified, for which the value of one or more coefficients of FIRDAC filters <b>122</b> and <b>128</b> is zero.

An example is given hereinafter in order to illustrate this optimization of the system.

<figref idref="DRAWINGS">FIG. 5</figref> is a diagrammatic representation of the transfer functions of different elements of the modulator in <figref idref="DRAWINGS">FIG. 4</figref> obtained by simulation.

In <figref idref="DRAWINGS">FIG. 5</figref>, the x-axis represents the normalized frequency of the signal with respect to the sampling frequency, namely fc/fs, with fc being the signal frequency and fs the sampling frequency. The y-axis represents the amplitude in dB.

Curve <b>202</b> represents the signal transfer function of modulator <b>100</b>, curve <b>204</b> represents the transfer function of bandpass filter <b>106</b> and curve <b>206</b> represents the noise transfer function of the modulator.

The frequency band of interest is centred around the normalized frequency 0.25, i.e. the fc/fs ratio is 0.25.

The noise frequency response of the modulator (curve <b>206</b>) gives two zeros, <b>208</b> and <b>210</b>.

As for the frequency response of the filter (curve <b>204</b>), this presents two poles <b>212</b> and <b>214</b>. The frequency position of these poles <b>212</b> and <b>214</b> can be changed by changing the value for the coupling capacitance C_cand the poles <b>212</b> and <b>214</b> can be brought closer together or moved further apart depending on the value for the coupling capacitance. It is important to note that, despite the fact that the frequency response of the LC with capacitive coupling contains significant peaks due to these poles, the signal transfer function (STF) of the SD modulator is flat (curve <b>202</b>) in the frequency band of interest centred around 0.25. Moreover, this STF has the response of a bandpass filter having the same order as the modulator. This filter contributes to the attenuation of the out-of-band signals.

<figref idref="DRAWINGS">FIG. 6</figref> is a diagrammatic representation of the power spectral density of the modulator in <figref idref="DRAWINGS">FIG. 4</figref> obtained by simulation.

In <figref idref="DRAWINGS">FIG. 6</figref>, the x-axis represents the normalized frequency with respect to the sampling frequency, fs. The y-axis represents the power spectral density in dB.

<figref idref="DRAWINGS">FIG. 7</figref> is a diagrammatic representation of the architecture of an RF receiver according to the invention.

The receiver <b>400</b> represented in <figref idref="DRAWINGS">FIG. 7</figref> can be a software-defined radio, cognitive and opportunistic radio receiver.

Receiver <b>400</b> comprises an antenna <b>402</b> for receiving an analogue signal.

The analogue signal is provided to an amplifier <b>404</b> amplifying the received signal.

The amplified analogue signal is provided to an analogue-to-digital SD RF converter <b>406</b> comprising a modulator according to the invention, for example modulator <b>100</b> in <figref idref="DRAWINGS">FIG. 1</figref>. Converter <b>406</b> provides a digitized version of the analogue signal but only for the frequencies comprised in the frequency band of interest, centred around a central frequency denoted fc.

The digital signal provided by converter <b>406</b> is then sent via a digital processing stage comprising for example a decimation filter <b>408</b>.

The receiver also comprises a module <b>410</b> for adjusting/modifying the central frequency fc of the frequency band of interest.

By way of example, a 4^thorder modulator with an LC filter with capacitive coupling <b>100</b> was produced with CMOS 130 nm technology. The modulator uses the technique of subsampling in order to reduce sampling frequency and as a result the consumption. The modulator is centred around a central frequency, fc=432 MHz, with a clock frequency, fs=4/3 fc=576 MHz, and an oversampling ratio of 64, the values of the coefficients. An SNR of 50 dB was measured in a bandwidth of 4.5 MHz for a power consumption of 20 mW. In this architecture, a loop delay of 1.5 Ts was used so as to reduce the number of coefficients of the feedback FIRDACs. These coefficients are given in the following table:

<tables id="TABLE-US-00001" num="00001"><table frame="none" colsep="0" rowsep="0"><tgroup align="left" colsep="0" rowsep="0" cols="4"><colspec colname="offset" colwidth="21pt" align="left" /><colspec colname="1" colwidth="56pt" align="left" /><colspec colname="2" colwidth="42pt" align="left" /><colspec colname="3" colwidth="98pt" align="center" /><thead><row><entry /><entry namest="offset" nameend="3" align="center" rowsep="1" /></row><row><entry /><entry /><entry /><entry>Value of the</entry></row><row><entry /><entry>Filter</entry><entry>coefficients</entry><entry>coefficients</entry></row><row><entry /><entry namest="offset" nameend="3" align="center" rowsep="1" /></row></thead><tbody valign="top"><row><entry /></row></tbody></tgroup><tgroup align="left" colsep="0" rowsep="0" cols="4"><colspec colname="offset" colwidth="21pt" align="left" /><colspec colname="1" colwidth="56pt" align="left" /><colspec colname="2" colwidth="42pt" align="left" /><colspec colname="3" colwidth="98pt" align="char" char="." /><tbody valign="top"><row><entry /><entry>FIRDAC_U</entry><entry>α₁</entry><entry>1.30</entry></row><row><entry /><entry>122</entry><entry>α₂</entry><entry>0.00</entry></row><row><entry /><entry /><entry>α₃</entry><entry>1.00</entry></row><row><entry /><entry /><entry>α₄</entry><entry>0.00</entry></row><row><entry /><entry>FIRDAC_C</entry><entry>β₁</entry><entry>0.00</entry></row><row><entry /><entry>128</entry><entry>β₂</entry><entry>−0.50</entry></row><row><entry /><entry /><entry>β₃</entry><entry>0.00</entry></row><row><entry /><entry /><entry>β₄</entry><entry>0.80</entry></row><row><entry /><entry namest="offset" nameend="3" align="center" rowsep="1" /></row></tbody></tgroup></table></tables>

Thus, for an optimum value of 1.5 Ts, it is noted that for each of filters <b>122</b> and <b>128</b>, two coefficients are zero.

<figref idref="DRAWINGS">FIG. 8</figref> represents, diagrammatically, an embodiment of a differential Sigma-Delta modulator according to the invention capable of being integrated into an electronic circuit such as an integrated circuit. The Sigma-Delta modulator <b>800</b> comprises, connected in series, an input <b>801</b> capable of receiving an analogue voltage signal, a transconductor Gm_in<b>802</b>, a loop filter <b>803</b>, a transconductor Gm_add<b>804</b> and a threshold comparator <b>805</b>. Filter <b>803</b> comprises a positive differential current input I_in+, a negative differential current input I_in−, a positive differential output V_out+, and a negative differential output V_out−. The Sigma-Delta modulator <b>800</b> comprises, moreover, a first current feedback loop <b>806</b> containing a first digital-to-analogue converter with a finite impulse response filter (FIRDAC) <b>8061</b>, and a second feedback loop <b>807</b> containing a second FIRDAC <b>8071</b>. Transconductor Gm_in<b>802</b> transforms the signal received at input <b>801</b> into current to be subtracted from the signal originating from first current feedback loop <b>806</b>. The difference between the Gm_intransconductor output signal and the signal originating from feedback loop <b>806</b> is applied to loop filter <b>803</b>. The voltage output from loop filter <b>803</b> is converted into current using transconductor Gm_add<b>804</b>. The difference between the transconductor Gm_addoutput signal and the signal originating from second feedback loop <b>807</b> is applied to threshold comparator <b>805</b> in order to deliver the digital output signal.

Loop filter <b>803</b> comprises two LC resonators coupled in parallel by a coupling capacitor C_c.

The inductors in the LC resonators can have very low quality factors. In the case where an embodiment on an integrated circuit is intended for the bandpass Sigma-Delta modulator, the quality factor may then be too low, which degrades the signal-to-noise ratio considerably. In this case, an active circuit is needed to enhance the quality factor. The active circuit can for example consist of a negative transconductance circuit as described with reference to <figref idref="DRAWINGS">FIG. 9</figref>.

<figref idref="DRAWINGS">FIG. 9</figref> represents an example of an integrated 4^th-order LC filter with capacitive coupling. The filter <b>900</b> contains two differential LC resonators <b>901</b> and <b>902</b>, and two bias circuits <b>903</b> and <b>904</b>. The first resonator <b>901</b> comprises a differential inductor L₁₁, two variable capacitors C₁₁and C₁₂, and two MOS transistors M₁₁and M₁₂. A center tap of the differential inductor L₁₁is linked to a reference potential Vref. A first inductance terminal L₁₁is connected to a first terminal of variable capacitor C₁₁and to the drain of transistor M₁₁, and a second inductance terminal L₁₁is connected to a first terminal of variable capacitor C₁₂and to the drain of transistor M₁₂. Differential inductance terminals L₁₁form two differential current inputs I_in+and I_in−. The second terminals of variable capacitors C₁₁and C₁₂are grounded. The sources of transistors M₁₁and M₁₂are connected to one another, and biased, as indicated hereinafter. Moreover, the drain of transistor M₁₁, respectively M₁₂is connected to the grid of transistor M₁₂, respectively M₁₁. In this way, transistors M₁₁and M₁₂form a negative transconductance capable of compensating the losses and enhancing the quality factor of resonator <b>901</b>. Second resonator <b>902</b> is identical to resonator <b>901</b>. Its components are denoted by references incremented by ten. The differential inductance terminals L₂₁form two differential voltage outputs V_out+and V_out−.

Bias circuit <b>903</b> makes it possible for the potential applied to the sources of transistors M₁₁and M₁₂to be adjusted. It comprises a current source Iref supplying the drain and the grid of an MOS transistor M₁₄, the source of which is grounded. The grid of transistor M₁₄is connected to the grid of an MOS transistor M₁₃, the drain of which is connected to the sources of transistors M₁₁and M₁₂, and the source of which is grounded. Bias circuit <b>904</b> makes it possible for the potential applied to the sources of transistors M₂₁and M₂₂of resonator <b>902</b> to be adjusted. It comprises, in the example in <figref idref="DRAWINGS">FIG. 9</figref>, the same components as bias circuit <b>903</b>. Of course, the bias circuits could be produced differently. It would also be possible to use the same bias current, Iref, for the two resonators.

The two resonators <b>901</b> and <b>902</b> are coupled to one another in parallel by two coupling capacitors C_c1and C_c2. In particular, first inductance terminal L₁₁is connected to first inductance terminal L₂₁via coupling capacitor C_c1, and second inductance terminal L₁₁is connected to second inductance terminal L₂₁via coupling capacitor C_c2.

Filter <b>900</b> can in particular be used as a loop filter <b>803</b> in the Sigma-Delta modulator in <figref idref="DRAWINGS">FIG. 8</figref>, by connecting the inputs I_in+and I_in−, and the corresponding outputs V_out+and V_out−.

Of course, the invention is not limited to the examples which have just been described.