Circuit and method for measuring a resistance value of a resistive component

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to British Patent Application No. 1100881.0, filed Jan. 19, 2011, which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

The technical field relates to a circuit for measuring the resistance of a resistive component, such as a PCT or NTC thermistor sensor used for monitoring the temperature values in a vehicle system.

BACKGROUND

It is known that modern vehicle systems are conventionally equipped with a plurality of resistive sensors for monitoring the temperature value of several components of the vehicle system. At the present, the resistive temperature sensors, generally used, are negative temperature coefficient thermistor (NTC) or positive temperature coefficient thermistors (PTC).

The measure of the temperature values are made using a voltage divider consisting in a pull up resistance, having a known resistance value, connected in series to the resistive sensor at a common node. Two different voltage values are supplied respectively to a free end of the voltage divider to generate at the common node an analog signal indicative of the resistance of the resistive sensor.

The analog signal is then converted to a digital signal by means of an analog to digital (A/D) converter, which, in turn, is connected to a control unit, usually an engine control unit (ECU) provided in the vehicle system. The ECU uses the digital signal to determine the corresponding temperature of the resistive sensor based on the kind of sensor, NTC or PTC.

The NTC and PTC thermistors have characteristics that make complicated and costly the interfacing with the A/D converter. This is mainly due to the transfer function of the sensors that is non-linear. The non-linearity of the transfer function leads to a low accuracy of the measured resistance values and, as a consequence, of the temperature values.

In detail, the NTC thermistor has a very low resolution at low temperatures, i.e., temperatures close to approximately −30° C., at a point that it does not allow to verify if the thermistor is correctly operating. On the other hand, the PTC thermistor allows more precise measures at the low temperatures but it is more expensive than the NTC thermistor.

In view of the above, it is at least one object to improve the resolution accuracy of the determination of a resistance value of a resistive component. At least another object is to make the measure of the resistance value independent from electrical component tolerances. At least another object is to achieve the above-mentioned objects with a simple, rational, and rather inexpensive solution. In addition, other objects, desirable features and characteristics will become apparent from the subsequent summary and detailed description, and the appended claims, taken in conjunction with the accompanying drawings and this background.

SUMMARY

An embodiment provides a method for measuring a resistance value R_THof a resistive component which provides for: connecting a pull up resistance, having a known resistance value R_PU, in series to the resistive component and supplying a first voltage value V_Pto a free end of the pull up resistance and a second lower voltage value V_Nto a free end of the resistive component to create a voltage divider, monitoring a signal indicative of a voltage value between the resistive component and the pull up resistance, determining the difference between the monitored signal and a generated pulse width modulated signal (V_PWM) having the voltage values V_Pand V_Nas high voltage value and low voltage value respectively, integrating the difference over time obtaining an output signal, varying a duty cycle of the pulse width modulated signal on the basis of the variation over time of the output signal, acquiring a value D₁of the duty cycle of the pulse width modulated signal, and determining the resistance value on the basis of the duty cycle value D₁and of the pull up resistance value R_pu.

This embodiment provides the ability to obtain a high monitoring resolution of the resistive component for any value of the resistance. Furthermore, the measured resistance value is independent from the temperature and from electrical component tolerances, depending only on the tolerances of the pull up resistance.

According to another embodiment, the variation of the duty cycle is achieved by commutating the pulse width modulated signal to the high voltage value when the output signal is equal or above a high threshold voltage value and commutating the pulse width modulated signal to the low voltage value when the output signal is equal or below a low threshold voltage value. This solution advantageously allows a good control of the variation of the output signal and consequently of the generated pulse width modulated signal.

According to another embodiment, the duty cycle D of the pulse width modulated signal, over a period, is calculated by the following equation:

<maths id="MATH-US-00001" num="00001"><math overflow="scroll"><mrow><msub><mi>D</mi><mn>1</mn></msub><mo>=</mo><mfrac><msub><mi>C</mi><mi>ON</mi></msub><mrow><msub><mi>C</mi><mi>ON</mi></msub><mo>+</mo><msub><mi>C</mi><mi>OFF</mi></msub></mrow></mfrac></mrow></math></maths><img file="US9109959B2_D0001.tif" /><br /> where C_onand C_OFFare digital counter values indicative of the variation over time of the pulse width modulated signal.

According to another embodiment, the digital counter value C_onis set to zero every time the pulse width modulated signal value commutates from the low voltage value to high voltage value and then it is incremented at fixed frequency as long as the pulse width modulated signal value remains at the high voltage value. Differently, the counter value C_OFFis incremented at fixed frequency as long as the pulse width modulated signal value is equal to the low voltage value and it is set and maintained at a value equal to zero as long as the pulse width modulated signal V_PWMis equal to the high voltage value. This solution advantageously allows determining in a simple and reliable way the value variation of the digital counters.

According to another embodiment, the resistance value of the resistive component is determined by the equation:

<maths id="MATH-US-00002" num="00002"><math overflow="scroll"><mrow><msub><mi>R</mi><mi>TH</mi></msub><mo>=</mo><mrow><msub><mi>R</mi><mi>PU</mi></msub><mo>×</mo><mrow><mo>(</mo><mfrac><msub><mi>D</mi><mn>1</mn></msub><mrow><mn>1</mn><mo>-</mo><msub><mi>D</mi><mn>1</mn></msub></mrow></mfrac><mo>)</mo></mrow></mrow></mrow></math></maths><img file="US9109959B2_D0002.tif" /><br /> where R_THis the pull up resistance value.

Another embodiment provides the further steps of inverting the voltage values VP and VN supplied at the respectively free ends of the series and, repeating the steps, acquiring a second value of the duty cycle D<b>2</b>, calculating an equivalent value of the duty cycle Deq on the basis of the previous determined duty cycles D<b>1</b> and D<b>2</b>, determining the resistance of the resistive component on the basis of the equivalent duty cycle value D_EQand of the pull up resistance value R_pu. This solution advantageously minimizes or substantially eliminates the effects of input bias current and input offset voltage of the electric components that could limit the accuracy.

According to a further embodiment, the equivalent value of the duty cycle Deq is easily calculated according to the following equation:

<maths id="MATH-US-00003" num="00003"><math overflow="scroll"><mrow><msub><mi>D</mi><mi>EQ</mi></msub><mo>=</mo><mfrac><mrow><msub><mi>D</mi><mn>1</mn></msub><mo>+</mo><mrow><mo>(</mo><mrow><mn>1</mn><mo>-</mo><msub><mi>D</mi><mn>2</mn></msub></mrow><mo>)</mo></mrow></mrow><mn>2</mn></mfrac></mrow></math></maths><img file="US9109959B2_D0003.tif" />

Another embodiment provides a circuit for measuring a resistance value RTH of a resistive component comprising a pull up resistance connected in series to the resistive component at a common node, a pulse width modulated generator circuit for generating a pulse width modulated signal, the pulse width modulated circuit having an input connected to an adder for calculating the difference between a voltage signal at the common node and the pulse width modulated signal, and an output connected to a digital logic unit. This circuit has the advantage to allow ratiometric measures, i.e., the measured values of the resistance of the resistive component are independent from the voltage value supplied to the circuit.

According to another embodiment, the pulse width modulated generator circuit comprises a voltage integrator having an input connected to the adder and an output connected to a voltage commutator, which generates the pulse width modulated signal and which has an output connected to the digital logic unit. This solution allows generating the pulse width modulated signal in an inexpensive manner.

Another embodiment provides that a second commutator is connected between a free end of the pull up resistance and the digital logic unit, and a third commutator is connected between a free end of the resistive component and the logic unit, the second and third commutators being configured to alternatively supply a high first voltage value and a second low voltage value to the free end of the pull up resistance and to the free end of the resistive component. This solution allows eliminating input bias current and input offset voltage of the electric components in a simple and inexpensive manner.

According to a further embodiment, the pull up resistance is connected in series to the resistive component by means of a multiplexer device. This solution allows using only a pull up resistance in the case that it is required to measure the resistance value of several resistive components.

The operating method according can be carried out with the help of a computer program comprising a program-code for carrying out the method described above, and in the form of a computer program product comprising the computer program. The computer program product can be embodied as a control system, for instance for an internal combustion engine, comprising a control unit, for instance an engine control unit (ECU), a data carrier associated to the a control unit, and the computer program stored in the data carrier, so that, when the a control unit executes the computer program, the method described above is carried out. The method could be also embodied as an electromagnetic signal, said signal being modulated to carry a sequence of data bits which represent a computer program to carry out the method.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will hereinafter be described in conjunction with the following drawing figures, wherein like numerals denote like elements, and:

<figref idref="DRAWINGS">FIG. 1</figref> is a scheme of a circuit for measuring a resistance value of a resistive component according to a first embodiment;

<figref idref="DRAWINGS">FIGS. 2</figref><i>a</i>-<b>2</b><i>e</i>, show the variation over time of some signals used in the invention;

<figref idref="DRAWINGS">FIG. 3</figref> is a scheme of a circuit for measuring a resistance value of a resistive component according to a second embodiment;

<figref idref="DRAWINGS">FIGS. 4</figref><i>a </i>and <b>4</b><i>b </i>show the variation over time of some signals used in the second embodiment; and

<figref idref="DRAWINGS">FIG. 5</figref> is a scheme of a circuit for measuring a resistance value of a resistive component according to a third embodiment.

DETAILED DESCRIPTION

The following detailed description is merely exemplary in nature and is not intended to limit application and uses. Furthermore, there is no intention to be bound by any theory presented in the preceding background or summary or the following detailed description.

<figref idref="DRAWINGS">FIG. 1</figref> illustrates a first embodiment comprising a circuit <b>1</b> for measuring a resistance value R_THof a resistive component <b>2</b>. The resistive component <b>2</b> is connected in series to a pull up resistance <b>3</b> having a known resistance value R_PUin order to make a voltage divider <b>4</b>. To this end, the free end <b>3</b>′ of the pull up resistance <b>3</b> is supplied with a first voltage value V_P, while the free end <b>2</b>′ of the resistive component <b>2</b> is supplied with a second, lower, voltage value V_N.

At a common node <b>5</b> of the resistive component <b>2</b> and of the pull up resistance <b>3</b> the voltage divider <b>4</b> generates a voltage signal V_Swhich can be calculated according to the following equation:

<maths id="MATH-US-00004" num="00004"><math overflow="scroll"><mrow><msub><mi>V</mi><mi>S</mi></msub><mo>=</mo><mfrac><mrow><mrow><msub><mi>V</mi><mi>P</mi></msub><mo>·</mo><msub><mi>R</mi><mi>TH</mi></msub></mrow><mo>+</mo><mrow><msub><mi>V</mi><mi>N</mi></msub><mo>·</mo><msub><mi>R</mi><mi>PU</mi></msub></mrow></mrow><mrow><msub><mi>R</mi><mi>TH</mi></msub><mo>+</mo><msub><mi>R</mi><mi>PU</mi></msub></mrow></mfrac></mrow></math></maths><img file="US9109959B2_D0004.tif" /><br /> The common node <b>5</b> is connected to a first input of an adder <b>6</b> whose output is connected to an input of a generator pulse width modulated circuit <b>100</b> for generating a pulse width modulated (PWM) signal V_PWM. An output of the pulse width modulated circuit <b>100</b> is connected to a second input of the adder <b>6</b> and to a digital logic unit <b>9</b>.

In detail, the pulse width modulated circuit <b>100</b> comprises a voltage integrator <b>7</b> having an output connected to an input of a voltage commutator <b>8</b>, which generates the pulse width modulated signal V_PWM. An output of the voltage commutator <b>8</b> is connected to the digital logic unit <b>9</b> by means of a line <b>10</b> and to the adder <b>6</b>, through a line <b>11</b>, realizing a close-loop feedback of the pulse width modulated signal V_PWM. The adder <b>6</b>, hence, determines the difference between the voltage signal V_s, represented in dotted line in <figref idref="DRAWINGS">FIG. 2</figref><i>a</i>, and a pulse width modulated signal, represented in continuous line in <figref idref="DRAWINGS">FIG. 2</figref><i>a. </i>

The result of said difference is the input signal for the voltage integrator <b>7</b>, whose output voltage signal V_TR, illustrated in <figref idref="DRAWINGS">FIG. 2</figref><i>b</i>, can be determined by means of the following equation: <br /><i>V</i>_TR<i>=k</i>∫(<i>V</i>_S<i>−V</i>_PWM)<i>dt </i><br /> where k is a proportionality factor.

The output voltage signal V_TRis sent, as input signal, to the voltage commutator <b>8</b> having input hysteresis width V_HB, which is defined as the difference between a first predetermined high voltage threshold value V_HIand a second predetermined low voltage threshold value V_LO: <br /><i>V</i>_HB<i>=V</i>_HI<i>−V</i>_LO<br /> The voltage commutator <b>8</b> generates, as output signal, the pulse width modulated signal V_PWMhaving the voltage values V_Pand V_Nas high voltage value and low voltage value respectively. The pulse width modulated signal V_PWMvalue depends on the voltage value of the output signal V_TRfiltered by the hysteresis width V_HB.

In detail, when the voltage value of the output signal V_TRexceeds the high voltage threshold value V_HIthe commutator <b>8</b> switches the pulse width modulated signal V_PWMvalue from the low voltage value V_Nto the high voltage value V_P. On the contrary, when the voltage value of the output signal V_TRfalls below low the voltage threshold value V_LOthe commutator <b>3</b> switches the pulse width modulated signal V_PWMvalue from the high voltage value V_Pto the low voltage value V_N. In the present embodiment, the commutator <b>8</b> is a Schmidt trigger.

From <figref idref="DRAWINGS">FIG. 2</figref><i>b</i>, which illustrates the variation of the signal V_TRover time, it is possible to notice that when the difference, between the voltage signal V_svalue and the pulse width modulated signal V_PWMvalue, is positive the output signal V_TRvalue can be represented as an increasing ramp over time, while, when said difference is negative the output signal V_TRvoltage value can be represented as a decreasing ramp over time.

The pulse width modulated signal waveform is monitored by means of the digital logic unit <b>9</b> having the main function to acquire a duty-cycle value D₁of the signal. Once the Duty-cycle value D₁of the pulse width modulated signal V_PWMhas been acquired the signal V_Scan be determined on the basis of the acquired duty-cycle value D₁and of the high and low voltage values V_Pand V_Naccording to the following equation: <br /><i>V</i>_S<i>=D</i>₁<i>·V</i>_P+(1−<i>D</i>₁)·<i>V</i>_N<br /> However, as disclosed above, the voltage signal V_Scan also be calculate by means of the formula:

<maths id="MATH-US-00005" num="00005"><math overflow="scroll"><mrow><msub><mi>V</mi><mi>S</mi></msub><mo>=</mo><mfrac><mrow><mrow><msub><mi>V</mi><mi>P</mi></msub><mo>·</mo><msub><mi>R</mi><mi>TH</mi></msub></mrow><mo>+</mo><mrow><msub><mi>V</mi><mi>N</mi></msub><mo>·</mo><msub><mi>R</mi><mi>PU</mi></msub></mrow></mrow><mrow><msub><mi>R</mi><mi>TH</mi></msub><mo>+</mo><msub><mi>R</mi><mi>PU</mi></msub></mrow></mfrac></mrow></math></maths><img file="US9109959B2_D0005.tif" /><br /> By substituting in the second formula the value of V_Sfrom the first formula it is possible to determine the resistance R_THvalue based on the pull up resistance value R_PUand of the duty cycle value D₁according to the following equation:

<maths id="MATH-US-00006" num="00006"><math overflow="scroll"><mrow><msub><mi>R</mi><mi>TH</mi></msub><mo>=</mo><mrow><msub><mi>R</mi><mi>PU</mi></msub><mo>×</mo><mrow><mo>(</mo><mfrac><msub><mi>D</mi><mn>1</mn></msub><mrow><mn>1</mn><mo>-</mo><msub><mi>D</mi><mn>1</mn></msub></mrow></mfrac><mo>)</mo></mrow></mrow></mrow></math></maths><img file="US9109959B2_D0006.tif" />

According to an embodiment, the digital logic unit <b>9</b> acquires the duty-cycle D₁of the pulse width modulated signal V_PWMusing internal digital counters value C_onand C_off. In detail, the digital counter value C_onis set to zero every time the pulse width modulated signal V_PWMvalue commutates from the low voltage value V_Nto high voltage value V_Pand then it is incremented at fixed frequency as long as the pulse width modulated signal V_PWMvalue remains at the high voltage value V_P, as illustrated in <figref idref="DRAWINGS">FIG. 2</figref><i>c</i>. Differently, the counter value C_OFFis incremented at fixed frequency as long as the pulse width modulated signal V_PWMvalue is equal to the low voltage value V_Nand it is set and maintained at a value equal to zero as long as the pulse width modulated signal V_PWMis equal to the high voltage value V_P, as illustrated in <figref idref="DRAWINGS">FIG. 2</figref><i>d. </i>

The duty-cycle value D₁, of the pulse width modulated signal, can be determined or calculated using the last internal digital counter values C_onand C_offas follows:

<maths id="MATH-US-00007" num="00007"><math overflow="scroll"><mrow><msub><mi>D</mi><mn>1</mn></msub><mo>=</mo><mfrac><msub><mi>C</mi><mi>ON</mi></msub><mrow><msub><mi>C</mi><mi>ON</mi></msub><mo>+</mo><msub><mi>C</mi><mi>OFF</mi></msub></mrow></mfrac></mrow></math></maths><img file="US9109959B2_D0007.tif" />

The digital logic unit <b>9</b> comprises an output line <b>12</b> connected to a microcontroller <b>13</b> so as to send the calculated resistance value R_THof the resistive component to the microcontroller <b>13</b> for using it in predetermined operating vehicle system strategy. As an example, if the resistive component is a PTC or NTC temperature sensor, the microcontroller will determine the temperature value corresponding to the determined resistance value R_THbased on the kind of sensor. In the present embodiment, both the digital logic unit <b>9</b> and the microcontroller <b>13</b> are both embedded in a control unit <b>14</b>.

<figref idref="DRAWINGS">FIG. 3</figref> illustrates a second embodiment of a circuit <b>100</b> for measuring a resistance value R_THof the resistive component <b>2</b>. In the disclosure of the second embodiment will be use the same reference numbers to indicate components already disclosed in the first embodiment. In detail the second embodiment provides that a second commutator <b>15</b> be connected between the free end <b>3</b>′ of the pull up resistance <b>3</b> and the digital logic unit <b>9</b>, and a third commutator <b>16</b> is connected between the free end <b>2</b>′ of the resistive component <b>2</b> and the logic unit <b>9</b>. The second and the third commutators <b>15</b>, <b>16</b> are configured to alternatively supply the first high voltage value V_Pand the second low voltage value V_Nto the free end <b>3</b>′ of the pull up resistance <b>3</b> and to the free end <b>2</b>′ of the resistive component <b>2</b>.

The operation of this embodiment of the invention provides to supply the high voltage value V_Pand the low voltage value V_Nrespectively to the free end <b>3</b>′ of the pull up resistance <b>3</b> and to the free end <b>2</b>′ of the resistive component <b>2</b>, and to acquire the duty cycle value D₁(<figref idref="DRAWINGS">FIG. 4</figref><i>a</i>) as previously disclosed in the first embodiment. Once the duty cycle value D₁has been acquired, this embodiment provides to acquire a second duty cycle value D₂(<figref idref="DRAWINGS">FIG. 4</figref><i>a</i>) inverting the voltage values V_Pand V_Nsupplied respectively to the free end <b>3</b>′ of the pull up resistance <b>3</b> and to the free end <b>2</b>′ of the resistive component <b>2</b>. At this point it is possible to calculate an equivalent value of the duty cycle D_eqbased on the previous determined duty cycles D₁and D₂, and to determine the resistance R_THof the resistive component <b>2</b> based on the equivalent duty cycle value D_EQand of the pull up resistance value R_PU.

According to another embodiment, the equivalent value of the duty cycle D_eqis determined by the following equation:

<maths id="MATH-US-00008" num="00008"><math overflow="scroll"><mrow><msub><mi>D</mi><mi>EQ</mi></msub><mo>=</mo><mfrac><mrow><msub><mi>D</mi><mn>1</mn></msub><mo>+</mo><mrow><mo>(</mo><mrow><mn>1</mn><mo>-</mo><msub><mi>D</mi><mn>2</mn></msub></mrow><mo>)</mo></mrow></mrow><mn>2</mn></mfrac></mrow></math></maths><img file="US9109959B2_D0008.tif" /><br /> Once the equivalent value of the duty cycle D_eqhas been determined, the resistance R_THof the resistive component <b>2</b> can be determined as follows:

<maths id="MATH-US-00009" num="00009"><math overflow="scroll"><mrow><msub><mi>R</mi><mi>TH</mi></msub><mo>=</mo><mrow><msub><mi>R</mi><mi>PU</mi></msub><mo>×</mo><mrow><mo>(</mo><mfrac><msub><mi>D</mi><mi>EQ</mi></msub><mrow><mn>1</mn><mo>-</mo><msub><mi>D</mi><mi>EQ</mi></msub></mrow></mfrac><mo>)</mo></mrow></mrow></mrow></math></maths><img file="US9109959B2_D0009.tif" />

<figref idref="DRAWINGS">FIG. 5</figref> illustrates a further aspect of the invention that is different from the above-disclosed embodiments for the fact that the pull up resistance <b>3</b> is connected in series to several resistive components by means of a multiplexer device <b>17</b>. This solution allows a reduction of costs in the case it is required to measure the resistance value of several resistive components <b>2</b>.

While at least one exemplary embodiment has been presented in the foregoing summary and detailed description, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary embodiment or exemplary embodiments are only examples, and are not intended to limit the scope, applicability, or configuration in any way. Rather, the forgoing summary and detailed description will provide those skilled in the art with a convenient road map for implementing at least one exemplary embodiment, it being understood that various changes may be made in the function and arrangement of elements described in an exemplary embodiment without departing from the scope as set forth in the appended claims and in their legal equivalents.