Micro-electro-mechanical systems (MEMS), systems, and operating methods thereof

CROSS-REFERENCE TO RELATED APPLICATIONS

p-0002The present application claims priority of U.S. Provisional Patent Application Ser. No. 61/240,830 filed on Sep. 9, 2009, which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

p-0003The present disclosure relates generally to the field of semiconductor circuits, and more particularly, to Micro-Electro-Mechanical Systems (MEMS), systems, and operating methods thereof.

BACKGROUND

p-0004Micro-Electro-Mechanical Systems (MEMS) refer to the integration of mechanical elements and electronics on a semiconductor substrate through microfabrication technology. While the electronics are fabricated using integrated circuit (IC) processes, the micromechanical elements are fabricated using compatible “micromachining” processes that selectively etch away parts of the silicon wafer to form the mechanical and electromechanical devices.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure is best understood from the following detailed description when read with the accompanying figures. It is emphasized that, in accordance with the standard practice in the industry, various features are not drawn to scale and are used for illustration purposes only. In fact, the numbers and dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

<figref idrefs="DRAWINGS">FIG. 1</figref> is a schematic drawing illustrating an exemplary micro-electro-mechanical system (MEMS) including a micro-mechanical structure coupled with an analog-to-digital converter (ADC).

<figref idrefs="DRAWINGS">FIG. 2A</figref> is a schematic cross-sectional view illustrating an exemplary MEMS disposed over a substrate.

<figref idrefs="DRAWINGS">FIG. 2B</figref> is a schematic cross-sectional view illustrating another exemplary MEMS disposed over a substrate.

<figref idrefs="DRAWINGS">FIG. 3</figref> is a schematic drawing illustrating another exemplary MEMS including a micro-mechanical structure coupled with an analog-to-digital converter (ADC).

<figref idrefs="DRAWINGS">FIG. 4</figref> is a flowchart showing an exemplary method for switching operation modes of a MEMS.

<figref idrefs="DRAWINGS">FIG. 5</figref> is a schematic drawing illustrating a portion of a frequency divider including an exemplary clock switch.

<figref idrefs="DRAWINGS">FIG. 6</figref> is a schematic drawing illustrating an exemplary interpolation filter.

<figref idrefs="DRAWINGS">FIG. 7</figref> is a schematic drawing showing a system including an exemplary MEMS coupled with a processor.

DETAILED DESCRIPTION

p-0014A conventional capacitive microaccelerometer has a micro-mechanical structure disposed over a complementary metal-oxide-semiconductor (CMOS) circuit. The conventional micro-mechanical structure generates a capacitance signal corresponding to a change of a force. The CMOS circuit has an analog circuit and a digital circuit for sensing the capacitance signal. To reduce noises coupled among the digital circuit, the analog circuit, and the conventional micro-mechanical structure, a single shield layer is disposed between the CMOS circuit and the conventional micro-mechanical structure.

p-0015Conventionally, the sensed capacitance signal is modulated. The modulated capacitance signal is then converted to a voltage signal. It is found that the voltage signal is weak. The noises coupled between the digital circuit, the analog circuit, and the conventional micro-mechanical structure may undesirably interfere with the voltage signal. To distinguish the voltage signal from the noises, an amplifier is applied to amplify the voltage signal. The amplified voltage signal is demodulated. Another amplifier is applied to amplify the demodulated voltage signal. The double-amplified voltage signal is low-pass filtered and then analog-to-digital converted to digital signals.

p-0016As noted, the amplifiers are used to amplify the voltage signal converted from the capacitance of the capacitive microaccelerometer. The amplifiers consume power during the operation. It is also found that the amplifiers take a portion of the chip area.

p-0017Based on the foregoing, MEMS having desired power consumption and/or having a desired area, systems, and operating methods thereof are desired.

p-0018It is understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Moreover, the formation of a feature on, connected to, and/or coupled to another feature in the present disclosure that follows may include embodiments in which the features are formed in direct contact, and may also include embodiments in which additional features may be formed interposing the features, such that the features may not be in direct contact. In addition, spatially relative terms, for example, “lower,” “upper,” “horizontal,” “vertical,” “above,” “below,” “up,” “down,” “top,” “bottom,” etc. as well as derivatives thereof (e.g., “horizontally,” “downwardly,” “upwardly,” etc.) are used for ease of the present disclosure of one features relationship to another feature. The spatially relative terms are intended to cover different orientations of the device including the features.

p-0019<figref idrefs="DRAWINGS">FIG. 1</figref> is a schematic drawing illustrating an exemplary micro-electro-mechanical system (MEMS) including a micro-mechanical structure coupled with an analog-to-digital converter (ADC). In <figref idrefs="DRAWINGS">FIG. 1</figref>, a micro-electro-mechanical system (MEMS) <b>100</b> can include a micro-mechanical structure <b>110</b> coupled with an ADC <b>120</b>. The MEMS <b>100</b> can include a microaccelerometer, a microsensor, a microactuator, a microgyrscope, a bio-MEMS, other suitable MEMS, and/or any combinations thereof.

p-0020In various embodiments using a microaccelerometer, the micro-mechanical structure <b>110</b> is capable of generating a first electrical signal, e.g., a capacitance signal. The capacitance signal of the micro-mechanical structure <b>110</b> can be generated corresponding to a change of a force. The capacitance signal of the micro-mechanical structure <b>110</b> can have a desired signal-to-noise ratio (SNR).

p-0021The ADC <b>120</b> can include a delta-encoded ADC, a flash analog-to-digital converter (ADC), a successive-approximation ADC, a ramp-compare ADC, a Wilkinson ADC, an integrating ADC, a pipeline ADC, a sigma-delta ADC, a time-interleaved ADC, other ADC that can provide a desired resolution and/or have a desired chip area, and/or any combinations thereof. In various embodiments, the ADC <b>120</b> can provide a desired resolution for the electrical signal of the micro-mechanical structure <b>110</b> such that the electrical signal of the micro-mechanical structure <b>110</b> is free from being amplified before the analog-to-digital conversion.

p-0022Referring to <figref idrefs="DRAWINGS">FIG. 1</figref>, in various embodiments the MEMS <b>100</b> can include a converter <b>130</b>. The converter <b>130</b> can be coupled between the micro-mechanical structure <b>110</b> and the ADC <b>120</b>. The converter <b>130</b> can convert the electrical signal, e.g., a capacitance signal, of the micro-mechanical structure <b>110</b> to another electrical signal, e.g., a voltage signal, a current signal, or combinations thereof. In various embodiments using a microaccelerometer, the converter <b>130</b> can be a capacitance-to-voltage converter or a capacitance-to-current converter.

p-0023Following is the description regarding an exemplary operation of the MEMS <b>100</b>. Referring to <figref idrefs="DRAWINGS">FIG. 1</figref>, a modulator <b>135</b> can modulate the electrical signal, e.g., a capacitance signal, of the micro-mechanical structure <b>110</b>. The modulator <b>135</b> can provide a carrier signal having a frequency that can be higher than that of the capacitance signal of the micro-mechanical structure <b>110</b>. The modulation of the capacitance signal can desirably separate the capacitance signal of the micro-mechanical structure from noises.

p-0024Referring again to <figref idrefs="DRAWINGS">FIG. 1</figref>, the converter <b>130</b>, e.g., a capacitance-to-voltage converter, can convert the modulated capacitance signal to a voltage signal. The voltage signal can be outputted to the ADC <b>120</b>, e.g., a 2^ndorder delta-sigma ADC. The ADC <b>120</b> can demodulate the voltage signal. The ADC <b>120</b> can filter, e.g., low-pass filter, the demodulated voltage signal such that a low-pass voltage signal can be obtained. The ADC <b>120</b> can convert the low-pass voltage signal to at least one digital signal.

p-0025Table 1 shows a comparison between the conventional microaccelerometer and the MEMS <b>100</b>. With the same SNR, the operating current of the MEMS <b>100</b> can be substantially smaller than that of the conventional microaccelerometer.

p-0026<tables id="TABLE-US-00001" num="00001"><table frame="none" colsep="0" rowsep="0"><tgroup align="left" colsep="0" rowsep="0" cols="4"><colspec colname="offset" colwidth="70pt" align="left" /><colspec colname="1" colwidth="63pt" align="center" /><colspec colname="2" colwidth="49pt" align="center" /><colspec colname="3" colwidth="35pt" align="center" /><thead><row><entry /><entry namest="offset" nameend="3" rowsep="1">TABLE 1</entry></row><row><entry /><entry namest="offset" nameend="3" align="center" rowsep="1" /></row><row><entry /><entry>Operating current</entry><entry>Area</entry><entry>SNR</entry></row><row><entry /><entry namest="offset" nameend="3" align="center" rowsep="1" /></row></thead><tbody valign="top"><row><entry /></row></tbody></tgroup><tgroup align="left" colsep="0" rowsep="0" cols="4"><colspec colname="1" colwidth="70pt" align="left" /><colspec colname="2" colwidth="63pt" align="center" /><colspec colname="3" colwidth="49pt" align="center" /><colspec colname="4" colwidth="35pt" align="center" /><tbody valign="top"><row><entry>Conventional</entry><entry>445 μA</entry><entry>41,500 μm²</entry><entry>75 dB</entry></row><row><entry>microaccelerometer</entry></row><row><entry>MEMS 100</entry><entry>258 μA</entry><entry>41,300 μm²</entry><entry>75 dB</entry></row><row><entry namest="1" nameend="4" align="center" rowsep="1" /></row></tbody></tgroup></table></tables>

p-0027As noted, the conventional microaccelerometer uses the amplifiers to amplify the voltage signal converted from the capacitance signal. Due to the use of the amplifiers, an operating current of the conventional microaccelerometer is about 445 μA. In contrary to the conventional microaccelerometer, the MEMS <b>100</b> is free from including any amplifier between the micro-mechanical structure <b>110</b> and the ADC <b>120</b> or between the converter <b>130</b> and the ADC <b>120</b>. As noted, the electrical signal of the micro-mechanical structure <b>110</b> can have a desired SNR. In various embodiments, the ADC <b>120</b> is a 2^ndorder delta-sigma ADC or a higher order delta-sigma ADC. The 2^ndorder delta-sigma ADC or a higher order delta-sigma ADC can provide a desired resolution for the low-pass voltage signal without amplifying the low-pass voltage signal. In various embodiments, the operating current of the MEMS <b>100</b> can be about 258 μA. Since the operating current is reduced, the power consumed by the MEMS <b>100</b> is reduced. It is also found that the MEMS <b>100</b> is free from including any amplifier between the micro-mechanical structure <b>110</b> and the ADC <b>120</b>. The area of the MEMS <b>100</b> can also be reduced as shown in Table 1. In other embodiments, the MEMS <b>100</b> can be free from including any low-pass filter between the micro-mechanical structure <b>110</b> and the ADC <b>120</b>.

p-0028In other embodiments, the ADC <b>120</b> can convert the capacitance signal of the micro-mechanical structure <b>110</b> to a voltage signal. The ADC <b>120</b> can filter, e.g., high-pass filter, the voltage signal. The ADC <b>120</b> can demodulate the high-pass voltage signal. The ADC <b>120</b> can analog-to-digital convert the high-pass voltage signal to at least one digital signal.

p-0029<figref idrefs="DRAWINGS">FIG. 2A</figref> is a schematic cross-sectional view illustrating an exemplary MEMS disposed over a substrate. In <figref idrefs="DRAWINGS">FIG. 2A</figref>, a MEMS <b>200</b> can include a micro-mechanical structure <b>210</b> electrically coupled with a complementary metal-oxide-semiconductor (CMOS) circuit <b>213</b>. The MEMS <b>200</b> can be similar to the MEMS <b>100</b> and the micro-mechanical structure <b>210</b> can be similar to the micro-mechanical structure <b>110</b> described above in conjunction with <figref idrefs="DRAWINGS">FIG. 1</figref>.

p-0030The CMOS circuit <b>213</b> can be formed over a substrate <b>211</b>. The substrate <b>211</b> can include an elementary semiconductor including silicon or germanium in crystal, polycrystalline, or an amorphous structure; a compound semiconductor including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and GaInAsP; any other suitable material; or combinations thereof. In one embodiment, the alloy semiconductor substrate may have a gradient SiGe feature in which the Si and Ge composition change from one ratio at one location to another ratio at another location of the gradient SiGe feature. In another embodiment, the alloy SiGe is formed over a silicon substrate. In another embodiment, a SiGe substrate is strained. Furthermore, the semiconductor substrate may be a semiconductor on insulator, such as a silicon on insulator (SOI), or a thin film transistor (TFT). In some embodiments, the semiconductor substrate may include a doped epi layer or a buried layer. In other embodiments, the compound semiconductor substrate may have a multilayer structure, or the substrate may include a multilayer compound semiconductor structure.

p-0031The CMOS circuit <b>213</b> can include various diodes, transistors, devices, digital circuits, analog circuits, other CMOS circuits, ASIC circuits, and/or any combinations thereof. In various embodiments, the CMOS circuit <b>213</b> can include the modulator <b>135</b>, the converter <b>130</b>, and/or the ADC <b>120</b> described above in conjunction with <figref idrefs="DRAWINGS">FIG. 1</figref>.

p-0032Referring to <figref idrefs="DRAWINGS">FIG. 2A</figref>, a dielectric structure <b>214</b> can be formed around the CMOS circuit <b>213</b>. The dielectric structure <b>214</b> can isolate the CMOS circuit <b>213</b> from other circuits (not shown). In various embodiments, the dielectric structure <b>214</b> can include at least one dielectric material such as oxide, nitride, oxynitride, low-k dielectric material, other desired dielectric material, and/or any combinations thereof. The dielectric structure <b>214</b> can be formed by, for example, a chemical vapor deposition (CVD) process, a high-density plasma (HDP) CVD process, a high aspect ratio process (HARP), a spin-coating process, other deposition process, and/or any combinations thereof.

p-0033Referring to <figref idrefs="DRAWINGS">FIG. 2A</figref>, a digital shield layer <b>215</b> and an analog shield layer <b>217</b> can be formed over the CMOS circuit. A dielectric layer <b>218</b> can be formed around the digital shield layer <b>215</b> and the analog shield layer <b>217</b>. The digital shield layer <b>215</b> and the analog shield layer <b>217</b> can include at least one metallic component, such as aluminum, copper, tungsten, titanium, other metallic component, or any combinations thereof. The dielectric layer <b>218</b> can include at least one dielectric material such as oxide, nitride, oxynitride, low-k dielectric material, other desired dielectric material, and/or any combinations thereof. The dielectric structure <b>218</b> can be formed by, for example, a CVD process, a HDP CVD process, a HARP, a spin-coating process, other deposition process, and/or any combinations thereof.

p-0034Referring to <figref idrefs="DRAWINGS">FIG. 2A</figref>, a wire layer <b>219</b> can be formed between the CMOS circuit <b>213</b> and the micro-mechanical structure <b>210</b>. A dielectric layer <b>222</b> can be formed around the wire layer <b>219</b>. The wire layer <b>219</b> can electrically couple the micro-mechanical structure <b>210</b> with the CMOS circuit <b>213</b>. The wire layer <b>219</b> can include metallic lines, buses, contacts, vias, other connection structure, and/or any combinations thereof. The wire layer <b>219</b> can include at least one metallic component, such as aluminum, copper, tungsten, titanium, other metallic component, or any combinations thereof. The dielectric layer <b>222</b> can include at least one dielectric material such as oxide, nitride, oxynitride, low-k dielectric material, other desired dielectric material, and/or any combinations thereof. The dielectric structure <b>222</b> can be formed by, for example, a CVD process, a HDP CVD process, a HARP, a spin-coating process, other deposition process, and/or any combinations thereof.

p-0035As noted, the digital shield layer <b>215</b> can shield noises coupled between a digital circuit region (not shown) of the CMOS circuit <b>213</b> and the micro-mechanical structure <b>210</b>. The analog shield layer <b>217</b> can shield noises coupled between an analog circuit region (not shown) of the CMOS circuit <b>213</b> and the micro-mechanical structure <b>210</b>. The digital shield layer <b>215</b> can be spaced from the analog shield layer <b>217</b> by a distance “d” between about 2 μm and about 5 μm. The separation of the digital shield layer <b>215</b> and the analog shield layer <b>217</b> can desirably reduce the noises coupled among the digital circuit region, the analog circuit region, and/or the micro-mechanical structure <b>210</b>. Since the noises coupled among the digital circuit region, the analog circuit region, and/or the micro-mechanical structure <b>210</b> can be desirably reduced, the electrical signal of the micro-mechanical structure <b>210</b> can be sensed and separated from the noises. Amplifying the electrical signal of the micro-mechanical structure <b>210</b> can be optional. It is noted that the MEMS <b>200</b> described above is merely exemplary. Any MEMS that can provide a desired SNR can be used.

p-0036<figref idrefs="DRAWINGS">FIG. 2B</figref> is a schematic cross-sectional view illustrating another exemplary MEMS disposed over a substrate. Items in <figref idrefs="DRAWINGS">FIG. 2B</figref> are similar to items described above in conjunction with <figref idrefs="DRAWINGS">FIG. 2A</figref>. In <figref idrefs="DRAWINGS">FIG. 2B</figref>, a digital shield layer <b>225</b> can be coupled with an analog shield layer <b>227</b> through a connection region <b>230</b>. The connection region <b>230</b> can have a pattern that is substantially equal to at least a portion of a routing pattern of at least one metallic layer of the CMOS circuit <b>213</b>. The digital shield layer <b>225</b>, the analog shield layer <b>227</b>, and the connection region <b>230</b> can desirably reduce a noise coupled between the CMOS circuit <b>213</b> and the micro-mechanical structure <b>210</b>.

p-0037As noted, the CMOS circuit <b>213</b> can include at least one metallic layer, e.g., metallic layers M<b>1</b>-M<b>5</b>, for interconnection. The pattern of the connection region <b>230</b> can be similar to the routing pattern of the top metallic layer, e.g., M<b>5</b>, of the CMOS circuit <b>213</b> that is directly under the connection region <b>230</b>. In various embodiments, the pattern of the connection region <b>230</b> can be similar to the routing pattern of at least one of the metallic layer, e.g., M<b>1</b>-M<b>5</b>, of the CMOS circuit <b>213</b> that is directly under the connection region <b>230</b>.

p-0038<figref idrefs="DRAWINGS">FIG. 3</figref> is a schematic drawing illustrating another exemplary MEMS including a micro-mechanical structure coupled with an analog-to-digital converter (ADC). Items of <figref idrefs="DRAWINGS">FIG. 3</figref> that are the same items in <figref idrefs="DRAWINGS">FIG. 1</figref> are indicated by the same reference numerals, increased by <b>200</b>. In <figref idrefs="DRAWINGS">FIG. 3</figref>, a MEMS <b>300</b> can include a detector <b>340</b>, e.g., a squelch detector, which can detect the electrical signal, e.g., a voltage signal, from a converter <b>330</b>. A controller <b>350</b> can be coupled with the detector <b>340</b>. A clock switch <b>360</b> can be coupled with the controller <b>350</b>.

p-0039In various embodiments, the MEMS <b>300</b> can operate in modes having different sampling frequencies. <figref idrefs="DRAWINGS">FIG. 4</figref> is a flowchart showing an exemplary method for switching operation modes of the MEMS <b>300</b>. Referring to <figref idrefs="DRAWINGS">FIGS. 3 and 4</figref>, a step <b>410</b> can determine if the MEMS <b>300</b> operates at a normal mode or a high performance mode. In various embodiments, the normal mode can have a clock signal Φ₂having a sampling frequency, e.g., 500 kHz, of about a half of a sampling frequency, e.g., 1 MHz, of a clock signal Φ₁of the high performance mode.

p-0040In various embodiments, the MEMS <b>300</b> can operate at the normal mode. In a step <b>420</b>, the detector <b>340</b> can detect if an electrical signal, e.g., a voltage signal, from the converter <b>330</b> is substantially smaller than a predetermined voltage, e.g., a common mode voltage or ground, for a predetermined interval, e.g., about 10 ms or more. If so, the controller <b>350</b> can control the clock switch <b>360</b> outputting a clock signal Φ₃having a sampling frequency, e.g., 250 kHz, for sampling the electrical signal from the converter <b>330</b>. In various embodiments, the mode for operating the MEMS <b>300</b> with the 250-kHz sampling frequency can be referred to as a power saving mode.

p-0041If the detector <b>340</b> detects that the electrical signal from the converter <b>330</b> is not substantially smaller than the predetermined voltage and/or not for the predetermined interval, the controller <b>350</b> can control the clock switch <b>360</b> outputting the clock signal Φ₂having the sampling frequency, e.g., 500 kHz, for sampling the electrical signal from the converter <b>330</b>. As noted, at the power saving mode the sampling frequency is reduced compared with the sampling frequency of the normal mode. The operating current of the power saving mode can be reduced. The power consumed by the MEMS <b>300</b> can be reduced.

p-0042Referring to <figref idrefs="DRAWINGS">FIG. 4</figref>, in other embodiments the MEMS <b>300</b> can operate at the high performance mode. In a step <b>430</b>, the detector <b>340</b> can detect if an electrical signal, e.g., a voltage signal, from the converter <b>330</b> is substantially smaller than a predetermined voltage, e.g., a common mode voltage or ground, for a predetermined interval, e.g., about 10 ms or more. If so, the controller <b>350</b> can control the clock switch <b>360</b> outputting the clock signal Φ₃having the sampling frequency, e.g., 250 kHz, for sampling the electrical signal from the converter <b>330</b>. In various embodiments, the mode for operating the MEMS <b>300</b> with the 250-kHz sampling frequency can be referred to as a power saving mode.

p-0043If the detector <b>340</b> detects that the electrical signal from the converter <b>330</b> is not substantially smaller than the predetermined voltage and/or not for the predetermined interval, the controller <b>350</b> can control the clock switch <b>360</b> outputting the clock signal Φ₁having the sampling frequency, e.g., 1 MHz, for sampling the electrical signal from the converter <b>330</b>. As noted, at the power saving mode the sampling frequency is reduced compared with the sampling frequency of the normal mode. The operating current of the power saving mode can be reduced. The power consumed by the MEMS <b>300</b> can be declined. It is noted that the number of the clock signals and the sampling frequencies described above are merely exemplary. One of skill in the art can modify them to achieve desired operations for the MEMS <b>300</b>.

p-0044Referring again to <figref idrefs="DRAWINGS">FIG. 3</figref>, in various embodiments the MEMS <b>300</b> can include an interpolation filter <b>370</b> for smoothing digital signals output from the ADC <b>320</b>. In various embodiments, the interpolation filter <b>370</b> can be coupled with the clock switch <b>360</b>. The interpolation filter <b>370</b> can receive the clock signal from the clock switch <b>360</b>.

p-0045For example, the MEMS <b>300</b> can operate at the power saving mode as described above in conjunction with <figref idrefs="DRAWINGS">FIG. 4</figref>. As noted, the power saving mode can use the clock signal Φ₃having the sampling frequency that is lower than those of the normal mode and the high performance mode. In various embodiments operating at the power saving mode, a switch control signal can open a switch <b>371</b>. Another switch control signal can close a switch <b>372</b> coupling the output end of the ADC <b>320</b> with the interpolation filter <b>370</b>. The interpolation filter <b>370</b> can receive the clock signal Φ₃from the clock switch <b>360</b>. The interpolation filter <b>370</b> can interpolate at least one datum between two neighboring digital signals output from the ADC <b>320</b>. By interpolating data to the digital signals output from the ADC <b>320</b>, the interpolation filter <b>370</b> can smooth the digital signals output from the ADC <b>320</b>.

p-0046In other embodiments, the MEMS <b>300</b> can operate at the normal mode or the high performance mode as described above in conjunction with <figref idrefs="DRAWINGS">FIG. 4</figref>. As noted, the normal mode and the high performance mode can have sampling frequencies that are higher than that of the power saving mode. The ADC <b>320</b> can desirably sample the voltage signal from the converter <b>330</b>. In various embodiments operating at the normal mode or the high performance mode, a switch control signal can open the switch <b>372</b>. Another switch control signal can close the switch <b>371</b> such that the digital signals output from the ADC <b>320</b> can bypass the interpolation filter <b>370</b>. The digital signals output from the ADC <b>320</b> can be free from being interpolated. No signal smoothing is performed for the normal mode or the high performance mode. It is noted that the data interpolation and/or smoothing described above are merely exemplary. In other embodiments, the digital data from the ADC <b>320</b> under the normal mode and/or the high performance mode can be interpolated. The scope of this disclosure is not limited thereto.

p-0047<figref idrefs="DRAWINGS">FIG. 5</figref> is a schematic drawing illustrating a portion of a frequency divider including an exemplary clock switch. Following is a description related to switching between the clock signal Φ₁and the clock signal Φ₃. The scope of this disclosure is not limited thereto.

p-0048In <figref idrefs="DRAWINGS">FIG. 5</figref>, a portion of a frequency divider <b>500</b> can include a clock switch <b>560</b>. The clock switch <b>560</b> can be similar to the clock switch <b>360</b> described above in conjunction with <figref idrefs="DRAWINGS">FIG. 3</figref>. In various embodiments, the frequency divider <b>500</b> can include at least one inverter, e.g., inverters <b>511</b> and <b>513</b>, at least one logic gate, e.g., logic gates <b>515</b> and <b>517</b>, and at least one register, e.g., registers <b>521</b>, <b>523</b>, and <b>525</b>. The clock switch <b>560</b> can include at least one logic gate, logic gates, <b>561</b>, <b>563</b>, and <b>565</b>, at least one register, e.g., register <b>567</b>, and at least one MUX <b>569</b>.

p-0049Referring to <figref idrefs="DRAWINGS">FIG. 5</figref>, the frequency divider <b>500</b> can receive the clock signal Φ₁having a sampling frequency, e.g., 1 MHz, and a control signal. The control signal can be output from the controller <b>350</b> (shown in <figref idrefs="DRAWINGS">FIG. 3</figref>). The frequency divider <b>500</b> can divide the sampling frequency of the clock signal Φ₁into a low sampling frequency, e.g., 250 kHz, of the clock signal Φ₃. The clock signal Φ₁and the clock signal Φ₃can be forwarded to the clock switch <b>560</b>. The control signal can control the MUX <b>569</b> outputting the clock signal Φ₁or the clock signal Φ₃corresponding the operation mode of the MEMS <b>300</b>. It is noted that <figref idrefs="DRAWINGS">FIG. 5</figref> merely illustrates a portion of the frequency divider <b>500</b> for switching between the clock signal Φ₁and the clock signal Φ₃. One of skill in the art can modify the portion of the frequency divider <b>500</b> to achieve a desired frequency divider that can switch among the clock signal Φ₁, the clock signal Φ₂, and the clock signal Φ₃.

p-0050<figref idrefs="DRAWINGS">FIG. 6</figref> is a schematic drawing illustrating an exemplary interpolation filter. In <figref idrefs="DRAWINGS">FIG. 6</figref>, the interpolation filter <b>670</b> can be similar to the interpolation filter <b>370</b> described above in conjunction with <figref idrefs="DRAWINGS">FIG. 3</figref>. The interpolation filter <b>670</b> can include at least one comb filter, e.g., a comb filter <b>675</b>, and at least one integrator, e.g., an integrator <b>677</b>. In various embodiments operating a MEMS at the power saving mode, the comb filter <b>675</b> can receive the clock signal Φ₃from the clock switch <b>360</b> (shown in <figref idrefs="DRAWINGS">FIG. 3</figref>) and the integrator <b>677</b> can receive the clock signal Φ₁. The interpolation filter <b>670</b> can desirably smooth digital signals output from the ADC <b>320</b> (shown in <figref idrefs="DRAWINGS">FIG. 3</figref>).

p-0051<figref idrefs="DRAWINGS">FIG. 7</figref> is a schematic drawing showing a system including an exemplary MEMS coupled with a processor. In <figref idrefs="DRAWINGS">FIG. 7</figref>, a system <b>700</b> can include a processor <b>701</b> coupled with a MEMS <b>710</b>. The process <b>701</b> can control operations of the MEMS <b>710</b>. In various embodiments, the MEMS <b>710</b> can be similar to one of the MEMS <b>100</b>, <b>200</b>, and <b>300</b> described above in conjunction with <figref idrefs="DRAWINGS">FIGS. 1-3</figref>.

p-0052In various embodiments, the system <b>700</b> can include a game controller, personal media player, a cell phone, a digital camera, a personal computer, an auto vehicle, a displayer, a hard disk driver, a digital versatile disc, a set top box, or any system that can include a micro-mechanical structure.

p-0053In various embodiments, the processor <b>701</b> and the MEMS <b>710</b> can be physically and electrically coupled with a printed wiring board or printed circuit board (PCB) to form an electronic assembly. The electronic assembly can be part of an electronic system such as computers, wireless communication devices, computer-related peripherals, entertainment devices, or the like.

p-0054In various embodiments, the system <b>700</b> including the MEMS <b>710</b> can provides an entire system in one IC, so-called system on a chip (SOC) or system on integrated circuit (SOIC) devices. These SOC devices may provide, for example, all of the circuitry needed to implement a cell phone, personal data assistant (PDA), digital VCR, digital camcorder, digital camera, MP3 player, or the like in a single integrated circuit.

p-0055The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.