Self-testing optical transceiver

CROSS-REFERENCE TO RELATED APPLICATIONS

Not applicable.

BACKGROUND

Computing and networking technology have transformed our world. As the amount of information communicated over networks has increased, high speed transmission has become ever more critical. Many high speed data transmission networks rely on optical transceivers and similar devices for facilitating transmission and reception of digital data embodied in the form of optical signals over optical fibers. Optical networks are thus found in a wide variety of high speed applications ranging from modest Local Area Networks (“LANs”) to backbones that define a large portion of the infrastructure of the Internet.

Typically, data transmission in such networks is implemented by way of an optical transmitter (also referred to as an “optoelectronic transducer”), such as a laser or Light Emitting Diode (“LED”). The optoelectronic transducer emits light when current is passed through it, the intensity of the emitted light being a function of the magnitude of the current. Data reception is generally implemented by way of an optical receiver (also referred to as an optoelectronic transducer), an example of which is a photodiode. The optoelectronic transducer receives light and generates a current, the magnitude of the generated current being a function of the intensity of the received light.

Various other components are also employed by the optical transceiver to aid in the control of the optical transmit and receive components, as well as the processing of various data and other signals. For example, such optical transceivers typically include a driver (e.g., referred to as a “laser driver” when used to drive a laser signal) configured to control the operation of the optical transmitter in response to various control inputs. The optical transceiver also generally includes an amplifier (e.g., often referred to as a “post-amplifier”) configured to amplify the channel-attenuated received signal prior to further processing. A controller circuit (hereinafter referred to as the “controller”) controls the operation of the laser driver and post-amplifier.

BRIEF SUMMARY

The embodiments disclosed herein relate to systems and methods for an optical transceiver module to perform one or more diagnostic self-tests without the assistance of a host computing system. The optical transceiver module includes at least one processor, a persistent memory and a system memory.

The persistent memory, which is coupled to the at least one processor, contains microcode. The microcode is loaded from the persistent memory to the system memory and executed by the at least one processor. The executed microcode causes the optical transceiver module to perform one or more diagnostic self-tests. The diagnostic result data of the one or more diagnostic self-tests is then stored in the persistent memory and is formatted for analysis. The formatted data may then be analyzed to ascertain the response of the optical transceiver to changes in its test environment.

This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

Additional features and advantages will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the teaching herein. The features and advantages of the teaching herein may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

To further clarify the above and other advantages and features of the present invention, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. The invention will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:

<figref idrefs="DRAWINGS">FIG. 1</figref> is a perspective view of one embodiment of an optical transceiver according to one embodiment of the present invention;

<figref idrefs="DRAWINGS">FIG. 2</figref> schematically illustrates an exemplary optical transceiver that may implement features of the present invention;

<figref idrefs="DRAWINGS">FIG. 3</figref> schematically illustrates an example of a control module used in the transceiver of <figref idrefs="DRAWINGS">FIG. 2</figref>;

<figref idrefs="DRAWINGS">FIG. 4</figref> illustrates a test environment used for measuring changes in the test environment;

<figref idrefs="DRAWINGS">FIG. 5</figref> illustrates an exemplary software architecture that may be maintained in system memory in accordance with the principles of the present invention;

<figref idrefs="DRAWINGS">FIG. 6</figref> illustrates a method for performing one or more diagnostic self-tests in accordance with one embodiment of the present invention; and

<figref idrefs="DRAWINGS">FIG. 7</figref> schematically illustrates an example of an optical transceiver portion including a configurable switch array in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION

The embodiments disclosed herein relate to systems and methods for an optical transceiver module to perform one or more diagnostic self-tests without the assistance of a host computing system. The optical transceiver module includes at least one processor, a persistent memory and a system memory.

The persistent memory, which is coupled to the at least one processor, contains microcode. The microcode is loaded from the persistent memory to the system memory and executed by the at least one processor. The executed microcode causes the optical transceiver module to perform one or more diagnostic self-tests. The diagnostic result data of the one or more diagnostic self-tests is then stored in the persistent memory and is formatted for analysis. The formatted data may then be analyzed to ascertain the response of the optical transceiver to changes in its test environment.

The present invention can be implemented in various optoelectronic devices. As used herein, the term “optoelectronic device” includes devices having both optical and electrical components. Examples of optoelectronic devices include, but are not limited to optical transceiver modules (“optical transceivers”), transmitters, and/or receivers. <figref idrefs="DRAWINGS">FIG. 1</figref> illustrates an exemplary optical transceiver <b>10</b> in which the principles of the present invention may be employed. The principles of the present invention allow for the optical transceiver <b>10</b> to perform end of life calculations autonomously and in real time. While the optical transceiver <b>10</b> will be described in some detail, the optical transceiver <b>10</b> is described by way of illustration only, and not by way of restricting the scope of the invention.

As depicted in <figref idrefs="DRAWINGS">FIG. 1</figref>, an exemplary transceiver module <b>10</b> includes a transmitter optical subassembly (“TOSA”) <b>12</b>, a receiver optical subassembly (“ROSA”) <b>14</b>, a printed circuit board (PCB) <b>16</b> and a housing <b>18</b> for containing the components of module <b>10</b>. TOSA <b>12</b> and ROSA <b>14</b> are configured to be electrically and/or mechanically connected to PCB <b>16</b>. In one embodiment, TOSA <b>12</b> and ROSA <b>14</b> are connected to PCB <b>16</b> using a lead frame connector disclosed in U.S. patent Ser. No. 10/809,992, filed Mar. 26, 2004, and incorporated herein by reference. Of course other structures may be used to connect TOSA <b>12</b> and ROSA <b>14</b> to PCB <b>16</b> such as, but not limited to, flexible circuits, through-hole connections, and surface-mount connections. The transceiver <b>10</b> also includes a housing end <b>20</b>, and LC cable receptacles <b>22</b> for receiving and securely connecting LC cables to TOSA <b>12</b> and ROSA <b>14</b>.

The optoelectronic devices can be constructed, for example, to be compatible with the XFP MSA standards, including those set forth in the 10 Gigabit Small Form Factor Pluggable Module adoption draft specification Revision 2.0 published by the XFP Multi Source Agreement (MSA) Group on Dec. 16, 2002 (www.xfpmsa.org), which is incorporated herein by reference, and with future revisions or final XFP MSA specifications that will be adopted in the future. Furthermore, the principles of the present invention may be implemented in optoelectronic devices of any form factor such as XFP, SFP and SFF, without restriction. It will be appreciated, however, that the optoelectronic devices need not comply with standardized form factor requirements and may have any size or configuration necessary according to a particular design. The principles of the present invention are suitable for 1 G, 2 G, 4 G, 8 G, 10 G and higher bandwidth fiber channels.

TOSA <b>12</b> includes a light source (not shown) having any suitable configuration including, but not be limited to, a distributed feedback (“DFB”) laser, a VCSEL, a cooled or uncooled EML, an EML with a wavelocker, a Fabry-Perot laser, a laser emitting diode (“LED”), and the like. ROSA <b>14</b> may comprise, for example, a photodiode, an avalanche photodiode (APD), positive-intrinsic-negative photo diodes (PIN), and the like. In one embodiment, module <b>10</b> may include a temperature-compensated externally modulated laser (EML) for use in dense wavelength division multiplexing applications (DWDM) and therefore be more completely described as a DWDM EML XFP transceiver module.

As illustrated in <figref idrefs="DRAWINGS">FIG. 1</figref>, PCB <b>16</b> includes circuitry and electronic components <b>24</b> for use with the TOSA <b>12</b> and ROSA <b>14</b> in performing the optical signal transmission and reception activities of the transceiver <b>10</b>. Among the components <b>24</b> are a laser driver, a post amplifier, a controller chip, and persistent memory. These components are described more fully below. It will be appreciated that one or more of these components can be integrated on a single chip, or can be separately disposed on the PCB <b>16</b>. In one exemplary embodiment, the transceiver <b>10</b> uses the controller chip to drive end of life calculations of the laser of the transceiver internally within the module. In particular, the controller chip cooperates in one embodiment with the laser driver, post amplifier, and other components within the transceiver <b>10</b> to obtain diagnostic data and to perform an end of life calculation of the laser, which can then be exported from the module, such as to a host system.

With reference now to <figref idrefs="DRAWINGS">FIG. 2</figref>, the circuitry of an exemplary optoelectronic device, implemented here as a transceiver <b>100</b> is further illustrated, showing the interaction between the device <b>100</b>, a host system such as an external host <b>111</b>, and fiber optic cables <b>110</b>A, <b>110</b>B. Note that the transceiver <b>100</b> shown in <figref idrefs="DRAWINGS">FIG. 2</figref> is a simplified block diagram of a transceiver such as that shown at <b>10</b> in <figref idrefs="DRAWINGS">FIG. 1</figref>.

In operation, the optical transceiver <b>100</b> receives an optical signal from fiber <b>110</b>A using an optical receiver <b>101</b>, which corresponds to the ROSA <b>14</b> of <figref idrefs="DRAWINGS">FIG. 1</figref>. The receiver <b>101</b> acts as an opto-electric transducer by transforming the optical signal into an electrical signal. The receiver <b>101</b> provides the resulting electrical signal to a post-amplifier <b>102</b>. The post-amplifier <b>102</b> amplifies the signal and provides the amplified signal to the host <b>111</b> as represented by arrow <b>102</b>A. The host <b>111</b> may be any computing system capable of communicating with the optical transceiver <b>100</b>. The host <b>111</b> may contain a host memory <b>112</b> that may be a volatile or non-volatile memory source. In one embodiment, the optical transceiver <b>100</b> may be integrated with the host <b>111</b> in the form of a printed circuit board or other components/chips within the host <b>111</b>, although this is not required. Additionally, some components of the optical transceiver <b>100</b> can reside on the host <b>111</b> while the other components of the transceiver reside on a printed circuit board separate from the host.

The optical transceiver <b>100</b> may also receive electrical signals from the host <b>111</b> for transmission onto the fiber <b>110</b>B. Specifically, the laser driver <b>103</b> receives the electrical signal as represented by the arrow <b>103</b>A, and drives an optical transmitter <b>104</b>, which corresponds to the TOSA <b>12</b> of <figref idrefs="DRAWINGS">FIG. 1</figref>. As described, the transmitter <b>104</b> includes a suitable light source, such as a laser or light emitting diode (“LED”) that is driven by the electrical signals provided by the host <b>111</b>, thereby causing the light source to emit onto the fiber <b>110</b>B optical signals representative of the information carried in the electrical signal. Accordingly, the optical transmitter <b>104</b> serves as an electro-optic transducer.

The behavior of the optical receiver <b>101</b>, the post-amplifier <b>102</b>, the laser driver <b>103</b>, and the optical transmitter <b>104</b> may vary dynamically due to a number of factors. For example, temperature changes, power fluctuations, and feedback conditions may each affect the performance of these components. Accordingly, the transceiver <b>100</b> includes a control module <b>105</b>, which may evaluate environmental conditions, such as temperature, and/or operating conditions, such as voltage, and receive information from the post-amplifier <b>102</b> (as represented by arrow <b>105</b>A) and from the laser driver <b>103</b> (as represented by arrow <b>105</b>B). This allows the control module <b>105</b> to optimize the dynamically varying performance, and additionally detect when there is a loss of signal. Specifically, the control module <b>105</b> may optimize the operation of the transceiver <b>100</b> by adjusting settings on the post-amplifier <b>102</b> and/or the laser driver <b>103</b> as represented by the arrows <b>105</b>A and <b>105</b>B. These settings adjustments can be intermittent and are generally only made when temperature or voltage or other low frequency changes so warrant. As discussed, the control module <b>105</b>, the post-amplifier <b>102</b>, and the laser driver <b>103</b> may be the same chip. Alternatively, they may be distributed across two or more chips.

The control module <b>105</b> may have access to a persistent memory <b>106</b>, which in one embodiment, is an Electrically Erasable and Programmable Read Only Memory (EEPROM). Persistent memory <b>106</b> may also be any other non-volatile memory source. The persistent memory <b>106</b> and the control module <b>105</b> may be packaged together in the same package or in different packages without restriction.

Data and clock signals may be provided from the host <b>111</b> to the control module <b>105</b> using the serial clock line SCL, and the serial data line SDA. Also data may be provided from the control module <b>105</b> to the host <b>111</b> using serial data signal SDA to allow for transmitting diagnostic data such as environmental and/or operational parameters. The control module <b>105</b> includes both an analog portion <b>108</b> and a digital portion <b>109</b>. Together, they allow the control module to implement logic digitally, while still largely interfacing with the rest of the optical transceiver <b>100</b> using analog signals.

The control module <b>105</b> senses and retrieves diagnostic data relating to the operation of the transceiver <b>100</b>. As used herein, the term “diagnostic data” will refer to both environmental parameters and operational parameters, whether the parameter is provided as raw data or processed data. Diagnostic data can be provided in analog or digital form. The environmental parameters may be, for example, ambient transceiver temperature, supply voltage, humidity, acceleration, ambient light levels, ambient vibration, magnetic flux intensity, or any other environmental parameter that may affect the performance of an optoelectronic device and/or that may be compensated for by suitable adjustment of one or more operational parameters. Generally, environmental parameters are not directly controlled by the transceiver but nonetheless affect its operation.

Operational parameters can include statistical information such as, for example, total operational time, average operational time between boots, total number of error conditions encountered, identification of one or more error conditions encountered, categorization of the number of error conditions encountered for a plurality of different error types, number of times the optical transceiver has been booted, or the like. Operational parameters also include, for example, laser wavelength, laser temperature, laser bias current, a Thermo Electric Cooler (TEC) current, transmit power, receive power, acceleration, peak acceleration, and the like. Generally, operational parameters are considered those parameters over which direct control can be had by the transceiver or host.

<figref idrefs="DRAWINGS">FIG. 3</figref> schematically illustrates an exemplary configuration <b>200</b> of the control module <b>105</b> in further detail. The control module <b>200</b> includes an analog portion <b>200</b>A that represents an example of the analog portion <b>108</b> of <figref idrefs="DRAWINGS">FIG. 2</figref>, and a digital portion <b>200</b>B that represents an example of the digital portion <b>109</b> of <figref idrefs="DRAWINGS">FIG. 2</figref>. For example, the analog portion <b>200</b>A may contain digital to analog converters, and analog to digital converters, high speed comparators (e.g., for event detection), voltage based reset generators, voltage regulators, voltage references, clock generator, and other analog components. For example, the analog portion includes sensors <b>211</b>A, <b>211</b>B, <b>211</b>C amongst potentially others as represented by the horizontal ellipses <b>211</b>D. Each of these sensors may be responsible for measuring diagnostic data including environmental and/or operational parameters that may be measured from the control module <b>200</b> such as, for example, supply voltage and transceiver temperature. The control module may also receive external analog or digital signals from other components within the optical transceiver. Two external lines <b>212</b>A and <b>212</b>B are illustrated for receiving such external analog signals although there may be many of such lines.

The internal sensors <b>211</b>A through <b>211</b>D may generate analog signals that represent the measured values. In addition, the externally provided signals <b>212</b>A, <b>212</b>B may also be analog signals. In this case, the analog signals are converted to digital signals so as to be available to the digital portion <b>200</b>B of the control module <b>200</b> for further processing. Of course, each analog parameter value may have its own Analog to Digital Converter (ADC). However, to preserve chip space, each signal may be periodically sampled in a round robin fashion using a single ADC such as the illustrated ADC <b>214</b>. In this case, each analog value may be provided to a multiplexer <b>213</b>, which selects in a round robin fashion, one of the analog signals at a time for sampling by the ADC <b>214</b>. Alternatively, multiplexer <b>213</b> may be programmed to allow for any order of analog signals to be sampled by ADC <b>214</b>.

As previously mentioned, the analog portion <b>200</b>A can include high speed comparators that may be supplied with one input being from an internal sensor or from an external line to receive a measured parameter value. The other input to the comparator may be a comparison value. Should the measured parameter value exceed the comparison value, the comparator may generate a logical high (or low) which indicates that the event has occurred. For example, suppose that the standard maximum transceiver temperature is 85 degrees Celsius. The actual measured transceiver temperature may be provided as one input to a comparator, while a value representing 85 degrees Celsius is provided to the other input of the comparator.

The digital portion <b>200</b>B of the control module <b>200</b> may include a timer module <b>202</b> that provides various timing signals used by the digital portion <b>200</b>B. Such timing signals may include, for example, programmable processor times. The timer module <b>202</b> may also act as a watchdog timer.

Two general-purpose processors <b>203</b>A and <b>203</b>B are also included. The processors recognize instructions that follow a particular instruction set, and may perform normal general-purpose operation such as shifting, branching, adding, subtracting, multiplying, dividing, Boolean operations, comparison operations, and the like. In one embodiment, the general-purpose processors <b>203</b>A and <b>203</b>B are each a 16-bit processor and may be identically structured. The precise structure of the instruction set is not important to the principles of the present invention as the instruction set may be optimized around a particular hardware environment, and as the precise hardware environment is not important to the principles of the present invention.

A host communications interface <b>204</b> is used to communicate with the host <b>111</b> using the serial data (SDA) and serial clock (line SCL) lines and the serial data line SDA of the optical transceiver <b>100</b>. The external device interface <b>205</b> is used to communicate with, for example, other modules within the optical transceiver <b>100</b> such as, for example, the post-amplifier <b>102</b>, the laser driver <b>103</b>, or the persistent memory <b>106</b>.

The internal controller system memory <b>206</b> (not to be confused with the external persistent memory <b>106</b>) may be Random Access Memory (RAM) or non-volatile memory. While system memory <b>206</b> may be RAM, it may also be a processor, register, flip-flop or other memory device. The memory controller <b>207</b> shares access to the controller system memory <b>206</b> amongst each of the processors <b>203</b>A and <b>203</b>B and with the host communication interface <b>204</b> and the external device interface <b>205</b>. In one embodiment, the host communication interface <b>204</b> includes a serial interface controller <b>201</b>A, and the external device interface <b>205</b> includes a serial interface controller <b>201</b>B. The two serial interface controllers <b>201</b>A and <b>201</b>B may communicate using a two-wire interface such as I²C or may be another serial interface so long as the interface is recognized by both communicating modules. One serial interface controller (e.g., serial interface controller <b>201</b>B) is a master component, while the other serial interface controller (e.g., serial interface controller <b>201</b>A) is a slave component.

An input/output multiplexer <b>208</b> multiplexes the various input/output pins of the control module <b>200</b> to the various components within the control module <b>200</b>. This enables different components to dynamically assign pins in accordance with the then-existing operational circumstances of the control module <b>200</b>. Accordingly, there may be more input/output nodes within the control module <b>200</b> than there are pins available on the control module <b>200</b>, thereby reducing the footprint of the control module <b>200</b>.

Register sets <b>209</b> contain a number of individual registers. These registers may be used by the processors <b>203</b> to write microcode generated data that controls high speed comparison in optical transceiver <b>100</b>. Alternatively, the registers may hold data selecting operational parameters for comparison. Additionally, the registers may be memory mapped to the various components of optical transceiver <b>100</b> for controlling aspects of the component such as laser bias current or transmit power.

It is often the case that is desirable for a manufacturer of optical transceiver <b>100</b> to perform various manufacturing tests on optical transceiver <b>100</b> at manufacture time. Such tests verify that optical transceiver <b>100</b> functions properly. For example, manufacturing tests may be performed on various operational parameters such as transmit and receive power. In addition, various components of optical transceiver <b>100</b> such as post-amplifier <b>102</b>, laser driver <b>103</b>, or control module <b>105</b> may also be tested to ensure proper function.

As part of the manufacturing testing, it may be desirable to perform the various manufacturing tests under changing environmental conditions. For example, it may be desirable to ascertain how optical transceiver <b>100</b> performs while the temperature is raised or lowered or if the surrounding air pressure is varied. As will be appreciated after reading this description, there are numerous environmental conditions that may be varied during a manufacturing test.

One embodiment of performing manufacturing tests under changing environmental conditions is illustrated in <figref idrefs="DRAWINGS">FIG. 4</figref>, which shows a test environment <b>400</b>. Included in test environment <b>400</b> are test board <b>405</b> and environmental chamber <b>410</b>. During a test, a user typically connects optical transceiver <b>100</b> to test board <b>405</b>. Note that ellipses <b>406</b> represent that any number of additional optical transceivers <b>100</b> may be connected to test board <b>405</b>. Test board <b>405</b> includes a connection <b>405</b>A that represents one or more connections that are used to provide voltage, current and the like to optical transceiver <b>100</b> while a manufacturing test is being performed. Ellipses <b>405</b>B represent that there may be any number of connections <b>405</b> as needed. Connections <b>405</b> may also be used to provide simulated transmit or receive signals to optical transceiver <b>100</b> to test the transmit and receive functions of optical transceiver <b>100</b>.

The test board <b>405</b> including optical transceiver <b>100</b> may then be placed into environmental chamber <b>410</b>. In one embodiment, environmental chamber <b>410</b> may be, but is not limited to, an oven or a pressure chamber. Ellipses <b>411</b> represent that any number of additional test boards <b>405</b> may also be placed in environmental chamber <b>410</b> as needed. The manufacturing tests may then be performed while changing the environmental conditions. For example, the temperature may be raised or lowered or the pressure may be changed.

Although test environment <b>400</b> allows for manufacturing tests to be performed in changing environmental conditions, it is often difficult to test the response of the various operational parameters of operational transceiver <b>100</b> to the changing environmental conditions. It also difficult to test the response of the analog and digital components of optical transceiver <b>100</b>.

Advantageously, in accordance with the present invention, the optical transceiver <b>100</b> is configured to perform one or more diagnostic self-tests without the active assistance of host <b>111</b>. In this description and in the claims “without the assistance of the host” is defined to mean that transceiver <b>100</b> may perform the diagnostic self-tests without needing to be coupled to a host computing device. In other words, optical transceiver <b>100</b> is capable of initiating the diagnostic self-tests by itself and includes the hardware and/or software necessary to perform the tests. The diagnostic self-tests may be accomplished in a number of ways using the environments described and illustrated with respect to <figref idrefs="DRAWINGS">FIGS. 2</figref>, <b>3</b> and <b>4</b>. It will be understood that these environments are only a few of the countless architectures in which the principles of the present invention may be employed. As previously stated, the principles of the present invention are not intended to be limited to any particular environment.

Reference is now made to <figref idrefs="DRAWINGS">FIG. 5</figref>, which illustrates a software architecture <b>500</b> that may be instantiated in system memory <b>206</b>. In particular, the processors <b>203</b> load microcode <b>501</b> into the system memory <b>206</b> from the persistent memory <b>106</b>. In the description and in the claims, “microcode” is defined to mean any type of operational or control code, such as, but not limited to, firmware and software, that runs on a microprocessor and controls the operation of the transceiver when executed. The remainder of the software architecture <b>500</b> is either instantiated in system memory <b>206</b> upon the execution of the microcode <b>501</b>, or else abstractly represents functionality implemented by the optical transceiver <b>100</b> upon the execution of the microcode <b>501</b>. Alternatively, the microcode <b>501</b> may be directly executed from persistent memory. In that case, the microcode <b>501</b> is loaded into the system memory a fraction at a time (e.g., one instruction at a time) for execution by the processor. In this latter case, the system memory may be a register, flip-flops, or any other memory regardless of size or type.

The software architecture <b>500</b> includes a diagnostic self-test control component <b>502</b> and a results processing component <b>503</b>. In some embodiments, diagnostic self-test control component <b>502</b> may include an environmental parameter component <b>504</b> and an operation parameter component <b>505</b>. The software architecture <b>500</b> of <figref idrefs="DRAWINGS">FIG. 5</figref> will be described with reference to <figref idrefs="DRAWINGS">FIG. 6</figref>, which illustrates a flowchart of an exemplary method <b>600</b> for the optical transceiver to perform one or more diagnostic self-tests on an optical transceiver.

First, the optical transceiver <b>100</b> loads the microcode <b>501</b> from persistent memory <b>106</b> to system memory <b>206</b> (act <b>601</b>). One or more of the processors <b>203</b> then execute the microcode (act <b>602</b>). The microcode <b>501</b> is structured such that the optical transceiver <b>100</b> performs the acts illustrated at act <b>602</b> when executed. Specifically, the processors <b>203</b> cause the optical transceiver <b>100</b> to perform one or more diagnostic self-tests on one or more analog or digital components of the optical transceiver <b>100</b> (act <b>603</b>), the diagnostic result data of the one or more diagnostic self-tests is stored in the persistent memory (act <b>604</b>), and the diagnostic results are formatted for later analysis (act <b>605</b>). In some embodiments, one or more environmental or operational parameters may be sensed and evaluated by optical transceiver <b>100</b> as part of the act <b>603</b>. In other embodiments, specific analog and/or digital modules or components of optical transceiver <b>100</b> may be tested as part of act <b>603</b>. In still other embodiments, the formatted diagnostic result data may be stored to ascertain the response of the optical transceiver <b>100</b> to its test environment.

In further detail, at act <b>601</b>, the microcode for performing one or more diagnostic self-tests is loaded. Exemplarily, one or more of the processors <b>203</b> load microcode stored in persistent memory <b>106</b> into controller system memory <b>206</b>. If the persistent memory <b>106</b> is an I²C EEPROM, then this may be accomplished using the conventional I²C two-wire interface. However, for other persistent memories, other communication protocols may be used. The microcode from persistent memory <b>106</b> includes functions that direct the end of life calculation.

At act <b>602</b>, one or more of the processors <b>203</b> execute the microcode loaded during act <b>401</b>. In response to the execution, at act <b>603</b> one or more diagnostic self-tests may be performed by optical transceiver <b>100</b>. For example, diagnostic self-test control component <b>502</b> may cause that a self-test be performed on various modules or components of optical transceiver <b>100</b>. This may be accomplished by environmental parameter component <b>504</b> or operational parameter component <b>505</b>. In addition, self-test control component <b>502</b> may cause that one or more environmental or operational parameters be tested. Specific examples of diagnostic self-tests that may be performed by optical transceiver <b>100</b> during act <b>603</b> will be described in more detail to follow.

At act <b>604</b>, the results of the diagnostic self-tests are stored in persistent memory. For example, results processing component <b>503</b> may write the results of the one or more self-diagnostic tests in the persistent memory <b>106</b>. At act <b>605</b>, the results processing component <b>503</b> may format the stored diagnostic results data for analysis.

For example, in one embodiment the result of the various diagnostic self-tests may be formatted such that a measured particular operational parameter is mapped against one or more changes in environmental parameters. The same process could be implemented for the analog and digital components of optical transceiver <b>100</b>. This would create a record of how well optical transceiver <b>100</b> operates when subjected to the one or more environmental changes. It would also create a record of what ranges of environmental conditions caused optical transceiver <b>100</b> to fail. For example, in the case of rising temperature a record would be created of what temperatures transceiver <b>100</b> operated correctly at and at what temperatures caused optical transceiver <b>100</b> to fail.

In other embodiments, the measured test results of the operational parameters or the components may be compared by processors <b>203</b> with expected values written in persistent memory <b>106</b> or included in the microcode <b>501</b> for a given environmental parameter. A status marker may then be written in persistent memory <b>106</b> that indicates if the measured results matched the expected results for the given change in the environmental parameter.

Alternatively, a status marker or some other indication may be written to the persistent memory that indicates a specific temperature or other environmental parameter that caused the operation of optical transceiver <b>100</b> to fail.

Once formatted, the diagnostic self-test data may then be analyzed. In some embodiments, optical transceiver <b>100</b> may be removed from test board <b>405</b> and coupled with host <b>111</b>. Host <b>111</b> may then access the formatted data in persistent memory <b>106</b> and perform analysis on the data. In other embodiments, the saved formatted diagnostic data may be accessed by other reasonable means.

Specific examples of diagnostic self-tests that may be performed will now be described. As will be appreciated after reading this specification, the diagnostic self tests to be described are for example only and should not be used to limit the scope of the appended claims. For example, in one embodiment self-test control component <b>502</b> may implement environmental parameter component <b>504</b> and/or operational parameter component <b>505</b> in order to sense data of one or more operational and/or environmental parameter. In some embodiments, these components may use one or more of the sensors <b>211</b> to perform the operations.

For instance, a sensor <b>211</b> may be configured to measure one or more of ambient temperature, optical transceiver temperature, or laser temperature, or other environmental parameter such as pressure. Another of the sensors <b>211</b> may then be configured to measure various operational parameters of the optical transceivers. Such operational parameters may include, but are not limited to, laser bias current, laser power, laser wavelength, received optical power, and the like as mentioned previously. In this way, the operational parameters may be sensed or measured at various temperatures, pressures or other environmental parameter. In some embodiments, the operating time of optical transceiver <b>100</b> may also be measured.

The measured operational parameters at the various temperatures or other environmental parameters may then be compared to expected values or otherwise analyzed by the processors <b>203</b>. In this way, the various operational parameters of optical transceiver module <b>100</b> may be ascertained during various changes to environmental parameters. As previously described, the results processing component <b>503</b> may then format the results for later analysis as needed.

In another embodiment, a self-test may be performed that measures the voltage or current level at a specific portion of the optical transceiver module. For example, a sensor <b>211</b> may be configured to measure the expected voltage level at the laser driver <b>103</b> or at the post-amplifier <b>102</b>. This level may then be compared with expected values or otherwise analyzed. For instance, if the excepted voltage level at the specified portion was 3.3 volts and the measured value was 4.0 volts, then it could be ascertained that any failure of optical transceiver module <b>100</b> was due to an excess amount of voltage being applied.

In some embodiments, a simulated transmit or receive signal may be provided to optical transceiver <b>100</b> while undergoing the manufacturing test process. In such embodiments, the simulated signals could be provided to optical transceiver <b>100</b> through use of the test board <b>405</b> as previously described. The executed microcode in this embodiment may cause control module <b>200</b> to implement an analog loopback to self-test the electrical and/or optical interfaces of optical transceiver <b>100</b> during the changing environmental conditions of the manufacturing tests. More detail on analog loopback testing is described in commonly assigned, co-pending U.S. patent application Ser. No. 11/260,448 filed Oct. 27, 2005, which is incorporated by reference in its entirety.

<figref idrefs="DRAWINGS">FIG. 7</figref> shows a configurable switch array dispersed amongst and between optical and electrical interfaces of optical transceiver <b>100</b>. As will be appreciated by one skilled in the art, the specifically illustrated configurable switch is only one example of many possible configurable switch arrays that may be used to facilitate the principles of the present invention. In the specification and in the claims, the configurable switch array may be any switch array, whether now known or discovered in the future, that may be configured by microcode. For example, each individual switch in the configurable switch array may be as straightforward as being a single transistor. However, the switches may be more complex, involving potentially many circuit components. The depicted configurable switch array of <figref idrefs="DRAWINGS">FIG. 7</figref> is illustrated and will be described as conceptually including switches <b>705</b> through <b>708</b>.

Referring back to <figref idrefs="DRAWINGS">FIG. 2</figref>, transceiver control module <b>200</b>, as described above, contains processors <b>203</b> and a bank of register sets <b>209</b>. In some embodiments, it may be possible that one or more of the registers <b>209</b> may be memory mapped to combinational logic that control switches <b>705</b> through <b>708</b>. The processors <b>203</b> may write microcode to these registers to control the operation of the switches. For example, a register from register sets <b>209</b> may be a one byte register that includes a single bit of digital data that controls whether a corresponding switch in the configurable switch array is open or closed. For example, if the switch in the configurable switch array receives a binary 1, then the switch may close. Conversely, if the switch receives a binary 0, then the switch may open.

The configurable switch array may be opened and/or closed as need to perform the loopback tests. For example, in order to test the response of the electrical interface to a simulated transmit signal, switches <b>707</b> and <b>708</b> could be opened and switch <b>705</b> closed to allow a signal to flow from laser driver <b>703</b> to post-amplifier <b>702</b>.

In like manner, in order to test the response of the optical interface to a simulated receive signal, switches <b>707</b> and <b>708</b> could be opened and switch <b>706</b> closed to allow a signal to flow from receiver <b>701</b> to transmitter or laser <b>704</b>. Additionally, switches <b>707</b> and <b>708</b> may be closed to test the normal transmit and receive properties of optical transceiver <b>100</b>. As will be appreciated, other loopback tests may also be performed.

The response of the electrical interface and/or the optical interface may be monitored by control module <b>200</b> and written to persistent memory <b>106</b> by the processors <b>203</b>. As previously described, the results processing component <b>503</b> may then format the results for later analysis as needed.

In still other embodiments, it may be desirable to perform one or more digital loopback tests to ascertain the response of the various digital interfaces during the manufacturing tests. The executed microcode in this embodiment may cause control module <b>200</b> to implement a digital loopback to self-test the digital interfaces of optical transceiver <b>100</b> during the changing environmental conditions of the manufacturing tests. More detail on digital loopback testing is described in commonly assigned, co-pending U.S. patent application Ser. No. 11/320,182 filed Dec. 28, 2005, which is incorporated by reference in its entirety.

Referring again to <figref idrefs="DRAWINGS">FIG. 2</figref>, a configurable switch array is shown dispersed amongst and between the input and output terminals of control module <b>200</b>. The individual switches in the configurable switch array couple an output terminal to a corresponding input terminal when closed. The specifically illustrated configurable switch array is only one example of many possible switch arrays that may be used to facilitate the principles of the present invention. Each switch in the configurable switch array may be as straightforward as being a single transistor. However, the switches may be more complex involving potentially many circuit components. In the depicted embodiment of <figref idrefs="DRAWINGS">FIG. 2</figref>, the configurable switch array includes switches <b>218</b> through <b>221</b>. There may also be numerous additional switches coupled to the additional input/output terminals <b>210</b>E.

Transceiver control module <b>200</b>, as described above, contains processors <b>203</b> and a bank of register sets <b>209</b>. In some embodiments, it may be possible that one or more of the registers <b>209</b> may be memory mapped to combinational logic that control switches <b>218</b> through <b>221</b>. The processors <b>203</b> may write digital values to these registers to control the operation of the switches. For example, a register from register sets <b>209</b> may be an 8 bit register that contains a bit of digital data that controls whether a corresponding switch in the configurable switch array is open or closed. For example, if the switch receives a binary 1, then the switch array may be closed. Conversely, if the switch receives a binary 0, then the switch may be open. Specific examples of self-tests using the internalized loopbacks will now be described for both the analog portion <b>200</b>A and the digital portion <b>200</b>B.

For example, suppose that the executed microcode directed control module <b>200</b> to self-test ADC <b>214</b>. A binary 1 would be written to the registers in register sets <b>209</b> that were memory mapped to switches <b>218</b> and <b>219</b>, causing the switches to close, thus connecting the output terminals <b>217</b>A and <b>217</b>B to the input terminals <b>212</b>C and <b>212</b>D.

The processors <b>203</b> would then cause digital to analog converter (DAC) <b>216</b>A and DAC <b>216</b>B to assert an analog signal on output terminals <b>217</b>A and <b>217</b>B respectively. The signals would flow back to and would be received by input terminals <b>212</b>C and <b>212</b>D as seen in <figref idrefs="DRAWINGS">FIG. 2</figref>. The analog signal would then be propagated along lines <b>212</b>A and <b>212</b>B through multiplexer <b>213</b> to ADC <b>214</b>. If working properly, ADC <b>214</b> would convert the analog signals to digital signals and would provide them to either register sets <b>209</b> or controller memory <b>206</b>. In this way, the processors <b>203</b> would be able to detect the response of ADC <b>214</b>, and potentially thereby evaluate its performance.

In like manner, the microcode may direct that processors <b>203</b> to initiate a self-test of the response of control module <b>200</b> to signals coming from other components in transceiver <b>100</b>. The processors would once again close switches <b>218</b> and <b>219</b> to couple the output terminals <b>217</b> to the input terminals <b>212</b> by writing a binary 1 to the memory mapped register. The processors would then cause DACs <b>216</b>A and <b>216</b>B to assert on output terminals <b>217</b>A and <b>217</b>B respectively signals that represent operational values from components in transceiver <b>100</b>. For example, a signal representative of laser bias current could be asserted on output terminal <b>217</b>A while a signal representative of supply voltage could be asserted on output terminal <b>217</b>B.

The laser bias signal would flow back to and be received by input terminal <b>212</b>C. The signal would flow on line <b>212</b>A and be propagated through multiplexer <b>213</b> to ADC <b>214</b>, where the analog signal would be converted to a digital signal and provided to controller system memory <b>206</b>. Here the processors <b>203</b> may read the value and determine that the laser bias current needed to adjusted. If so, then a signal would be generated and provided to a DAC and an output terminal. The processors would detect this response.

Similarly, the supply voltage signal would flow back to and be received by input terminal <b>212</b>D. This signal would also be provided to the controller system memory <b>206</b>. Processors <b>203</b> would also in this case detect a response of the control module to the signal and potentially thereby evaluate performance of the control module.

The internalized loopbacks may also be used to self-test the other components and operations of the analog portion <b>200</b>A. For example, signals could be asserted on the output terminals to test a high speed comparator, a digital-to-analog converter, or a temperature sensor. The switches <b>218</b> and <b>219</b> would be closed and the asserted signals would be received by the input terminals and cause a response as previously described.

The internalized loopbacks using the input/output pins of terminals <b>210</b>A through <b>210</b>D may be used to self-test the logical functional blocks of the digital portion <b>200</b>B of control module <b>200</b>. As in the analog portion <b>200</b>A, the loopbacks utilize switches, in this case switches <b>220</b> and <b>221</b>, which couple one input/output pin to another input/output pin. The switches may be memory mapped to a register in register sets <b>209</b> as described previously.

As mentioned earlier, the digital input/output pins <b>210</b> may be assigned dynamically by the digital components according to the operational circumstances of control module <b>200</b>. For example, the host communication interface <b>204</b> may assign input/output pins <b>210</b>A and <b>210</b>B for its use. Later, under different operational circumstances, the external device interface <b>205</b> may assign input/output pins <b>210</b>A and <b>210</b>B for its use.

The executed microcode may direct that host communication interface <b>204</b> assign input/output pins <b>210</b>A and <b>210</b>B for its use. The processors would be directed by the microcode to close switch <b>220</b> by writing a binary 1 to the memory mapped register, thus coupling the output terminal to the input terminal. The processors would then direct host communication interface <b>204</b> to assert a signal on output pin <b>210</b>A. Since the pins are coupled by the closed switch <b>220</b>, input pin <b>210</b>B would receive the signal, which could then be provided to host communication interface <b>204</b>. In this way, the response of the host communication interface while it is sending a signal and receiving a signal may be detected by the processors <b>203</b>.

In like manner, the microcode may direct that a self-test be performed on the external device interface <b>205</b>. As with the host communication interface, the microcode may direct that the external device interface <b>205</b> assign input/output pins <b>210</b>C and <b>210</b>D for its use, although pins <b>210</b>A and <b>210</b>B would work equally as well. The processors would be directed by the microcode to close switch <b>221</b> by either writing a binary 1 to the memory mapped register, thus coupling the output terminal to the input terminal. The processors would then direct external device interface <b>205</b> to assert a signal on output pin <b>210</b>C. Since the pins are coupled by the closed switch <b>221</b>, input pin <b>210</b>D would receive the signal, which could them be provided to external device interface <b>205</b>. In this way, the response of the external device interface while it is sending a signal and receiving a signal may be detected by the processors <b>203</b>. The internalized loopbacks may also be used to self-test the other components and functional logic blocks in digital portion <b>200</b>B.

The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.