Flexible printed circuit board
Summary by NHIP
High-ratio trace PCB
The printed circuit board features four conductor lines arranged in two transmission line pairs on a first insulating layer. The layer thickness ranges from 4 to 50 μm, while line thickness spans 8 to 20 μm and line spacing covers 10 to 30 μm. A thickness-to-distance ratio of 0.8 or more defines the geometry of these conductors.
Claim Score by NHIP
Abstract
An FPC board includes a base insulating layer. A plurality of wiring traces are formed on the base insulating layer. The adjacent wiring traces are arranged at a distance d from each other, and each wiring trace has a predetermined width and a thickness t1. Each transmission line pair is constituted by the two adjacent wiring traces of the plurality of wring traces. A ratio of the thickness t1 of the wiring trace to the distance d between the adjacent wiring traces is set to 0.8 or more. A cover insulating layer may be formed on the base insulating layer to cover the wiring traces. A metal layer having a predetermined thickness may be provided on a back surface of the base insulating layer. Furthermore, a differential impedance of each transmission line pair may be set to 100 Omega.

Term
Projected expiry 30 December 2030.
- Priority and filed
- Granted
- Today
- Projected expiry
4 claims: 1 independent, 3 dependent
- 1Broadest claimClaim Score 28, narrow(NHIP)A printed circuit board comprising:a first insulating layer;first, second, third, fourth, fifth, sixth, seventh and eighth connection terminals formed on one surface of said first insulating layer;a first conductor line formed between said first connection terminal and said second connection terminal;a second conductor line formed between said third connection terminal and said fourth connection terminal;a third conductor line formed between said fifth connection terminal and said sixth connection terminal;and a fourth conductor line formed between said seventh connection terminal and said eighth connection terminal, wherein: said first and second conductor lines constitute a first transmission line pair, said third and fourth conductor lines constitute a second transmission line pair, a thickness of said first insulating layer is not less than 4 μm and not more than 50 μm, a distance between said first and second conductor lines and a distance between said third and fourth conductor lines is not less than 10 μm and not more than 30 μm, a thickness of each of said first, second, third and fourth conductor lines is not less than 8 μm and not more than 20 μm, a ratio of the thickness of each of said first, second, third and fourth conductor lines to the distance between said first and second conductor lines and the distance between said third and fourth conductor lines is 0.8 or more, each of said first, second, third and fourth conductor lines has a constant width, and portions of said first insulating layer overlapping said first, second, third and fourth conductor lines have a constant thickness.
73 paragraphs in 4 sections, as filed
BACKGROUND OF THE INVENTION
p-00021. Field of the Invention
p-0003The present invention relates to a flexible printed circuit board.
p-00042. Description of the Background Art
p-0005A flexible printed circuit (hereinafter referred to as FPC) board is used as a transmission path of digital signals between a central processing unit (hereinafter referred to as CPU) and a liquid crystal display in information communications equipment such as a cellular telephone. Prime constituents of the FPC board include a base insulating layer and conductive wiring traces formed on the insulating layer.
p-0006In recent years, higher frequency of the digital signals to be used has been realized with an increased amount of information transmitted through the information communications equipment. In the FPC board, however, transmission of the digital signals in a high-frequency region may cause high-frequency noise resulting from the harmonic of the digital signals to be generated from the wiring traces.
p-0007In this case, the high-frequency noise generated from the FPC board leads to malfunctions of other electronic components in some cases. In a cellular telephone including a highly sensitive antenna, for example, the high-frequency noise generated from the FPC board may be received by the antenna. Such a phenomenon causes malfunctions.
p-0008Therefore, an FPC board that suppresses external emission of the high-frequency noise generated from the wiring traces has been proposed (see JP 2008-300803 A, for example).
p-0009Conductive traces are formed on an insulating base film, and an insulating layer is formed on the base film to cover the conductive traces in the FPC board of JP 2008-300803 A. In addition, a conductive layer is formed on the insulating layer. In this case, the conductive layer on the insulating layer is used as a shield material of electromagnetic waves. This suppresses external emission of electromagnetic wave noise generated from the conductive traces.
p-0010Sufficient flexibility of the FPC board is desired in consideration of reduction in size and increased variety of the structure of the information communications equipment.
p-0011In the FPC board of JP 2008-300803 A, however, the conductive layer is provided on the conductive traces with the insulating layer sandwiched therebetween as described above. This leads to lower flexibility than that of an FPC board with no conductive layer formed thereon.
SUMMARY OF THE INVENTION
p-0012An object of the present invention is to provide a flexible printed circuit board capable of ensuring its sufficient flexibility and sufficiently reducing emission of high-frequency noise.
p-0013(1) According to an aspect of the present invention, a printed circuit board includes a first insulating layer, and a plurality of conductor lines formed on one surface of the first insulating layer, wherein the conductor lines that are adjacent to each other constitute a transmission line pair, and a ratio of a thickness of the conductor line to a distance between the adjacent conductor lines is 0.8 or more.
p-0014In the printed circuit board, the ratio of the thickness of the conductor line to the distance between the adjacent conductor lines is set to 0.8 or more. This sufficiently reduces external emission of high-frequency noise generated at the time of transmission of high-frequency signals through the transmission line pair without impairing flexibility of the printed circuit board.
p-0015(2) The distance between the adjacent conductor lines may be not less than 10 μm and not more than 30 μm. In this case, the external emission of high-frequency noise generated at the time of transmission of high-frequency signals through the transmission line pair can be sufficiently reduced without drastically increasing effective differential impedance of the transmission line pair.
p-0016In addition, the transmission line pair is unlikely to be affected by metal, a ferroelectric material and a ferromagnetic material in the environment. This prevents change in the differential impedance of the transmission line pair even when the metal, the ferroelectric material or the ferromagnetic material exist in the environment.
p-0017(3) The thickness of each of the conductor lines may be not less than 8 μm and not more than 20 μm. In this case, sufficient flexibility of the printed circuit board can be ensured without drastically increasing the effective differential impedance of the transmission line pair.
p-0018(4) The printed circuit board may further include a conductive layer formed on the other surface of the first insulating layer, wherein a differential impedance of the transmission line pair is not more than 100 Ω.
p-0019In this case, the external emission of high-frequency noise generated at the time of transmission of high-frequency signals through the transmission line pair can be more sufficiently reduced. In addition, high-frequency electrical characteristics can be stabilized.
p-0020Furthermore, the differential impedance of the transmission line pair can be sufficiently decreased as compared with a case where the conductive layer is not formed. Accordingly, the differential impedance can be 100 Ω or less while the ratio of the thickness of the conductor line to the distance between the adjacent conductor lines is maintained at 0.8 or more. This sufficiently provides impedance matching between the transmission line pair and low impedance elements.
p-0021(5) The printed circuit board may further include a second insulating layer formed on the one surface of the first insulating layer to cover the plurality of conductor lines. In this case, corrosion resistance of the conductor lines can be ensured.
p-0022(6) The first insulating layer may be made of polyimide. In this case, sufficient flexibility of the first insulating layer can be ensured.
p-0023Other features, elements, characteristics, and advantages of the present invention will become more apparent from the following description of preferred embodiments of the present invention with reference to the attached drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
p-0024<figref idrefs="DRAWINGS">FIG. 1</figref> is a schematic plan view showing the schematic structure of a cellular telephone including an FPC board according to one embodiment of the present invention.
p-0025<figref idrefs="DRAWINGS">FIG. 2</figref> is a schematic plan view of the FPC board of <figref idrefs="DRAWINGS">FIG. 1</figref>.
p-0026<figref idrefs="DRAWINGS">FIG. 3</figref> is a sectional view of the FPC board of <figref idrefs="DRAWINGS">FIG. 2</figref> taken along the line A-A.
p-0027<figref idrefs="DRAWINGS">FIG. 4</figref> is a sectional view of the FPC board of <figref idrefs="DRAWINGS">FIG. 2</figref> taken along the line B-B.
p-0028<figref idrefs="DRAWINGS">FIG. 5</figref> is a schematic sectional view of an FPC board of an inventive example and a comparative example.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
p-0029Description will be made of a flexible printed circuit (hereinafter referred to as FPC) board according to one embodiment of the present invention while referring to the drawings. The FPC board according to the present embodiment is employed in information communications equipment such as a cellular telephone. The following paragraphs describe an example of employing the FPC board according to the present embodiment in a cellular telephone, and also describe details of the FPC board.
p-0030(1) Outline of Cellular Telephone
p-0031<figref idrefs="DRAWINGS">FIG. 1</figref> is a schematic plan view showing the schematic structure of the cellular telephone including the FPC board according to the one embodiment of the present invention. The cellular telephone <b>1</b> includes a lower housing <b>2</b>, an upper housing <b>3</b> and a hinge <b>4</b>. The lower housing <b>2</b> and the upper housing <b>3</b> are connected to each other through the hinge <b>4</b> such that the lower housing <b>2</b> and the upper housing <b>3</b> can overlap each other.
p-0032The lower housing <b>2</b> includes a central processing unit (hereinafter referred to as CPU) <b>21</b> arranged therein. Signals and so on are input from operation buttons, not shown, which is provided in the lower housing <b>2</b> to the CPU <b>21</b>. The CPU <b>21</b> controls each component of the cellar telephone <b>1</b> including an LCD driving circuit <b>32</b>, described below.
p-0033The upper housing <b>3</b> is provided with a liquid crystal display (hereinafter referred to as LCD) <b>31</b>, and includes the LCD driving circuit <b>32</b> arranged therein. The LCD <b>31</b> is electrically connected to the LCD driving circuit <b>32</b>. The CPU <b>21</b> controls the LCD driving circuit <b>32</b> to drive the LCD <b>31</b>. This causes characters and images to be displayed on the LCD <b>31</b>.
p-0034An FPC board <b>41</b> is arranged to extend inside the lower housing <b>2</b>, the hinge <b>4</b> and the upper housing <b>3</b>. The FPC board <b>41</b> has a plurality of wiring traces <b>42</b>. At least part of the plurality of wiring traces <b>42</b> constitutes a transmission line pair. The CPU <b>21</b> and the LCD driving circuit <b>32</b> are electrically connected to each other through the FPC board <b>41</b>. This causes differential digital signals to be transmitted from the CPU <b>21</b> to the LCD driving circuit <b>32</b> through the transmission line pair of the FPC board <b>41</b>.
p-0035(2) The FPC Board
p-0036Description will be made of the structure of the FPC board. <figref idrefs="DRAWINGS">FIG. 2</figref> is a schematic plan view of the FPC board <b>41</b> of <figref idrefs="DRAWINGS">FIG. 1</figref>. <figref idrefs="DRAWINGS">FIGS. 3 and 4</figref> are sectional views of the FPC board <b>41</b> of <figref idrefs="DRAWINGS">FIG. 2</figref> taken along the line A-A and the line B-B, respectively.
p-0037As shown in <figref idrefs="DRAWINGS">FIGS. 3 and 4</figref>, the FPC board <b>41</b> includes a base insulating layer <b>43</b> that is made of polyimide and has a thickness t<b>2</b>. The plurality of wiring traces <b>42</b> made of copper are formed on the base insulating layer <b>43</b>. The plurality of wring traces <b>42</b> are arranged to extend from one side to the other side of the FPC board <b>41</b>. The adjacent wiring traces <b>42</b> are arranged at a distance d from each other, and each wiring trace <b>42</b> has a width w and a thickness t<b>1</b>. Each transmission line pair through which the foregoing digital signal is transmitted is constituted by the two adjacent wiring traces <b>42</b> of the plurality of wring traces <b>42</b>.
p-0038A first connection pad <b>42</b><i>a </i>and a second connection pad <b>42</b><i>b </i>are formed at one end and the other end of each of the plurality of wiring traces <b>42</b>, respectively. This causes the plurality of first connection pads <b>42</b><i>a </i>to be arranged at regular intervals along one side of the FPC board <b>41</b>. The plurality of first connection pads <b>42</b><i>a </i>are electrically connected to a plurality of terminals, not shown, included in the LCD driving circuit <b>32</b> of <figref idrefs="DRAWINGS">FIG. 1</figref>, respectively. The plurality of second connection pads <b>42</b><i>b </i>are arranged at regular intervals along the other side of the FPC board <b>41</b>. The plurality of second connection pads <b>42</b><i>b </i>are electrically connected to a plurality of terminals, not shown, included in the CPU <b>21</b> of <figref idrefs="DRAWINGS">FIG. 1</figref>, respectively.
p-0039A cover insulating layer <b>45</b> that is made of polyimide and has a thickness t<b>4</b> is formed on the base insulating layer <b>43</b> to cover the wiring traces <b>42</b> excluding a region in which the plurality of first connection pads <b>42</b><i>a </i>are formed and a region in which the plurality of second connection pads <b>42</b><i>b </i>are formed. Furthermore, a metal layer <b>44</b> that is made of copper and has a thickness t<b>3</b> is provided on a back surface of the base insulating layer <b>43</b>.
p-0040A ratio (hereinafter referred to as aspect ratio) of the thickness t<b>1</b> of the wiring trace <b>42</b> to the distance d between the adjacent wiring traces <b>42</b> is set to 0.8 or more in the FPC board <b>41</b> according to the present embodiment. Differential impedance of each transmission line pair is set to 100 Ω.
p-0041The distance d between the adjacent wiring traces <b>42</b> is preferably not less than 10 μm and not more than 30 μm, and more preferably not less than 10 μm and not more than 20 μm. The width w of the wiring trace <b>42</b> is preferably not less than 6 μm and not more than 50 μm, and more preferably not less than 10 μm and not more than 15 μm. The thickness t<b>1</b> of the wiring trace <b>42</b> and the thickness t<b>3</b> of the metal layer <b>44</b> are each preferably not less than 8 μm and not more than 20 μm, and more preferably not less than 10 μm and not more than 15 μm. The thickness t<b>2</b> of the base insulating layer <b>43</b> is preferably not less than 4 μm and not more than 50 μm, and more preferably not less than 10 μm and not more than 30 μm. The thickness t<b>4</b> of the cover insulating layer <b>45</b> is preferably not less than 2 μm and not more than 40 μm, and more preferably not less than 5 μm and not more than 30 μm.
p-0042(3) Effects
p-0043(3-1) The Aspect Ratio
p-0044When high-frequency digital signals are transmitted through the wiring traces <b>42</b> on the FPC board <b>41</b>, high-frequency noise resulting from the harmonic of the digital signals is generated from the wiring traces <b>42</b>. The cellular telephone <b>1</b> generally includes a highly sensitive antenna that receives radio waves transmitted from a communication base station. Therefore, when the highly sensitive antenna receives the high-frequency noise, malfunctions such as disturbance in transmission of sound may occur.
p-0045In the FPC board <b>41</b> according to the present embodiment, the aspect ratio (t1/d) of the wiring trace <b>42</b> is set to 0.8 or more. This suppresses external emission of the high-frequency noise generated from the wiring traces <b>42</b>. Moreover, a shield material for shielding the high-frequency noise need not be provided in the wiring traces <b>42</b>. This allows sufficient flexibility of the FPC board <b>41</b> to be ensured.
p-0046(3-2) The Distance Between the Adjacent Wiring Traces
p-0047When the distance d between the adjacent wiring traces <b>42</b> is less than 10 μm, densities of currents flowing through the wiring traces <b>42</b> tend to be inhomogeneous due to the proximity effect. This significantly attenuates the strength of the high-frequency signal transmitted through the transmission line pair. Meanwhile, when the distance d between the adjacent wiring traces <b>42</b> exceeds 30 μm, the suppressive effect of the high-frequency noise is decreased. Accordingly, the distance d between the adjacent wiring traces <b>42</b> is preferably set to not less than 10 μm and not more than 30 μm.
p-0048The distance d between the adjacent wiring traces <b>42</b> is set to not less than 10 μm and not more than 30 μm, so that the transmission line pair is unlikely to be affected by metal, ferroelectric materials and ferromagnetic materials in the environment. This prevents change in the differential impedance of the transmission line pair even when the metal, the ferroelectric materials or the ferromagnetic materials exist in the environment.
p-0049(3-3) The Thickness of the Wiring Trace
p-0050A smaller thickness t<b>1</b> of the wiring trace <b>42</b> leads to a smaller cross sectional area, resulting in larger conductor loss due to the skin effect. In particular, when the thickness t<b>1</b> of the wiring trace is less than 8 μm, the strength of the high-frequency signal transmitted through the transmission line pair is significantly attenuated. On the other hand, when the thickness t<b>1</b> of the wiring trace <b>42</b> exceeds 20 μm, the flexibility of the FPC board <b>41</b> is impaired. Accordingly, the thickness t<b>1</b> of the wiring trace <b>42</b> is preferably set to not less than 8 μm and not more than 20 μm.
p-0051(3-4) The Metal Layer
p-0052The metal layer <b>44</b> is formed on the back surface of the base insulating layer <b>43</b> of the FPC board <b>41</b>, so that the external emission of the high-frequency noise generated at the time of the transmission of the high-frequency signals through the transmission line pair can be more sufficiently reduced.
p-0053In addition, the metal layer <b>44</b> is formed to stabilize the high-frequency electrical characteristics.
p-0054Furthermore, when the metal layer <b>44</b> is formed, the differential impedance of the transmission line pair can be sufficiently decreased as compared with a case where the metal layer <b>44</b> is not formed. Accordingly, the differential impedance can be not more than 100 Ω while the ratio of the thickness t<b>1</b> of the wiring trace <b>42</b> to the distance d between the adjacent wiring traces <b>42</b> is maintained at 0.8 or more. This sufficiently provides impedance matching between the transmission line pair and low impedance elements.
p-0055(4) Modifications
p-0056Another insulating material such as epoxy instead of polyimide may be employed as the materials for the base insulating layer <b>43</b> and the cover insulating layer <b>45</b> of the FPC board <b>41</b>, and another metal such as gold (Au) and aluminum or an alloy such as a copper alloy and an aluminum alloy instead of copper may be employed as the materials for the wiring trace <b>42</b> and the metal layer <b>44</b>.
p-0057(5) Correspondences Between Elements in the Claims and Parts in Embodiments
p-0058In the following paragraphs, non-limiting examples of correspondences between various elements recited in the claims below and those described above with respect to various preferred embodiments of the present invention are explained.
p-0059In the foregoing embodiment, the FPC board <b>41</b> is an example of a printed circuit board, the base insulating layer <b>43</b> is an example of a first insulating layer, the cover insulating layer <b>45</b> is an example of a second insulating layer, the wiring trace <b>42</b> is an example of a conductor line, and the metal layer <b>44</b> is an example of a conductive layer.
p-0060As each of various elements recited in the claims, various other elements having configurations or functions described in the claims can be also used.
p-0061(6) Inventive Example
p-0062(6-1) FPC Boards of Inventive Example and Comparative Example
p-0063In each of the following inventive example and comparative example, the FPC board shown in <figref idrefs="DRAWINGS">FIG. 5</figref> was fabricated based on the foregoing embodiment. <figref idrefs="DRAWINGS">FIG. 5</figref> is a schematic sectional view of the FPC board of the inventive example and the comparative example.
p-0064In the FPC board of <figref idrefs="DRAWINGS">FIG. 5</figref>, a pair of wiring traces <b>42</b> is formed on the base insulating layer <b>43</b>. The cover insulating layer <b>45</b> is formed on the base insulating layer <b>43</b> to cover the pair of wiring traces <b>42</b>. The metal layer <b>44</b> is formed on the back surface of the base insulating layer <b>43</b>.
p-0065(6-2) Suitable Aspect Ratio of the FPC Board
p-0066In the inventive example and the comparative example, the FPC boards having different aspect ratios (t1/d) while holding the differential impedance of the transmission line pair at about 100 Ω were fabricated by adjusting the width w of the wiring trace <b>42</b>, the distance d between the adjacent wiring traces <b>42</b>, the thickness t<b>1</b> of the wiring trace <b>42</b>, the thickness t<b>2</b> of the base insulating layer <b>43</b>, the thickness t<b>3</b> of the metal layer <b>44</b> and the thickness t<b>4</b> of the cover insulating layer <b>45</b>. Note that differential output impedance of a general circuit element is about 100 Ω. Therefore, the differential impedance of the differential line pair was set to about 100 Ω.
p-0067In the FPC board of the inventive example, the width w of the wiring trace <b>42</b> was 10 μm, the distance d between the adjacent wiring traces <b>42</b> was 20 μm, the thickness t<b>1</b> of the wiring trace <b>42</b> was 16 μm, the thickness t<b>2</b> of the base insulating layer <b>43</b> was 25 μm, the thickness t<b>3</b> of the metal layer <b>44</b> was 16 μm, and the thickness t<b>4</b> of the cover insulating layer <b>45</b> was 10 μm. The aspect ratio of the FPC board was 0.8.
p-0068In the FPC board of the comparative example, the width w of the wiring trace <b>42</b> was 60 μm, the distance d between the adjacent wiring traces <b>42</b> was 60 μm, the thickness t<b>1</b> of the wiring trace <b>42</b> was 12 μm, the thickness t<b>2</b> of the base insulating layer <b>43</b> was 25 μm, the thickness t<b>3</b> of the metal layer <b>44</b> was 12 μm, and the thickness t<b>4</b> of the cover insulating layer <b>45</b> was 10 μm. The aspect ratio of the FPC board was 0.2.
p-0069The noise emission at the time of the transmission of the high-frequency signals in each of the FPC boards of the inventive example and the comparative example was measured using the following method.
p-0070Each of the FPC boards of the inventive example and the comparative example was set on a table, and a signal generator for inputting the high-frequency signals was connected to the wiring traces <b>42</b> of each FPC board. Furthermore, a magnetic near-field probe was fixed at a position that is upwardly spaced from the wiring traces <b>42</b> by 1 mm. The high-frequency signal of 2 Gbps was transmitted to each FPC board using the signal generator, and the high-frequency noise emitted from the wiring traces <b>42</b> at the time of the transmission was detected by a spectrum analyzer via the magnetic near-field probe. Results of the measurement of the high-frequency noise are shown in Table 1.
p-0071<tables id="TABLE-US-00001" num="00001"><table frame="none" colsep="0" rowsep="0" pgwide="1"><tgroup align="left" colsep="0" rowsep="0" cols="9"><colspec colname="offset" colwidth="49pt" align="left" /><colspec colname="1" colwidth="49pt" align="center" /><colspec colname="2" colwidth="70pt" align="center" /><colspec colname="3" colwidth="49pt" align="center" /><colspec colname="4" colwidth="49pt" align="center" /><colspec colname="5" colwidth="49pt" align="center" /><colspec colname="6" colwidth="49pt" align="center" /><colspec colname="7" colwidth="35pt" align="center" /><colspec colname="8" colwidth="42pt" align="center" /><thead><row><entry /><entry namest="offset" nameend="8" rowsep="1">TABLE 1</entry></row><row><entry /><entry namest="offset" nameend="8" align="center" rowsep="1" /></row><row><entry /><entry /><entry /><entry /><entry>THICKNESS</entry><entry /><entry>THICKNESS</entry><entry /><entry /></row><row><entry /><entry>WIDTH</entry><entry>DISTANCE</entry><entry>THICKNESS</entry><entry>t2 OF BASE</entry><entry>THICKNESS</entry><entry>t4 OF COVER</entry></row><row><entry /><entry>w OF WIRING</entry><entry>d BETWEEN</entry><entry>t1 OF WIRING</entry><entry>INSULATING</entry><entry>t3 OF METAL</entry><entry>INSULATING</entry><entry>ASPECT</entry><entry>NOISE</entry></row><row><entry /><entry>TRACE</entry><entry>WIRING TRACES</entry><entry>TRACE</entry><entry>LAYER</entry><entry>LAYER</entry><entry>LAYER</entry><entry>RATIO</entry><entry>EMISSION</entry></row><row><entry /><entry>[μm]</entry><entry>[μm]</entry><entry>[μm]</entry><entry>[μm]</entry><entry>[μm]</entry><entry>[μm]</entry><entry>(t1/d)</entry><entry>[dB]</entry></row><row><entry /><entry namest="offset" nameend="8" align="center" rowsep="1" /></row></thead><tbody valign="top"><row><entry /></row></tbody></tgroup><tgroup align="left" colsep="0" rowsep="0" cols="9"><colspec colname="1" colwidth="49pt" align="left" /><colspec colname="2" colwidth="49pt" align="center" /><colspec colname="3" colwidth="70pt" align="center" /><colspec colname="4" colwidth="49pt" align="center" /><colspec colname="5" colwidth="49pt" align="center" /><colspec colname="6" colwidth="49pt" align="center" /><colspec colname="7" colwidth="49pt" align="center" /><colspec colname="8" colwidth="35pt" align="center" /><colspec colname="9" colwidth="42pt" align="center" /><tbody valign="top"><row><entry>INVEN-</entry><entry>10</entry><entry>20</entry><entry>16</entry><entry>25</entry><entry>16</entry><entry>10</entry><entry>0.8</entry><entry>0</entry></row><row><entry>TIVE</entry></row><row><entry>EXAMPLE</entry></row><row><entry>COMPARA-</entry><entry>60</entry><entry>60</entry><entry>12</entry><entry>25</entry><entry>12</entry><entry>10</entry><entry>0.2</entry><entry>7</entry></row><row><entry>TIVE</entry></row><row><entry>EXAMPLE</entry></row><row><entry namest="1" nameend="9" align="center" rowsep="1" /></row></tbody></tgroup></table></tables>
p-0072As shown in Table 1, the high-frequency noise at the position upwardly spaced from the wiring traces <b>42</b> by 1 mm was 0 dB and 7 dB in the FPC boards of the inventive example and the comparative example, respectively.
p-0073It was found from the results of the inventive example and the comparative example that the high-frequency noise is not detected at the position upwardly spaced from the wiring traces <b>42</b> by 1 mm when the aspect ratio (t1/d) of the wiring trace <b>42</b> was 0.8 or more.
p-0074While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
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Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| CN1152721A | Cites | China | Applicant |
| US2002017963A1 | Cites | United States of America | Search report |
| JP2003308668A | Cites | Japan | Applicant |
| US2006113669A1 | Cites | United States of America | Search report |
| US2008296048A1 | Cites | United States of America | Applicant |
| JP2008300803A | Cites | Japan | Applicant |
| US5657104A | Cites | United States of America | Applicant |
| US5717476A | Cites | United States of America | Applicant |
| US6963471B2 | Cites | United States of America | Search report |
| USRE37945E | Cites | United States of America | Applicant |
| USRE38053E | Cites | United States of America | Applicant |
| Office Action issued Jul. 19, 2013 in CN Application No. 201010160851.4. | Non-patent | – | Applicant |
| Office Action issued Aug. 13, 2013 in JP Application No. 2010-001958. | Non-patent | – | Applicant |
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| US2010276183A1 | United States of America | A1 | |
| JP2010278415A | Japan | A | |
| US8569629B2This record | United States of America | B2 | |
| JP5638808B2 | Japan | B2 | |
| CN101877936B | China | B |
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| Issue Notification MailedAllowedWPIR | WPIR | |
| Dispatch to FDCD1935 | D1935 | |
| Application Is Considered Ready for IssuePILS | PILS | |
| Issue Fee Payment VerifiedN084 | N084 | |
| Issue Fee Payment ReceivedIFEE | IFEE | |
| Printer Rush- No mailingTCPB | TCPB | |
| Pubs Case Remand to TCPUBTC | PUBTC | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Reference capture on IDSRCAP | RCAP | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Electronic ReviewELC_RVW | ELC_RVW | |
| Email NotificationEML_NTF | EML_NTF | |
| Mail Notice of AllowanceAllowedMN/=. | MN/=. | |
| Notice of Allowance Data Verification CompletedAllowedN/=. | N/=. | |
| Reasons for AllowanceEX.R | EX.R | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Disposal for a RCE / CPA / R129AbandonedABN9 | ABN9 | |
| Request for Continued Examination (RCE)RCEX | RCEX | |
| Workflow - Request for RCE - BeginBRCE | BRCE | |
| Electronic ReviewELC_RVW | ELC_RVW | |
| Email NotificationEML_NTF | EML_NTF | |
| Mail Final Rejection (PTOL - 326)Final rejectionMCTFR | MCTFR | |
| Final RejectionFinal rejectionCTFR | CTFR | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Non-Final ActionA... | A... | |
| Electronic ReviewELC_RVW | ELC_RVW | |
| Email NotificationEML_NTF | EML_NTF | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Email NotificationEML_NTR | EML_NTR | |
| PG-Pub Issue NotificationPG-ISSUE | PG-ISSUE | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Email NotificationEML_NTR | EML_NTR | |
| Filing ReceiptFLRCPT.O | FLRCPT.O | |
| Sent to Classification ContractorPGPC | PGPC | |
| Cleared by OIPE CSRL194 | L194 | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Electronic Information Disclosure StatementEIDS. | EIDS. | |
| Request from applicant for the USPTO to retrieve the Priority DocumentPDREQUST | PDREQUST | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Initial Exam Team nnIEXX | IEXX |
9 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapsed due to failure to pay maintenance feeLapsedFP | FP | |
| Lapse for failure to pay maintenance feesLapsedPATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYLAPS | LAPS | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Fee payment procedureMAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Maintenance fee paymentMAFP | MAFP | |
| Fee paymentFPAY | FPAY | |
| Information on status: patent grantGrantedPATENTED CASESTCF | STCF | |
| AssignmentAS | AS | |
| AssignmentAS | AS |
Numbers
- Publication
- 08569629
- Application
- 76825810
Titles
- English
- Flexible printed circuit board
Patent term adjustment
- A delay
- +322 daysthe office missed an examination deadline
- Applicant delay
- −75 days
- Net adjustment
- 247 days
Classification
- CPC, 5
- H05K1/0245
- H05K1/0393
- H05K3/28
- H05K2201/09236
- H05K2201/09318
- IPC, 6
- H05K1 00
- H01B7 08
- H05K1 03
- H05K1 16
- H05K1 18
- H05K7 00
- USPC, 7
- 174254000
- 17411700F
- 1741170FF
- 174255000
- 174260000
- 361748000
- 361749000