Method of multi-stage substrate etching and terahertz oscillator manufactured using the same method
Summary by NHIP
Multi-stage substrate etching method
The method etches holes in two substrates, bonds them face-to-face, and then etches through the second substrate using a third mask matching the second mask pattern. This sequence creates a step structure while preventing curvature at the bottom surface and overhangs on the step surface.
Claim Score by NHIP
Abstract
A method of multi-stage substrate etching is provided. The method comprises the steps of: forming a first mask pattern on one surface of a first substrate; forming a hole by etching the first substrate using the first mask pattern as an etching mask; forming a second mask pattern on one surface of a second substrate; forming a hole by etching the second substrate to a predetermined depth using the second mask pattern as an etching mask; bonding the first and second substrates together such that an etched surface of the first substrate faces an etched surface of the second substrate; forming a third mask pattern on the second substrate; and forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask, whereby it is prevented the occurrence of a radius of curvature in the bottom surface and the overhang structure occurring on a step surface, so that etching quality is improved, a precise bonding between the substrates is obtained using the alignment key positioned on each substrate, and a multi-layer process is carried out.

Term
4.9 yearsleft in the term
Expires 10 August 2031, including 1,254 days of term adjustment.
- Priority
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6 claims: 2 independent, 4 dependent
- 1Broadest claimClaim Score 53, average(NHIP)A method of multi-stage substrate etching, comprising the steps of:forming a first mask pattern on one surface of a first substrate;forming a hole by etching the first substrate using the first mask pattern as an etching mask;forming a second mask pattern on one surface of a second substrate;forming a hole by etching the second substrate to a depth using the second mask pattern as an etching mask;bonding the first and second substrates together such that an etched surface of the first substrate faces an etched surface of the second substrate;forming a third mask pattern on the second substrate, wherein the third mask pattern has a same pattern as the second mask pattern;forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask;and removing the third mask pattern to form a step structure.
- 5A method of multi-stage substrate etching, comprising:forming a first mask pattern on one surface of a first substrate by, forming an oxide film of the first substrate, forming a photo resist (PR) coating on one surface of the first substrate having the oxide film, forming an alignment key pattern on the PR coated surface, and forming the first mask pattern on the surface opposite to the PR coated surface;forming a hole by etching the first substrate using the first mask pattern as an etching mask;forming a second mask pattern on one surface of a second substrate;forming a hole by etching the second substrate to a depth using the second mask pattern as an etching mask;bonding the first and second substrates together such that an etched surface of the first substrate faces an etched surface of the second substrate;forming a third mask pattern on the second substrate;forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask;and removing the third mask pattern to form a step structure.
Independent claims2
37 paragraphs in 5 sections, as filed
PRIORITY STATEMENT
0001This application claims priority under U.S.C. § 119 to Korean Patent Application No. 10-2007-0114456, filed on Nov. 9, 2007, in the Korean Intellectual Property Office (KIPO).
BACKGROUND OF THE INVENTION
00021. Field of the Invention
0003The present invention relates to a method of multi-stage substrate etching and a terahertz oscillator manufactured using the same method, and more particularly to a method of multi-stage substrate etching in which a first substrate is etched to a desired depth, a second substrate previously etched to a certain depth is bonded to the first substrate such that the etched surface thereof faces the first substrate, and finally the second substrate is etched again to thereby form a step structure, and a terahertz oscillator manufactured using the same method.
00042. Description of the Prior Art
0005A terahertz band is very important with respect to applications of molecular optics, biological physics, medical science, spectroscopy, image processing appliances, and security appliances. Nevertheless the importance of the terahertz band ranged between an existing microwave band and optical frequency, it is true that there is few currently developed oscillator or amplifier using the same band due to various physical, engineering limitations. Recently, such a terahertz band oscillator or amplifier has been developed owing to appearance of diverse new concepts and an advance in micro processing technology.
0006In addition to efforts to increase frequency of existing microwave band oscillators, there are attempts to lower the operating frequency to have a terahertz band using optical instruments such as a semiconductor laser or a femtosecond laser. Furthermore, recently, attempts have been made to fabricate a compact size terahertz oscillator.
0007Among the attempts, there has been developed a method of forming a 3D microstructure having, on a substrate, a plurality of steps using MEMS technology. In particular, to form a plurality of steps on a substrate such as Si wafer, a method has been proposed in which a plurality of mask patterns are sequentially deposited on the substrate and repeatedly etched to remove them to thereby fabricate various step structures.
0008Meanwhile, there has been proposed another method of multi-stage etching using wafer bonding. Herein, a pre-patterned protection layer is bonded to a first wafer, a second wafer is patterned and etched, and the first wafer is finally etched using the pre-patterned protection layer. However, in case of such a multi-stag etching method, a bottom face thereof is irregularly etched to create a radius of curvature thereon, and an etched wall face is shaped like an alphabet character T.
SUMMARY OF THE INVENTION
0009The present invention has been made to solve the problems occurring in the prior art, and an object of the present invention is to provide a method of multi-stage etching capable of preventing the creation of a deviation in depth of an etched bottom face even in a deep step, a radius of curvature of an edge, a T-shape of a wall face, an overhang structure occurring due to irregular etching on a step face, and a terahertz oscillator manufactured using the same method.
0010In accordance with an aspect of the present invention, there is provided a method of multi-stage substrate etching comprising the steps of: forming a first mask pattern on one surface of a first substrate; forming a hole by etching the first substrate using the first mask pattern as an etching mask; forming a second mask pattern on one surface of a second substrate; forming a hole by etching the second substrate to a predetermined depth using the second mask pattern as an etching mask; bonding the first and second substrates together such that an etched surface of the first substrate faces an etched surface of the second substrate; forming a third mask pattern on the second substrate; and forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask.
0011In accordance with another aspect of the present invention, there is provided a terahertz oscillator manufactured by a multi-stage substrate etching method and comprising two or more structures bonded together, wherein the method comprises the steps of: forming a first mask pattern on one surface of a first substrate and forming a hole by etching the first substrate using the first mask pattern as an etching mask; forming a second mask pattern on one surface of a second substrate and forming a hole by etching the second substrate to a predetermined depth using the second mask pattern as an etching mask; bonding the first and second substrates together such that an etched surface of the first substrate faces an etched surface of the second substrate; and forming a third mask pattern on the second substrate and forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask.
BRIEF DESCRIPTION OF THE DRAWINGS
0012The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:
0013<figref idref="DRAWINGS">FIGS. 1A to 1H</figref> are views illustrating a procedure of an exemplary embodiment a method of multi-stage substrate etching according to the present invention;
0014<figref idref="DRAWINGS">FIG. 2</figref> is a view illustrating an exemplary embodiment of a terahertz oscillator manufactured using a method of multi-stage substrate etching according to the present invention; and
0015<figref idref="DRAWINGS">FIGS. 3A and 3B</figref> are views illustrating the structures realized using an exemplary embodiment of a method of multi-stage substrate etching according to the present invention.
DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS
0016Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.
0017<figref idref="DRAWINGS">FIGS. 1A to 1H</figref> are views illustrating a procedure of an exemplary embodiment a method of multi-stage substrate etching according to the present invention.
0018The method of multi-stage substrate etching of the embodiment includes the steps of conducting photo resist (PR) coating to one surface of a first substrate coated with an oxide film (<figref idref="DRAWINGS">FIG. 1A</figref>), forming an alignment key pattern (<figref idref="DRAWINGS">FIG. 1B</figref>), etching the first substrate to a predetermined depth (<figref idref="DRAWINGS">FIG. 1C</figref>), etching a second substrate to a predetermined depth (<figref idref="DRAWINGS">FIG. 1D</figref>), bonding the first and second substrates together (<figref idref="DRAWINGS">FIG. 1E</figref> or <figref idref="DRAWINGS">FIG. 1F</figref>), forming a mask pattern on the second substrate bonded (<figref idref="DRAWINGS">FIG. 1G</figref>), and etching the upper portion of the second substrate (<figref idref="DRAWINGS">FIG. 1H</figref>).
0019<figref idref="DRAWINGS">FIG. 1A</figref> shows the first substrate <b>300</b> having the oxide film <b>310</b> and the PR coating (<b>320</b>). The first substrate <b>300</b> is formed by the steps of depositing the oxide films <b>310</b> on both surfaces thereof, and forming the PR coating <b>320</b> on one surface of the first substrate <b>300</b> coated with the oxide film <b>310</b>. In an embodiment, the oxide film <b>310</b> may comprise a silicon oxide film (SiO<sub>2</sub>). The oxide film is a sacrificial layer for substrate etching, which layer may be any layer having a high etch ratio to a substrate. In some cases, the sacrificial layer may be replaced with the PR coating without the sacrificial layer such as an oxide layer.
0020<figref idref="DRAWINGS">FIG. 1B</figref> shows the first substrate having the alignment key pattern <b>330</b>. The alignment key pattern <b>330</b> is used for precisely bonding the first substrate <b>300</b> to other substrate or structure. The first substrate having the alignment key pattern <b>330</b> is formed by the step of forming the alignment key pattern on the PR coated surface of the first substrate.
0021<figref idref="DRAWINGS">FIG. 1C</figref> shows the first substrate etched. The first substrate etched is formed by the steps of forming a desired pattern, i.e., a first mask pattern <b>340</b>, on the other surface opposite to the alignment key pattern <b>330</b> (the opposite surface to the PR coated surface), and etching the first substrate <b>300</b> using the first mask pattern <b>340</b> as an etching mask to thereby form a hole <b>345</b>. Here, the step of removing the PR coating <b>320</b> from the first substrate <b>300</b> may be carried out.
0022<figref idref="DRAWINGS">FIG. 1D</figref> shows the first substrate and the second substrate to be bonded to the first substrate. In <figref idref="DRAWINGS">FIGS. 1C and 1D</figref>, the step of removing the oxide film <b>310</b> from the first substrate <b>300</b> may also be carried out. Meanwhile, the second substrate <b>350</b> has the same thickness as a depth of a step to be formed according to an embodiment of the invention. First, the thickness of the second substrate is regulated to a desired thickness using a method such as CMP, lapping or polishing. Next, the second substrate etched as shown in <figref idref="DRAWINGS">FIG. 1D</figref> is formed by the steps of forming a second mask pattern (not shown) on the second substrate <b>350</b>, and etching the second substrate <b>350</b> using the second mask pattern as an etching mask to thereby form a hole <b>365</b>.
0023In an embodiment, before the formation of the second mask pattern, an oxide film, a sacrificial layer for etching, may be formed on the second substrate <b>350</b>. In this case, the oxide film formed can be removed before eutectic bonding between the first substrate <b>300</b> and the second substrate <b>350</b>. Further, in an embodiment, the alignment key pattern <b>330</b> for precise arrangement between the second substrate <b>350</b> and the first substrate <b>300</b> may be formed on one surface of the second substrate <b>350</b>.
0024The second substrate <b>350</b> is irregularly etched so that an edge of the etched bottom surface has a radius of curvature. However, if the second substrate <b>350</b> is previously etched as such, the irregular etching of the etched bottom surface can be prevented through the process where the first and second substrates <b>300</b> and <b>350</b> are bonded together, and the second substrate <b>350</b> is etched to form a hole passing through the second substrate <b>350</b>, thereby forming a step structure. To this end, the second substrate <b>350</b> may be etched such that the hole <b>365</b> has a depth ½ or more times the thickness of the substrate.
0025<figref idref="DRAWINGS">FIG. 1E</figref> shows the first substrate <b>300</b> and the second substrate bonded together according to an embodiment of the invention. In <figref idref="DRAWINGS">FIG. 1E</figref>, the bonding between two substrates is carried out through the steps of the formation of a metal layer <b>370</b> on the first substrate <b>300</b> for eutectic bonding, the formation of a solder line pattern <b>380</b> on the second substrate <b>350</b>, and the eutectic bonding between the first substrate <b>300</b> and the second substrate <b>350</b>. Here, the metal layer <b>370</b> may comprise Au, and the solder line pattern <b>380</b> may comprise Sn, so that two substrates can be bonded with Au—Sn eutectic bonding. Further, the metal layer <b>370</b> and the solder line pattern <b>380</b> may include one or more metals among Cr, Ti, Ni, and Au, so as to facilitate the eutectic bonding. However, this is only for illustration, and the metal layer and the solder line pattern may comprise any material suitable to eutectic bonding.
0026While above <figref idref="DRAWINGS">FIG. 1E</figref> and following drawings have illustrated the embodiments where the metal layer <b>370</b> is formed on the first substrate <b>300</b>, and the solder line pattern <b>380</b> is formed on the second substrate <b>350</b>, other embodiment may be provided where the solder line pattern <b>380</b> is formed on the first substrate <b>300</b>, and the metal layer <b>370</b> is formed on the second substrate <b>350</b>, so that two substrates are then eutectic bonded, which embodiments are included in the scope of the present invention.
0027Meanwhile, <figref idref="DRAWINGS">FIG. 1F</figref> shows the first substrate <b>300</b> and the second substrate <b>350</b> bonded together according to another embodiment. In <figref idref="DRAWINGS">FIG. 1F</figref>, the two substrates bonded are formed by the steps of the formation of the oxide film <b>375</b> on the second substrate <b>350</b>, and the bonding of the first substrate <b>300</b> to the second substrate <b>350</b> using Si direct bonding. In a further embodiment, the substrates can be bonded together using silicon itself constituting two substrates instead of using the oxide films <b>310</b>, <b>375</b>.
0028In an embodiment, the first substrate <b>300</b> and the second substrate <b>350</b> can be precisely bonded together through arranging the two substrates using the alignment key pattern <b>330</b> formed on both the substrates as shown in <figref idref="DRAWINGS">FIGS. 1E and 1F</figref>.
0029<figref idref="DRAWINGS">FIG. 1G</figref> shows the second substrate <b>350</b> having, on the upper surface, the third mask pattern <b>390</b> so as to form a step through re-etching of the second substrate <b>350</b>. The third mask pattern is aligned with the alignment key pattern <b>330</b> positioned on the lower surface of the first substrate <b>300</b> to thereby adjust the etching point of the second substrate <b>350</b>. In an embodiment, the third mask pattern <b>390</b> may be formed identical to the second mask pattern so as to form the hole passing through the second substrate <b>350</b>.
0030<figref idref="DRAWINGS">FIG. 1H</figref> shows the substrate having a step structure created after the etching of the second substrate <b>350</b> according to an embodiment of the present invention. The step structure shown in <figref idref="DRAWINGS">FIG. 1G</figref> is formed through the steps of etching the second substrate <b>350</b> using the third mask pattern <b>390</b> as an etching mask, and removing the third mask pattern <b>390</b> after the etching. In <figref idref="DRAWINGS">FIG. 1H</figref>, since the undersurface of the second substrate <b>350</b> is previously first-etched, if the upper surface of the second substrate <b>350</b> is second-etched to form a hole passing through the second substrate <b>350</b>, an uniformly etched step structure is obtained without the occurrence of a problem of irregular etching of the etched bottom surface.
0031<figref idref="DRAWINGS">FIG. 2</figref> is a view illustrating an exemplary embodiment of a terahertz oscillator manufactured using a method of multi-stage substrate etching according to the present invention.
0032The oscillator in <figref idref="DRAWINGS">FIG. 2</figref> is fabricated by bonding between two or more structures, which as illustrated in <figref idref="DRAWINGS">FIGS. 1A to 1H</figref>, are fabricated by the steps of forming a first mask pattern on one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, forming a second mask pattern on one surface of a second substrate, forming a hole by etching the second substrate to a predetermined depth using the second mask pattern as an etching mask, bonding the first and second substrates together, forming a third mask pattern on the second substrate, and forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask.
0033The structures <b>400</b>, <b>470</b>, and <b>480</b> bonded upward are formed by a procedure shown in <figref idref="DRAWINGS">FIGS. 1A to 1H</figref>. Here, the bonding process of two or more structures may be a bonding process where the structures are bonded such that the holes formed in the structures are shared together. Further, for precise bonding, the structures may be arranged using the alignment key pattern <b>330</b>, <b>430</b>. The structures can be bonded using a Si direct bonding, eutectic bonding or other bonding method.
0034In an embodiment, various 3D structures can be provided wherein three or more structures may be bonded together in the above manner, and the number of the steps may be increased using plural substrates such as a third substrate, a fourth substrate, or others.
0035<figref idref="DRAWINGS">FIGS. 3A and 3B</figref> are views illustrating the structures realized using an exemplary embodiment of a method of multi-stage substrate etching according to the present invention. <figref idref="DRAWINGS">FIG. 3A</figref> shows the step structure formed according to an embodiment of the invention, wherein the bonded portion <b>1</b> of two substrates is uniformly etched so that an overhang structure occurring upon irregular etching of the upper substrate is not formed. <figref idref="DRAWINGS">FIG. 3B</figref> shows the enlarged step structure formed according to an embodiment of the invention, wherein the bonded portion <b>2</b> of the two substrates is also uniformly etched.
0036The method of multi-stage substrate etching according to the above-mentioned embodiments is applicable to manufacturing of the terahertz oscillator or amplifier, 3D substrate etching, or others. With the etching method, upon etching, the bottom surface can be uniformly maintained, and it can be prevented the occurrence of a radius of curvature in the bottom surface and the overhang structure occurring due to irregular etching of the edge of the upper surface of step. Thus, etching quality is improved, a precise bonding between the substrates can be obtained using the alignment key positioned on each substrate, and a multi-layer process is possible.
0037Although exemplary embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
Contents5
9 sheets
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Every citation, both ways
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| 20070114456 | Republic of Korea | A |
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| US2009120903A1 | United States of America | A1 | |
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| US2013069731A1 | United States of America | A1 | |
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Numbers
- Publication
- 8293124
- Application
- 12073311
Titles
- English
- Method of multi-stage substrate etching and terahertz oscillator manufactured using the same method
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- +812 daysthe office missed an examination deadline
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- +599 dayspendency past three years
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Classification
- CPC, 5
- H10W44/20
- H10P50/00
- H03B28/00
- H10W44/216
- B44C1/227
- IPC, 2
- G03F7 20
- B44C1 22